1 //
2 // Copyright (C) 2013-2016 Alexey Khokholov (Nuke.YKT)
3 //
4 // This library is free software; you can redistribute it and/or
5 // modify it under the terms of the GNU Lesser General Public
6 // License as published by the Free Software Foundation; either
7 // version 2.1 of the License, or (at your option) any later version.
8 //
9 // This library is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 // Lesser General Public License for more details.
13 //
14 // You should have received a copy of the GNU General Public License
15 // along with this program; if not, write to the Free Software
16 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 //
18 // Nuked OPL3 emulator.
19 // Thanks:
20 // MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
21 // Feedback and Rhythm part calculation information.
22 // forums.submarine.org.uk(carbon14, opl3):
23 // Tremolo and phase generator calculation information.
24 // OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
25 // OPL2 ROMs.
26 //
27 // version: 1.7.4
28 //
29
30 #include <stdio.h>
31 #include <stdlib.h>
32 #include <string.h>
33 #include "nukedopl.h"
34
35 #define RSM_FRAC 10
36
37 // Channel types
38
39 enum {
40 ch_2op = 0,
41 ch_4op = 1,
42 ch_4op2 = 2,
43 ch_drum = 3
44 };
45
46 // Envelope key types
47
48 enum {
49 egk_norm = 0x01,
50 egk_drum = 0x02
51 };
52
53
54 //
55 // logsin table
56 //
57
58 static const Bit16u logsinrom[256] = {
59 0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471,
60 0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365,
61 0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd,
62 0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261,
63 0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f,
64 0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd,
65 0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195,
66 0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166,
67 0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c,
68 0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118,
69 0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8,
70 0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db,
71 0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1,
72 0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9,
73 0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094,
74 0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081,
75 0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070,
76 0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060,
77 0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052,
78 0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045,
79 0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039,
80 0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f,
81 0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026,
82 0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e,
83 0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017,
84 0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011,
85 0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c,
86 0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007,
87 0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004,
88 0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002,
89 0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001,
90 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000
91 };
92
93 //
94 // exp table
95 //
96
97 static const Bit16u exprom[256] = {
98 0x000, 0x003, 0x006, 0x008, 0x00b, 0x00e, 0x011, 0x014,
99 0x016, 0x019, 0x01c, 0x01f, 0x022, 0x025, 0x028, 0x02a,
100 0x02d, 0x030, 0x033, 0x036, 0x039, 0x03c, 0x03f, 0x042,
101 0x045, 0x048, 0x04b, 0x04e, 0x051, 0x054, 0x057, 0x05a,
102 0x05d, 0x060, 0x063, 0x066, 0x069, 0x06c, 0x06f, 0x072,
103 0x075, 0x078, 0x07b, 0x07e, 0x082, 0x085, 0x088, 0x08b,
104 0x08e, 0x091, 0x094, 0x098, 0x09b, 0x09e, 0x0a1, 0x0a4,
105 0x0a8, 0x0ab, 0x0ae, 0x0b1, 0x0b5, 0x0b8, 0x0bb, 0x0be,
106 0x0c2, 0x0c5, 0x0c8, 0x0cc, 0x0cf, 0x0d2, 0x0d6, 0x0d9,
107 0x0dc, 0x0e0, 0x0e3, 0x0e7, 0x0ea, 0x0ed, 0x0f1, 0x0f4,
108 0x0f8, 0x0fb, 0x0ff, 0x102, 0x106, 0x109, 0x10c, 0x110,
109 0x114, 0x117, 0x11b, 0x11e, 0x122, 0x125, 0x129, 0x12c,
110 0x130, 0x134, 0x137, 0x13b, 0x13e, 0x142, 0x146, 0x149,
111 0x14d, 0x151, 0x154, 0x158, 0x15c, 0x160, 0x163, 0x167,
112 0x16b, 0x16f, 0x172, 0x176, 0x17a, 0x17e, 0x181, 0x185,
113 0x189, 0x18d, 0x191, 0x195, 0x199, 0x19c, 0x1a0, 0x1a4,
114 0x1a8, 0x1ac, 0x1b0, 0x1b4, 0x1b8, 0x1bc, 0x1c0, 0x1c4,
115 0x1c8, 0x1cc, 0x1d0, 0x1d4, 0x1d8, 0x1dc, 0x1e0, 0x1e4,
116 0x1e8, 0x1ec, 0x1f0, 0x1f5, 0x1f9, 0x1fd, 0x201, 0x205,
117 0x209, 0x20e, 0x212, 0x216, 0x21a, 0x21e, 0x223, 0x227,
118 0x22b, 0x230, 0x234, 0x238, 0x23c, 0x241, 0x245, 0x249,
119 0x24e, 0x252, 0x257, 0x25b, 0x25f, 0x264, 0x268, 0x26d,
120 0x271, 0x276, 0x27a, 0x27f, 0x283, 0x288, 0x28c, 0x291,
121 0x295, 0x29a, 0x29e, 0x2a3, 0x2a8, 0x2ac, 0x2b1, 0x2b5,
122 0x2ba, 0x2bf, 0x2c4, 0x2c8, 0x2cd, 0x2d2, 0x2d6, 0x2db,
123 0x2e0, 0x2e5, 0x2e9, 0x2ee, 0x2f3, 0x2f8, 0x2fd, 0x302,
124 0x306, 0x30b, 0x310, 0x315, 0x31a, 0x31f, 0x324, 0x329,
125 0x32e, 0x333, 0x338, 0x33d, 0x342, 0x347, 0x34c, 0x351,
126 0x356, 0x35b, 0x360, 0x365, 0x36a, 0x370, 0x375, 0x37a,
127 0x37f, 0x384, 0x38a, 0x38f, 0x394, 0x399, 0x39f, 0x3a4,
128 0x3a9, 0x3ae, 0x3b4, 0x3b9, 0x3bf, 0x3c4, 0x3c9, 0x3cf,
129 0x3d4, 0x3da, 0x3df, 0x3e4, 0x3ea, 0x3ef, 0x3f5, 0x3fa
130 };
131
132 //
133 // freq mult table multiplied by 2
134 //
135 // 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15
136 //
137
138 static const Bit8u mt[16] = {
139 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30
140 };
141
142 //
143 // ksl table
144 //
145
146 static const Bit8u kslrom[16] = {
147 0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64
148 };
149
150 static const Bit8u kslshift[4] = {
151 8, 1, 2, 0
152 };
153
154 //
155 // envelope generator constants
156 //
157
158 static const Bit8u eg_incstep[3][4][8] = {
159 {
160 { 0, 0, 0, 0, 0, 0, 0, 0 },
161 { 0, 0, 0, 0, 0, 0, 0, 0 },
162 { 0, 0, 0, 0, 0, 0, 0, 0 },
163 { 0, 0, 0, 0, 0, 0, 0, 0 }
164 },
165 {
166 { 0, 1, 0, 1, 0, 1, 0, 1 },
167 { 0, 1, 0, 1, 1, 1, 0, 1 },
168 { 0, 1, 1, 1, 0, 1, 1, 1 },
169 { 0, 1, 1, 1, 1, 1, 1, 1 }
170 },
171 {
172 { 1, 1, 1, 1, 1, 1, 1, 1 },
173 { 2, 2, 1, 1, 1, 1, 1, 1 },
174 { 2, 2, 1, 1, 2, 2, 1, 1 },
175 { 2, 2, 2, 2, 2, 2, 1, 1 }
176 }
177 };
178
179 static const Bit8u eg_incdesc[16] = {
180 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2
181 };
182
183 static const Bit8s eg_incsh[16] = {
184 0, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, -1, -2
185 };
186
187 //
188 // address decoding
189 //
190
191 static const Bit8s ad_slot[0x20] = {
192 0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1,
193 12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
194 };
195
196 static const Bit8u ch_slot[18] = {
197 0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32
198 };
199
200 //
201 // Envelope generator
202 //
203
204 typedef Bit16s(*envelope_sinfunc)(Bit16u phase, Bit16u envelope);
205 typedef void(*envelope_genfunc)(opl3_slot *slott);
206
OPL3_EnvelopeCalcExp(Bit32u level)207 static Bit16s OPL3_EnvelopeCalcExp(Bit32u level)
208 {
209 if (level > 0x1fff)
210 {
211 level = 0x1fff;
212 }
213 return ((exprom[(level & 0xff) ^ 0xff] | 0x400) << 1) >> (level >> 8);
214 }
215
OPL3_EnvelopeCalcSin0(Bit16u phase,Bit16u envelope)216 static Bit16s OPL3_EnvelopeCalcSin0(Bit16u phase, Bit16u envelope)
217 {
218 Bit16u out = 0;
219 Bit16u neg = 0;
220 phase &= 0x3ff;
221 if (phase & 0x200)
222 {
223 neg = ~0;
224 }
225 if (phase & 0x100)
226 {
227 out = logsinrom[(phase & 0xff) ^ 0xff];
228 }
229 else
230 {
231 out = logsinrom[phase & 0xff];
232 }
233 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
234 }
235
OPL3_EnvelopeCalcSin1(Bit16u phase,Bit16u envelope)236 static Bit16s OPL3_EnvelopeCalcSin1(Bit16u phase, Bit16u envelope)
237 {
238 Bit16u out = 0;
239 phase &= 0x3ff;
240 if (phase & 0x200)
241 {
242 out = 0x1000;
243 }
244 else if (phase & 0x100)
245 {
246 out = logsinrom[(phase & 0xff) ^ 0xff];
247 }
248 else
249 {
250 out = logsinrom[phase & 0xff];
251 }
252 return OPL3_EnvelopeCalcExp(out + (envelope << 3));
253 }
254
OPL3_EnvelopeCalcSin2(Bit16u phase,Bit16u envelope)255 static Bit16s OPL3_EnvelopeCalcSin2(Bit16u phase, Bit16u envelope)
256 {
257 Bit16u out = 0;
258 phase &= 0x3ff;
259 if (phase & 0x100)
260 {
261 out = logsinrom[(phase & 0xff) ^ 0xff];
262 }
263 else
264 {
265 out = logsinrom[phase & 0xff];
266 }
267 return OPL3_EnvelopeCalcExp(out + (envelope << 3));
268 }
269
OPL3_EnvelopeCalcSin3(Bit16u phase,Bit16u envelope)270 static Bit16s OPL3_EnvelopeCalcSin3(Bit16u phase, Bit16u envelope)
271 {
272 Bit16u out = 0;
273 phase &= 0x3ff;
274 if (phase & 0x100)
275 {
276 out = 0x1000;
277 }
278 else
279 {
280 out = logsinrom[phase & 0xff];
281 }
282 return OPL3_EnvelopeCalcExp(out + (envelope << 3));
283 }
284
OPL3_EnvelopeCalcSin4(Bit16u phase,Bit16u envelope)285 static Bit16s OPL3_EnvelopeCalcSin4(Bit16u phase, Bit16u envelope)
286 {
287 Bit16u out = 0;
288 Bit16u neg = 0;
289 phase &= 0x3ff;
290 if ((phase & 0x300) == 0x100)
291 {
292 neg = ~0;
293 }
294 if (phase & 0x200)
295 {
296 out = 0x1000;
297 }
298 else if (phase & 0x80)
299 {
300 out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
301 }
302 else
303 {
304 out = logsinrom[(phase << 1) & 0xff];
305 }
306 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
307 }
308
OPL3_EnvelopeCalcSin5(Bit16u phase,Bit16u envelope)309 static Bit16s OPL3_EnvelopeCalcSin5(Bit16u phase, Bit16u envelope)
310 {
311 Bit16u out = 0;
312 phase &= 0x3ff;
313 if (phase & 0x200)
314 {
315 out = 0x1000;
316 }
317 else if (phase & 0x80)
318 {
319 out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
320 }
321 else
322 {
323 out = logsinrom[(phase << 1) & 0xff];
324 }
325 return OPL3_EnvelopeCalcExp(out + (envelope << 3));
326 }
327
OPL3_EnvelopeCalcSin6(Bit16u phase,Bit16u envelope)328 static Bit16s OPL3_EnvelopeCalcSin6(Bit16u phase, Bit16u envelope)
329 {
330 Bit16u neg = 0;
331 phase &= 0x3ff;
332 if (phase & 0x200)
333 {
334 neg = ~0;
335 }
336 return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg;
337 }
338
OPL3_EnvelopeCalcSin7(Bit16u phase,Bit16u envelope)339 static Bit16s OPL3_EnvelopeCalcSin7(Bit16u phase, Bit16u envelope)
340 {
341 Bit16u out = 0;
342 Bit16u neg = 0;
343 phase &= 0x3ff;
344 if (phase & 0x200)
345 {
346 neg = ~0;
347 phase = (phase & 0x1ff) ^ 0x1ff;
348 }
349 out = phase << 3;
350 return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
351 }
352
353 static const envelope_sinfunc envelope_sin[8] = {
354 OPL3_EnvelopeCalcSin0,
355 OPL3_EnvelopeCalcSin1,
356 OPL3_EnvelopeCalcSin2,
357 OPL3_EnvelopeCalcSin3,
358 OPL3_EnvelopeCalcSin4,
359 OPL3_EnvelopeCalcSin5,
360 OPL3_EnvelopeCalcSin6,
361 OPL3_EnvelopeCalcSin7
362 };
363
364 static void OPL3_EnvelopeGenOff(opl3_slot *slot);
365 static void OPL3_EnvelopeGenAttack(opl3_slot *slot);
366 static void OPL3_EnvelopeGenDecay(opl3_slot *slot);
367 static void OPL3_EnvelopeGenSustain(opl3_slot *slot);
368 static void OPL3_EnvelopeGenRelease(opl3_slot *slot);
369
370 envelope_genfunc envelope_gen[5] = {
371 OPL3_EnvelopeGenOff,
372 OPL3_EnvelopeGenAttack,
373 OPL3_EnvelopeGenDecay,
374 OPL3_EnvelopeGenSustain,
375 OPL3_EnvelopeGenRelease
376 };
377
378 enum envelope_gen_num
379 {
380 envelope_gen_num_off = 0,
381 envelope_gen_num_attack = 1,
382 envelope_gen_num_decay = 2,
383 envelope_gen_num_sustain = 3,
384 envelope_gen_num_release = 4
385 };
386
OPL3_EnvelopeCalcRate(opl3_slot * slot,Bit8u reg_rate)387 static Bit8u OPL3_EnvelopeCalcRate(opl3_slot *slot, Bit8u reg_rate)
388 {
389 Bit8u rate;
390 if (reg_rate == 0x00)
391 {
392 return 0x00;
393 }
394 rate = (reg_rate << 2)
395 + (slot->reg_ksr ? slot->channel->ksv : (slot->channel->ksv >> 2));
396 if (rate > 0x3c)
397 {
398 rate = 0x3c;
399 }
400 return rate;
401 }
402
OPL3_EnvelopeUpdateKSL(opl3_slot * slot)403 static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot)
404 {
405 Bit16s ksl = (kslrom[slot->channel->f_num >> 6] << 2)
406 - ((0x08 - slot->channel->block) << 5);
407 if (ksl < 0)
408 {
409 ksl = 0;
410 }
411 slot->eg_ksl = (Bit8u)ksl;
412 }
413
OPL3_EnvelopeUpdateRate(opl3_slot * slot)414 static void OPL3_EnvelopeUpdateRate(opl3_slot *slot)
415 {
416 switch (slot->eg_gen)
417 {
418 case envelope_gen_num_off:
419 case envelope_gen_num_attack:
420 slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_ar);
421 break;
422 case envelope_gen_num_decay:
423 slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_dr);
424 break;
425 case envelope_gen_num_sustain:
426 case envelope_gen_num_release:
427 slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_rr);
428 break;
429 }
430 }
431
OPL3_EnvelopeGenOff(opl3_slot * slot)432 static void OPL3_EnvelopeGenOff(opl3_slot *slot)
433 {
434 slot->eg_rout = 0x1ff;
435 }
436
OPL3_EnvelopeGenAttack(opl3_slot * slot)437 static void OPL3_EnvelopeGenAttack(opl3_slot *slot)
438 {
439 if (slot->eg_rout == 0x00)
440 {
441 slot->eg_gen = envelope_gen_num_decay;
442 OPL3_EnvelopeUpdateRate(slot);
443 return;
444 }
445 slot->eg_rout += ((~slot->eg_rout) * slot->eg_inc) >> 3;
446 if (slot->eg_rout < 0x00)
447 {
448 slot->eg_rout = 0x00;
449 }
450 }
451
OPL3_EnvelopeGenDecay(opl3_slot * slot)452 static void OPL3_EnvelopeGenDecay(opl3_slot *slot)
453 {
454 if (slot->eg_rout >= slot->reg_sl << 4)
455 {
456 slot->eg_gen = envelope_gen_num_sustain;
457 OPL3_EnvelopeUpdateRate(slot);
458 return;
459 }
460 slot->eg_rout += slot->eg_inc;
461 }
462
OPL3_EnvelopeGenSustain(opl3_slot * slot)463 static void OPL3_EnvelopeGenSustain(opl3_slot *slot)
464 {
465 if (!slot->reg_type)
466 {
467 OPL3_EnvelopeGenRelease(slot);
468 }
469 }
470
OPL3_EnvelopeGenRelease(opl3_slot * slot)471 static void OPL3_EnvelopeGenRelease(opl3_slot *slot)
472 {
473 if (slot->eg_rout >= 0x1ff)
474 {
475 slot->eg_gen = envelope_gen_num_off;
476 slot->eg_rout = 0x1ff;
477 OPL3_EnvelopeUpdateRate(slot);
478 return;
479 }
480 slot->eg_rout += slot->eg_inc;
481 }
482
OPL3_EnvelopeCalc(opl3_slot * slot)483 static void OPL3_EnvelopeCalc(opl3_slot *slot)
484 {
485 Bit8u rate_h, rate_l;
486 Bit8u inc = 0;
487 rate_h = slot->eg_rate >> 2;
488 rate_l = slot->eg_rate & 3;
489 if (eg_incsh[rate_h] > 0)
490 {
491 if ((slot->chip->timer & ((1 << eg_incsh[rate_h]) - 1)) == 0)
492 {
493 inc = eg_incstep[eg_incdesc[rate_h]][rate_l]
494 [((slot->chip->timer)>> eg_incsh[rate_h]) & 0x07];
495 }
496 }
497 else
498 {
499 inc = eg_incstep[eg_incdesc[rate_h]][rate_l]
500 [slot->chip->timer & 0x07] << (-eg_incsh[rate_h]);
501 }
502 slot->eg_inc = inc;
503 slot->eg_out = slot->eg_rout + (slot->reg_tl << 2)
504 + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;
505 envelope_gen[slot->eg_gen](slot);
506 }
507
OPL3_EnvelopeKeyOn(opl3_slot * slot,Bit8u type)508 static void OPL3_EnvelopeKeyOn(opl3_slot *slot, Bit8u type)
509 {
510 if (!slot->key)
511 {
512 slot->eg_gen = envelope_gen_num_attack;
513 OPL3_EnvelopeUpdateRate(slot);
514 if ((slot->eg_rate >> 2) == 0x0f)
515 {
516 slot->eg_gen = envelope_gen_num_decay;
517 OPL3_EnvelopeUpdateRate(slot);
518 slot->eg_rout = 0x00;
519 }
520 slot->pg_phase = 0x00;
521 }
522 slot->key |= type;
523 }
524
OPL3_EnvelopeKeyOff(opl3_slot * slot,Bit8u type)525 static void OPL3_EnvelopeKeyOff(opl3_slot *slot, Bit8u type)
526 {
527 if (slot->key)
528 {
529 slot->key &= (~type);
530 if (!slot->key)
531 {
532 slot->eg_gen = envelope_gen_num_release;
533 OPL3_EnvelopeUpdateRate(slot);
534 }
535 }
536 }
537
538 //
539 // Phase Generator
540 //
541
OPL3_PhaseGenerate(opl3_slot * slot)542 static void OPL3_PhaseGenerate(opl3_slot *slot)
543 {
544 Bit16u f_num;
545 Bit32u basefreq;
546
547 f_num = slot->channel->f_num;
548 if (slot->reg_vib)
549 {
550 Bit8s range;
551 Bit8u vibpos;
552
553 range = (f_num >> 7) & 7;
554 vibpos = slot->chip->vibpos;
555
556 if (!(vibpos & 3))
557 {
558 range = 0;
559 }
560 else if (vibpos & 1)
561 {
562 range >>= 1;
563 }
564 range >>= slot->chip->vibshift;
565
566 if (vibpos & 4)
567 {
568 range = -range;
569 }
570 f_num += range;
571 }
572 basefreq = (f_num << slot->channel->block) >> 1;
573 slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1;
574 }
575
576 //
577 // Noise Generator
578 //
579
OPL3_NoiseGenerate(opl3_chip * chip)580 static void OPL3_NoiseGenerate(opl3_chip *chip)
581 {
582 if (chip->noise & 0x01)
583 {
584 chip->noise ^= 0x800302;
585 }
586 chip->noise >>= 1;
587 }
588
589 //
590 // Slot
591 //
592
OPL3_SlotWrite20(opl3_slot * slot,Bit8u data)593 static void OPL3_SlotWrite20(opl3_slot *slot, Bit8u data)
594 {
595 if ((data >> 7) & 0x01)
596 {
597 slot->trem = &slot->chip->tremolo;
598 }
599 else
600 {
601 slot->trem = (Bit8u*)&slot->chip->zeromod;
602 }
603 slot->reg_vib = (data >> 6) & 0x01;
604 slot->reg_type = (data >> 5) & 0x01;
605 slot->reg_ksr = (data >> 4) & 0x01;
606 slot->reg_mult = data & 0x0f;
607 OPL3_EnvelopeUpdateRate(slot);
608 }
609
OPL3_SlotWrite40(opl3_slot * slot,Bit8u data)610 static void OPL3_SlotWrite40(opl3_slot *slot, Bit8u data)
611 {
612 slot->reg_ksl = (data >> 6) & 0x03;
613 slot->reg_tl = data & 0x3f;
614 OPL3_EnvelopeUpdateKSL(slot);
615 }
616
OPL3_SlotWrite60(opl3_slot * slot,Bit8u data)617 static void OPL3_SlotWrite60(opl3_slot *slot, Bit8u data)
618 {
619 slot->reg_ar = (data >> 4) & 0x0f;
620 slot->reg_dr = data & 0x0f;
621 OPL3_EnvelopeUpdateRate(slot);
622 }
623
OPL3_SlotWrite80(opl3_slot * slot,Bit8u data)624 static void OPL3_SlotWrite80(opl3_slot *slot, Bit8u data)
625 {
626 slot->reg_sl = (data >> 4) & 0x0f;
627 if (slot->reg_sl == 0x0f)
628 {
629 slot->reg_sl = 0x1f;
630 }
631 slot->reg_rr = data & 0x0f;
632 OPL3_EnvelopeUpdateRate(slot);
633 }
634
OPL3_SlotWriteE0(opl3_slot * slot,Bit8u data)635 static void OPL3_SlotWriteE0(opl3_slot *slot, Bit8u data)
636 {
637 slot->reg_wf = data & 0x07;
638 if (slot->chip->newm == 0x00)
639 {
640 slot->reg_wf &= 0x03;
641 }
642 }
643
OPL3_SlotGeneratePhase(opl3_slot * slot,Bit16u phase)644 static void OPL3_SlotGeneratePhase(opl3_slot *slot, Bit16u phase)
645 {
646 slot->out = envelope_sin[slot->reg_wf](phase, slot->eg_out);
647 }
648
OPL3_SlotGenerate(opl3_slot * slot)649 static void OPL3_SlotGenerate(opl3_slot *slot)
650 {
651 OPL3_SlotGeneratePhase(slot, (Bit16u)(slot->pg_phase >> 9) + *slot->mod);
652 }
653
OPL3_SlotGenerateZM(opl3_slot * slot)654 static void OPL3_SlotGenerateZM(opl3_slot *slot)
655 {
656 OPL3_SlotGeneratePhase(slot, (Bit16u)(slot->pg_phase >> 9));
657 }
658
OPL3_SlotCalcFB(opl3_slot * slot)659 static void OPL3_SlotCalcFB(opl3_slot *slot)
660 {
661 if (slot->channel->fb != 0x00)
662 {
663 slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb);
664 }
665 else
666 {
667 slot->fbmod = 0;
668 }
669 slot->prout = slot->out;
670 }
671
672 //
673 // Channel
674 //
675
676 static void OPL3_ChannelSetupAlg(opl3_channel *channel);
677
OPL3_ChannelUpdateRhythm(opl3_chip * chip,Bit8u data)678 static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, Bit8u data)
679 {
680 opl3_channel *channel6;
681 opl3_channel *channel7;
682 opl3_channel *channel8;
683 Bit8u chnum;
684
685 chip->rhy = data & 0x3f;
686 if (chip->rhy & 0x20)
687 {
688 channel6 = &chip->channel[6];
689 channel7 = &chip->channel[7];
690 channel8 = &chip->channel[8];
691 channel6->out[0] = &channel6->slots[1]->out;
692 channel6->out[1] = &channel6->slots[1]->out;
693 channel6->out[2] = &chip->zeromod;
694 channel6->out[3] = &chip->zeromod;
695 channel7->out[0] = &channel7->slots[0]->out;
696 channel7->out[1] = &channel7->slots[0]->out;
697 channel7->out[2] = &channel7->slots[1]->out;
698 channel7->out[3] = &channel7->slots[1]->out;
699 channel8->out[0] = &channel8->slots[0]->out;
700 channel8->out[1] = &channel8->slots[0]->out;
701 channel8->out[2] = &channel8->slots[1]->out;
702 channel8->out[3] = &channel8->slots[1]->out;
703 for (chnum = 6; chnum < 9; chnum++)
704 {
705 chip->channel[chnum].chtype = ch_drum;
706 }
707 OPL3_ChannelSetupAlg(channel6);
708 //hh
709 if (chip->rhy & 0x01)
710 {
711 OPL3_EnvelopeKeyOn(channel7->slots[0], egk_drum);
712 }
713 else
714 {
715 OPL3_EnvelopeKeyOff(channel7->slots[0], egk_drum);
716 }
717 //tc
718 if (chip->rhy & 0x02)
719 {
720 OPL3_EnvelopeKeyOn(channel8->slots[1], egk_drum);
721 }
722 else
723 {
724 OPL3_EnvelopeKeyOff(channel8->slots[1], egk_drum);
725 }
726 //tom
727 if (chip->rhy & 0x04)
728 {
729 OPL3_EnvelopeKeyOn(channel8->slots[0], egk_drum);
730 }
731 else
732 {
733 OPL3_EnvelopeKeyOff(channel8->slots[0], egk_drum);
734 }
735 //sd
736 if (chip->rhy & 0x08)
737 {
738 OPL3_EnvelopeKeyOn(channel7->slots[1], egk_drum);
739 }
740 else
741 {
742 OPL3_EnvelopeKeyOff(channel7->slots[1], egk_drum);
743 }
744 //bd
745 if (chip->rhy & 0x10)
746 {
747 OPL3_EnvelopeKeyOn(channel6->slots[0], egk_drum);
748 OPL3_EnvelopeKeyOn(channel6->slots[1], egk_drum);
749 }
750 else
751 {
752 OPL3_EnvelopeKeyOff(channel6->slots[0], egk_drum);
753 OPL3_EnvelopeKeyOff(channel6->slots[1], egk_drum);
754 }
755 }
756 else
757 {
758 for (chnum = 6; chnum < 9; chnum++)
759 {
760 chip->channel[chnum].chtype = ch_2op;
761 OPL3_ChannelSetupAlg(&chip->channel[chnum]);
762 OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[0], egk_drum);
763 OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[1], egk_drum);
764 }
765 }
766 }
767
OPL3_ChannelWriteA0(opl3_channel * channel,Bit8u data)768 static void OPL3_ChannelWriteA0(opl3_channel *channel, Bit8u data)
769 {
770 if (channel->chip->newm && channel->chtype == ch_4op2)
771 {
772 return;
773 }
774 channel->f_num = (channel->f_num & 0x300) | data;
775 channel->ksv = (channel->block << 1)
776 | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
777 OPL3_EnvelopeUpdateKSL(channel->slots[0]);
778 OPL3_EnvelopeUpdateKSL(channel->slots[1]);
779 OPL3_EnvelopeUpdateRate(channel->slots[0]);
780 OPL3_EnvelopeUpdateRate(channel->slots[1]);
781 if (channel->chip->newm && channel->chtype == ch_4op)
782 {
783 channel->pair->f_num = channel->f_num;
784 channel->pair->ksv = channel->ksv;
785 OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
786 OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
787 OPL3_EnvelopeUpdateRate(channel->pair->slots[0]);
788 OPL3_EnvelopeUpdateRate(channel->pair->slots[1]);
789 }
790 }
791
OPL3_ChannelWriteB0(opl3_channel * channel,Bit8u data)792 static void OPL3_ChannelWriteB0(opl3_channel *channel, Bit8u data)
793 {
794 if (channel->chip->newm && channel->chtype == ch_4op2)
795 {
796 return;
797 }
798 channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);
799 channel->block = (data >> 2) & 0x07;
800 channel->ksv = (channel->block << 1)
801 | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
802 OPL3_EnvelopeUpdateKSL(channel->slots[0]);
803 OPL3_EnvelopeUpdateKSL(channel->slots[1]);
804 OPL3_EnvelopeUpdateRate(channel->slots[0]);
805 OPL3_EnvelopeUpdateRate(channel->slots[1]);
806 if (channel->chip->newm && channel->chtype == ch_4op)
807 {
808 channel->pair->f_num = channel->f_num;
809 channel->pair->block = channel->block;
810 channel->pair->ksv = channel->ksv;
811 OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
812 OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
813 OPL3_EnvelopeUpdateRate(channel->pair->slots[0]);
814 OPL3_EnvelopeUpdateRate(channel->pair->slots[1]);
815 }
816 }
817
OPL3_ChannelSetupAlg(opl3_channel * channel)818 static void OPL3_ChannelSetupAlg(opl3_channel *channel)
819 {
820 if (channel->chtype == ch_drum)
821 {
822 switch (channel->alg & 0x01)
823 {
824 case 0x00:
825 channel->slots[0]->mod = &channel->slots[0]->fbmod;
826 channel->slots[1]->mod = &channel->slots[0]->out;
827 break;
828 case 0x01:
829 channel->slots[0]->mod = &channel->slots[0]->fbmod;
830 channel->slots[1]->mod = &channel->chip->zeromod;
831 break;
832 }
833 return;
834 }
835 if (channel->alg & 0x08)
836 {
837 return;
838 }
839 if (channel->alg & 0x04)
840 {
841 channel->pair->out[0] = &channel->chip->zeromod;
842 channel->pair->out[1] = &channel->chip->zeromod;
843 channel->pair->out[2] = &channel->chip->zeromod;
844 channel->pair->out[3] = &channel->chip->zeromod;
845 switch (channel->alg & 0x03)
846 {
847 case 0x00:
848 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
849 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
850 channel->slots[0]->mod = &channel->pair->slots[1]->out;
851 channel->slots[1]->mod = &channel->slots[0]->out;
852 channel->out[0] = &channel->slots[1]->out;
853 channel->out[1] = &channel->chip->zeromod;
854 channel->out[2] = &channel->chip->zeromod;
855 channel->out[3] = &channel->chip->zeromod;
856 break;
857 case 0x01:
858 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
859 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
860 channel->slots[0]->mod = &channel->chip->zeromod;
861 channel->slots[1]->mod = &channel->slots[0]->out;
862 channel->out[0] = &channel->pair->slots[1]->out;
863 channel->out[1] = &channel->slots[1]->out;
864 channel->out[2] = &channel->chip->zeromod;
865 channel->out[3] = &channel->chip->zeromod;
866 break;
867 case 0x02:
868 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
869 channel->pair->slots[1]->mod = &channel->chip->zeromod;
870 channel->slots[0]->mod = &channel->pair->slots[1]->out;
871 channel->slots[1]->mod = &channel->slots[0]->out;
872 channel->out[0] = &channel->pair->slots[0]->out;
873 channel->out[1] = &channel->slots[1]->out;
874 channel->out[2] = &channel->chip->zeromod;
875 channel->out[3] = &channel->chip->zeromod;
876 break;
877 case 0x03:
878 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
879 channel->pair->slots[1]->mod = &channel->chip->zeromod;
880 channel->slots[0]->mod = &channel->pair->slots[1]->out;
881 channel->slots[1]->mod = &channel->chip->zeromod;
882 channel->out[0] = &channel->pair->slots[0]->out;
883 channel->out[1] = &channel->slots[0]->out;
884 channel->out[2] = &channel->slots[1]->out;
885 channel->out[3] = &channel->chip->zeromod;
886 break;
887 }
888 }
889 else
890 {
891 switch (channel->alg & 0x01)
892 {
893 case 0x00:
894 channel->slots[0]->mod = &channel->slots[0]->fbmod;
895 channel->slots[1]->mod = &channel->slots[0]->out;
896 channel->out[0] = &channel->slots[1]->out;
897 channel->out[1] = &channel->chip->zeromod;
898 channel->out[2] = &channel->chip->zeromod;
899 channel->out[3] = &channel->chip->zeromod;
900 break;
901 case 0x01:
902 channel->slots[0]->mod = &channel->slots[0]->fbmod;
903 channel->slots[1]->mod = &channel->chip->zeromod;
904 channel->out[0] = &channel->slots[0]->out;
905 channel->out[1] = &channel->slots[1]->out;
906 channel->out[2] = &channel->chip->zeromod;
907 channel->out[3] = &channel->chip->zeromod;
908 break;
909 }
910 }
911 }
912
OPL3_ChannelWriteC0(opl3_channel * channel,Bit8u data)913 static void OPL3_ChannelWriteC0(opl3_channel *channel, Bit8u data)
914 {
915 channel->fb = (data & 0x0e) >> 1;
916 channel->con = data & 0x01;
917 channel->alg = channel->con;
918 if (channel->chip->newm)
919 {
920 if (channel->chtype == ch_4op)
921 {
922 channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);
923 channel->alg = 0x08;
924 OPL3_ChannelSetupAlg(channel->pair);
925 }
926 else if (channel->chtype == ch_4op2)
927 {
928 channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);
929 channel->pair->alg = 0x08;
930 OPL3_ChannelSetupAlg(channel);
931 }
932 else
933 {
934 OPL3_ChannelSetupAlg(channel);
935 }
936 }
937 else
938 {
939 OPL3_ChannelSetupAlg(channel);
940 }
941 if (channel->chip->newm)
942 {
943 channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;
944 channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;
945 }
946 else
947 {
948 channel->cha = channel->chb = ~0;
949 }
950 }
951
OPL3_ChannelKeyOn(opl3_channel * channel)952 static void OPL3_ChannelKeyOn(opl3_channel *channel)
953 {
954 if (channel->chip->newm)
955 {
956 if (channel->chtype == ch_4op)
957 {
958 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
959 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
960 OPL3_EnvelopeKeyOn(channel->pair->slots[0], egk_norm);
961 OPL3_EnvelopeKeyOn(channel->pair->slots[1], egk_norm);
962 }
963 else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
964 {
965 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
966 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
967 }
968 }
969 else
970 {
971 OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
972 OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
973 }
974 }
975
OPL3_ChannelKeyOff(opl3_channel * channel)976 static void OPL3_ChannelKeyOff(opl3_channel *channel)
977 {
978 if (channel->chip->newm)
979 {
980 if (channel->chtype == ch_4op)
981 {
982 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
983 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
984 OPL3_EnvelopeKeyOff(channel->pair->slots[0], egk_norm);
985 OPL3_EnvelopeKeyOff(channel->pair->slots[1], egk_norm);
986 }
987 else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
988 {
989 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
990 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
991 }
992 }
993 else
994 {
995 OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
996 OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
997 }
998 }
999
OPL3_ChannelSet4Op(opl3_chip * chip,Bit8u data)1000 static void OPL3_ChannelSet4Op(opl3_chip *chip, Bit8u data)
1001 {
1002 Bit8u bit;
1003 Bit8u chnum;
1004 for (bit = 0; bit < 6; bit++)
1005 {
1006 chnum = bit;
1007 if (bit >= 3)
1008 {
1009 chnum += 9 - 3;
1010 }
1011 if ((data >> bit) & 0x01)
1012 {
1013 chip->channel[chnum].chtype = ch_4op;
1014 chip->channel[chnum + 3].chtype = ch_4op2;
1015 }
1016 else
1017 {
1018 chip->channel[chnum].chtype = ch_2op;
1019 chip->channel[chnum + 3].chtype = ch_2op;
1020 }
1021 }
1022 }
1023
OPL3_ClipSample(Bit32s sample)1024 static Bit16s OPL3_ClipSample(Bit32s sample)
1025 {
1026 if (sample > 32767)
1027 {
1028 sample = 32767;
1029 }
1030 else if (sample < -32768)
1031 {
1032 sample = -32768;
1033 }
1034 return (Bit16s)sample;
1035 }
1036
OPL3_GenerateRhythm1(opl3_chip * chip)1037 static void OPL3_GenerateRhythm1(opl3_chip *chip)
1038 {
1039 opl3_channel *channel6;
1040 opl3_channel *channel7;
1041 opl3_channel *channel8;
1042 Bit16u phase14;
1043 Bit16u phase17;
1044 Bit16u phase;
1045 Bit16u phasebit;
1046
1047 channel6 = &chip->channel[6];
1048 channel7 = &chip->channel[7];
1049 channel8 = &chip->channel[8];
1050 OPL3_SlotGenerate(channel6->slots[0]);
1051 phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
1052 phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
1053 phase = 0x00;
1054 //hh tc phase bit
1055 phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04)
1056 | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
1057 //hh
1058 phase = (phasebit << 9)
1059 | (0x34 << ((phasebit ^ (chip->noise & 0x01)) << 1));
1060 OPL3_SlotGeneratePhase(channel7->slots[0], phase);
1061 //tt
1062 OPL3_SlotGenerateZM(channel8->slots[0]);
1063 }
1064
OPL3_GenerateRhythm2(opl3_chip * chip)1065 static void OPL3_GenerateRhythm2(opl3_chip *chip)
1066 {
1067 opl3_channel *channel6;
1068 opl3_channel *channel7;
1069 opl3_channel *channel8;
1070 Bit16u phase14;
1071 Bit16u phase17;
1072 Bit16u phase;
1073 Bit16u phasebit;
1074
1075 channel6 = &chip->channel[6];
1076 channel7 = &chip->channel[7];
1077 channel8 = &chip->channel[8];
1078 OPL3_SlotGenerate(channel6->slots[1]);
1079 phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
1080 phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
1081 phase = 0x00;
1082 //hh tc phase bit
1083 phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04)
1084 | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
1085 //sd
1086 phase = (0x100 << ((phase14 >> 8) & 0x01)) ^ ((chip->noise & 0x01) << 8);
1087 OPL3_SlotGeneratePhase(channel7->slots[1], phase);
1088 //tc
1089 phase = 0x100 | (phasebit << 9);
1090 OPL3_SlotGeneratePhase(channel8->slots[1], phase);
1091 }
1092
OPL3_Generate(opl3_chip * chip,Bit16s * buf)1093 void OPL3_Generate(opl3_chip *chip, Bit16s *buf)
1094 {
1095 Bit8u ii;
1096 Bit8u jj;
1097 Bit16s accm;
1098
1099 buf[1] = OPL3_ClipSample(chip->mixbuff[1]);
1100
1101 for (ii = 0; ii < 12; ii++)
1102 {
1103 OPL3_SlotCalcFB(&chip->slot[ii]);
1104 OPL3_PhaseGenerate(&chip->slot[ii]);
1105 OPL3_EnvelopeCalc(&chip->slot[ii]);
1106 OPL3_SlotGenerate(&chip->slot[ii]);
1107 }
1108
1109 for (ii = 12; ii < 15; ii++)
1110 {
1111 OPL3_SlotCalcFB(&chip->slot[ii]);
1112 OPL3_PhaseGenerate(&chip->slot[ii]);
1113 OPL3_EnvelopeCalc(&chip->slot[ii]);
1114 }
1115
1116 if (chip->rhy & 0x20)
1117 {
1118 OPL3_GenerateRhythm1(chip);
1119 }
1120 else
1121 {
1122 OPL3_SlotGenerate(&chip->slot[12]);
1123 OPL3_SlotGenerate(&chip->slot[13]);
1124 OPL3_SlotGenerate(&chip->slot[14]);
1125 }
1126
1127 chip->mixbuff[0] = 0;
1128 for (ii = 0; ii < 18; ii++)
1129 {
1130 accm = 0;
1131 for (jj = 0; jj < 4; jj++)
1132 {
1133 accm += *chip->channel[ii].out[jj];
1134 }
1135 chip->mixbuff[0] += (Bit16s)(accm & chip->channel[ii].cha);
1136 }
1137
1138 for (ii = 15; ii < 18; ii++)
1139 {
1140 OPL3_SlotCalcFB(&chip->slot[ii]);
1141 OPL3_PhaseGenerate(&chip->slot[ii]);
1142 OPL3_EnvelopeCalc(&chip->slot[ii]);
1143 }
1144
1145 if (chip->rhy & 0x20)
1146 {
1147 OPL3_GenerateRhythm2(chip);
1148 }
1149 else
1150 {
1151 OPL3_SlotGenerate(&chip->slot[15]);
1152 OPL3_SlotGenerate(&chip->slot[16]);
1153 OPL3_SlotGenerate(&chip->slot[17]);
1154 }
1155
1156 buf[0] = OPL3_ClipSample(chip->mixbuff[0]);
1157
1158 for (ii = 18; ii < 33; ii++)
1159 {
1160 OPL3_SlotCalcFB(&chip->slot[ii]);
1161 OPL3_PhaseGenerate(&chip->slot[ii]);
1162 OPL3_EnvelopeCalc(&chip->slot[ii]);
1163 OPL3_SlotGenerate(&chip->slot[ii]);
1164 }
1165
1166 chip->mixbuff[1] = 0;
1167 for (ii = 0; ii < 18; ii++)
1168 {
1169 accm = 0;
1170 for (jj = 0; jj < 4; jj++)
1171 {
1172 accm += *chip->channel[ii].out[jj];
1173 }
1174 chip->mixbuff[1] += (Bit16s)(accm & chip->channel[ii].chb);
1175 }
1176
1177 for (ii = 33; ii < 36; ii++)
1178 {
1179 OPL3_SlotCalcFB(&chip->slot[ii]);
1180 OPL3_PhaseGenerate(&chip->slot[ii]);
1181 OPL3_EnvelopeCalc(&chip->slot[ii]);
1182 OPL3_SlotGenerate(&chip->slot[ii]);
1183 }
1184
1185 OPL3_NoiseGenerate(chip);
1186
1187 if ((chip->timer & 0x3f) == 0x3f)
1188 {
1189 chip->tremolopos = (chip->tremolopos + 1) % 210;
1190 }
1191 if (chip->tremolopos < 105)
1192 {
1193 chip->tremolo = chip->tremolopos >> chip->tremoloshift;
1194 }
1195 else
1196 {
1197 chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift;
1198 }
1199
1200 if ((chip->timer & 0x3ff) == 0x3ff)
1201 {
1202 chip->vibpos = (chip->vibpos + 1) & 7;
1203 }
1204
1205 chip->timer++;
1206
1207 while (chip->writebuf[chip->writebuf_cur].time <= chip->writebuf_samplecnt)
1208 {
1209 if (!(chip->writebuf[chip->writebuf_cur].reg & 0x200))
1210 {
1211 break;
1212 }
1213 chip->writebuf[chip->writebuf_cur].reg &= 0x1ff;
1214 OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_cur].reg,
1215 chip->writebuf[chip->writebuf_cur].data);
1216 chip->writebuf_cur = (chip->writebuf_cur + 1) % OPL_WRITEBUF_SIZE;
1217 }
1218 chip->writebuf_samplecnt++;
1219 }
1220
OPL3_GenerateResampled(opl3_chip * chip,Bit16s * buf)1221 void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf)
1222 {
1223 while (chip->samplecnt >= chip->rateratio)
1224 {
1225 chip->oldsamples[0] = chip->samples[0];
1226 chip->oldsamples[1] = chip->samples[1];
1227 OPL3_Generate(chip, chip->samples);
1228 chip->samplecnt -= chip->rateratio;
1229 }
1230 buf[0] = (Bit16s)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
1231 + chip->samples[0] * chip->samplecnt) / chip->rateratio);
1232 buf[1] = (Bit16s)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
1233 + chip->samples[1] * chip->samplecnt) / chip->rateratio);
1234 chip->samplecnt += 1 << RSM_FRAC;
1235 }
1236
OPL3_Reset(opl3_chip * chip,Bit32u samplerate)1237 void OPL3_Reset(opl3_chip *chip, Bit32u samplerate)
1238 {
1239 Bit8u slotnum;
1240 Bit8u channum;
1241
1242 memset(chip, 0, sizeof(opl3_chip));
1243 for (slotnum = 0; slotnum < 36; slotnum++)
1244 {
1245 chip->slot[slotnum].chip = chip;
1246 chip->slot[slotnum].mod = &chip->zeromod;
1247 chip->slot[slotnum].eg_rout = 0x1ff;
1248 chip->slot[slotnum].eg_out = 0x1ff;
1249 chip->slot[slotnum].eg_gen = envelope_gen_num_off;
1250 chip->slot[slotnum].trem = (Bit8u*)&chip->zeromod;
1251 }
1252 for (channum = 0; channum < 18; channum++)
1253 {
1254 chip->channel[channum].slots[0] = &chip->slot[ch_slot[channum]];
1255 chip->channel[channum].slots[1] = &chip->slot[ch_slot[channum] + 3];
1256 chip->slot[ch_slot[channum]].channel = &chip->channel[channum];
1257 chip->slot[ch_slot[channum] + 3].channel = &chip->channel[channum];
1258 if ((channum % 9) < 3)
1259 {
1260 chip->channel[channum].pair = &chip->channel[channum + 3];
1261 }
1262 else if ((channum % 9) < 6)
1263 {
1264 chip->channel[channum].pair = &chip->channel[channum - 3];
1265 }
1266 chip->channel[channum].chip = chip;
1267 chip->channel[channum].out[0] = &chip->zeromod;
1268 chip->channel[channum].out[1] = &chip->zeromod;
1269 chip->channel[channum].out[2] = &chip->zeromod;
1270 chip->channel[channum].out[3] = &chip->zeromod;
1271 chip->channel[channum].chtype = ch_2op;
1272 chip->channel[channum].cha = ~0;
1273 chip->channel[channum].chb = ~0;
1274 OPL3_ChannelSetupAlg(&chip->channel[channum]);
1275 }
1276 chip->noise = 0x306600;
1277 chip->rateratio = (samplerate << RSM_FRAC) / 49716;
1278 chip->tremoloshift = 4;
1279 chip->vibshift = 1;
1280 }
1281
OPL3_WriteReg(opl3_chip * chip,Bit16u reg,Bit8u v)1282 void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v)
1283 {
1284 Bit8u high = (reg >> 8) & 0x01;
1285 Bit8u regm = reg & 0xff;
1286 switch (regm & 0xf0)
1287 {
1288 case 0x00:
1289 if (high)
1290 {
1291 switch (regm & 0x0f)
1292 {
1293 case 0x04:
1294 OPL3_ChannelSet4Op(chip, v);
1295 break;
1296 case 0x05:
1297 chip->newm = v & 0x01;
1298 break;
1299 }
1300 }
1301 else
1302 {
1303 switch (regm & 0x0f)
1304 {
1305 case 0x08:
1306 chip->nts = (v >> 6) & 0x01;
1307 break;
1308 }
1309 }
1310 break;
1311 case 0x20:
1312 case 0x30:
1313 if (ad_slot[regm & 0x1f] >= 0)
1314 {
1315 OPL3_SlotWrite20(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1316 }
1317 break;
1318 case 0x40:
1319 case 0x50:
1320 if (ad_slot[regm & 0x1f] >= 0)
1321 {
1322 OPL3_SlotWrite40(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1323 }
1324 break;
1325 case 0x60:
1326 case 0x70:
1327 if (ad_slot[regm & 0x1f] >= 0)
1328 {
1329 OPL3_SlotWrite60(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1330 }
1331 break;
1332 case 0x80:
1333 case 0x90:
1334 if (ad_slot[regm & 0x1f] >= 0)
1335 {
1336 OPL3_SlotWrite80(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1337 }
1338 break;
1339 case 0xe0:
1340 case 0xf0:
1341 if (ad_slot[regm & 0x1f] >= 0)
1342 {
1343 OPL3_SlotWriteE0(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1344 }
1345 break;
1346 case 0xa0:
1347 if ((regm & 0x0f) < 9)
1348 {
1349 OPL3_ChannelWriteA0(&chip->channel[9 * high + (regm & 0x0f)], v);
1350 }
1351 break;
1352 case 0xb0:
1353 if (regm == 0xbd && !high)
1354 {
1355 chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2;
1356 chip->vibshift = ((v >> 6) & 0x01) ^ 1;
1357 OPL3_ChannelUpdateRhythm(chip, v);
1358 }
1359 else if ((regm & 0x0f) < 9)
1360 {
1361 OPL3_ChannelWriteB0(&chip->channel[9 * high + (regm & 0x0f)], v);
1362 if (v & 0x20)
1363 {
1364 OPL3_ChannelKeyOn(&chip->channel[9 * high + (regm & 0x0f)]);
1365 }
1366 else
1367 {
1368 OPL3_ChannelKeyOff(&chip->channel[9 * high + (regm & 0x0f)]);
1369 }
1370 }
1371 break;
1372 case 0xc0:
1373 if ((regm & 0x0f) < 9)
1374 {
1375 OPL3_ChannelWriteC0(&chip->channel[9 * high + (regm & 0x0f)], v);
1376 }
1377 break;
1378 }
1379 }
1380
OPL3_WriteRegBuffered(opl3_chip * chip,Bit16u reg,Bit8u v)1381 void OPL3_WriteRegBuffered(opl3_chip *chip, Bit16u reg, Bit8u v)
1382 {
1383 Bit64u time1, time2;
1384
1385 if (chip->writebuf[chip->writebuf_last].reg & 0x200)
1386 {
1387 OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_last].reg & 0x1ff,
1388 chip->writebuf[chip->writebuf_last].data);
1389
1390 chip->writebuf_cur = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
1391 chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
1392 }
1393
1394 chip->writebuf[chip->writebuf_last].reg = reg | 0x200;
1395 chip->writebuf[chip->writebuf_last].data = v;
1396 time1 = chip->writebuf_lasttime + OPL_WRITEBUF_DELAY;
1397 time2 = chip->writebuf_samplecnt;
1398
1399 if (time1 < time2)
1400 {
1401 time1 = time2;
1402 }
1403
1404 chip->writebuf[chip->writebuf_last].time = time1;
1405 chip->writebuf_lasttime = time1;
1406 chip->writebuf_last = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
1407 }
1408
OPL3_GenerateStream(opl3_chip * chip,Bit16s * sndptr,Bit32u numsamples)1409 void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples)
1410 {
1411 Bit32u i;
1412
1413 for(i = 0; i < numsamples; i++)
1414 {
1415 OPL3_GenerateResampled(chip, sndptr);
1416 sndptr += 2;
1417 }
1418 }
1419