1 /*
2 **
3 ** File: ym2413.c - software implementation of YM2413
4 ** FM sound generator type OPLL
5 **
6 ** Copyright Jarek Burczynski
7 **
8 ** Version 1.0
9 **
10
11 Features as listed in LSI-212413A2 data sheet:
12 1. FM Sound Generator for real sound creation.
13 2. Two Selectable modes: 9 simultaneous sounds or 6 melody sounds plus 5 rhythm sounds
14 (different tones can be used together in either case).
15 3. Built-in Instruments data (15 melody tones, 5 rhythm tones, "CAPTAIN and TELETEXT applicalbe tones).
16 4. Built-in DA Converter.
17 5. Built-in Quartz Oscillator.
18 6. Built-in Vibrato Oscillator/AM Oscillator
19 7. TTL Compatible Input.
20 8. Si-Gate NMOS LSI
21 9. A single 5V power source.
22
23 to do:
24
25 - make sure of the sinus amplitude bits
26
27 - make sure of the EG resolution bits (looks like the biggest
28 modulation index generated by the modulator is 123, 124 = no modulation)
29 - find proper algorithm for attack phase of EG
30
31 - tune up instruments ROM
32
33 - support sample replay in test mode (it is NOT as simple as setting bit 0
34 in register 0x0f and using register 0x10 for sample data).
35 Which games use this feature ?
36
37
38 */
39
40 #include <stdio.h>
41 #include <math.h>
42 #include "mamedef.h"
43 #include <stdlib.h>
44 #include <string.h> // for memset
45 #include <stddef.h> // for NULL
46 //#include "sndintrf.h"
47 #include "ym2413.h"
48
49 /* output final shift */
50 #if (SAMPLE_BITS==16)
51 #define FINAL_SH (0)
52 #define MAXOUT (+32767)
53 #define MINOUT (-32768)
54 #else
55 #define FINAL_SH (8)
56 #define MAXOUT (+127)
57 #define MINOUT (-128)
58 #endif
59
60
61 #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
62 #define EG_SH 16 /* 16.16 fixed point (EG timing) */
63 #define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
64
65 #define FREQ_MASK ((1<<FREQ_SH)-1)
66
67 /* envelope output entries */
68 #define ENV_BITS 10
69 #define ENV_LEN (1<<ENV_BITS)
70 #define ENV_STEP (128.0/ENV_LEN)
71
72 #define MAX_ATT_INDEX ((1<<(ENV_BITS-2))-1) /*255*/
73 #define MIN_ATT_INDEX (0)
74
75 /* sinwave entries */
76 #define SIN_BITS 10
77 #define SIN_LEN (1<<SIN_BITS)
78 #define SIN_MASK (SIN_LEN-1)
79
80 #define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
81
82
83
84 /* register number to channel number , slot offset */
85 #define SLOT1 0
86 #define SLOT2 1
87
88 /* Envelope Generator phases */
89
90 #define EG_DMP 5
91 #define EG_ATT 4
92 #define EG_DEC 3
93 #define EG_SUS 2
94 #define EG_REL 1
95 #define EG_OFF 0
96
97
98 /* save output as raw 16-bit sample */
99
100 //#define SAVE_SAMPLE
101
102 #ifdef SAVE_SAMPLE
103 #include <stdio.h>
104
acc_calc(signed int value)105 INLINE signed int acc_calc(signed int value)
106 {
107 if (value>=0)
108 {
109 if (value < 0x0200)
110 return (value & ~0);
111 if (value < 0x0400)
112 return (value & ~1);
113 if (value < 0x0800)
114 return (value & ~3);
115 if (value < 0x1000)
116 return (value & ~7);
117 if (value < 0x2000)
118 return (value & ~15);
119 if (value < 0x4000)
120 return (value & ~31);
121 return (value & ~63);
122 }
123 /*else value < 0*/
124 if (value > -0x0200)
125 return (~abs(value) & ~0);
126 if (value > -0x0400)
127 return (~abs(value) & ~1);
128 if (value > -0x0800)
129 return (~abs(value) & ~3);
130 if (value > -0x1000)
131 return (~abs(value) & ~7);
132 if (value > -0x2000)
133 return (~abs(value) & ~15);
134 if (value > -0x4000)
135 return (~abs(value) & ~31);
136 return (~abs(value) & ~63);
137 }
138
139
140 static FILE *sample[1];
141 #if 0 /*save to MONO file */
142 #define SAVE_ALL_CHANNELS \
143 { signed int pom = acc_calc(mo); \
144 fputc((unsigned short)pom&0xff,sample[0]); \
145 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
146 }
147 #else /*save to STEREO file */
148 #define SAVE_ALL_CHANNELS \
149 { signed int pom = mo; \
150 fputc((unsigned short)pom&0xff,sample[0]); \
151 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
152 pom = ro; \
153 fputc((unsigned short)pom&0xff,sample[0]); \
154 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
155 }
156 #define SAVE_SEPARATE_CHANNEL(j) \
157 { signed int pom = outchan; \
158 fputc((unsigned short)pom&0xff,sample[0]); \
159 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
160 pom = chip->instvol_r[j]>>4; \
161 fputc((unsigned short)pom&0xff,sample[0]); \
162 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
163 }
164 #endif
165 #endif
166
167 //#define LOG_CYM_FILE 0
168 //static FILE * cymfile = NULL;
169
170
171
172
173 typedef struct{
174 UINT32 ar; /* attack rate: AR<<2 */
175 UINT32 dr; /* decay rate: DR<<2 */
176 UINT32 rr; /* release rate:RR<<2 */
177 UINT8 KSR; /* key scale rate */
178 UINT8 ksl; /* keyscale level */
179 UINT8 ksr; /* key scale rate: kcode>>KSR */
180 UINT8 mul; /* multiple: mul_tab[ML] */
181
182 /* Phase Generator */
183 UINT32 phase; /* frequency counter */
184 UINT32 freq; /* frequency counter step */
185 UINT8 fb_shift; /* feedback shift value */
186 INT32 op1_out[2]; /* slot1 output for feedback */
187
188 /* Envelope Generator */
189 UINT8 eg_type; /* percussive/nonpercussive mode*/
190 UINT8 state; /* phase type */
191 UINT32 TL; /* total level: TL << 2 */
192 INT32 TLL; /* adjusted now TL */
193 INT32 volume; /* envelope counter */
194 UINT32 sl; /* sustain level: sl_tab[SL] */
195
196 UINT8 eg_sh_dp; /* (dump state) */
197 UINT8 eg_sel_dp; /* (dump state) */
198 UINT8 eg_sh_ar; /* (attack state) */
199 UINT8 eg_sel_ar; /* (attack state) */
200 UINT8 eg_sh_dr; /* (decay state) */
201 UINT8 eg_sel_dr; /* (decay state) */
202 UINT8 eg_sh_rr; /* (release state for non-perc.)*/
203 UINT8 eg_sel_rr; /* (release state for non-perc.)*/
204 UINT8 eg_sh_rs; /* (release state for perc.mode)*/
205 UINT8 eg_sel_rs; /* (release state for perc.mode)*/
206
207 UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
208
209 /* LFO */
210 UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
211 UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
212
213 /* waveform select */
214 unsigned int wavetable;
215 } OPLL_SLOT;
216
217 typedef struct{
218 OPLL_SLOT SLOT[2];
219 /* phase generator state */
220 UINT32 block_fnum; /* block+fnum */
221 UINT32 fc; /* Freq. freqement base */
222 UINT32 ksl_base; /* KeyScaleLevel Base step */
223 UINT8 kcode; /* key code (for key scaling) */
224 UINT8 sus; /* sus on/off (release speed in percussive mode)*/
225 UINT8 Muted;
226 } OPLL_CH;
227
228 /* chip state */
229 typedef struct {
230 OPLL_CH P_CH[9]; /* OPLL chips have 9 channels*/
231 UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode)*/
232 UINT8 MuteSpc[5]; /* Mute Special: 5 Rhythm */
233
234 UINT32 eg_cnt; /* global envelope generator counter */
235 UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
236 UINT32 eg_timer_add; /* step of eg_timer */
237 UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
238
239 UINT8 rhythm; /* Rhythm mode */
240
241 /* LFO */
242 UINT32 LFO_AM;
243 INT32 LFO_PM;
244 UINT32 lfo_am_cnt;
245 UINT32 lfo_am_inc;
246 UINT32 lfo_pm_cnt;
247 UINT32 lfo_pm_inc;
248
249 UINT32 noise_rng; /* 23 bit noise shift register */
250 UINT32 noise_p; /* current noise 'phase' */
251 UINT32 noise_f; /* current noise period */
252
253
254 /* instrument settings */
255 /*
256 0-user instrument
257 1-15 - fixed instruments
258 16 -bass drum settings
259 17,18 - other percussion instruments
260 */
261 UINT8 inst_tab[19][8];
262
263 /* external event callback handlers */
264 OPLL_UPDATEHANDLER UpdateHandler; /* stream update handler */
265 void * UpdateParam; /* stream update parameter */
266
267 UINT32 fn_tab[1024]; /* fnumber->increment counter */
268
269 UINT8 address; /* address register */
270 UINT8 status; /* status flag */
271
272 UINT8 VRC7_Mode;
273 int clock; /* master clock (Hz) */
274 int rate; /* sampling rate (Hz) */
275 double freqbase; /* frequency base */
276
277 signed int output[2];
278 signed int outchan;
279 } YM2413;
280
281 /* key scale level */
282 /* table is 3dB/octave, DV converts this into 6dB/octave */
283 /* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
284 #define DV (0.1875/1.0)
285 static const UINT32 ksl_tab[8*16]=
286 {
287 /* OCT 0 */
288 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
289 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
290 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
291 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
292 /* OCT 1 */
293 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
294 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
295 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
296 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
297 /* OCT 2 */
298 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
299 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
300 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
301 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
302 /* OCT 3 */
303 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
304 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
305 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
306 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
307 /* OCT 4 */
308 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
309 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
310 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
311 10.875/DV,11.250/DV,11.625/DV,12.000/DV,
312 /* OCT 5 */
313 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
314 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
315 12.000/DV,12.750/DV,13.125/DV,13.500/DV,
316 13.875/DV,14.250/DV,14.625/DV,15.000/DV,
317 /* OCT 6 */
318 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
319 12.000/DV,13.125/DV,13.875/DV,14.625/DV,
320 15.000/DV,15.750/DV,16.125/DV,16.500/DV,
321 16.875/DV,17.250/DV,17.625/DV,18.000/DV,
322 /* OCT 7 */
323 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
324 15.000/DV,16.125/DV,16.875/DV,17.625/DV,
325 18.000/DV,18.750/DV,19.125/DV,19.500/DV,
326 19.875/DV,20.250/DV,20.625/DV,21.000/DV
327 };
328 #undef DV
329
330 /* 0 / 1.5 / 3.0 / 6.0 dB/OCT, confirmed on a real YM2413 (the application manual is incorrect) */
331 static const UINT32 ksl_shift[4] = { 31, 2, 1, 0 };
332
333
334 /* sustain level table (3dB per step) */
335 /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/
336 #define SC(db) (UINT32) ( db * (1.0/ENV_STEP) )
337 static const UINT32 sl_tab[16]={
338 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
339 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15)
340 };
341 #undef SC
342
343
344 #define RATE_STEPS (8)
345 static const unsigned char eg_inc[15*RATE_STEPS]={
346
347 /*cycle:0 1 2 3 4 5 6 7*/
348
349 /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
350 /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
351 /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
352 /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
353
354 /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
355 /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
356 /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
357 /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
358
359 /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
360 /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
361 /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
362 /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
363
364 /*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
365 /*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
366 /*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
367 };
368
369
370 #define O(a) (a*RATE_STEPS)
371
372 /*note that there is no O(13) in this table - it's directly in the code */
373 static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
374 /* 16 infinite time rates */
375 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
376 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
377
378 /* rates 00-12 */
379 O( 0),O( 1),O( 2),O( 3),
380 O( 0),O( 1),O( 2),O( 3),
381 O( 0),O( 1),O( 2),O( 3),
382 O( 0),O( 1),O( 2),O( 3),
383 O( 0),O( 1),O( 2),O( 3),
384 O( 0),O( 1),O( 2),O( 3),
385 O( 0),O( 1),O( 2),O( 3),
386 O( 0),O( 1),O( 2),O( 3),
387 O( 0),O( 1),O( 2),O( 3),
388 O( 0),O( 1),O( 2),O( 3),
389 O( 0),O( 1),O( 2),O( 3),
390 O( 0),O( 1),O( 2),O( 3),
391 O( 0),O( 1),O( 2),O( 3),
392
393 /* rate 13 */
394 O( 4),O( 5),O( 6),O( 7),
395
396 /* rate 14 */
397 O( 8),O( 9),O(10),O(11),
398
399 /* rate 15 */
400 O(12),O(12),O(12),O(12),
401
402 /* 16 dummy rates (same as 15 3) */
403 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
404 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
405
406 };
407 #undef O
408
409 /*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
410 /*shift 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0 */
411 /*mask 8191, 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0 */
412
413 #define O(a) (a*1)
414 static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
415 /* 16 infinite time rates */
416 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
417 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
418
419 /* rates 00-12 */
420 O(13),O(13),O(13),O(13),
421 O(12),O(12),O(12),O(12),
422 O(11),O(11),O(11),O(11),
423 O(10),O(10),O(10),O(10),
424 O( 9),O( 9),O( 9),O( 9),
425 O( 8),O( 8),O( 8),O( 8),
426 O( 7),O( 7),O( 7),O( 7),
427 O( 6),O( 6),O( 6),O( 6),
428 O( 5),O( 5),O( 5),O( 5),
429 O( 4),O( 4),O( 4),O( 4),
430 O( 3),O( 3),O( 3),O( 3),
431 O( 2),O( 2),O( 2),O( 2),
432 O( 1),O( 1),O( 1),O( 1),
433
434 /* rate 13 */
435 O( 0),O( 0),O( 0),O( 0),
436
437 /* rate 14 */
438 O( 0),O( 0),O( 0),O( 0),
439
440 /* rate 15 */
441 O( 0),O( 0),O( 0),O( 0),
442
443 /* 16 dummy rates (same as 15 3) */
444 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
445 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
446
447 };
448 #undef O
449
450
451 /* multiple table */
452 #define ML 2
453 static const UINT8 mul_tab[16]= {
454 /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
455 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
456 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
457 };
458 #undef ML
459
460 /* TL_TAB_LEN is calculated as:
461 * 11 - sinus amplitude bits (Y axis)
462 * 2 - sinus sign bit (Y axis)
463 * TL_RES_LEN - sinus resolution (X axis)
464 */
465 #define TL_TAB_LEN (11*2*TL_RES_LEN)
466 static signed int tl_tab[TL_TAB_LEN];
467
468 #define ENV_QUIET (TL_TAB_LEN>>5)
469
470 /* sin waveform table in 'decibel' scale */
471 /* two waveforms on OPLL type chips */
472 static unsigned int sin_tab[SIN_LEN * 2];
473
474
475 /* LFO Amplitude Modulation table (verified on real YM3812)
476 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
477
478 Length: 210 elements.
479
480 Each of the elements has to be repeated
481 exactly 64 times (on 64 consecutive samples).
482 The whole table takes: 64 * 210 = 13440 samples.
483
484 We use data>>1, until we find what it really is on real chip...
485
486 */
487
488 #define LFO_AM_TAB_ELEMENTS 210
489
490 static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
491 0,0,0,0,0,0,0,
492 1,1,1,1,
493 2,2,2,2,
494 3,3,3,3,
495 4,4,4,4,
496 5,5,5,5,
497 6,6,6,6,
498 7,7,7,7,
499 8,8,8,8,
500 9,9,9,9,
501 10,10,10,10,
502 11,11,11,11,
503 12,12,12,12,
504 13,13,13,13,
505 14,14,14,14,
506 15,15,15,15,
507 16,16,16,16,
508 17,17,17,17,
509 18,18,18,18,
510 19,19,19,19,
511 20,20,20,20,
512 21,21,21,21,
513 22,22,22,22,
514 23,23,23,23,
515 24,24,24,24,
516 25,25,25,25,
517 26,26,26,
518 25,25,25,25,
519 24,24,24,24,
520 23,23,23,23,
521 22,22,22,22,
522 21,21,21,21,
523 20,20,20,20,
524 19,19,19,19,
525 18,18,18,18,
526 17,17,17,17,
527 16,16,16,16,
528 15,15,15,15,
529 14,14,14,14,
530 13,13,13,13,
531 12,12,12,12,
532 11,11,11,11,
533 10,10,10,10,
534 9,9,9,9,
535 8,8,8,8,
536 7,7,7,7,
537 6,6,6,6,
538 5,5,5,5,
539 4,4,4,4,
540 3,3,3,3,
541 2,2,2,2,
542 1,1,1,1
543 };
544
545 /* LFO Phase Modulation table (verified on real YM2413) */
546 static const INT8 lfo_pm_table[8*8] = {
547
548 /* FNUM2/FNUM = 0 00xxxxxx (0x0000) */
549 0, 0, 0, 0, 0, 0, 0, 0,
550
551 /* FNUM2/FNUM = 0 01xxxxxx (0x0040) */
552 1, 0, 0, 0,-1, 0, 0, 0,
553
554 /* FNUM2/FNUM = 0 10xxxxxx (0x0080) */
555 2, 1, 0,-1,-2,-1, 0, 1,
556
557 /* FNUM2/FNUM = 0 11xxxxxx (0x00C0) */
558 3, 1, 0,-1,-3,-1, 0, 1,
559
560 /* FNUM2/FNUM = 1 00xxxxxx (0x0100) */
561 4, 2, 0,-2,-4,-2, 0, 2,
562
563 /* FNUM2/FNUM = 1 01xxxxxx (0x0140) */
564 5, 2, 0,-2,-5,-2, 0, 2,
565
566 /* FNUM2/FNUM = 1 10xxxxxx (0x0180) */
567 6, 3, 0,-3,-6,-3, 0, 3,
568
569 /* FNUM2/FNUM = 1 11xxxxxx (0x01C0) */
570 7, 3, 0,-3,-7,-3, 0, 3,
571 };
572
573
574
575
576
577
578 /* This is not 100% perfect yet but very close */
579 /*
580 - multi parameters are 100% correct (instruments and drums)
581 - LFO PM and AM enable are 100% correct
582 - waveform DC and DM select are 100% correct
583 */
584
585 static const unsigned char table[19][8] = {
586 /* MULT MULT modTL DcDmFb AR/DR AR/DR SL/RR SL/RR */
587 /* 0 1 2 3 4 5 6 7 */
588 {0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, //0
589
590 {0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, //1
591 {0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, //2
592 {0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, //3
593 {0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, //4
594
595 //{0x22, 0x21, 0x1e, 0x09, 0xf0, 0x76, 0x08, 0x28 }, //5
596 {0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, //5
597
598 //{0x31, 0x22, 0x16, 0x09, 0x90, 0x7f, 0x00, 0x08 }, //6
599 {0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, //6
600
601 {0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, //7
602 {0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, //8
603 {0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, //9
604
605 //{0x61, 0x61, 0x0c, 0x08, 0x85, 0xa0, 0x79, 0x07 }, //A
606 {0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, //A
607
608 {0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, //B
609 {0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, //C
610
611 //{0x61, 0x10, 0x0c, 0x08, 0xf2, 0xc4, 0x40, 0xc8 }, //D
612 {0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, //D
613
614 {0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, //E
615 {0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, //F
616
617 /* drum instruments definitions */
618 /* MULTI MULTI modTL xxx AR/DR AR/DR SL/RR SL/RR */
619 /* 0 1 2 3 4 5 6 7 */
620 {0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */
621 {0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */
622 {0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */
623 };
624
625 /* lock level of common table */
626 static int num_lock = 0;
627
628 /* work table */
629 #define SLOT7_1 (&chip->P_CH[7].SLOT[SLOT1])
630 #define SLOT7_2 (&chip->P_CH[7].SLOT[SLOT2])
631 #define SLOT8_1 (&chip->P_CH[8].SLOT[SLOT1])
632 #define SLOT8_2 (&chip->P_CH[8].SLOT[SLOT2])
633
634
635 /*INLINE int limit( int val, int max, int min ) {
636 if ( val > max )
637 val = max;
638 else if ( val < min )
639 val = min;
640
641 return val;
642 }*/
643
644
645 /* advance LFO to next sample */
advance_lfo(YM2413 * chip)646 INLINE void advance_lfo(YM2413 *chip)
647 {
648 /* LFO */
649 chip->lfo_am_cnt += chip->lfo_am_inc;
650 if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
651 chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
652
653 chip->LFO_AM = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ] >> 1;
654
655 chip->lfo_pm_cnt += chip->lfo_pm_inc;
656 chip->LFO_PM = (chip->lfo_pm_cnt>>LFO_SH) & 7;
657 }
658
659 /* advance to next sample */
advance(YM2413 * chip)660 INLINE void advance(YM2413 *chip)
661 {
662 OPLL_CH *CH;
663 OPLL_SLOT *op;
664 unsigned int i;
665
666 /* Envelope Generator */
667 chip->eg_timer += chip->eg_timer_add;
668
669 while (chip->eg_timer >= chip->eg_timer_overflow)
670 {
671 chip->eg_timer -= chip->eg_timer_overflow;
672
673 chip->eg_cnt++;
674
675 for (i=0; i<9*2; i++)
676 {
677 CH = &chip->P_CH[i/2];
678
679 op = &CH->SLOT[i&1];
680
681 switch(op->state)
682 {
683
684 case EG_DMP: /* dump phase */
685 /*dump phase is performed by both operators in each channel*/
686 /*when CARRIER envelope gets down to zero level,
687 ** phases in BOTH opearators are reset (at the same time ?)
688 */
689 if ( !(chip->eg_cnt & ((1<<op->eg_sh_dp)-1) ) )
690 {
691 op->volume += eg_inc[op->eg_sel_dp + ((chip->eg_cnt>>op->eg_sh_dp)&7)];
692
693 if ( op->volume >= MAX_ATT_INDEX )
694 {
695 op->volume = MAX_ATT_INDEX;
696 op->state = EG_ATT;
697 /* restart Phase Generator */
698 op->phase = 0;
699 }
700 }
701 break;
702
703 case EG_ATT: /* attack phase */
704 if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
705 {
706 op->volume += (~op->volume *
707 (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
708 ) >>2;
709
710 if (op->volume <= MIN_ATT_INDEX)
711 {
712 op->volume = MIN_ATT_INDEX;
713 op->state = EG_DEC;
714 }
715 }
716 break;
717
718 case EG_DEC: /* decay phase */
719 if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
720 {
721 op->volume += eg_inc[op->eg_sel_dr + ((chip->eg_cnt>>op->eg_sh_dr)&7)];
722
723 if ( op->volume >= op->sl )
724 op->state = EG_SUS;
725 }
726 break;
727
728 case EG_SUS: /* sustain phase */
729 /* this is important behaviour:
730 one can change percusive/non-percussive modes on the fly and
731 the chip will remain in sustain phase - verified on real YM3812 */
732
733 if(op->eg_type) /* non-percussive mode (sustained tone) */
734 {
735 /* do nothing */
736 }
737 else /* percussive mode */
738 {
739 /* during sustain phase chip adds Release Rate (in percussive mode) */
740 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
741 {
742 op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
743
744 if ( op->volume >= MAX_ATT_INDEX )
745 op->volume = MAX_ATT_INDEX;
746 }
747 /* else do nothing in sustain phase */
748 }
749 break;
750
751 case EG_REL: /* release phase */
752 /* exclude modulators in melody channels from performing anything in this mode*/
753 /* allowed are only carriers in melody mode and rhythm slots in rhythm mode */
754
755 /*This table shows which operators and on what conditions are allowed to perform EG_REL:
756 (a) - always perform EG_REL
757 (n) - never perform EG_REL
758 (r) - perform EG_REL in Rhythm mode ONLY
759 0: 0 (n), 1 (a)
760 1: 2 (n), 3 (a)
761 2: 4 (n), 5 (a)
762 3: 6 (n), 7 (a)
763 4: 8 (n), 9 (a)
764 5: 10(n), 11(a)
765 6: 12(r), 13(a)
766 7: 14(r), 15(a)
767 8: 16(r), 17(a)
768 */
769 if ( (i&1) || ((chip->rhythm&0x20) && (i>=12)) )/* exclude modulators */
770 {
771 if(op->eg_type) /* non-percussive mode (sustained tone) */
772 /*this is correct: use RR when SUS = OFF*/
773 /*and use RS when SUS = ON*/
774 {
775 if (CH->sus)
776 {
777 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
778 {
779 op->volume += eg_inc[op->eg_sel_rs + ((chip->eg_cnt>>op->eg_sh_rs)&7)];
780 if ( op->volume >= MAX_ATT_INDEX )
781 {
782 op->volume = MAX_ATT_INDEX;
783 op->state = EG_OFF;
784 }
785 }
786 }
787 else
788 {
789 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
790 {
791 op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
792 if ( op->volume >= MAX_ATT_INDEX )
793 {
794 op->volume = MAX_ATT_INDEX;
795 op->state = EG_OFF;
796 }
797 }
798 }
799 }
800 else /* percussive mode */
801 {
802 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
803 {
804 op->volume += eg_inc[op->eg_sel_rs + ((chip->eg_cnt>>op->eg_sh_rs)&7)];
805 if ( op->volume >= MAX_ATT_INDEX )
806 {
807 op->volume = MAX_ATT_INDEX;
808 op->state = EG_OFF;
809 }
810 }
811 }
812 }
813 break;
814
815 default:
816 break;
817 }
818 }
819 }
820
821 for (i=0; i<9*2; i++)
822 {
823 CH = &chip->P_CH[i/2];
824 op = &CH->SLOT[i&1];
825
826 /* Phase Generator */
827 if(op->vib)
828 {
829 UINT8 block;
830
831 unsigned int fnum_lfo = 8*((CH->block_fnum&0x01c0) >> 6);
832 unsigned int block_fnum = CH->block_fnum * 2;
833 signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + fnum_lfo ];
834
835 if (lfo_fn_table_index_offset) /* LFO phase modulation active */
836 {
837 block_fnum += lfo_fn_table_index_offset;
838 block = (block_fnum&0x1c00) >> 10;
839 op->phase += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
840 }
841 else /* LFO phase modulation = zero */
842 {
843 op->phase += op->freq;
844 }
845 }
846 else /* LFO phase modulation disabled for this operator */
847 {
848 op->phase += op->freq;
849 }
850 }
851
852 /* The Noise Generator of the YM3812 is 23-bit shift register.
853 * Period is equal to 2^23-2 samples.
854 * Register works at sampling frequency of the chip, so output
855 * can change on every sample.
856 *
857 * Output of the register and input to the bit 22 is:
858 * bit0 XOR bit14 XOR bit15 XOR bit22
859 *
860 * Simply use bit 22 as the noise output.
861 */
862
863 chip->noise_p += chip->noise_f;
864 i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
865 chip->noise_p &= FREQ_MASK;
866 while (i)
867 {
868 /*
869 UINT32 j;
870 j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
871 chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
872 */
873
874 /*
875 Instead of doing all the logic operations above, we
876 use a trick here (and use bit 0 as the noise output).
877 The difference is only that the noise bit changes one
878 step ahead. This doesn't matter since we don't know
879 what is real state of the noise_rng after the reset.
880 */
881
882 if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302;
883 chip->noise_rng >>= 1;
884
885 i--;
886 }
887 }
888
889
op_calc(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)890 INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
891 {
892 UINT32 p;
893
894 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<17))) >> FREQ_SH ) & SIN_MASK) ];
895
896 if (p >= TL_TAB_LEN)
897 return 0;
898 return tl_tab[p];
899 }
900
op_calc1(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)901 INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
902 {
903 UINT32 p;
904 INT32 i;
905
906 i = (phase & ~FREQ_MASK) + pm;
907
908 /*logerror("i=%08x (i>>16)&511=%8i phase=%i [pm=%08x] ",i, (i>>16)&511, phase>>FREQ_SH, pm);*/
909
910 p = (env<<5) + sin_tab[ wave_tab + ((i>>FREQ_SH) & SIN_MASK)];
911
912 /*logerror("(p&255=%i p>>8=%i) out= %i\n", p&255,p>>8, tl_tab[p&255]>>(p>>8) );*/
913
914 if (p >= TL_TAB_LEN)
915 return 0;
916 return tl_tab[p];
917 }
918
919
920 #define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (chip->LFO_AM & (OP)->AMmask))
921
922 /* calculate output */
chan_calc(YM2413 * chip,OPLL_CH * CH)923 INLINE void chan_calc( YM2413*chip, OPLL_CH *CH )
924 {
925 OPLL_SLOT *SLOT;
926 unsigned int env;
927 signed int out;
928 signed int phase_modulation; /* phase modulation input (SLOT 2) */
929
930
931 if (CH->Muted)
932 return;
933
934 /* SLOT 1 */
935 SLOT = &CH->SLOT[SLOT1];
936 env = volume_calc(SLOT);
937 out = SLOT->op1_out[0] + SLOT->op1_out[1];
938
939 SLOT->op1_out[0] = SLOT->op1_out[1];
940 phase_modulation = SLOT->op1_out[0];
941
942 SLOT->op1_out[1] = 0;
943
944 if( env < ENV_QUIET )
945 {
946 if (!SLOT->fb_shift)
947 out = 0;
948 SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
949 }
950
951 /* SLOT 2 */
952
953 chip->outchan=0;
954
955 SLOT++;
956 env = volume_calc(SLOT);
957 if( env < ENV_QUIET )
958 {
959 signed int outp = op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
960 chip->output[0] += outp;
961 chip->outchan = outp;
962 //chip->output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
963 }
964 }
965
966 /*
967 operators used in the rhythm sounds generation process:
968
969 Envelope Generator:
970
971 channel operator register number Bass High Snare Tom Top
972 / slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
973 6 / 0 12 50 70 90 f0 +
974 6 / 1 15 53 73 93 f3 +
975 7 / 0 13 51 71 91 f1 +
976 7 / 1 16 54 74 94 f4 +
977 8 / 0 14 52 72 92 f2 +
978 8 / 1 17 55 75 95 f5 +
979
980 Phase Generator:
981
982 channel operator register number Bass High Snare Tom Top
983 / slot number MULTIPLE Drum Hat Drum Tom Cymbal
984 6 / 0 12 30 +
985 6 / 1 15 33 +
986 7 / 0 13 31 + + +
987 7 / 1 16 34 ----- n o t u s e d -----
988 8 / 0 14 32 +
989 8 / 1 17 35 + +
990
991 channel operator register number Bass High Snare Tom Top
992 number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
993 6 12,15 B6 A6 +
994
995 7 13,16 B7 A7 + + +
996
997 8 14,17 B8 A8 + + +
998
999 */
1000
1001 /* calculate rhythm */
1002
rhythm_calc(YM2413 * chip,OPLL_CH * CH,unsigned int noise)1003 INLINE void rhythm_calc( YM2413 *chip, OPLL_CH *CH, unsigned int noise )
1004 {
1005 OPLL_SLOT *SLOT;
1006 signed int out;
1007 unsigned int env;
1008 signed int phase_modulation; /* phase modulation input (SLOT 2) */
1009
1010
1011 /* Bass Drum (verified on real YM3812):
1012 - depends on the channel 6 'connect' register:
1013 when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
1014 when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
1015 - output sample always is multiplied by 2
1016 */
1017
1018
1019 /* SLOT 1 */
1020 SLOT = &CH[6].SLOT[SLOT1];
1021 env = volume_calc(SLOT);
1022
1023 out = SLOT->op1_out[0] + SLOT->op1_out[1];
1024 SLOT->op1_out[0] = SLOT->op1_out[1];
1025
1026 phase_modulation = SLOT->op1_out[0];
1027
1028 SLOT->op1_out[1] = 0;
1029 if( env < ENV_QUIET )
1030 {
1031 if (!SLOT->fb_shift)
1032 out = 0;
1033 SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
1034 }
1035
1036 /* SLOT 2 */
1037 SLOT++;
1038 env = volume_calc(SLOT);
1039 if( env < ENV_QUIET && ! chip->MuteSpc[0] )
1040 chip->output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable) * 2;
1041
1042
1043 /* Phase generation is based on: */
1044 // HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases)
1045 // SD (16) channel 7->slot 1
1046 // TOM (14) channel 8->slot 1
1047 // TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases)
1048
1049 /* Envelope generation based on: */
1050 // HH channel 7->slot1
1051 // SD channel 7->slot2
1052 // TOM channel 8->slot1
1053 // TOP channel 8->slot2
1054
1055
1056 /* The following formulas can be well optimized.
1057 I leave them in direct form for now (in case I've missed something).
1058 */
1059
1060 /* High Hat (verified on real YM3812) */
1061 env = volume_calc(SLOT7_1);
1062 if( env < ENV_QUIET && ! chip->MuteSpc[4] )
1063 {
1064
1065 /* high hat phase generation:
1066 phase = d0 or 234 (based on frequency only)
1067 phase = 34 or 2d0 (based on noise)
1068 */
1069
1070 /* base frequency derived from operator 1 in channel 7 */
1071 unsigned char bit7 = ((SLOT7_1->phase>>FREQ_SH)>>7)&1;
1072 unsigned char bit3 = ((SLOT7_1->phase>>FREQ_SH)>>3)&1;
1073 unsigned char bit2 = ((SLOT7_1->phase>>FREQ_SH)>>2)&1;
1074
1075 unsigned char res1 = (bit2 ^ bit7) | bit3;
1076
1077 /* when res1 = 0 phase = 0x000 | 0xd0; */
1078 /* when res1 = 1 phase = 0x200 | (0xd0>>2); */
1079 UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
1080
1081 /* enable gate based on frequency of operator 2 in channel 8 */
1082 unsigned char bit5e= ((SLOT8_2->phase>>FREQ_SH)>>5)&1;
1083 unsigned char bit3e= ((SLOT8_2->phase>>FREQ_SH)>>3)&1;
1084
1085 unsigned char res2 = (bit3e | bit5e);
1086
1087 /* when res2 = 0 pass the phase from calculation above (res1); */
1088 /* when res2 = 1 phase = 0x200 | (0xd0>>2); */
1089 if (res2)
1090 phase = (0x200|(0xd0>>2));
1091
1092
1093 /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
1094 /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
1095 if (phase&0x200)
1096 {
1097 if (noise)
1098 phase = 0x200|0xd0;
1099 }
1100 else
1101 /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
1102 /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
1103 {
1104 if (noise)
1105 phase = 0xd0>>2;
1106 }
1107
1108 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1109 }
1110
1111 /* Snare Drum (verified on real YM3812) */
1112 env = volume_calc(SLOT7_2);
1113 if( env < ENV_QUIET && ! chip->MuteSpc[1] )
1114 {
1115 /* base frequency derived from operator 1 in channel 7 */
1116 unsigned char bit8 = ((SLOT7_1->phase>>FREQ_SH)>>8)&1;
1117
1118 /* when bit8 = 0 phase = 0x100; */
1119 /* when bit8 = 1 phase = 0x200; */
1120 UINT32 phase = bit8 ? 0x200 : 0x100;
1121
1122 /* Noise bit XOR'es phase by 0x100 */
1123 /* when noisebit = 0 pass the phase from calculation above */
1124 /* when noisebit = 1 phase ^= 0x100; */
1125 /* in other words: phase ^= (noisebit<<8); */
1126 if (noise)
1127 phase ^= 0x100;
1128
1129 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
1130 }
1131
1132 /* Tom Tom (verified on real YM3812) */
1133 env = volume_calc(SLOT8_1);
1134 if( env < ENV_QUIET && ! chip->MuteSpc[2] )
1135 chip->output[1] += op_calc(SLOT8_1->phase, env, 0, SLOT8_1->wavetable) * 2;
1136
1137 /* Top Cymbal (verified on real YM2413) */
1138 env = volume_calc(SLOT8_2);
1139 if( env < ENV_QUIET && ! chip->MuteSpc[3] )
1140 {
1141 /* base frequency derived from operator 1 in channel 7 */
1142 unsigned char bit7 = ((SLOT7_1->phase>>FREQ_SH)>>7)&1;
1143 unsigned char bit3 = ((SLOT7_1->phase>>FREQ_SH)>>3)&1;
1144 unsigned char bit2 = ((SLOT7_1->phase>>FREQ_SH)>>2)&1;
1145
1146 unsigned char res1 = (bit2 ^ bit7) | bit3;
1147
1148 /* when res1 = 0 phase = 0x000 | 0x100; */
1149 /* when res1 = 1 phase = 0x200 | 0x100; */
1150 UINT32 phase = res1 ? 0x300 : 0x100;
1151
1152 /* enable gate based on frequency of operator 2 in channel 8 */
1153 unsigned char bit5e= ((SLOT8_2->phase>>FREQ_SH)>>5)&1;
1154 unsigned char bit3e= ((SLOT8_2->phase>>FREQ_SH)>>3)&1;
1155
1156 unsigned char res2 = (bit3e | bit5e);
1157 /* when res2 = 0 pass the phase from calculation above (res1); */
1158 /* when res2 = 1 phase = 0x200 | 0x100; */
1159 if (res2)
1160 phase = 0x300;
1161
1162 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
1163 }
1164
1165 }
1166
1167
1168 /* generic table initialize */
init_tables(void)1169 static int init_tables(void)
1170 {
1171 signed int i,x;
1172 signed int n;
1173 double o,m;
1174
1175
1176 for (x=0; x<TL_RES_LEN; x++)
1177 {
1178 m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
1179 m = floor(m);
1180
1181 /* we never reach (1<<16) here due to the (x+1) */
1182 /* result fits within 16 bits at maximum */
1183
1184 n = (int)m; /* 16 bits here */
1185 n >>= 4; /* 12 bits here */
1186 if (n&1) /* round to nearest */
1187 n = (n>>1)+1;
1188 else
1189 n = n>>1;
1190 /* 11 bits here (rounded) */
1191 tl_tab[ x*2 + 0 ] = n;
1192 tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
1193
1194 for (i=1; i<11; i++)
1195 {
1196 tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
1197 tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
1198 }
1199 //#if 0
1200 // logerror("tl %04i", x*2);
1201 // for (i=0; i<11; i++)
1202 // logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] );
1203 // logerror("\n");
1204 //#endif*/
1205 }
1206 /*logerror("ym2413.c: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/
1207
1208
1209 for (i=0; i<SIN_LEN; i++)
1210 {
1211 /* non-standard sinus */
1212 m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */
1213
1214 /* we never reach zero here due to ((i*2)+1) */
1215
1216 if (m>0.0)
1217 o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
1218 else
1219 o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
1220
1221 o = o / (ENV_STEP/4);
1222
1223 n = (int)(2.0*o);
1224 if (n&1) /* round to nearest */
1225 n = (n>>1)+1;
1226 else
1227 n = n>>1;
1228
1229 /* waveform 0: standard sinus */
1230 sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
1231
1232 /*logerror("ym2413.c: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/
1233
1234
1235 /* waveform 1: __ __ */
1236 /* / \____/ \____*/
1237 /* output only first half of the sinus waveform (positive one) */
1238 if (i & (1<<(SIN_BITS-1)) )
1239 sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
1240 else
1241 sin_tab[1*SIN_LEN+i] = sin_tab[i];
1242
1243 /*logerror("ym2413.c: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );*/
1244 }
1245 /*#if 0
1246 logerror("YM2413.C: ENV_QUIET= %08x (*32=%08x)\n", ENV_QUIET, ENV_QUIET*32 );
1247 for (i=0; i<ENV_QUIET; i++)
1248 {
1249 logerror("tl_tb[%4x(%4i)]=%8x\n", i<<5, i, tl_tab[i<<5] );
1250 }
1251 #endif*/
1252 #ifdef SAVE_SAMPLE
1253 sample[0]=fopen("sampsum.pcm","wb");
1254 #endif
1255
1256 return 1;
1257 }
1258
OPLCloseTable(void)1259 static void OPLCloseTable( void )
1260 {
1261 #ifdef SAVE_SAMPLE
1262 fclose(sample[0]);
1263 #endif
1264 }
1265
1266
1267 /*static void OPLL_init_save(YM2413 *chip, const device_config *device)
1268 {
1269 int chnum;
1270
1271 state_save_register_device_item_array(device, 0, chip->instvol_r);
1272 state_save_register_device_item(device, 0, chip->eg_cnt);
1273 state_save_register_device_item(device, 0, chip->eg_timer);
1274 state_save_register_device_item(device, 0, chip->eg_timer_add);
1275 state_save_register_device_item(device, 0, chip->eg_timer_overflow);
1276 state_save_register_device_item(device, 0, chip->rhythm);
1277 state_save_register_device_item(device, 0, chip->lfo_am_cnt);
1278 state_save_register_device_item(device, 0, chip->lfo_am_inc);
1279 state_save_register_device_item(device, 0, chip->lfo_pm_cnt);
1280 state_save_register_device_item(device, 0, chip->lfo_pm_inc);
1281 state_save_register_device_item(device, 0, chip->noise_rng);
1282 state_save_register_device_item(device, 0, chip->noise_p);
1283 state_save_register_device_item(device, 0, chip->noise_f);
1284 state_save_register_device_item_2d_array(device, 0, chip->inst_tab);
1285 state_save_register_device_item(device, 0, chip->address);
1286 state_save_register_device_item(device, 0, chip->status);
1287
1288 for (chnum = 0; chnum < ARRAY_LENGTH(chip->P_CH); chnum++)
1289 {
1290 OPLL_CH *ch = &chip->P_CH[chnum];
1291 int slotnum;
1292
1293 state_save_register_device_item(device, chnum, ch->block_fnum);
1294 state_save_register_device_item(device, chnum, ch->fc);
1295 state_save_register_device_item(device, chnum, ch->ksl_base);
1296 state_save_register_device_item(device, chnum, ch->kcode);
1297 state_save_register_device_item(device, chnum, ch->sus);
1298
1299 for (slotnum = 0; slotnum < ARRAY_LENGTH(ch->SLOT); slotnum++)
1300 {
1301 OPLL_SLOT *sl = &ch->SLOT[slotnum];
1302
1303 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ar);
1304 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->dr);
1305 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->rr);
1306 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->KSR);
1307 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ksl);
1308 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ksr);
1309 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->mul);
1310 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->phase);
1311 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->freq);
1312 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->fb_shift);
1313 state_save_register_device_item_array(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->op1_out);
1314 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_type);
1315 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->state);
1316 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->TL);
1317 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->TLL);
1318 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->volume);
1319 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->sl);
1320 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_dp);
1321 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_dp);
1322 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_ar);
1323 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_ar);
1324 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_dr);
1325 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_dr);
1326 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_rr);
1327 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_rr);
1328 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_rs);
1329 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_rs);
1330 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->key);
1331 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->AMmask);
1332 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->vib);
1333 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->wavetable);
1334 }
1335 }
1336 }*/
1337
1338
1339 //static void OPLL_initalize(YM2413 *chip, const device_config *device)
OPLL_initalize(YM2413 * chip)1340 static void OPLL_initalize(YM2413 *chip)
1341 {
1342 int i;
1343
1344 //OPLL_init_save(chip, device);
1345
1346 /* frequency base */
1347 chip->freqbase = (chip->rate) ? ((double)chip->clock / 72.0) / chip->rate : 0;
1348 /*#if 0
1349 chip->rate = (double)chip->clock / 72.0;
1350 chip->freqbase = 1.0;
1351 logerror("freqbase=%f\n", chip->freqbase);
1352 #endif*/
1353
1354
1355
1356 /* make fnumber -> increment counter table */
1357 for( i = 0 ; i < 1024; i++ )
1358 {
1359 /* OPLL (YM2413) phase increment counter = 18bit */
1360
1361 chip->fn_tab[i] = (UINT32)( (double)i * 64 * chip->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
1362 /*#if 0
1363 logerror("ym2413.c: fn_tab[%4i] = %08x (dec=%8i)\n",
1364 i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
1365 #endif*/
1366 }
1367
1368 /*#if 0
1369 for( i=0 ; i < 16 ; i++ )
1370 {
1371 logerror("ym2413.c: sl_tab[%i] = %08x\n", i, sl_tab[i] );
1372 }
1373 for( i=0 ; i < 8 ; i++ )
1374 {
1375 int j;
1376 logerror("ym2413.c: ksl_tab[oct=%2i] =",i);
1377 for (j=0; j<16; j++)
1378 {
1379 logerror("%08x ", ksl_tab[i*16+j] );
1380 }
1381 logerror("\n");
1382 }
1383 #endif*/
1384
1385 for(i = 0; i < 9; i ++)
1386 chip->P_CH[i].Muted = 0x00;
1387 for(i = 0; i < 5; i ++)
1388 chip->MuteSpc[i] = 0x00;
1389
1390
1391 /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
1392 /* One entry from LFO_AM_TABLE lasts for 64 samples */
1393 chip->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * chip->freqbase;
1394
1395 /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
1396 chip->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * chip->freqbase;
1397
1398 /*logerror ("chip->lfo_am_inc = %8x ; chip->lfo_pm_inc = %8x\n", chip->lfo_am_inc, chip->lfo_pm_inc);*/
1399
1400 /* Noise generator: a step takes 1 sample */
1401 chip->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * chip->freqbase;
1402 /*logerror("YM2413init noise_f=%8x\n", chip->noise_f);*/
1403
1404 chip->eg_timer_add = (1<<EG_SH) * chip->freqbase;
1405 chip->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
1406 /*logerror("YM2413init eg_timer_add=%8x eg_timer_overflow=%8x\n", chip->eg_timer_add, chip->eg_timer_overflow);*/
1407 }
1408
KEY_ON(OPLL_SLOT * SLOT,UINT32 key_set)1409 INLINE void KEY_ON(OPLL_SLOT *SLOT, UINT32 key_set)
1410 {
1411 if( !SLOT->key )
1412 {
1413 /* do NOT restart Phase Generator (verified on real YM2413)*/
1414 /* phase -> Dump */
1415 SLOT->state = EG_DMP;
1416 }
1417 SLOT->key |= key_set;
1418 }
1419
KEY_OFF(OPLL_SLOT * SLOT,UINT32 key_clr)1420 INLINE void KEY_OFF(OPLL_SLOT *SLOT, UINT32 key_clr)
1421 {
1422 if( SLOT->key )
1423 {
1424 SLOT->key &= key_clr;
1425
1426 if( !SLOT->key )
1427 {
1428 /* phase -> Release */
1429 if (SLOT->state>EG_REL)
1430 SLOT->state = EG_REL;
1431 }
1432 }
1433 }
1434
1435 /* update phase increment counter of operator (also update the EG rates if necessary) */
CALC_FCSLOT(OPLL_CH * CH,OPLL_SLOT * SLOT)1436 INLINE void CALC_FCSLOT(OPLL_CH *CH,OPLL_SLOT *SLOT)
1437 {
1438 int ksr;
1439 UINT32 SLOT_rs;
1440 UINT32 SLOT_dp;
1441
1442 /* (frequency) phase increment counter */
1443 SLOT->freq = CH->fc * SLOT->mul;
1444 ksr = CH->kcode >> SLOT->KSR;
1445
1446 if( SLOT->ksr != ksr )
1447 {
1448 SLOT->ksr = ksr;
1449
1450 /* calculate envelope generator rates */
1451 if ((SLOT->ar + SLOT->ksr) < 16+62)
1452 {
1453 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1454 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1455 }
1456 else
1457 {
1458 SLOT->eg_sh_ar = 0;
1459 SLOT->eg_sel_ar = 13*RATE_STEPS;
1460 }
1461 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1462 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1463 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1464 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1465
1466 }
1467
1468 if (CH->sus)
1469 SLOT_rs = 16 + (5<<2);
1470 else
1471 SLOT_rs = 16 + (7<<2);
1472
1473 SLOT->eg_sh_rs = eg_rate_shift [SLOT_rs + SLOT->ksr ];
1474 SLOT->eg_sel_rs = eg_rate_select[SLOT_rs + SLOT->ksr ];
1475
1476 SLOT_dp = 16 + (13<<2);
1477 SLOT->eg_sh_dp = eg_rate_shift [SLOT_dp + SLOT->ksr ];
1478 SLOT->eg_sel_dp = eg_rate_select[SLOT_dp + SLOT->ksr ];
1479 }
1480
1481 /* set multi,am,vib,EG-TYP,KSR,mul */
set_mul(YM2413 * chip,int slot,int v)1482 INLINE void set_mul(YM2413 *chip,int slot,int v)
1483 {
1484 OPLL_CH *CH = &chip->P_CH[slot/2];
1485 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1486
1487 SLOT->mul = mul_tab[v&0x0f];
1488 SLOT->KSR = (v&0x10) ? 0 : 2;
1489 SLOT->eg_type = (v&0x20);
1490 SLOT->vib = (v&0x40);
1491 SLOT->AMmask = (v&0x80) ? ~0 : 0;
1492 CALC_FCSLOT(CH,SLOT);
1493 }
1494
1495 /* set ksl, tl */
set_ksl_tl(YM2413 * chip,int chan,int v)1496 INLINE void set_ksl_tl(YM2413 *chip,int chan,int v)
1497 {
1498 OPLL_CH *CH = &chip->P_CH[chan];
1499 /* modulator */
1500 OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1501
1502 SLOT->ksl = ksl_shift[v >> 6];
1503 SLOT->TL = (v&0x3f)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1504 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1505 }
1506
1507 /* set ksl , waveforms, feedback */
set_ksl_wave_fb(YM2413 * chip,int chan,int v)1508 INLINE void set_ksl_wave_fb(YM2413 *chip,int chan,int v)
1509 {
1510 OPLL_CH *CH = &chip->P_CH[chan];
1511 /* modulator */
1512 OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1513 SLOT->wavetable = ((v&0x08)>>3)*SIN_LEN;
1514 SLOT->fb_shift = (v&7) ? (v&7) + 8 : 0;
1515
1516 /*carrier*/
1517 SLOT = &CH->SLOT[SLOT2];
1518
1519 SLOT->ksl = ksl_shift[v >> 6];
1520 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1521
1522 SLOT->wavetable = ((v&0x10)>>4)*SIN_LEN;
1523 }
1524
1525 /* set attack rate & decay rate */
set_ar_dr(YM2413 * chip,int slot,int v)1526 INLINE void set_ar_dr(YM2413 *chip,int slot,int v)
1527 {
1528 OPLL_CH *CH = &chip->P_CH[slot/2];
1529 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1530
1531 SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0;
1532
1533 if ((SLOT->ar + SLOT->ksr) < 16+62)
1534 {
1535 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1536 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1537 }
1538 else
1539 {
1540 SLOT->eg_sh_ar = 0;
1541 SLOT->eg_sel_ar = 13*RATE_STEPS;
1542 }
1543
1544 SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1545 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1546 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1547 }
1548
1549 /* set sustain level & release rate */
set_sl_rr(YM2413 * chip,int slot,int v)1550 INLINE void set_sl_rr(YM2413 *chip,int slot,int v)
1551 {
1552 OPLL_CH *CH = &chip->P_CH[slot/2];
1553 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1554
1555 SLOT->sl = sl_tab[ v>>4 ];
1556
1557 SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1558 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1559 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1560 }
1561
load_instrument(YM2413 * chip,UINT32 chan,UINT32 slot,UINT8 * inst)1562 static void load_instrument(YM2413 *chip, UINT32 chan, UINT32 slot, UINT8* inst )
1563 {
1564 set_mul (chip, slot, inst[0]);
1565 set_mul (chip, slot+1, inst[1]);
1566 set_ksl_tl (chip, chan, inst[2]);
1567 set_ksl_wave_fb (chip, chan, inst[3]);
1568 set_ar_dr (chip, slot, inst[4]);
1569 set_ar_dr (chip, slot+1, inst[5]);
1570 set_sl_rr (chip, slot, inst[6]);
1571 set_sl_rr (chip, slot+1, inst[7]);
1572 }
update_instrument_zero(YM2413 * chip,UINT8 r)1573 static void update_instrument_zero(YM2413 *chip, UINT8 r )
1574 {
1575 UINT8* inst = &chip->inst_tab[0][0]; /* point to user instrument */
1576 UINT32 chan;
1577 UINT32 chan_max;
1578
1579 chan_max = 9;
1580 if (chip->rhythm & 0x20)
1581 chan_max=6;
1582
1583 switch(r)
1584 {
1585 case 0:
1586 for (chan=0; chan<chan_max; chan++)
1587 {
1588 if ((chip->instvol_r[chan]&0xf0)==0)
1589 {
1590 set_mul (chip, chan*2, inst[0]);
1591 }
1592 }
1593 break;
1594 case 1:
1595 for (chan=0; chan<chan_max; chan++)
1596 {
1597 if ((chip->instvol_r[chan]&0xf0)==0)
1598 {
1599 set_mul (chip, chan*2+1,inst[1]);
1600 }
1601 }
1602 break;
1603 case 2:
1604 for (chan=0; chan<chan_max; chan++)
1605 {
1606 if ((chip->instvol_r[chan]&0xf0)==0)
1607 {
1608 set_ksl_tl (chip, chan, inst[2]);
1609 }
1610 }
1611 break;
1612 case 3:
1613 for (chan=0; chan<chan_max; chan++)
1614 {
1615 if ((chip->instvol_r[chan]&0xf0)==0)
1616 {
1617 set_ksl_wave_fb (chip, chan, inst[3]);
1618 }
1619 }
1620 break;
1621 case 4:
1622 for (chan=0; chan<chan_max; chan++)
1623 {
1624 if ((chip->instvol_r[chan]&0xf0)==0)
1625 {
1626 set_ar_dr (chip, chan*2, inst[4]);
1627 }
1628 }
1629 break;
1630 case 5:
1631 for (chan=0; chan<chan_max; chan++)
1632 {
1633 if ((chip->instvol_r[chan]&0xf0)==0)
1634 {
1635 set_ar_dr (chip, chan*2+1,inst[5]);
1636 }
1637 }
1638 break;
1639 case 6:
1640 for (chan=0; chan<chan_max; chan++)
1641 {
1642 if ((chip->instvol_r[chan]&0xf0)==0)
1643 {
1644 set_sl_rr (chip, chan*2, inst[6]);
1645 }
1646 }
1647 break;
1648 case 7:
1649 for (chan=0; chan<chan_max; chan++)
1650 {
1651 if ((chip->instvol_r[chan]&0xf0)==0)
1652 {
1653 set_sl_rr (chip, chan*2+1,inst[7]);
1654 }
1655 }
1656 break;
1657 }
1658 }
1659
1660 /* write a value v to register r on chip chip */
OPLLWriteReg(YM2413 * chip,int r,int v)1661 static void OPLLWriteReg(YM2413 *chip, int r, int v)
1662 {
1663 OPLL_CH *CH;
1664 OPLL_SLOT *SLOT;
1665 UINT8 *inst;
1666 int chan;
1667 int slot;
1668
1669 /* adjust bus to 8 bits */
1670 r &= 0xff;
1671 v &= 0xff;
1672
1673
1674 /*if (LOG_CYM_FILE && (cymfile) && (r!=8) )
1675 {
1676 fputc( (unsigned char)r, cymfile );
1677 fputc( (unsigned char)v, cymfile );
1678 }*/
1679
1680
1681 switch(r&0xf0)
1682 {
1683 case 0x00: /* 00-0f:control */
1684 {
1685 switch(r&0x0f)
1686 {
1687 case 0x00: /* AM/VIB/EGTYP/KSR/MULTI (modulator) */
1688 case 0x01: /* AM/VIB/EGTYP/KSR/MULTI (carrier) */
1689 case 0x02: /* Key Scale Level, Total Level (modulator) */
1690 case 0x03: /* Key Scale Level, carrier waveform, modulator waveform, Feedback */
1691 case 0x04: /* Attack, Decay (modulator) */
1692 case 0x05: /* Attack, Decay (carrier) */
1693 case 0x06: /* Sustain, Release (modulator) */
1694 case 0x07: /* Sustain, Release (carrier) */
1695 chip->inst_tab[0][r & 0x07] = v;
1696 update_instrument_zero(chip,r&7);
1697 break;
1698
1699 case 0x0e: /* x, x, r,bd,sd,tom,tc,hh */
1700 {
1701 if (chip->VRC7_Mode)
1702 break;
1703 if(v&0x20)
1704 {
1705 if ((chip->rhythm&0x20)==0)
1706 /*rhythm off to on*/
1707 {
1708 //logerror("YM2413: Rhythm mode enable\n");
1709
1710 /* Load instrument settings for channel seven(chan=6 since we're zero based). (Bass drum) */
1711 chan = 6;
1712 inst = &chip->inst_tab[16][0];
1713 slot = chan*2;
1714
1715 load_instrument(chip, chan, slot, inst);
1716
1717 /* Load instrument settings for channel eight. (High hat and snare drum) */
1718 chan = 7;
1719 inst = &chip->inst_tab[17][0];
1720 slot = chan*2;
1721
1722 load_instrument(chip, chan, slot, inst);
1723
1724 CH = &chip->P_CH[chan];
1725 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH */
1726 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1727 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1728
1729 /* Load instrument settings for channel nine. (Tom-tom and top cymbal) */
1730 chan = 8;
1731 inst = &chip->inst_tab[18][0];
1732 slot = chan*2;
1733
1734 load_instrument(chip, chan, slot, inst);
1735
1736 CH = &chip->P_CH[chan];
1737 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is TOM */
1738 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1739 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1740 }
1741 /* BD key on/off */
1742 if(v&0x10)
1743 {
1744 KEY_ON (&chip->P_CH[6].SLOT[SLOT1], 2);
1745 KEY_ON (&chip->P_CH[6].SLOT[SLOT2], 2);
1746 }
1747 else
1748 {
1749 KEY_OFF(&chip->P_CH[6].SLOT[SLOT1],~2);
1750 KEY_OFF(&chip->P_CH[6].SLOT[SLOT2],~2);
1751 }
1752 /* HH key on/off */
1753 if(v&0x01) KEY_ON (&chip->P_CH[7].SLOT[SLOT1], 2);
1754 else KEY_OFF(&chip->P_CH[7].SLOT[SLOT1],~2);
1755 /* SD key on/off */
1756 if(v&0x08) KEY_ON (&chip->P_CH[7].SLOT[SLOT2], 2);
1757 else KEY_OFF(&chip->P_CH[7].SLOT[SLOT2],~2);
1758 /* TOM key on/off */
1759 if(v&0x04) KEY_ON (&chip->P_CH[8].SLOT[SLOT1], 2);
1760 else KEY_OFF(&chip->P_CH[8].SLOT[SLOT1],~2);
1761 /* TOP-CY key on/off */
1762 if(v&0x02) KEY_ON (&chip->P_CH[8].SLOT[SLOT2], 2);
1763 else KEY_OFF(&chip->P_CH[8].SLOT[SLOT2],~2);
1764 }
1765 else
1766 {
1767 if ((chip->rhythm&0x20)!=0)
1768 /*rhythm on to off*/
1769 {
1770 //logerror("YM2413: Rhythm mode disable\n");
1771 /* Load instrument settings for channel seven(chan=6 since we're zero based).*/
1772 chan = 6;
1773 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1774 slot = chan*2;
1775
1776 load_instrument(chip, chan, slot, inst);
1777
1778 /* Load instrument settings for channel eight.*/
1779 chan = 7;
1780 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1781 slot = chan*2;
1782
1783 load_instrument(chip, chan, slot, inst);
1784
1785 /* Load instrument settings for channel nine.*/
1786 chan = 8;
1787 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1788 slot = chan*2;
1789
1790 load_instrument(chip, chan, slot, inst);
1791 }
1792 /* BD key off */
1793 KEY_OFF(&chip->P_CH[6].SLOT[SLOT1],~2);
1794 KEY_OFF(&chip->P_CH[6].SLOT[SLOT2],~2);
1795 /* HH key off */
1796 KEY_OFF(&chip->P_CH[7].SLOT[SLOT1],~2);
1797 /* SD key off */
1798 KEY_OFF(&chip->P_CH[7].SLOT[SLOT2],~2);
1799 /* TOM key off */
1800 KEY_OFF(&chip->P_CH[8].SLOT[SLOT1],~2);
1801 /* TOP-CY off */
1802 KEY_OFF(&chip->P_CH[8].SLOT[SLOT2],~2);
1803 }
1804 chip->rhythm = v&0x3f;
1805 }
1806 break;
1807 }
1808 }
1809 break;
1810
1811 case 0x10:
1812 case 0x20:
1813 {
1814 int block_fnum;
1815
1816 chan = r&0x0f;
1817
1818 if (chan >= 9)
1819 chan -= 9; /* verified on real YM2413 */
1820 if (chip->VRC7_Mode && chan >= 6)
1821 break;
1822
1823 CH = &chip->P_CH[chan];
1824
1825 if(r&0x10)
1826 { /* 10-18: FNUM 0-7 */
1827 block_fnum = (CH->block_fnum&0x0f00) | v;
1828 }
1829 else
1830 { /* 20-28: suson, keyon, block, FNUM 8 */
1831 block_fnum = ((v&0x0f)<<8) | (CH->block_fnum&0xff);
1832
1833 if(v&0x10)
1834 {
1835 KEY_ON (&CH->SLOT[SLOT1], 1);
1836 KEY_ON (&CH->SLOT[SLOT2], 1);
1837 }
1838 else
1839 {
1840 KEY_OFF(&CH->SLOT[SLOT1],~1);
1841 KEY_OFF(&CH->SLOT[SLOT2],~1);
1842 }
1843
1844
1845 //if (CH->sus!=(v&0x20))
1846 // logerror("chan=%i sus=%2x\n",chan,v&0x20);
1847
1848 CH->sus = v & 0x20;
1849 }
1850 /* update */
1851 if(CH->block_fnum != block_fnum)
1852 {
1853 UINT8 block;
1854
1855 CH->block_fnum = block_fnum;
1856
1857 /* BLK 2,1,0 bits -> bits 3,2,1 of kcode, FNUM MSB -> kcode LSB */
1858 CH->kcode = (block_fnum&0x0f00)>>8;
1859
1860 CH->ksl_base = ksl_tab[block_fnum>>5];
1861
1862 block_fnum = block_fnum * 2;
1863 block = (block_fnum&0x1c00) >> 10;
1864 CH->fc = chip->fn_tab[block_fnum&0x03ff] >> (7-block);
1865
1866 /* refresh Total Level in both SLOTs of this channel */
1867 CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
1868 CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
1869
1870 /* refresh frequency counter in both SLOTs of this channel */
1871 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
1872 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
1873 }
1874 }
1875 break;
1876
1877 case 0x30: /* inst 4 MSBs, VOL 4 LSBs */
1878 {
1879 UINT8 old_instvol;
1880
1881 chan = r&0x0f;
1882
1883 if (chan >= 9)
1884 chan -= 9; /* verified on real YM2413 */
1885 if (chip->VRC7_Mode && chan >= 6)
1886 break;
1887
1888 old_instvol = chip->instvol_r[chan];
1889 chip->instvol_r[chan] = v; /* store for later use */
1890
1891 CH = &chip->P_CH[chan];
1892 SLOT = &CH->SLOT[SLOT2]; /* carrier */
1893 SLOT->TL = ((v&0x0f)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1894 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1895
1896
1897 /*check whether we are in rhythm mode and handle instrument/volume register accordingly*/
1898 if ((chan>=6) && (chip->rhythm&0x20))
1899 {
1900 /* we're in rhythm mode*/
1901
1902 if (chan>=7) /* only for channel 7 and 8 (channel 6 is handled in usual way)*/
1903 {
1904 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH(chan=7) or TOM(chan=8) */
1905 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1906 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1907 }
1908 }
1909 else
1910 {
1911 if ( (old_instvol&0xf0) == (v&0xf0) )
1912 return;
1913
1914 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1915 slot = chan*2;
1916
1917 load_instrument(chip, chan, slot, inst);
1918
1919 /*#if 0
1920 logerror("YM2413: chan#%02i inst=%02i: (r=%2x, v=%2x)\n",chan,v>>4,r,v);
1921 logerror(" 0:%2x 1:%2x\n",inst[0],inst[1]); logerror(" 2:%2x 3:%2x\n",inst[2],inst[3]);
1922 logerror(" 4:%2x 5:%2x\n",inst[4],inst[5]); logerror(" 6:%2x 7:%2x\n",inst[6],inst[7]);
1923 #endif*/
1924 }
1925 }
1926 break;
1927
1928 default:
1929 break;
1930 }
1931 }
1932
1933 /*static TIMER_CALLBACK( cymfile_callback )
1934 {
1935 if (cymfile)
1936 {
1937 fputc( (unsigned char)8, cymfile );
1938 }
1939 }*/
1940
1941 /* lock/unlock for common table */
1942 //static int OPLL_LockTable(const device_config *device)
OPLL_LockTable(void)1943 static int OPLL_LockTable(void)
1944 {
1945 num_lock++;
1946 if(num_lock>1) return 0;
1947
1948 /* first time */
1949
1950 /* allocate total level table (128kb space) */
1951 if( !init_tables() )
1952 {
1953 num_lock--;
1954 return -1;
1955 }
1956
1957 /*if (LOG_CYM_FILE)
1958 {
1959 cymfile = fopen("2413_.cym","wb");
1960 if (cymfile)
1961 timer_pulse ( device->machine, ATTOTIME_IN_HZ(110), NULL, 0, cymfile_callback); //110 Hz pulse timer
1962 else
1963 logerror("Could not create file 2413_.cym\n");
1964 }*/
1965
1966 return 0;
1967 }
1968
OPLL_UnLockTable(void)1969 static void OPLL_UnLockTable(void)
1970 {
1971 if(num_lock) num_lock--;
1972 if(num_lock) return;
1973
1974 /* last time */
1975
1976 OPLCloseTable();
1977
1978 /*if (cymfile)
1979 fclose (cymfile);
1980 cymfile = NULL;*/
1981 }
1982
OPLLResetChip(YM2413 * chip)1983 static void OPLLResetChip(YM2413 *chip)
1984 {
1985 int c,s;
1986 int i;
1987
1988 chip->eg_timer = 0;
1989 chip->eg_cnt = 0;
1990
1991 chip->noise_rng = 1; /* noise shift register */
1992
1993
1994 /* setup instruments table */
1995 for (i=0; i<19; i++)
1996 {
1997 for (c=0; c<8; c++)
1998 {
1999 chip->inst_tab[i][c] = table[i][c];
2000 }
2001 }
2002
2003
2004 /* reset with register write */
2005 OPLLWriteReg(chip,0x0f,0); /*test reg*/
2006 for(i = 0x3f ; i >= 0x10 ; i-- ) OPLLWriteReg(chip,i,0x00);
2007
2008 /* reset operator parameters */
2009 for( c = 0 ; c < 9 ; c++ )
2010 {
2011 OPLL_CH *CH = &chip->P_CH[c];
2012 for(s = 0 ; s < 2 ; s++ )
2013 {
2014 /* wave table */
2015 CH->SLOT[s].wavetable = 0;
2016 CH->SLOT[s].state = EG_OFF;
2017 CH->SLOT[s].volume = MAX_ATT_INDEX;
2018 }
2019 }
2020 }
2021
2022 /* Create one of virtual YM2413 */
2023 /* 'clock' is chip clock in Hz */
2024 /* 'rate' is sampling rate */
2025 //static YM2413 *OPLLCreate(const device_config *device, int clock, int rate)
OPLLCreate(int clock,int rate)2026 static YM2413 *OPLLCreate(int clock, int rate)
2027 {
2028 char *ptr;
2029 YM2413 *chip;
2030 int state_size;
2031
2032 if (OPLL_LockTable() == -1) return NULL;
2033
2034 /* calculate chip state size */
2035 state_size = sizeof(YM2413);
2036
2037 /* allocate memory block */
2038 ptr = (char *)malloc(state_size);
2039
2040 if (ptr==NULL)
2041 return NULL;
2042
2043 /* clear */
2044 memset(ptr,0,state_size);
2045
2046 chip = (YM2413 *)ptr;
2047
2048 chip->clock = clock;
2049 chip->rate = rate;
2050
2051 /* init global tables */
2052 OPLL_initalize(chip);
2053
2054 /* reset chip */
2055 OPLLResetChip(chip);
2056 return chip;
2057 }
2058
2059 /* Destroy one of virtual YM3812 */
OPLLDestroy(YM2413 * chip)2060 static void OPLLDestroy(YM2413 *chip)
2061 {
2062 OPLL_UnLockTable();
2063 free(chip);
2064 }
2065
2066 /* Option handlers */
2067
OPLLSetUpdateHandler(YM2413 * chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)2068 static void OPLLSetUpdateHandler(YM2413 *chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)
2069 {
2070 chip->UpdateHandler = UpdateHandler;
2071 chip->UpdateParam = param;
2072 }
2073
2074 /* YM3812 I/O interface */
OPLLWrite(YM2413 * chip,int a,int v)2075 static void OPLLWrite(YM2413 *chip,int a,int v)
2076 {
2077 if( !(a&1) )
2078 { /* address port */
2079 chip->address = v & 0xff;
2080 }
2081 else
2082 { /* data port */
2083 if(chip->UpdateHandler) chip->UpdateHandler(chip->UpdateParam,0);
2084 OPLLWriteReg(chip,chip->address,v);
2085 }
2086 }
2087
OPLLRead(YM2413 * chip,int a)2088 static unsigned char OPLLRead(YM2413 *chip,int a)
2089 {
2090 if( !(a&1) )
2091 {
2092 /* status port */
2093 return chip->status;
2094 }
2095 return 0xff;
2096 }
2097
2098
2099
2100
2101
2102 //void * ym2413_init(const device_config *device, int clock, int rate)
ym2413_init(int clock,int rate)2103 void * ym2413_init(int clock, int rate)
2104 {
2105 /* emulator create */
2106 return OPLLCreate(clock, rate);
2107 }
2108
ym2413_shutdown(void * chip)2109 void ym2413_shutdown(void *chip)
2110 {
2111 YM2413 *OPLL = (YM2413 *)chip;
2112
2113 /* emulator shutdown */
2114 OPLLDestroy(OPLL);
2115 }
2116
ym2413_reset_chip(void * chip)2117 void ym2413_reset_chip(void *chip)
2118 {
2119 YM2413 *OPLL = (YM2413 *)chip;
2120 OPLLResetChip(OPLL);
2121 }
2122
ym2413_write(void * chip,int a,int v)2123 void ym2413_write(void *chip, int a, int v)
2124 {
2125 YM2413 *OPLL = (YM2413 *)chip;
2126 OPLLWrite(OPLL, a, v);
2127 }
2128
ym2413_read(void * chip,int a)2129 unsigned char ym2413_read(void *chip, int a)
2130 {
2131 YM2413 *OPLL = (YM2413 *)chip;
2132 return OPLLRead(OPLL, a) & 0x03 ;
2133 }
2134
ym2413_set_update_handler(void * chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)2135 void ym2413_set_update_handler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void *param)
2136 {
2137 YM2413 *OPLL = (YM2413 *)chip;
2138 OPLLSetUpdateHandler(OPLL, UpdateHandler, param);
2139 }
2140
2141
2142 /*
2143 ** Generate samples for one of the YM2413's
2144 **
2145 ** 'which' is the virtual YM2413 number
2146 ** '*buffer' is the output buffer pointer
2147 ** 'length' is the number of samples that should be generated
2148 */
ym2413_update_one(void * _chip,SAMP ** buffers,int length)2149 void ym2413_update_one(void *_chip, SAMP **buffers, int length)
2150 {
2151 YM2413 *chip = (YM2413 *)_chip;
2152 UINT8 rhythm = chip->rhythm&0x20;
2153 SAMP *bufMO = buffers[0];
2154 SAMP *bufRO = buffers[1];
2155
2156 int i;
2157
2158 for( i=0; i < length ; i++ )
2159 {
2160 int mo,ro;
2161
2162 chip->output[0] = 0;
2163 chip->output[1] = 0;
2164
2165 advance_lfo(chip);
2166
2167 /* FM part */
2168 chan_calc(chip, &chip->P_CH[0]);
2169 //SAVE_SEPARATE_CHANNEL(0);
2170 chan_calc(chip, &chip->P_CH[1]);
2171 chan_calc(chip, &chip->P_CH[2]);
2172 chan_calc(chip, &chip->P_CH[3]);
2173 chan_calc(chip, &chip->P_CH[4]);
2174 chan_calc(chip, &chip->P_CH[5]);
2175
2176 if (! chip->VRC7_Mode)
2177 {
2178 if(!rhythm)
2179 {
2180 chan_calc(chip, &chip->P_CH[6]);
2181 chan_calc(chip, &chip->P_CH[7]);
2182 chan_calc(chip, &chip->P_CH[8]);
2183 }
2184 else /* Rhythm part */
2185 {
2186 rhythm_calc(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
2187 }
2188 }
2189
2190 mo = chip->output[0];
2191 ro = chip->output[1];
2192
2193 mo >>= FINAL_SH;
2194 ro >>= FINAL_SH;
2195
2196 /* limit check */
2197 //mo = limit( mo , MAXOUT, MINOUT );
2198 //ro = limit( ro , MAXOUT, MINOUT );
2199
2200 #ifdef SAVE_SAMPLE
2201 //if (which==0)
2202 //{
2203 SAVE_ALL_CHANNELS
2204 //}
2205 #endif
2206
2207 /* store to sound buffer */
2208 bufMO[i] = mo + ro;
2209 bufRO[i] = mo + ro;
2210
2211 advance(chip);
2212 }
2213
2214 }
2215
ym2413_set_mutemask(void * chip,UINT32 MuteMask)2216 void ym2413_set_mutemask(void* chip, UINT32 MuteMask)
2217 {
2218 YM2413* OPLL = (YM2413*)chip;
2219 UINT8 CurChn;
2220
2221 for (CurChn = 0; CurChn < 9; CurChn ++)
2222 OPLL->P_CH[CurChn].Muted = (MuteMask >> CurChn) & 0x01;
2223 for (CurChn = 0; CurChn < 5; CurChn ++)
2224 OPLL->MuteSpc[CurChn] = (MuteMask >> (9 + CurChn)) & 0x01;
2225
2226 return;
2227 }
2228
ym2413_set_chip_mode(void * chip,UINT8 Mode)2229 void ym2413_set_chip_mode(void* chip, UINT8 Mode)
2230 {
2231 // Enable/Disable VRC7 Mode (with only 6 instead of 9 channels and no rhythm part)
2232 YM2413* OPLL = (YM2413*)chip;
2233
2234 OPLL->VRC7_Mode = Mode;
2235
2236 return;
2237 }
2238
ym2413_override_patches(void * chip,const UINT8 * PatchDump)2239 void ym2413_override_patches(void* chip, const UINT8* PatchDump)
2240 {
2241 YM2413* OPLL = (YM2413*)chip;
2242 UINT8 CurIns;
2243 UINT8 CurReg;
2244
2245 for (CurIns = 0; CurIns < 19; CurIns ++)
2246 {
2247 for (CurReg = 0; CurReg < 8; CurReg ++)
2248 {
2249 OPLL->inst_tab[CurIns][CurReg] = PatchDump[CurIns * 8 + CurReg];
2250 }
2251 }
2252
2253 return;
2254 }
2255