1
2
3 # include <genlib.h>
4
5
6 #define getbit(val,bit) (((val) >> (bit))%2)
7
8
main()9 extern int main()
10 {
11 long i;
12
13
14 /* Generate all the operators required for the register file. */
15 GENLIB_MACRO (DPGEN_INV , "model_inv_x8", F_PLACE, 4, 8);
16 GENLIB_MACRO (DPGEN_DFF , "model_dff" , F_PLACE, 4);
17 GENLIB_MACRO (DPGEN_NBUSE, "model_nbuse" , F_PLACE, 4);
18
19 /* Generate all the operators required */
20
21 GENLIB_MACRO (DPGEN_MUX2 , "model_mux2", F_PLACE, 4, 2);
22 GENLIB_MACRO (DPGEN_NAND2MASK, "model_nand2mask_0000", F_PLACE, 4,"0b0000");
23 GENLIB_MACRO (DPGEN_XNOR2MASK, "model_xnor2mask_1111", F_PLACE, 4, "0b1111");
24 GENLIB_MACRO (DPGEN_NAND2 , "model_nand2", F_PLACE, 4, 4); /* 1 ou 4 */
25 GENLIB_MACRO (DPGEN_NOR2MASK , "model_nor2mask_1111", F_PLACE, 4,"0b1111");
26 GENLIB_MACRO (DPGEN_NMUX2 , "model_nmux2", F_PLACE, 4,2);
27 GENLIB_MACRO (DPGEN_INV , "model_inv", F_PLACE, 4,1);
28 GENLIB_MACRO (DPGEN_NOR2 , "model_nor2", F_PLACE, 4, 4); /* 1 ou 4 */
29 GENLIB_MACRO (DPGEN_XOR2 , "model_xor2", F_PLACE, 4, 4); /* 1 ou 4 */
30 GENLIB_MACRO (DPGEN_XNOR2 , "model_xnor2", F_PLACE, 4, 4); /* 1 ou 4 */
31 GENLIB_MACRO (DPGEN_DFFT , "model_dfft", F_PLACE, 4); /* 1 ou 4 */
32
33
34 /* Netlist description. */
35 GENLIB_DEF_LOFIG ("amd2901_dpt");
36
37 /* Command for selecting operands R and S.*/
38 GENLIB_LOCON ("ops_mx[2:0]" , IN , "ops_mx[2:0]");
39 GENLIB_LOCON ("opr_mx[1:0]" , IN , "opr_mx[1:0]");
40
41 /* ALU commands and auxiliary terminals. */
42 GENLIB_LOCON ("alu_k[4:0]" , IN , "alu_k[4:0]");
43 GENLIB_LOCON ("alu_cin" , IN , "alu_cin") ;
44 GENLIB_LOCON ("alu_cout", OUT , "alu_cout") ;
45 GENLIB_LOCON ("alu_over" , INOUT , "alu_over");
46
47 /* RAM, ACCU shifter commands and auxiliary terminals.*/
48 GENLIB_LOCON ("ram_sh[1:0]" , IN , "ram_sh[1:0]") ;
49 GENLIB_LOCON ("acc_sh[1:0]" , IN , "acc_sh[1:0]") ;
50
51 /* RAM shifter inputs.*/
52 GENLIB_LOCON ("ram_i_up" , IN , "ram_i_up");
53 GENLIB_LOCON ("ram_i_down" , IN , "ram_i_down");
54
55 /* ACCU shifter inputs.*/
56 GENLIB_LOCON ("acc_i_up" , IN , "acc_i_up" ) ;
57 GENLIB_LOCON ("acc_i_down" , IN , "acc_i_down") ;
58
59 /* ACCU shifter outputs ("acc_scout" is "acc_q_up").*/
60 GENLIB_LOCON ("acc_q_down" , OUT , "acc_q_down");
61
62 /* Output multiplexer commnand (for X bus).*/
63 GENLIB_LOCON ("out_mx" , IN , "out_mx");
64
65 /* ACCU controls terminals.*/
66 GENLIB_LOCON ("acc_ck" , IN , "acc_ck" );
67 GENLIB_LOCON ("acc_wen" , IN , "acc_wen" );
68 GENLIB_LOCON ("acc_test" , IN , "acc_test" );
69 GENLIB_LOCON ("acc_scin" , IN , "acc_scin") ; /* Scan-Path input.*/
70 GENLIB_LOCON ("acc_scout", INOUT ,"acc_scout"); /* Scan-Path output.*/
71
72 /* Register file controls terminals.*/
73 GENLIB_LOCON ("ram_ck[15:0]", IN ,"ram_ck[15:0]") ; /* Register clocks (ck) */
74 GENLIB_LOCON ("b_w[15:0]" , IN , "b_w[15:0]") ; /* Write enable */
75 GENLIB_LOCON ("a[15:0]" , IN , "a[15:0]") ; /* Register A address. */
76 GENLIB_LOCON ("b[15:0]" , IN , "b[15:0]") ; /* Register B address. */
77
78 /* Data buses terminals.*/
79 GENLIB_LOCON ("opr_d[3:0]" , IN ,"opr_d[3:0]");
80 GENLIB_LOCON ("alu_f[3:0]" , INOUT ,"alu_f[3:0]");
81 GENLIB_LOCON ("alu_np[3:0]" , OUT ,"alu_np[3:0]");
82 GENLIB_LOCON ("alu_ng[3:0]" , OUT , "alu_ng[3:0]");
83 GENLIB_LOCON ("out_x[3:0]" ,OUT , "out_x[3:0]");
84
85 /* Power supply connectors. */
86 GENLIB_LOCON ("vdd", IN , "vdd");
87 GENLIB_LOCON ("vss", IN , "vss");
88
89
90 /* Register file description. */
91 for (i = 0; i < 16; i++)
92 {
93 /* Register part. */
94 GENLIB_LOINS ("model_dff", GENLIB_NAME("ram_reg%ld",i),
95 GENLIB_ELM ("b_w", i),
96 GENLIB_ELM ("ram_ck" , i),
97 "ram_d[3:0]",
98 GENLIB_NAME ("ram_q%ld[3:0]", i),
99 "vdd", "vss", NULL);
100
101 /* Tristate for A output. */
102 GENLIB_LOINS ("model_nbuse", GENLIB_NAME ("ram_ntsa%ld",i),
103 GENLIB_ELM ("a", i),
104 GENLIB_NAME ("ram_q%ld[3:0]", i),
105 "ram_nra[3:0]",
106 "vdd", "vss", NULL);
107
108 /* Tristate for B output. */
109 GENLIB_LOINS ("model_nbuse", GENLIB_NAME("ram_ntsb%ld",i),
110 GENLIB_ELM ("b", i),
111 GENLIB_NAME ("ram_q%ld[3:0]", i),
112 "ram_nrb[3:0]",
113 "vdd", "vss", NULL);
114 }
115
116
117 /* Output drivers for A & B output. */
118 GENLIB_LOINS ("model_inv_x8", "inv_ra",
119 "ram_nra[3:0]",
120 "ram_ra[3:0]",
121 "vdd", "vss", NULL);
122 GENLIB_LOINS ("model_inv_x8", "inv_rb",
123 "ram_nrb[3:0]",
124 "ram_rb[3:0]",
125 "vdd", "vss", NULL);
126
127 /* --------------------------------------------------------------
128 * RAM shifter.
129 */
130
131 GENLIB_LOINS ("model_nmux2", "ram_nmux_0",
132 "ram_sh[0]",
133 "ram_i_up", "alu_f[3:1]", /* i1 */
134 "alu_f[2:0]", "ram_i_down", /* i0 */
135 "ram_nmux_0[3:0]",
136 "vdd", "vss", NULL);
137
138 GENLIB_LOINS ("model_inv", "ram_inv_1",
139 "alu_f[3:0]", /* i2 */
140 "ram_inv_1[3:0]",
141 "vdd", "vss", NULL);
142
143 GENLIB_LOINS ("model_nmux2", "ram_nmux_1",
144 "ram_sh[1]",
145 "ram_inv_1[3:0]",
146 "ram_nmux_0[3:0]",
147 "ram_d[3:0]",
148 "vdd", "vss", NULL);
149
150
151
152 /* *********************** Operand S ************************ */
153
154 GENLIB_LOINS ("model_nmux2", "ops_nmux_0",
155 "ops_mx[0]",
156 "ram_rb[3:0]", /* i1 */
157 "acc_scout", "acc_q[2:1]", "acc_q_down", /* i0 */
158 "ops_nmux_0[3:0]",
159 "vdd", "vss", NULL);
160
161 GENLIB_LOINS ("model_inv", "ops_inv_1",
162 "ram_ra[3:0]", /* i2 */
163 "ops_inv_1[3:0]",
164 "vdd", "vss", NULL);
165
166 GENLIB_LOINS ("model_nmux2", "ops_nmux_1",
167 "ops_mx[1]",
168 "ops_inv_1[3:0]",
169 "ops_nmux_0[3:0]",
170 "ops_it[3:0]",
171 "vdd", "vss", NULL);
172
173 GENLIB_LOINS ("model_nand2mask_0000", "ops_na2mask_0b0000",
174 "ops_mx[2]" ,
175 "ops_it[3:0]",
176 "ops_ns[3:0]",
177 "vdd", "vss", NULL);
178
179
180 /* *********************** Operand R ************************ */
181
182
183 GENLIB_LOINS ("model_mux2", "opr_mux",
184 "opr_mx[0]",
185 "opr_d[3:0]", /* i1 */
186 "ram_ra[3:0]", /* i0 */
187 "opr_it[3:0]",
188 "vdd", "vss", NULL);
189
190 GENLIB_LOINS ("model_nand2mask_0000", "opr_na2mask_0b0000",
191 "opr_mx[1]" ,
192 "opr_it[3:0]",
193 "opr_nr[3:0]",
194 "vdd", "vss", NULL);
195
196 /* *********************** ALU Description ****************** */
197
198 GENLIB_LOINS ("model_xnor2mask_1111", "alu_xr2_opnr",
199 "alu_k[0]" ,
200 "opr_nr[3:0]",
201 "alu_xr[3:0]",
202 "vdd", "vss", NULL);
203
204 GENLIB_LOINS ("model_xnor2mask_1111", "alu_xr2_opns",
205 "alu_k[1]" ,
206 "ops_ns[3:0]",
207 "alu_xs[3:0]",
208 "vdd", "vss", NULL);
209
210
211 /* Compute of "generate". */
212 GENLIB_LOINS ("model_nand2", "alu_na2_ng",
213 "alu_xr[3:0]",
214 "alu_xs[3:0]",
215 "alu_ng[3:0]",
216 "vdd", "vss", NULL);
217
218 /* Compute of "propagate". */
219 GENLIB_LOINS ("model_nor2", "alu_no2_np",
220 "alu_xr[3:0]",
221 "alu_xs[3:0]",
222 "alu_np[3:0]",
223 "vdd", "vss", NULL);
224
225 GENLIB_LOINS ("model_inv", "alu_n1_p" ,
226 "alu_np[3:0]",
227 "alu_p[3:0]",
228 "vdd", "vss", NULL);
229 /* Compute of carry. */
230 GENLIB_LOINS ("model_nand2", "alu_na2_npc" ,
231 "alu_p[3:0]",
232 "alu_over", "alu_carry[2:1]", "alu_cin",
233 "alu_npc[3:0]",
234 "vdd", "vss", NULL);
235
236 GENLIB_LOINS ("model_nand2", "alu_na2_carry",
237 "alu_ng[3:0]",
238 "alu_npc[3:0]",
239 "alu_cout", "alu_over", "alu_carry[2:1]",
240 "vdd", "vss", NULL);
241
242 /* Logical and arithmetical operators. */
243 GENLIB_LOINS ("model_nor2mask_1111", "alu_no2_and",
244 "alu_k[2]" ,
245 "alu_ng[3:0]",
246 "alu_r_and_s[3:0]",
247 "vdd", "vss", NULL);
248
249 GENLIB_LOINS ("model_nor2mask_1111", "alu_no2_or" ,
250 "alu_k[3]" ,
251 "alu_np[3:0]",
252 "alu_r_or_s[3:0]",
253 "vdd", "vss", NULL);
254
255 GENLIB_LOINS ("model_nor2mask_1111", "alu_no2_add",
256 "alu_k[4]" ,
257 "alu_over", "alu_carry[2:1]", "alu_cin",
258 "alu_r_add_s[3:0]",
259 "vdd", "vss", NULL);
260
261 /* Output. */
262 GENLIB_LOINS ("model_xor2", "alu_nxr2_op",
263 "alu_r_and_s[3:0]",
264 "alu_r_or_s[3:0]",
265 "alu_r_op_s[3:0]",
266 "vdd", "vss", NULL);
267
268 GENLIB_LOINS ("model_xnor2", "alu_nxr2_f" ,
269 "alu_r_op_s[3:0]",
270 "alu_r_add_s[3:0]",
271 "alu_f[3:0]",
272 "vdd", "vss", NULL);
273
274 /* ******************** ACCU Description ******************** */
275
276 GENLIB_LOINS ("model_nmux2", "accu_nmux_0",
277 "acc_sh[0]",
278 "acc_i_up", "acc_scout", "acc_q[2:1]", /* i1 : down */
279 "acc_q[2:1]", "acc_q_down", "acc_i_down", /* i0 : up */
280 "accu_nmux_0[3:0]",
281 "vdd", "vss", NULL);
282
283 GENLIB_LOINS ("model_inv", "accu_inv_1",
284 "alu_f[3:0]", /* i2: no */
285 "accu_inv_1[3:0]",
286 "vdd", "vss", NULL);
287
288 GENLIB_LOINS ("model_nmux2", "accu_nmux_1",
289 "acc_sh[1]",
290 "accu_inv_1[3:0]",
291 "accu_nmux_0[3:0]",
292 "acc_d[3:0]",
293 "vdd", "vss", NULL);
294
295 GENLIB_LOINS ("model_dfft", "acc_reg",
296 "acc_test" ,
297 "acc_scin" ,
298 "acc_wen",
299 "acc_ck" ,
300 "acc_d[3:0]",
301 "acc_scout", "acc_q[2:1]", "acc_q_down",
302 "vdd", "vss", NULL);
303
304 /* ******************* Output Multiplexer ******************* */
305
306 GENLIB_LOINS ("model_mux2", "out_mx",
307 "out_mx" ,
308 "ram_ra[3:0]", /* i1 */
309 "alu_f[3:0]", /* i0 */
310 "out_x[3:0]",
311 "vdd", "vss", NULL);
312
313
314 /* End of netlist description. */
315 GENLIB_SAVE_LOFIG ();
316
317 /* Partial placement description. */
318 GENLIB_DEF_PHFIG ("amd2901_dpt");
319
320
321 for (i = 0; i < 16; i++)
322 {
323 /* Register part. */
324 if (!(i % 8)) {
325 if (!i) {
326 GENLIB_PLACE ("model_dff", GENLIB_NAME ("ram_reg%ld",i), NOSYM, 0, 0);
327 } else {
328 GENLIB_DEF_PHINS (GENLIB_NAME ("ram_reg%ld", i - 8));
329 GENLIB_PLACE_TOP ("model_dff", GENLIB_NAME ("ram_reg%ld",i), NOSYM);
330 }
331 } else {
332 GENLIB_PLACE_RIGHT ("model_dff", GENLIB_NAME ("ram_reg%ld",i), NOSYM);
333 }
334
335 GENLIB_PLACE_RIGHT ("model_nbuse", GENLIB_NAME ("ram_ntsa%ld",i), NOSYM);
336 GENLIB_PLACE_RIGHT ("model_nbuse", GENLIB_NAME ("ram_ntsb%ld",i), NOSYM);
337 }
338
339
340 // GENLIB_PLACE_RIGHT ("model_inv_x8", "inv_ra", NOSYM);
341
342 // GENLIB_DEF_PHINS ("ram_ntsb7");
343 // GENLIB_PLACE_RIGHT ("model_inv_x8", "inv_rb", NOSYM);
344
345 GENLIB_PLACE("model_nmux2","ram_nmux_0",NOSYM, 500,700);
346 //GENLIB_PLACE_TOP ("model_nmux2", "ram_nmux_0", NOSYM);
347 GENLIB_PLACE_RIGHT ("model_nmux2", "ram_nmux_1", NOSYM);
348 GENLIB_PLACE_RIGHT ("model_nmux2", "ops_nmux_0", NOSYM);
349 GENLIB_PLACE_RIGHT ("model_nmux2", "ops_nmux_1", NOSYM);
350 GENLIB_PLACE_RIGHT ("model_mux2", "opr_mux", NOSYM);
351 #if 0
352 GENLIB_PLACE_RIGHT ("model_inv", "ram_inv_1", NOSYM);
353
354
355 /* *********************** Operand S ************************ */
356 GENLIB_PLACE_RIGHT ("model_inv", "ops_inv_1", NOSYM);
357 GENLIB_PLACE_RIGHT ("model_nand2mask_0000", "ops_na2mask_0b0000", NOSYM);
358
359 /* *********************** Operand R ************************ */
360 GENLIB_PLACE_RIGHT ("model_nand2mask_0000", "opr_na2mask_0b0000", NOSYM);
361
362 /* *********************** ALU Description ****************** */
363 GENLIB_PLACE_RIGHT ("model_xnor2mask_1111", "alu_xr2_opnr", NOSYM);
364 GENLIB_PLACE_RIGHT ("model_xnor2mask_1111", "alu_xr2_opns", NOSYM);
365
366 /* Compute of "generate". */
367 // GENLIB_PLACE_RIGHT ("model_nand2", "alu_na2_ng", NOSYM);
368
369 /* Compute of "propagate". */
370 // GENLIB_PLACE_RIGHT ("model_nor2", "alu_no2_np", NOSYM);
371 // GENLIB_PLACE_RIGHT ("model_inv", "alu_n1_p" , NOSYM);
372
373 /* Compute of carry. */
374 // GENLIB_PLACE_RIGHT ("model_nand2", "alu_na2_npc" , NOSYM);
375 /* Logical and arithmetical operators. */
376 //GENLIB_PLACE_RIGHT ("model_nor2mask_1111", "alu_no2_and", NOSYM);
377 //GENLIB_PLACE_RIGHT ("model_nor2mask_1111", "alu_no2_or" , NOSYM);
378 //GENLIB_PLACE_RIGHT ("model_nor2mask_1111", "alu_no2_add", NOSYM);
379 /* Output. */
380 GENLIB_PLACE_RIGHT ("model_xor2", "alu_nxr2_op", NOSYM);
381 GENLIB_PLACE_RIGHT ("model_xnor2", "alu_nxr2_f" , NOSYM);
382
383 /* ******************** ACCU Description ******************** */
384 #endif
385 GENLIB_PLACE_RIGHT ("model_nmux2", "accu_nmux_0", NOSYM);
386 //GENLIB_PLACE_RIGHT ("model_inv", "accu_inv_1", NOSYM);
387 GENLIB_PLACE_RIGHT ("model_nmux2", "accu_nmux_1", NOSYM);
388 GENLIB_PLACE_RIGHT ("model_dfft", "acc_reg", NOSYM);
389
390 /* ******************* Output Multiplexer ******************* */
391 GENLIB_PLACE_RIGHT ("model_mux2", "out_mx", NOSYM);
392
393 GENLIB_DEF_AB (0, 0, 0, 0);
394
395
396 /* End of placement description. */
397 GENLIB_SAVE_PHFIG ();
398
399 /* A good C program must always terminate by an "exit(0)". */
400 exit(0);
401 }
402