1--  This is an implementation of -*- vhdl -*- ieee.std_logic_1164 based only
2--  on the specifications.  This file is part of GHDL.
3--  Copyright (C) 2015 Tristan Gingold
4--
5--  This program is free software: you can redistribute it and/or modify
6--  it under the terms of the GNU General Public License as published by
7--  the Free Software Foundation, either version 2 of the License, or
8--  (at your option) any later version.
9--
10--  This program is distributed in the hope that it will be useful,
11--  but WITHOUT ANY WARRANTY; without even the implied warranty of
12--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13--  GNU General Public License for more details.
14--
15--  You should have received a copy of the GNU General Public License
16--  along with this program.  If not, see <gnu.org/licenses>.
17
18package std_logic_1164 is
19
20  --  Unresolved logic state.
21  type std_ulogic is
22    (
23     'U',  --  Uninitialized, this is also the default value.
24     'X',  --  Unknown / conflict value (forcing level).
25     '0',  --  0 (forcing level).
26     '1',  --  1 (forcing level).
27     'Z',  --  High impedance.
28     'W',  --  Unknown / conflict (weak level).
29     'L',  --  0 (weak level).
30     'H',  --  1 (weak level).
31     '-'   --  Don't care.
32    );
33
34  --  Vector of logic state.
35  type std_ulogic_vector is array (natural range <>) of std_ulogic;
36
37  --  Resolution function.
38  --  If S is empty, returns 'Z'.
39  --  If S has one element, return the element.
40  --  Otherwise, 'U' is the strongest.
41  --       then  'X'
42  --       then  '0' and '1'
43  --       then  'W'
44  --       then  'H' and 'L'
45  --       then  'Z'.
46  function resolved (s : std_ulogic_vector) return std_ulogic;
47
48  --  Resolved logic state.
49  subtype std_logic is resolved std_ulogic;
50
51  --  Vector of std_logic.
52  type std_logic_vector is array (natural range <>) of std_logic;
53
54  --  Subtypes of std_ulogic.  The names give the values.
55  subtype X01   is resolved std_ulogic range 'X' to '1';
56  subtype X01Z  is resolved std_ulogic range 'X' to 'Z';
57  subtype UX01  is resolved std_ulogic range 'U' to '1';
58  subtype UX01Z is resolved std_ulogic range 'U' to 'Z';
59
60  --  Logical operators.
61  --  For logical operations, the inputs are first normalized to UX01:
62  --  0 and L are normalized to 0, 1 and 1 are normalized to 1, U isnt changed,
63  --  all other states are normalized to X.
64  --  Then the classical electric rules are followed.
65  function "and"  (l : std_ulogic; r : std_ulogic) return UX01;
66  function "nand" (l : std_ulogic; r : std_ulogic) return UX01;
67  function "or"   (l : std_ulogic; r : std_ulogic) return UX01;
68  function "nor"  (l : std_ulogic; r : std_ulogic) return UX01;
69  function "xor"  (l : std_ulogic; r : std_ulogic) return UX01;
70  function "xnor" (l : std_ulogic; r : std_ulogic) return UX01;
71  function "not"  (l : std_ulogic) return UX01;
72
73  --  Logical operators for vectors.
74  --  An assertion of severity failure fails if the length of L and R aren't
75  --  equal.  The result range is 1 to L'Length.
76  function "and"  (l, r : std_logic_vector) return std_logic_vector;
77  function "nand" (l, r : std_logic_vector) return std_logic_vector;
78  function "or"   (l, r : std_logic_vector) return std_logic_vector;
79  function "nor"  (l, r : std_logic_vector) return std_logic_vector;
80  function "xor"  (l, r : std_logic_vector) return std_logic_vector;
81  function "xnor" (l, r : std_logic_vector) return std_logic_vector;
82  function "not"  (l : std_logic_vector) return std_logic_vector;
83
84  function "and"  (l, r : std_ulogic_vector) return std_ulogic_vector;
85  function "nand" (l, r : std_ulogic_vector) return std_ulogic_vector;
86  function "or"   (l, r : std_ulogic_vector) return std_ulogic_vector;
87  function "nor"  (l, r : std_ulogic_vector) return std_ulogic_vector;
88  function "xor"  (l, r : std_ulogic_vector) return std_ulogic_vector;
89  function "xnor" (l, r : std_ulogic_vector) return std_ulogic_vector;
90  function "not"  (l : std_ulogic_vector) return std_ulogic_vector;
91
92  --  Conversion functions.
93  --  The result range (for vectors) is S'Length - 1 downto 0.
94  --  XMAP is return for values not in '0', '1', 'L', 'H'.
95  function to_bit (s : std_ulogic; xmap : bit := '0') return bit;
96  function to_bitvector (s : std_logic_vector; xmap : bit := '0')
97    return bit_vector;
98  function to_bitvector (s : std_ulogic_vector; xmap : bit := '0')
99    return bit_vector;
100
101  function to_stdulogic (b : bit) return std_ulogic;
102  function to_stdlogicvector (b : bit_vector) return std_logic_vector;
103  function to_stdlogicvector (s : std_ulogic_vector) return std_logic_vector;
104  function to_stdulogicvector (b : bit_vector) return std_ulogic_vector;
105  function to_stdulogicvector (s : std_logic_vector) return std_ulogic_vector;
106
107  --  Normalization.
108  --  The result range (for vectors) is 1 to S'Length.
109  function to_X01 (s : std_logic_vector) return std_logic_vector;
110  function to_X01 (s : std_ulogic_vector) return std_ulogic_vector;
111  function to_X01 (s : std_ulogic) return X01;
112  function to_X01 (b : bit_vector) return std_logic_vector;
113  function to_X01 (b : bit_vector) return std_ulogic_vector;
114  function to_X01 (b : bit) return X01;
115
116  function to_X01Z (s : std_logic_vector) return std_logic_vector;
117  function to_X01Z (s : std_ulogic_vector) return std_ulogic_vector;
118  function to_X01Z (s : std_ulogic) return X01Z;
119  function to_X01Z (b : bit_vector) return std_logic_vector;
120  function to_X01Z (b : bit_vector) return std_ulogic_vector;
121  function to_X01Z (b : bit) return X01Z;
122
123  function to_UX01 (s : std_logic_vector) return std_logic_vector;
124  function to_UX01 (s : std_ulogic_vector) return std_ulogic_vector;
125  function to_UX01 (s : std_ulogic) return UX01;
126  function to_UX01 (b : bit_vector) return std_logic_vector;
127  function to_UX01 (b : bit_vector) return std_ulogic_vector;
128  function to_UX01 (b : bit) return UX01;
129
130  --  Edge detection.
131  --  An edge is detected in case of event on s, and X01 normalized value
132  --  rises from 0 to 1 or falls from 1 to 0.
133  function rising_edge (signal s : std_ulogic) return boolean;
134  function falling_edge (signal s : std_ulogic) return boolean;
135
136  --  Test for unknown.  Only 0, 1, L and H are known values.
137  function is_X (s : std_ulogic_vector) return boolean;
138  function is_X (s : std_logic_vector) return boolean;
139  function is_X (s : std_ulogic) return boolean;
140end std_logic_1164;
141