1
2-- Copyright (C) 2001 Bill Billowitch.
3
4-- Some of the work to develop this test suite was done with Air Force
5-- support.  The Air Force and Bill Billowitch assume no
6-- responsibilities for this software.
7
8-- This file is part of VESTs (Vhdl tESTs).
9
10-- VESTs is free software; you can redistribute it and/or modify it
11-- under the terms of the GNU General Public License as published by the
12-- Free Software Foundation; either version 2 of the License, or (at
13-- your option) any later version.
14
15-- VESTs is distributed in the hope that it will be useful, but WITHOUT
16-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
18-- for more details.
19
20-- You should have received a copy of the GNU General Public License
21-- along with VESTs; if not, write to the Free Software Foundation,
22-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
23
24-- ---------------------------------------------------------------------
25--
26-- $Id: tc2923.vhd,v 1.2 2001-10-26 16:30:24 paw Exp $
27-- $Revision: 1.2 $
28--
29-- ---------------------------------------------------------------------
30
31ENTITY c02s02b00x00p04n01i02923ent IS
32END c02s02b00x00p04n01i02923ent;
33
34ARCHITECTURE c02s02b00x00p04n01i02923arch OF c02s02b00x00p04n01i02923ent IS
35  function H return CHARACTER;
36  function H return CHARACTER is
37    signal S1 : BIT;  -- Failure_here
38    -- ERROR : signal declaration not allowed in subprogram declaration
39  begin
40    return 'A';
41  end H;
42BEGIN
43  TESTING: PROCESS
44  BEGIN
45    assert FALSE
46      report "***FAILED TEST: c02s02b00x00p04n01i02923 - Signal declarations are not allowed within subprogram declaration."
47      severity ERROR;
48    wait;
49  END PROCESS TESTING;
50
51END c02s02b00x00p04n01i02923arch;
52