1 2-- Copyright (C) 2002 Morgan Kaufmann Publishers, Inc 3 4-- This file is part of VESTs (Vhdl tESTs). 5 6-- VESTs is free software; you can redistribute it and/or modify it 7-- under the terms of the GNU General Public License as published by the 8-- Free Software Foundation; either version 2 of the License, or (at 9-- your option) any later version. 10 11-- VESTs is distributed in the hope that it will be useful, but WITHOUT 12-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14-- for more details. 15 16-- You should have received a copy of the GNU General Public License 17-- along with VESTs; if not, write to the Free Software Foundation, 18-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 20entity mem_read is 21end entity mem_read; 22 23 24architecture test of mem_read is 25 26 attribute trace : string; 27 28 subtype byte is bit_vector(7 downto 0); 29 type byte_vector is array (natural range <>) of byte; 30 31 type ram_bus is record 32 d : byte; 33 cmd, status, clk : bit; 34 end record ram_bus; 35 36 -- code from book 37 38 procedure mem_read ( address : in natural; 39 result : out byte_vector; 40 signal memory_bus : inout ram_bus ) is 41 42 attribute trace of address : constant is "integer/hex"; 43 attribute trace of result : variable is "byte/multiple/hex"; 44 attribute trace of memory_bus : signal is 45 "custom/command=rambus.cmd"; 46 -- . . . 47 48 begin 49 -- . . . 50 -- not in book 51 report address'trace; 52 report result'trace; 53 report memory_bus'trace; 54 -- end not in book 55 end procedure mem_read; 56 57 -- end code from book 58 59 signal memory_bus : ram_bus; 60 61begin 62 63 process is 64 variable address : natural; 65 variable result : byte_vector(0 to 3); 66 begin 67 mem_read ( address, result, memory_bus ); 68 wait; 69 end process; 70 71end architecture test; 72