1module test;
2 reg signed [3:0] reg1;
3 reg signed [3:0] reg2;
4 reg signed [3:0] result;
5
6 initial begin
7     reg1 = -12 / 3; // expression result is -4. regS is a signed register
8     $display("%b %d \n", reg1, reg1);
9     reg1 = -4'sd12 / 3;// expression result is 1. -4'sd12 is actually 4
10     $display("%b %d \n", reg1, reg1); // should be 1
11 end
12endmodule
13