1 /*
2 * This program source code file is part of KiCad, a free EDA CAD application.
3 *
4 * Copyright (C) 2004-2020 KiCad Developers.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you may find one here:
18 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19 * or you may search the http://www.gnu.org website for the version 2 license,
20 * or you may write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
22 */
23
24 #include <common.h>
25 #include <board.h>
26 #include <footprint.h>
27 #include <pcb_shape.h>
28
29 #include <geometry/seg.h>
30 #include <geometry/shape_segment.h>
31
32 #include <drc/drc_engine.h>
33 #include <drc/drc_item.h>
34 #include <drc/drc_rule.h>
35 #include <drc/drc_test_provider_clearance_base.h>
36
37 #include <drc/drc_rtree.h>
38
39 /*
40 Silk to silk clearance test. Check all silkscreen features against each other.
41 Errors generated:
42 - DRCE_OVERLAPPING_SILK
43
44 */
45
46 class DRC_TEST_PROVIDER_SILK_CLEARANCE : public DRC_TEST_PROVIDER
47 {
48 public:
DRC_TEST_PROVIDER_SILK_CLEARANCE()49 DRC_TEST_PROVIDER_SILK_CLEARANCE ():
50 m_board( nullptr ),
51 m_largestClearance( 0 )
52 {
53 }
54
~DRC_TEST_PROVIDER_SILK_CLEARANCE()55 virtual ~DRC_TEST_PROVIDER_SILK_CLEARANCE()
56 {
57 }
58
59 virtual bool Run() override;
60
GetName() const61 virtual const wxString GetName() const override
62 {
63 return "silk_clearance";
64 };
65
GetDescription() const66 virtual const wxString GetDescription() const override
67 {
68 return "Tests for overlapping silkscreen features.";
69 }
70
GetNumPhases() const71 virtual int GetNumPhases() const override
72 {
73 return 1;
74 }
75
76 virtual std::set<DRC_CONSTRAINT_T> GetConstraintTypes() const override;
77
78 private:
79
80 BOARD* m_board;
81 int m_largestClearance;
82 };
83
84
Run()85 bool DRC_TEST_PROVIDER_SILK_CLEARANCE::Run()
86 {
87 // This is the number of tests between 2 calls to the progress bar
88 const int delta = 500;
89
90 if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
91 {
92 reportAux( "Overlapping silk violations ignored. Tests not run." );
93 return true; // continue with other tests
94 }
95
96 m_board = m_drcEngine->GetBoard();
97
98 DRC_CONSTRAINT worstClearanceConstraint;
99 m_largestClearance = 0;
100
101 if( m_drcEngine->QueryWorstConstraint( SILK_CLEARANCE_CONSTRAINT, worstClearanceConstraint ) )
102 m_largestClearance = worstClearanceConstraint.m_Value.Min();
103
104 reportAux( "Worst clearance : %d nm", m_largestClearance );
105
106 if( !reportPhase( _( "Checking silkscreen for overlapping items..." ) ) )
107 return false; // DRC cancelled
108
109 DRC_RTREE silkTree;
110 DRC_RTREE targetTree;
111 int ii = 0;
112 int items = 0;
113
114 auto countItems =
115 [&]( BOARD_ITEM* item ) -> bool
116 {
117 ++items;
118 return true;
119 };
120
121 auto addToSilkTree =
122 [&]( BOARD_ITEM* item ) -> bool
123 {
124 if( !reportProgress( ii++, items, delta ) )
125 return false;
126
127 for( PCB_LAYER_ID layer : { F_SilkS, B_SilkS } )
128 {
129 if( item->IsOnLayer( layer ) )
130 silkTree.Insert( item, layer );
131 }
132
133 return true;
134 };
135
136 auto addToTargetTree =
137 [&]( BOARD_ITEM* item ) -> bool
138 {
139 if( !reportProgress( ii++, items, delta ) )
140 return false;
141
142 for( PCB_LAYER_ID layer : item->GetLayerSet().Seq() )
143 targetTree.Insert( item, layer );
144
145 return true;
146 };
147
148 forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), countItems );
149
150 forEachGeometryItem( s_allBasicItems,
151 LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
152 countItems );
153
154 forEachGeometryItem( s_allBasicItems, LSET( 2, F_SilkS, B_SilkS ), addToSilkTree );
155
156 forEachGeometryItem( s_allBasicItems,
157 LSET::FrontMask() | LSET::BackMask() | LSET( 2, Edge_Cuts, Margin ),
158 addToTargetTree );
159
160 reportAux( _("Testing %d silkscreen features against %d board items."),
161 silkTree.size(),
162 targetTree.size() );
163
164 const std::vector<DRC_RTREE::LAYER_PAIR> layerPairs =
165 {
166 DRC_RTREE::LAYER_PAIR( F_SilkS, F_SilkS ),
167 DRC_RTREE::LAYER_PAIR( F_SilkS, F_Mask ),
168 DRC_RTREE::LAYER_PAIR( F_SilkS, F_Adhes ),
169 DRC_RTREE::LAYER_PAIR( F_SilkS, F_Paste ),
170 DRC_RTREE::LAYER_PAIR( F_SilkS, F_CrtYd ),
171 DRC_RTREE::LAYER_PAIR( F_SilkS, F_Fab ),
172 DRC_RTREE::LAYER_PAIR( F_SilkS, F_Cu ),
173 DRC_RTREE::LAYER_PAIR( F_SilkS, Edge_Cuts ),
174 DRC_RTREE::LAYER_PAIR( F_SilkS, Margin ),
175 DRC_RTREE::LAYER_PAIR( B_SilkS, B_SilkS ),
176 DRC_RTREE::LAYER_PAIR( B_SilkS, B_Mask ),
177 DRC_RTREE::LAYER_PAIR( B_SilkS, B_Adhes ),
178 DRC_RTREE::LAYER_PAIR( B_SilkS, B_Paste ),
179 DRC_RTREE::LAYER_PAIR( B_SilkS, B_CrtYd ),
180 DRC_RTREE::LAYER_PAIR( B_SilkS, B_Fab ),
181 DRC_RTREE::LAYER_PAIR( B_SilkS, B_Cu ),
182 DRC_RTREE::LAYER_PAIR( B_SilkS, Edge_Cuts ),
183 DRC_RTREE::LAYER_PAIR( B_SilkS, Margin )
184 };
185
186 targetTree.QueryCollidingPairs( &silkTree, layerPairs,
187 [&]( const DRC_RTREE::LAYER_PAIR& aLayers, DRC_RTREE::ITEM_WITH_SHAPE* aRefItem,
188 DRC_RTREE::ITEM_WITH_SHAPE* aTestItem, bool* aCollisionDetected ) -> bool
189 {
190 if( m_drcEngine->IsErrorLimitExceeded( DRCE_OVERLAPPING_SILK ) )
191 return false;
192
193 if( isInvisibleText( aRefItem->parent ) || isInvisibleText( aTestItem->parent ) )
194 return true;
195
196 auto constraint = m_drcEngine->EvalRules( SILK_CLEARANCE_CONSTRAINT,
197 aRefItem->parent, aTestItem->parent,
198 aLayers.second );
199
200 if( constraint.IsNull() )
201 return true;
202
203 int minClearance = constraint.GetValue().Min();
204
205 if( minClearance < 0 )
206 return true;
207
208 int actual;
209 VECTOR2I pos;
210
211 // Graphics are often compound shapes so ignore collisions between shapes in a
212 // single footprint or on the board.
213 PCB_SHAPE* refGraphic = dynamic_cast<PCB_SHAPE*>( aRefItem->parent );
214 PCB_SHAPE* testGraphic = dynamic_cast<PCB_SHAPE*>( aTestItem->parent );
215
216 if( refGraphic && testGraphic )
217 {
218 FOOTPRINT *refParentFP = dynamic_cast<FOOTPRINT*>( refGraphic->GetParent() );
219 FOOTPRINT *testParentFP = dynamic_cast<FOOTPRINT*>( testGraphic->GetParent() );
220
221 if( refParentFP == testParentFP ) // also true when both are nullptr
222 return true;
223 }
224
225 if( aRefItem->shape->Collide( aTestItem->shape, minClearance, &actual, &pos ) )
226 {
227 std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_OVERLAPPING_SILK );
228
229 if( minClearance > 0 )
230 {
231 m_msg.Printf( _( "(%s clearance %s; actual %s)" ),
232 constraint.GetParentRule()->m_Name,
233 MessageTextFromValue( userUnits(), minClearance ),
234 MessageTextFromValue( userUnits(), actual ) );
235
236 drcItem->SetErrorMessage( drcItem->GetErrorText() + wxS( " " ) + m_msg );
237 }
238
239 drcItem->SetItems( aRefItem->parent, aTestItem->parent );
240 drcItem->SetViolatingRule( constraint.GetParentRule() );
241
242 reportViolation( drcItem, (wxPoint) pos );
243
244 *aCollisionDetected = true;
245 }
246
247 return true;
248 },
249 m_largestClearance,
250 [&]( int aCount, int aSize ) -> bool
251 {
252 return reportProgress( aCount, aSize, delta );
253 } );
254
255 reportRuleStatistics();
256
257 return true;
258 }
259
260
GetConstraintTypes() const261 std::set<DRC_CONSTRAINT_T> DRC_TEST_PROVIDER_SILK_CLEARANCE::GetConstraintTypes() const
262 {
263 return { SILK_CLEARANCE_CONSTRAINT };
264 }
265
266
267 namespace detail
268 {
269 static DRC_REGISTER_TEST_PROVIDER<DRC_TEST_PROVIDER_SILK_CLEARANCE> dummy;
270 }
271