1[40] %Error: t_assert_synth.v:50: Assertion failed in top.t: synthesis parallel_case, but multiple matches found 2%Error: t/t_assert_synth.v:50: Verilog $stop 3Aborting... 4
1[40] %Error: t_assert_synth.v:50: Assertion failed in top.t: synthesis parallel_case, but multiple matches found 2%Error: t/t_assert_synth.v:50: Verilog $stop 3Aborting... 4