1// DESCRIPTION: Verilator: Verilog Test module 2// 3// This file ONLY is placed under the Creative Commons Public Domain, for 4// any use, without warranty, 2020 by Wilson Snyder. 5// SPDX-License-Identifier: CC0-1.0 6 7// Let context messages easily know if given line is expected ok or bad 8task ok; 9endtask 10task bad; 11endtask 12 13class Cls; 14 int m_pub = 1; 15 local int m_loc = 2; 16 protected int m_prot = 3; 17 task f_pub; endtask 18 local task f_loc; endtask 19 protected task f_prot; endtask 20 static task s_pub; endtask 21 static local task s_loc; endtask 22 static protected task s_prot; endtask 23 task check; 24 Cls o; 25 ok(); if (m_pub != 1) $stop; 26 ok(); if (m_loc != 10) $stop; 27 ok(); if (m_prot != 20) $stop; 28 ok(); f_pub(); 29 ok(); f_loc(); 30 ok(); f_prot(); 31 ok(); o.f_pub(); 32 ok(); o.f_loc(); 33 ok(); o.f_prot(); 34 ok(); s_pub(); 35 ok(); s_loc(); 36 ok(); s_prot(); 37 ok(); Cls::s_pub(); 38 ok(); Cls::s_loc(); 39 ok(); Cls::s_prot(); 40 endtask 41endclass 42 43class Ext extends Cls; 44 task check; 45 Ext o; 46 ok(); if (m_pub != 1) $stop; 47 bad(); if (m_loc != 10) $stop; 48 ok(); if (m_prot != 20) $stop; 49 ok(); f_pub(); 50 bad(); f_loc(); 51 ok(); f_prot(); 52 ok(); o.f_pub(); 53 bad(); o.f_loc(); 54 ok(); o.f_prot(); 55 ok(); s_pub(); 56 bad(); s_loc(); 57 ok(); s_prot(); 58 ok(); Cls::s_pub(); 59 bad(); Cls::s_loc(); 60 ok(); Cls::s_prot(); 61 endtask 62endclass 63 64module t (/*AUTOARG*/); 65 initial begin 66 Cls c; 67 Ext e; 68 c = new; 69 e = new; 70 ok(); if (c.m_pub != 1) $stop; 71 bad(); if (c.m_loc != 2) $stop; 72 bad(); if (c.m_prot != 20) $stop; 73 ok(); if (e.m_pub != 1) $stop; 74 bad(); if (e.m_loc != 2) $stop; 75 bad(); if (e.m_prot != 20) $stop; 76 ok(); c.f_pub(); 77 bad(); c.f_loc(); 78 bad(); c.f_prot(); 79 ok(); c.s_pub(); 80 bad(); c.s_loc(); 81 bad(); c.s_prot(); 82 ok(); Cls::s_pub(); 83 bad(); Cls::s_loc(); 84 bad(); Cls::s_prot(); 85 // 86 $write("*-* All Finished *-*\n"); 87 $finish; 88 end 89endmodule 90