1// DESCRIPTION: Verilator: Dotted reference that uses another dotted reference 2// as the select expression 3// 4// This file ONLY is placed into the Public Domain, for any use, 5// without warranty, 2015 by Todd Strader. 6// SPDX-License-Identifier: CC0-1.0 7 8interface foo_intf; 9 logic a; 10endinterface 11 12function integer the_other_func (input integer val); 13 return val; 14endfunction 15 16module t (/*AUTOARG*/); 17 genvar the_genvar; 18 generate 19 for (the_genvar = 0; the_genvar < 4; the_genvar++) begin: foo_loop 20 foo foo_inst(); 21 end 22 endgenerate 23 24 bar bar_inst(); 25 26 logic x; 27 assign x = foo_loop[bar_inst.THE_LP].foo_inst.y; 28 //localparam N = 2; 29 //assign x = foo_loop[N].foo_inst.y; 30 31 initial begin 32 $write("*-* All Finished *-*\n"); 33 $finish; 34 end 35endmodule 36 37module foo(); 38 logic y; 39endmodule 40 41module bar(); 42 localparam THE_LP = 2; 43endmodule 44