1// DESCRIPTION: Verilator: Large test for SystemVerilog
2
3// This file ONLY is placed into the Public Domain, for any use,
4// without warranty, 2012.
5// SPDX-License-Identifier: CC0-1.0
6
7// Contributed by M W Lund, Atmel Corporation.
8
9//*****************************************************************************
10// PAD_GPIO - General Purpose I/O Pad (Dummy!!!!)
11//*****************************************************************************
12
13module pad_gpio
14#( parameter ID = 0 )
15  (
16   input  logic pullup_en,
17   input  logic pulldown_en,
18   input  logic output_en,
19   input  logic output_val,
20   input  logic slew_limit_en,
21   input  logic input_en,
22   output logic input_val,
23
24   inout  wire  ana,
25
26   inout wire pad
27   );
28
29   // **** Analog <-> pad connection ****
30`ifndef VERILATOR //TODO alias
31   alias ana = pad;
32`endif
33
34
35  // **** Digital driver <-> pad connection ****
36  assign pad = (output_en) ? output_val : 1'bz;
37
38
39  // **** Digital pull-up/pull-down <-> pad connection ****
40  // TO BE ADDED!!!!
41
42
43  // **** Digital input <-> pad connection ****
44  assign input_val = (input_en) ? pad : 1'b0;
45
46
47
48endmodule // pad_gpio
49