1#!/usr/bin/env perl 2if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } 3# DESCRIPTION: Verilator: Verilog Test driver/expect definition 4# 5# Copyright 2003-2020 by Wilson Snyder. This program is free software; you 6# can redistribute it and/or modify it under the terms of either the GNU 7# Lesser General Public License Version 3 or the Perl Artistic License 8# Version 2.0. 9# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 10 11# Test tracing with two models instanced 12scenarios(vlt_all => 1); 13 14top_filename("t_trace_two_a.v"); 15 16compile( 17 make_main => 0, 18 verilator_make_gmake => 0, 19 top_filename => 't_trace_two_b.v', 20 VM_PREFIX => 'Vt_trace_two_b', 21 verilator_flags2 => ['-trace'], 22 ); 23 24run( 25 logfile => "$Self->{obj_dir}/make_first_ALL.log", 26 cmd => ["make", "-C", "$Self->{obj_dir}", "-f", "Vt_trace_two_b.mk", "Vt_trace_two_b__ALL.cpp"] 27 ); 28 29compile( 30 make_main => 0, 31 top_filename => 't_trace_two_a.v', 32 verilator_flags2 => ['-exe', '-trace', "$Self->{t_dir}/t_trace_two_cc.cpp"], 33 v_flags2 => ['+define+TEST_DUMP'], 34 ); 35 36execute( 37 check_finished => 1, 38 ); 39 40if ($Self->{vlt_all}) { 41 file_grep("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x); 42 vcd_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename}); 43} 44 45ok(1); 461; 47