1 /**
2  *\file mykonos_gpio.c
3  *
4  *\brief Contains Mykonos APIs for transceiver GPIO configuration and control.
5  *
6  * Mykonos API version: 1.5.1.3565
7  */
8 
9 /**
10 * \page Disclaimer Legal Disclaimer
11 * Copyright 2015-2017 Analog Devices Inc.
12 * Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
13 *
14 */
15 
16 #include <stdint.h>
17 #include <stddef.h>
18 #include "common.h"
19 #include "mykonos.h"
20 #include "mykonos_gpio.h"
21 #include "mykonos_macros.h"
22 #include "mykonos_user.h"
23 
24 
25 /**
26  * \brief Helper function for return of character string based on 32-bit mykonosGpioErr_t enum value
27  *
28  * To save codespace, these error strings are ifdef'd out unless the user
29  * adds a define MYKONOS_VERBOSE to their workspace.  This function can be
30  * useful for debug.  Each function also returns unique error codes to
31  * make it easier to determine where the code broke.
32  *
33  * \param errorCode is enumerated error code value
34  *
35  * \return Returns character string based on enumerated value
36  */
getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)37 const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
38 {
39 #if MYKONOS_VERBOSE == 0
40         return "";
41 
42  #else
43 
44     switch (errorCode)
45     {
46         case MYKONOS_ERR_GPIO_OK:
47             return "";
48 
49         case MYKONOS_ERR_EN_MONITOR_OUT_NOT_ENABLED:
50             return "MYKONOS_setGpioMonitorOut() Mykonos monitor output not enable, please run GPIO setup with the correct setup for enabling the monitor output functionality\n";
51 
52         case MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE:
53             return "MYKONOS_setGpioMonitorOut()The index specified is incorrect, index available are from 0x01 to 0x42\n";
54 
55         case MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM:
56             return "MYKONOS_getGpioMonitorOut() if the monitorIndex is null.\n";
57 
58         case MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM:
59             return "MYKONOS_getGpioMonitorOut() if the monitorMask is null.\n";
60 
61         case MYKONOS_ERR_MGCRX1_STEP_INV_PARAM:
62             return "MYKONOS_setRx1GainCtrlPin() An invalid step size has been passed, valid step sizes for increment/decrement is 0-7\n";
63 
64         case MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM:
65             return "MYKONOS_setRx1GainCtrlPin() An invalid decrement pin has been passed \n";
66 
67         case MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM:
68             return "MYKONOS_setRx1GainCtrlPin() An invalid increment pin has been passed, \n";
69 
70         case MYKONOS_ERR_MGCRX2_STEP_INV_PARAM:
71             return "MYKONOS_setRx2GainCtrlPin() An invalid step size has been passed, valid step sizes for increment/decrement is 0-7\n";
72 
73         case MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM:
74             return "MYKONOS_setRx2GainCtrlPin() An invalid decrement pin has been passed\n";
75 
76         case MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM:
77             return "MYKONOS_setRx2GainCtrlPin() An invalid increment pin has been passed\n";
78 
79         case MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM:
80             return "MYKONOS_getRx1GainCtrlPin() if a null value has been passed to incStep.\n";
81 
82         case MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM:
83             return "MYKONOS_getRx1GainCtrlPin() if a null value has been passed to decStep.\n";
84 
85         case MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM:
86             return "MYKONOS_getRx1GainCtrlPin() if a null value has been passed to rx1GainIncPin.\n";
87 
88         case MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM:
89             return "MYKONOS_getRx1GainCtrlPin() if a null value has been passed to rx1GainDecPin.\n";
90 
91         case MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM:
92             return "MYKONOS_getRx1GainCtrlPin() if a null value has been passed to enable.\n";
93 
94         case MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM:
95             return "MYKONOS_getRx2GainCtrlPin() if a null value has been passed to incStep.\n";
96 
97         case MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM:
98             return "MYKONOS_getRx2GainCtrlPin() if a null value has been passed to decStep.\n";
99 
100         case MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM:
101             return "MYKONOS_getRx2GainCtrlPin() if a null value has been passed to rx1GainIncPin.\n";
102 
103         case MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM:
104             return "MYKONOS_getRx2GainCtrlPin() if a null value has been passed to rx1GainDecPin.\n";
105 
106         case MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM:
107             return "MYKONOS_getRx2GainCtrlPin() if a null value has been passed to enable.\n";
108 
109         case MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM:
110             return "MYKONOS_setTx1AttenCtrlPin() An invalid step size has been passed, valid step sizes for att are 0x00-0x1F\n";
111 
112         case MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM:
113             return "MYKONOS_setTx1AttenCtrlPin() An invalid decrement pin has been passed\n";
114 
115         case MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM:
116             return "MYKONOS_setTx1AttenCtrlPin() An invalid decrement pin has been passed\n";
117 
118         case MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM:
119             return "MYKONOS_setTx2AttenCtrlPin() An invalid step size has been passed, valid step sizes for att are 0x00-0x1F\n";
120 
121         case MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM:
122             return "MYKONOS_setTx2AttenCtrlPin() An invalid decrement pin has been passed\n";
123 
124         case MYKONOS_ERR_TPCTX2_GPIO_DECPIN_INV_PARAM:
125             return "MYKONOS_setTx2AttenCtrlPin() An invalid decrement pin has been passed\n";
126 
127         case MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM:
128             return "MYKONOS_getTx2AttenCtrlPin() if a null value has been passed to stepSize.\n";
129 
130         case MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM:
131             return "MYKONOS_getTx2AttenCtrlPin() if a null value has been passed to tx2AttenIncPin.\n";
132 
133         case MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM:
134             return "MYKONOS_getTx2AttenCtrlPin() if a null value has been passed to tx2AttenDecPin.\n";
135 
136         case MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM:
137             return "MYKONOS_getTx2AttenCtrlPin() if a null value has been passed to enable.\n";
138 
139         case MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM:
140             return "MYKONOS_getTx2AttenCtrlPin() if a null value has been passed to useTx1ForTx2.\n";
141 
142         case MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM:
143             return "MYKONOS_getTx1AttenCtrlPin() if a null value has been passed to stepSize.\n";
144 
145         case MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM:
146             return "MYKONOS_getTx1AttenCtrlPin() if a null value has been passed to tx1AttenIncPin.\n";
147 
148         case MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM:
149             return "MYKONOS_getTx1AttenCtrlPin() if a null value has been passed to tx1AttenDecPin.\n";
150 
151         case MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM:
152             return "MYKONOS_getTx1AttenCtrlPin() if a null value has been passed to enable.\n";
153 
154         case MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM:
155             return "MYKONOS_getTx1AttenCtrlPin() if a null value has been passed to useTx1ForTx2.\n";
156 
157         case MYKONOS_ERR_GPIO_SRC_PARAM_INV:
158             return "MYKONOS_setGpioSourceCtrl() An invalid source control parameter has been passed\n";
159 
160         case MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM:
161             return "MYKONOS_getGpioSetLevel() gpioPinSetLevel pointer is NULL in function parameter\n";
162 
163         case MYKONOS_ERR_READGPIOSPI_NULL_PARM:
164             return "MYKONOS_readGpioPinLevel() has a null *gpioPinLevel parameter\n";
165 
166         case MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM:
167             return "MYKONOS_getGpio3v3PinLevel() has a null *gpio3v3PinLevel parameter\n";
168 
169         case MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM:
170             return "MYKONOS_setupAuxDac() has a null device->auxIo pointer\n";
171 
172         case MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM:
173             return "MYKONOS_getGpio3v3Oe() has NULL pointer for function parameter gpio3v3OutEn\n;";
174 
175         case MYKONOS_ERR_INV_GP_INT_MASK_PARM:
176             return "General Purpose Interrupt source mask parameter is invalid\n";
177 
178         case MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM:
179             return "MYKONOS_readGpInterruptStatus() has NULL status parameter\n";
180 
181         case MYKONOS_ERR_SET_GPIO_3V3_INV_MODE:
182             return "Invalid GPIO3v3 source control mode\n";
183 
184         case MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL:
185             return "gpio3v3 members have invalid value for the GPIO3v3 source control mode.\n";
186 
187         case MYKONOS_ERR_SET_GPIO_1V8_INV_MODE:
188             return "The GPIO mode enum is not a valid value in MYKONOS_setupGpio\n";
189 
190         case MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM:
191             return "MYKONOS_getGpio3v3SetLevel() has NULL pointer for function parameter gpio3v3SetLevel\n";
192 
193         case MYKONOS_ERR_GPIO_OE_INV_PARAM:
194             return "MYKONOS_setGpioOe() had invalid parameter gpioOutEn (valid range 0 - 0x07FFFF)\n";
195 
196         case MYKONOS_ERR_GETGPIO_OE_NULL_PARM:
197             return "MYKONOS_getGpioOe() has NULL function parameter\n";
198 
199         case MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO:
200             return "device->auxIo structure has NULL pointer in MYKONOS_writeAuxDac()\n";
201 
202         case MYKONOS_ERR_READAUXADC_NULL_PARAM:
203             return "MYKONOS_readAuxAdc() has NULL function parameter\n";
204 
205         case MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER:
206             return "Invalid pointer detected in MYKONOS_setupGpio3v3()\n";
207 
208         case MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER:
209             return "Invalid pointer detected in MYKONOS_setupGpio()\n";
210 
211         case MYKONOS_ERR_SET_ARMGPIO_INV_POINTER:
212             return "Invalid pointer detected at device->auxIo->armGpio in MYKONOS_setArmGpioPins() \n";
213 
214         case MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR:
215             return "ARM Command Error in MYKONOS_setArmGpioPins()\n";
216 
217         case MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID:
218             return "Invalid Signal ID detected in device->auxIo->armGpio \n";
219 
220         case MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN:
221             return "Out of range GPIO pin detected \n";
222 
223         case MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE:
224             return "device->auxIo->auxDacValue, AUXDAC value out of range in MYKONOS_setupAuxDacs()\n";
225 
226         case MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE:
227             return "auxDacCode value out of range in MYKONOS_writeAuxDac()\n";
228 
229         case MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX:
230             return "auxDacIndex value out of range in MYKONOS_writeAuxDac()\n";
231 
232         case MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM:
233             return "auxAdcChannel value out of range in MYKONOS_setAuxAdcChannel()\n";
234 
235         case MYKONOS_ERR_SETUPAUXADC_INV_VCODIV:
236             return "device->clocks->clkPllVcoDiv value not supported in MYKONOS_setupAuxAdcs()\n";
237 
238         case MYKONOS_ERR_INV_AUX_ADC_DEC_PARM:
239             return "adcDecimation value out of range in MYKONOS_setupAuxAdcs()\n";
240 
241         case MYKONOS_ERR_SLICER_INV_RX1_SEL:
242             return "invalid RX1 GPIO pin selection for Slicer control in MYKONOS_setRxSlicerCtrl()\n";
243 
244         case MYKONOS_ERR_SLICER_INV_RX2_SEL:
245             return "invalid RX2 GPIO pin selection for Slicer control in MYKONOS_setRxSlicerCtrl()\n";
246 
247         case MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE:
248             return "slicer step is out of range for the SLicer control in MYKONOS_setRxSlicerCtrl()\n";
249 
250         case MYKONOS_ERR_SLICER_EN_INV:
251             return "invalid enable in MYKONOS_setRxSlicerCtrl()\n";
252 
253         case MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM:
254             return "rx1Pins is null pointer for the passed parameter in MYKONOS_getRxSlicerCtrl()\n";
255 
256         case MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM:
257             return "rx1Pins is null pointer for the passed parameter in MYKONOS_getRxSlicerCtrl()\n";
258 
259         case MYKONOS_ERR_SLICER_STEP_NULL_PARM:
260             return "slicerStep is null pointer for the passed parameter in MYKONOS_getRxSlicerCtrl()\n";
261 
262         case MYKONOS_ERR_SLICER_EN_NULL_PARM:
263             return "enable is null pointer for the passed parameter in MYKONOS_getRxSlicerCtrl()\n";
264 
265         case MYKONOS_ERR_GAINCOMP_NULL_STRUCT:
266             return "gain compensation structure gainComp is not initialised in MYKONOS_getRxGainCompensation()\n";
267 
268         case MYKONOS_ERR_GAINCOMP_EN_NULL_PARM:
269             return "enable is null pointer for the passed parameter in MYKONOS_getRxGainCompensation()\n";
270 
271         case MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT:
272             return "gain compensation structure gainComp is not initialised in MYKONOS_setRxGainCompensation()\n";
273 
274         case MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET:
275             return "gain compensation structure gainComp->rx1Offset is invalid in MYKONOS_setRxGainCompensation()\n";
276 
277         case MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET:
278             return "gain compensation structure gainComp->rx2Offset is invalid in MYKONOS_setRxGainCompensation()\n";
279 
280         case MYKONOS_ERR_GAINCOMP_INV_STEP:
281             return "gain compensation structure gainComp->compStep is invalid in MYKONOS_setRxGainCompensation()\n";
282 
283         case MYKONOS_ERR_GAINCOMP_INV_EN:
284             return "enable is not valid in MYKONOS_setRxGainCompensation()\n";
285 
286         case MYKONOS_ERR_FLOATFRMT_NULL_STRUCT:
287             return "floating point formatter structure floatFrmt not initialised in MYKONOS_getFloatPointFrmt()\n";
288 
289         case MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT:
290             return "floating point formatter structure floatFrmt not initialised in MYKONOS_setFloatPointFrmt()\n";
291 
292         case MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE:
293             return "floating point formatter structure floatFrmt.roundMode not valid parameter in MYKONOS_setFloatPointFrmt()\n";
294 
295         case MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT:
296             return "floating point formatter structure floatFrmt.dataFormat not valid parameter in MYKONOS_setFloatPointFrmt()\n";
297 
298         case MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN:
299             return "floating point formatter structure floatFrmt.encNan not valid parameter in MYKONOS_setFloatPointFrmt()\n";
300 
301         case MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS:
302             return "floating point formatter structure floatFrmt.expBits not valid parameter in MYKONOS_setFloatPointFrmt()\n";
303 
304         case MYKONOS_ERR_FLOATFRMT_INV_LEADING:
305             return "floating point formatter structure floatFrmt.leading not valid parameter in MYKONOS_setFloatPointFrmt()\n";
306 
307         case MYKONOS_ERR_FLOATFRMT_INV_RX1ATT:
308             return "not valid rx1 attenuation parameter passed in MYKONOS_setFloatPointFrmt()\n";
309 
310         case MYKONOS_ERR_FLOATFRMT_INV_RX2ATT:
311             return "not valid rx2 attenuation parameter passed in MYKONOS_setFloatPointFrmt()\n";
312 
313         case MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT:
314             return "not valid rx2 attenuation parameter passed in MYKONOS_setRxEnFloatPntFrmt()\n";
315 
316         case MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT:
317             return "not valid rx1 attenuation parameter passed in MYKONOS_setRxEnFloatPntFrmt()\n";
318 
319         case MYKONOS_ERR_FLOATFRMT_SET_INV_EN:
320             return "not valid enable parameter passed in MYKONOS_setRxEnFloatPntFrmt()\n";
321 
322         case MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT:
323             return "null pointer passed for rx1 attenuation in MYKONOS_setRxEnFloatPntFrmt()\n";
324 
325         case MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT:
326             return "null pointer passed for rx2 attenuation in MYKONOS_setRxEnFloatPntFrmt()\n";
327 
328         case MYKONOS_ERR_FLOATFRMT_NULL_ENABLE:
329             return "null pointer passed for enable in MYKONOS_setRxEnFloatPntFrmt()\n";
330 
331         case MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM:
332             return "MYKONOS_setupTempSensor() has NULL function parameter\n";
333 
334         case MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION:
335             return "tempDecimation value out of range in MYKONOS_setupTempSensor()\n";
336 
337         case MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW:
338             return "tempWindow value out of range in MYKONOS_setupTempSensor()\n";
339 
340         case MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET:
341             return "offset value out of range in MYKONOS_setupTempSensor()\n";
342 
343         case MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM:
344             return "MYKONOS_getTempSensorConfig() has NULL function parameter\n";
345 
346         case MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM:
347             return "MYKONOS_readTempSensor() has NULL function parameter\n";
348 
349         case MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED:
350             return "MYKONOS_readTempSensor() temperature sensor reading is not locked\n";
351 
352         case MYKONOS_ERR_GPIO_HYBRID_RX1_PIN:
353             return "MYKONOS_setRxHybridGainChangePin() not valid pin has been passed for RX1 hybrid gain control.\n";
354 
355         case MYKONOS_ERR_GPIO_HYBRID_RX2_PIN:
356             return "MYKONOS_setRxHybridGainChangePin() not valid pin has been passed for RX2 hybrid gain control.\n";
357 
358         case MYKONOS_ERR_GPIO_HYBRID_ORX_PIN:
359             return "MYKONOS_setObsRxHybridGainChangePin() if invalid pin has been passed for ORX hybrid gain control.\n";
360 
361         case MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID:
362             return "MYKONOS_setObsRxHybridGainChangePin() if the observation gain mode is not set to Hybrid.\n";
363 
364         case MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM:
365             return "MYKONOS_getRxHybridGainChangePin() null value has been passed to rx1GainChangePin.\n";
366 
367         case MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM:
368             return "MYKONOS_getRxHybridGainChangePin() null value has been passed to rx1GainChangePin.\n";
369 
370         case  MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID:
371             return "MYKONOS_setRxHybridGainChangePin() if gain control is not hybrid.\n";
372 
373         case MYKONOS_ERR_GAIN_CONTROL_NOT_AGC :
374             return "MYKONOS_setRxAgcEnSyncPin() or MYKONOS_getObsRxAgcEnSyncPin() if the observation gain control mode is not set to AGC.\n";
375 
376         case MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC:
377             return "MYKONOS_getObsRxAgcEnSyncPin() if the observation gain control mode is not set to AGC.\n";
378 
379         case MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN:
380             return "MYKONOS_setRxAgcEnSyncPin() if invalid pin has been passed for RX1 AGC sync gain control.\n";
381 
382         case MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN:
383             return "MYKONOS_setRxAgcEnSyncPin() if invalid pin has been passed for RX2 AGC sync gain control.\n";
384 
385         case MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM:
386             return "MYKONOS_getRxAgcEnSyncPin()  if a null value has been passed to rx1AgcSyncPin.\n";
387 
388         case MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM:
389             return "MYKONOS_getRxAgcEnSyncPin()  if a null value has been passed to rx2AgcSyncPin.\n";
390 
391         case MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN:
392            return "MYKONOS_setObsRxAgcEnSyncPin() if invalid pin has been passed for ORX AGC sync gain control.\n";
393 
394         case MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM:
395             return "MYKONOS_getObsRxAgcEnSyncPin() if a null value has been passed to obsRxAgcSyncPin.\n";
396 
397         case MYKONOS_ERR_SLICER_INV_OBS_RX_SEL:
398             return "Invalid observation channel GPIO pin selection for Slicer control passed to MYKONOS_setObsRxSlicerCtrl().\n";
399 
400         case MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE:
401             return "Slicer step is out of range passed to MYKONOS_setObsRxSlicerCtrl().\n";
402 
403         case MYKONOS_ERR_SLICER_OBS_RX_EN_INV:
404             return "Invalid enable passed to MYKONOS_setObsRxSlicerCtrl().\n";
405 
406         case MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM:
407             return "ObsRxPins is null pointer for the passed parameter passed to MYKONOS_getObsRxSlicerCtrl().\n";
408 
409         case MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM:
410             return "SlicerStep is null pointer for the passed parameter passed to MYKONOS_getObsRxSlicerCtrl().\n";
411 
412         case MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM:
413             return "Enable is null pointer for the passed parameter passed to MYKONOS_getObsRxSlicerCtrl().\n";
414 
415         case MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT:
416             return "Gain compensation structure gainComp is not initialised in MYKONOS_setObsRxGainCompensation().\n";
417 
418         case MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET:
419             return "Gain compensation structure gainComp->obsRxOffset is invalid in MYKONOS_setObsRxGainCompensation().\n";
420 
421         case MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP:
422             return "Gain compensation structure gainComp->compStep is invalid in MYKONOS_setObsRxGainCompensation().\n";
423 
424         case MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN:
425             return "Enable is not valid in MYKONOS_setObsRxGainCompensation().\n";
426 
427         case MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT:
428             return "Observation channel gain compensation structure gainComp is not initialised in MYKONOS_getObsRxGainCompensation().\n";
429 
430         case MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM:
431                    return "enabled is null pointer for the parameter passed to MYKONOS_getObsRxGainCompensation().\n";
432 
433         case MYKONOS_ERR_GETGPIODRV_NULL_PARAM:
434             return "Null parameter passed to the function MYKONOS_getGpioDrv().\n";
435 
436         case MYKONOS_ERR_GPIO_DRV_INV_PARAM:
437             return "GPIO out of range passed to function MYKONOS_setGpioDrv(), valid GPIOs are in the range 0x00000 to 0x7FFFF.\n";
438 
439         case MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM:
440             return "GPIO out of range -valid GPIOs are in the range 0x00000 to 0x7FFFF.\n";
441 
442         case MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM:
443             return "Null parameter passed to the function MYKONOS_getGpioSlewRate().\n";
444 
445         case MYKONOS_ERR_CMOS_DRV_NULL_PARAM:
446             return "Null parameter passed to the function.\n";
447 
448         case MYKONOS_ERR_CMOS_DRV_INV_PARAM:
449             return "Incorrect drive strength, valid settings are given by mykonosCmosPadDrvStr_t.\n";
450 
451         case MYKONOS_ERR_SPI2_INV_GPIO:
452             return "if an invalid GPIO pin configuration is passed to MYKONOS_spi2GpioSetup().\n";
453 
454         case MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM:
455             return "Null parameter passed to the function MYKONOS_getGpioSourceCtrl().\n";
456 
457         default:
458             return "Unknown error was encountered.\n";
459     }
460 
461  #endif
462 }
463 
464 /**
465  * \brief This API function configures the monitor output function for the GPIOs
466  *
467  * The monitor outputs are grouped in set of nibbles, the user can set
468  * individual nibbles for having the monitor output function across the available GPIO.
469  * In order to enable the GPIO monitor function the function setupGpio has to be run and the
470  * structure should have the proper setup:
471  * - device->auxIo->gpio->gpioOe = 0xXXXFF the first D7:D0 GPIOs will have the output enable
472  * - device->auxIo->gpio->gpioSrcCtrl3_0 = GPIO_MONITOR_MODE
473  * - device->auxIo->gpio->gpioSrcCtrl4_7 = GPIO_MONITOR_MODE
474 
475  *
476  * <B>Dependencies</B>
477  * - device->spiSettings
478  * - device->spiSettings->chipSelectIndex
479  * - device->auxIo->gpio->gpioOe
480  * - device->auxIo->gpio->gpioSrcCtrl3_0
481  * - device->auxIo->gpio->gpioSrcCtrl4_7
482  *
483  * \param device is structure pointer to the Mykonos data structure containing settings
484  *
485  * \param monitorIndex which will be the index at which the outputs are going to be set. see table in documentation
486  *
487  * \param monitorMask which GPIO outputs are going to active, the available GPIO
488  * bit 0 will represent MYKGPIO0 and bit 7 will represent MYKGPIO7.
489  *
490  * \retval MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE if GPIO Monitor output index is not in table
491  * \retval MYKONOS_ERR_EN_MONITOR_OUT_NOT_ENABLED if GPIO source control not set for Monitor output
492  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
493  */
MYKONOS_setGpioMonitorOut(mykonosDevice_t * device,uint8_t monitorIndex,uint8_t monitorMask)494 mykonosGpioErr_t MYKONOS_setGpioMonitorOut(mykonosDevice_t *device, uint8_t monitorIndex, uint8_t monitorMask)
495 {
496     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
497 
498     const uint8_t INDEX_MASK = 0x42;
499 
500 #if MYKONOS_VERBOSE == 1
501     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioMonitorOut()\n");
502 #endif
503 
504     /* Error checking for correct index. */
505     if (monitorIndex > INDEX_MASK)
506     {
507         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE,
508                 getGpioMykonosErrorMessage(MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE));
509         return MYKONOS_ERR_MONITOR_OUT_INDEX_RANGE;
510     }
511 
512     /* Set the GPIO monitor index and the required pin configuration. */
513     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_MONITOR_INDEX, monitorIndex);
514     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_MONITOR_ENABLE, monitorMask);
515 
516     return error;
517 }
518 
519 /**
520  * \brief This API function reads the GPIO monitor index from Mykonos
521  *
522  * The monitor outputs are grouped in two set of nibbles, the user can set
523  * individual nibbles for having the monitor output function, this nibbles
524  * will output the monitor output as per the index set.
525  *
526  * <B>Dependencies</B>
527  * - device->spiSettings
528  * - device->spiSettings->chipSelectIndex
529  * - GPIO output enable
530  * - GPIO source control
531  *
532  * \param device is structure pointer to the Mykonos data structure containing settings
533  * \param monitorIndex which will be the index at which the outputs are set to.
534  * \param monitorMask which will be enable the monitor function.
535  *
536  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
537  * \retval MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM if the monitorIndex is null.
538  * \retval MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM if the monitorMask is null.
539  */
MYKONOS_getGpioMonitorOut(mykonosDevice_t * device,uint8_t * monitorIndex,uint8_t * monitorMask)540 mykonosGpioErr_t MYKONOS_getGpioMonitorOut(mykonosDevice_t *device, uint8_t *monitorIndex, uint8_t *monitorMask)
541 {
542     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
543 
544     uint8_t indexRd = 0;
545     uint8_t monMaskRd = 0;
546 
547 #if MYKONOS_VERBOSE == 1
548     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioMonitorOut()\n");
549 #endif
550 
551     /* Checking for null passed parameters */
552     if (monitorIndex == NULL)
553     {
554         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM,
555                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM));
556         return MYKONOS_ERR_GETGPIOMON_INDEX_NULL_PARM;
557     }
558 
559     if (monitorMask == NULL)
560     {
561         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM,
562                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM));
563         return MYKONOS_ERR_GETGPIOMON_MONITORMASK_NULL_PARM;
564     }
565 
566     /* Get GPIO monitor out enable. */
567     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_MONITOR_ENABLE, &monMaskRd);
568 
569     /* Get the GPIO monitor index and the required pin configuration. */
570     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_MONITOR_INDEX, &indexRd);
571 
572     /* assigning return values to the pointers passed */
573     *monitorMask = monMaskRd;
574     *monitorIndex = indexRd;
575 
576     return error;
577 }
578 
579 
580 
581 
582 /**
583  * \brief This API function configures the GPIO inputs for controlling RX gain
584  *
585  * This API function configures the GPIO input pin and step size to allow the BBP to control gain changes in Rx1 signal chain.
586  * A high pulse on the 'rx1GainIncPin' in pin control mode will increment the gain by the value set in incStep'.
587  * A high pulse on the 'rx1GainDecPin' in pin control mode will decrement the gain by the value set in 'decStep'.
588  * <B>Dependencies</B>
589  * - device->spiSettings
590  * - device->spiSettings->chipSelectIndex
591 
592  *
593  * \param device is structure pointer to the Mykonos data structure containing settings
594  *
595  * \param incStep This sets the change (increase) in gain index that is applied when the
596  * increment gain pin  (in MGC pin control mode) is pulsed.
597  *
598  * \param decStep This configures the decrement in gain index that should be applied
599  * when the decrement gain pin (in MGC pin control mode) is pulsed.
600  *
601  * \param rx1GainIncPin mykonosGpioSelect_t These bits select the GPIO used as the enable for
602  * the Rx1 Manual Increment gain input according to the following:
603  * MYKGPIO0 or MYKGPIO10
604  *
605  * \param rx1GainDecPin mykonosGpioSelect_t These bits select the GPIO used as the enable for
606  * the Rx1 Manual Decrement gain input according to the following:
607  * MYKGPIO1 or MYKGPIO11
608  *
609  * \param enable 0 = Disable the gain pin control for Rx1
610  *               1 = enable the gain pin control for Rx1
611  *
612  * \retval MYKONOS_ERR_MGCRX1_STEP_INV_PARAM if an invalid step size has been passed
613  * \retval MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM if invalid increment pin has been passed
614  * \retval MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM if invalid decrement pin has been passed
615  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
616  */
MYKONOS_setRx1GainCtrlPin(mykonosDevice_t * device,uint8_t incStep,uint8_t decStep,mykonosGpioSelect_t rx1GainIncPin,mykonosGpioSelect_t rx1GainDecPin,uint8_t enable)617 mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx1GainIncPin, mykonosGpioSelect_t rx1GainDecPin, uint8_t enable)
618 {
619     uint8_t wrtPin = 0x00;
620     uint8_t wrtStep = 0x00;
621     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
622 
623     const uint8_t SHIFT_CH1 = 0x00;
624     const uint8_t SHIFT_INC = 0x05;
625     const uint8_t SHIFT_DEC = 0x02;
626     const uint8_t MAX_STEP = 0x07;
627 
628 #if MYKONOS_VERBOSE == 1
629     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRx1GainCtrlPin()\n");
630 #endif
631 
632     /* If enable then check for the next otherwise go directly to disable */
633     if (enable > 0)
634     {
635         /* Error checking for correct step. */
636         if ((uint8_t)(incStep > MAX_STEP) || (uint8_t)(decStep > MAX_STEP))
637         {
638             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_MGCRX1_STEP_INV_PARAM,
639                     getGpioMykonosErrorMessage(MYKONOS_ERR_MGCRX1_STEP_INV_PARAM));
640             return MYKONOS_ERR_MGCRX1_STEP_INV_PARAM;
641         }
642 
643         /* Pin configuration assignment*/
644         switch (rx1GainIncPin)
645         {
646             case MYKGPIO0:
647                 wrtPin |= 0x00;
648                 break;
649             case MYKGPIO10:
650                 wrtPin |= 0x04;
651                 break;
652 
653             default:
654                 return MYKONOS_ERR_MGCRX1_GPIO_INCPIN_INV_PARAM;
655         }
656 
657         switch (rx1GainDecPin)
658         {
659             case MYKGPIO1:
660                 wrtPin |= 0x00;
661                 break;
662             case MYKGPIO11:
663                 wrtPin |= 0x01;
664                 break;
665 
666             default:
667                 return MYKONOS_ERR_MGCRX1_GPIO_DECPIN_INV_PARAM;
668         }
669     }
670 
671     /* Setting increment step. */
672     wrtStep = (uint8_t)(incStep<<SHIFT_INC) | (uint8_t)(decStep<<SHIFT_DEC) | (uint8_t)(enable<<SHIFT_CH1);
673 
674     /* Set the GPIO input pin configuration and the step size. */
675     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, wrtStep, 0xFD, 0);
676     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_GPIO_SEL, wrtPin, 0x0F, 0);
677 
678     return error;
679 }
680 
681 /**
682  * \brief This API function returns the configuration RX1 gain Pin control
683  *
684  *
685  * <B>Dependencies</B>
686  * - device->spiSettings
687  * - device->spiSettings->chipSelectIndex
688 
689  *
690  * \param device is structure pointer to the Mykonos data structure containing settings
691  * \param incStep will contain the step that is used for increment.
692  * \param decStep will contain the step that is used for decrement.
693  * \param rx1GainIncPin this will have the pin used for increment.
694  * \param rx1GainDecPin this will have the pin used for decrement.
695  * \param enable will contain the enable status for this channel if it is set to 1 then this
696  * function is enable for this channel, if it is 0 it is not enable
697  *
698  * \retval MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM if a null value has been passed to incStep
699  * \retval MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM if a null value has been passed to decStep
700  * \retval MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM if a null value has been passed to rx1GainIncPin
701  * \retval MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM if a null value has been passed to rx1GainDecPin
702  * \retval MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM if a null value has been passed to enable
703  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
704  */
MYKONOS_getRx1GainCtrlPin(mykonosDevice_t * device,uint8_t * incStep,uint8_t * decStep,mykonosGpioSelect_t * rx1GainIncPin,mykonosGpioSelect_t * rx1GainDecPin,uint8_t * enable)705 mykonosGpioErr_t MYKONOS_getRx1GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx1GainIncPin, mykonosGpioSelect_t *rx1GainDecPin, uint8_t *enable)
706 {
707     uint8_t readVal = 0x00;
708 
709     const uint8_t MASK_GPIO_CH1 = 0x0F;
710     const uint8_t MASK_EN_CH1 = 0x01;
711     const uint8_t MASK_STEP_INC = 0xE0;
712     const uint8_t MASK_STEP_DEC = 0x1C;
713 
714 #if MYKONOS_VERBOSE == 1
715     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRx1GainCtrlPin()\n");
716 #endif
717 
718     /* Checking for null passed parameters */
719     if (incStep == NULL)
720     {
721         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM,
722                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM));
723         return MYKONOS_ERR_GETRX1PIN_INCSTEP_NULL_PARM;
724     }
725 
726     if (decStep == NULL)
727     {
728         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM,
729                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM));
730         return MYKONOS_ERR_GETRX1PIN_DECSTEP_NULL_PARM;
731     }
732 
733     if (rx1GainIncPin == NULL)
734     {
735         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM,
736                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM));
737         return MYKONOS_ERR_GETRX1PIN_INCPIN_NULL_PARM;
738     }
739 
740     if (rx1GainDecPin == NULL)
741     {
742         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM,
743                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM));
744         return MYKONOS_ERR_GETRX1PIN_DECPIN_NULL_PARM;
745     }
746 
747     if (enable == NULL)
748     {
749         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM,
750                getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM));
751         return MYKONOS_ERR_GETRX1PIN_EN_NULL_PARM;
752     }
753 
754     /* Getting Pin configuration assignment*/
755     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_GPIO_SEL, &readVal);
756     readVal = readVal & MASK_GPIO_CH1;
757 
758     if (readVal & 0x04)
759     {
760         *rx1GainIncPin = MYKGPIO10;
761     }
762     else
763     {
764         *rx1GainIncPin = MYKGPIO0;
765     }
766 
767     if (readVal & 0x01)
768     {
769         *rx1GainDecPin = MYKGPIO11;
770     }
771     else
772     {
773         *rx1GainDecPin = MYKGPIO1;
774     }
775 
776     /* Getting Pin configuration assignment*/
777     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, &readVal);
778 
779     *enable = readVal & MASK_EN_CH1;
780 
781     *incStep = (readVal & MASK_STEP_INC) >> 5;
782 
783     *decStep = (readVal & MASK_STEP_DEC) >> 2;
784 
785     return MYKONOS_ERR_GPIO_OK;
786 }
787 
788 /**
789  * \brief This API function configures the GPIO inputs for controlling RX gain
790  *
791  * This API function configures the GPIO input pin and step size to allow the BBP to control gain changes in Rx2 signal chain.
792  * A high pulse on the 'rx2GainIncPin' in pin control mode will increment the gain by the value set in incStep'.
793  * A high pulse on the 'rx2GainDecPin' in pin control mode will decrement the gain by the value set in 'decStep'.
794  *
795  * <B>Dependencies</B>
796  * - device->spiSettings
797  * - device->spiSettings->chipSelectIndex
798 
799  *
800  * \param device is structure pointer to the Mykonos data structure containing settings
801  *
802  * \param incStep This sets the change (increase) in gain index that is applied when the
803  * increment gain pin (in MGC pin control mode) is pulsed.
804  *
805  * \param decStep This configures the decrement in gain index that should be applied
806  * when the decrement gain pin (in MGC pin control mode) is pulsed.
807  *
808  * \param rx2GainIncPin mykonosGpioSelect_t These bits select the GPIO used as the enable for
809  * the Rx2 Manual Increment gain input according to the following:
810  * MYKGPIO3 or MYKGPIO13
811  *
812  * \param rx2GainDecPin mykonosGpioSelect_t These bits select the GPIO used as the enable for
813  * the Rx2 Manual Decrement gain input according to the following:
814  * MYKGPIO4 or MYKGPIO14
815  *
816  * \param enable 0 = Disable the gain pin control for Rx2
817  *               1 = enable the gain pin control for Rx2
818  *
819  *
820  * \retval MYKONOS_ERR_MGCRX2_STEP_INV_PARAM if an invalid step size is passed
821  * \retval MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM if invalid increment pin has been passed
822  * \retval MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM if invalid decrement pin has been passed
823  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
824  */
MYKONOS_setRx2GainCtrlPin(mykonosDevice_t * device,uint8_t incStep,uint8_t decStep,mykonosGpioSelect_t rx2GainIncPin,mykonosGpioSelect_t rx2GainDecPin,uint8_t enable)825 mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incStep, uint8_t decStep, mykonosGpioSelect_t rx2GainIncPin, mykonosGpioSelect_t rx2GainDecPin, uint8_t enable)
826 {
827     uint8_t wrtPin = 0x00;
828     uint8_t wrtStep = 0x00;
829     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
830 
831     const uint8_t SHIFT_CH2 = 0x01;
832     const uint8_t SHIFT_INC = 0x5;
833     const uint8_t SHIFT_DEC = 0x2;
834     const uint8_t MAX_STEP = 0x07;
835 
836 #if MYKONOS_VERBOSE == 1
837     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRx2GainCtrlPin()\n");
838 #endif
839 
840     /* If enable then check for the next otherwise go directly to disable */
841     if (enable > 0)
842     {
843         /* Error checking for correct step. */
844         if ((uint8_t)(incStep > MAX_STEP) || (uint8_t)(decStep > MAX_STEP))
845         {
846             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_MGCRX2_STEP_INV_PARAM,
847                     getGpioMykonosErrorMessage(MYKONOS_ERR_MGCRX2_STEP_INV_PARAM));
848             return MYKONOS_ERR_MGCRX2_STEP_INV_PARAM;
849         }
850 
851         /* Pin configuration assignment*/
852         switch (rx2GainIncPin)
853         {
854             case MYKGPIO3:
855                 wrtPin |= 0x00;
856                 break;
857             case MYKGPIO13:
858                 wrtPin |= 0x40;
859                 break;
860 
861             default:
862                 return MYKONOS_ERR_MGCRX2_GPIO_INCPIN_INV_PARAM;
863         }
864 
865         switch (rx2GainDecPin)
866         {
867             case MYKGPIO4:
868                 wrtPin |= 0x00;
869                 break;
870             case MYKGPIO14:
871                 wrtPin |= 0x10;
872                 break;
873 
874             default:
875                 return MYKONOS_ERR_MGCRX2_GPIO_DECPIN_INV_PARAM;
876         }
877     }
878 
879     /* Setting increment step. */
880     wrtStep = (uint8_t)(incStep<<SHIFT_INC) | (uint8_t)(decStep<<SHIFT_DEC) | (uint8_t)(enable<<SHIFT_CH2);
881 
882     /* Set the GPIO input pin configuration and the step size. */
883     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, wrtStep, 0xFE, 0);
884     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_GPIO_SEL, wrtPin, 0xF0, 0);
885 
886     return error;
887 }
888 
889 /**
890  * \brief This API function returns the configuration RX2 gain Pin control
891  *
892  *
893  * <B>Dependencies</B>
894  * - device->spiSettings
895  * - device->spiSettings->chipSelectIndex
896 
897  *
898  * \param device is structure pointer to the Mykonos data structure containing settings
899  * \param incStep will contain the step that is used for increment.
900  * \param decStep will contain the step that is used for decrement.
901  * \param rx2GainIncPin this will have the pin used for increment.
902  * \param rx2GainDecPin this will have the pin used for decrement.
903  * \param enable will contain the enable status for this channel if it is set to 1 then this
904  * function is enable for this channel, if it is 0 it is not enable
905  *
906  * \retval MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM if a null value has been passed to incStep
907  * \retval MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM if a null value has been passed to decStep
908  * \retval MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM if a null value has been passed to rx1GainIncPin
909  * \retval MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM if a null value has been passed to rx1GainDecPin
910  * \retval MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM if a null value has been passed to enable
911  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
912  */
MYKONOS_getRx2GainCtrlPin(mykonosDevice_t * device,uint8_t * incStep,uint8_t * decStep,mykonosGpioSelect_t * rx2GainIncPin,mykonosGpioSelect_t * rx2GainDecPin,uint8_t * enable)913 mykonosGpioErr_t MYKONOS_getRx2GainCtrlPin(mykonosDevice_t *device, uint8_t *incStep, uint8_t *decStep, mykonosGpioSelect_t *rx2GainIncPin, mykonosGpioSelect_t *rx2GainDecPin, uint8_t *enable)
914 {
915     uint8_t readVal = 0x00;
916 
917     const uint8_t MASK_GPIO_CH2 = 0xF0;
918     const uint8_t MASK_EN_CH2 = 0x02;
919     const uint8_t MASK_STEP_INC = 0xE0;
920     const uint8_t MASK_STEP_DEC = 0x1C;
921 
922 #if MYKONOS_VERBOSE == 1
923     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRx2GainCtrlPin()\n");
924 #endif
925 
926     /* Checking for null passed parameters */
927     if (incStep == NULL)
928     {
929         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM,
930                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM));
931         return MYKONOS_ERR_GETRX2PIN_INCSTEP_NULL_PARM;
932     }
933 
934     if (decStep == NULL)
935     {
936         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM,
937                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM));
938         return MYKONOS_ERR_GETRX2PIN_DECSTEP_NULL_PARM;
939     }
940 
941     if (rx2GainIncPin == NULL)
942     {
943         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM,
944                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM));
945         return MYKONOS_ERR_GETRX2PIN_INCPIN_NULL_PARM;
946     }
947 
948     if (rx2GainDecPin == NULL)
949     {
950         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM,
951                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM));
952         return MYKONOS_ERR_GETRX2PIN_DECPIN_NULL_PARM;
953     }
954 
955     if (enable == NULL)
956     {
957         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM,
958                getGpioMykonosErrorMessage(MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM));
959         return MYKONOS_ERR_GETRX2PIN_EN_NULL_PARM;
960     }
961 
962     /* Getting Pin configuration assignment*/
963     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_GPIO_SEL, &readVal);
964     readVal = readVal & MASK_GPIO_CH2;
965 
966     if (readVal & 0x40)
967     {
968         *rx2GainIncPin = MYKGPIO13;
969     }
970     else
971     {
972         *rx2GainIncPin = MYKGPIO3;
973     }
974 
975     if (readVal & 0x10)
976     {
977         *rx2GainDecPin = MYKGPIO14;
978     }
979     else
980     {
981         *rx2GainDecPin = MYKGPIO4;
982     }
983 
984     /* Getting Pin configuration assignment*/
985     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, &readVal);
986 
987     *enable = (readVal & MASK_EN_CH2) >> 1;
988 
989     *incStep = (readVal & MASK_STEP_INC) >> 5;
990 
991     *decStep = (readVal & MASK_STEP_DEC) >> 2;
992 
993     return MYKONOS_ERR_GPIO_OK;
994 }
995 
996 /**
997  * \brief This API function set the pins for hybrid gain control
998  *
999  * In order to call this function the gain mode should be set to Hybrid.
1000  * The AGC gain change will be controlled with the selected GPIO pin:
1001  * A pulse on the 'rx1GainChangePin' in hybrid pin control will enable the AGC gain change for RX1
1002  * A pulse on the 'rx2GainChangePin' in hybrid pin control will enable the AGC gain change for RX2
1003  *
1004  * <B>Dependencies</B>
1005  * - device->spiSettings
1006  * - device->spiSettings->chipSelectIndex
1007  *
1008  * \param device is structure pointer to the Mykonos data structure containing settings
1009  * \param rx1GainChangePin GPIO pin that will be used for hybrid gain change control, the available pins for RX1 channel
1010  * hybrid control are:
1011  * MYKGPIO1
1012  * MYKGPIO10
1013  * MYKGPIO11
1014  * MYKGPIONAN for no GPIO selected
1015  *
1016  * \param rx2GainChangePin GPIO pin that will be used for hybrid gain change control, the available pins for RX2 channel
1017  * hybrid control are:
1018  * MYKGPIO4
1019  * MYKGPIO10
1020  * MYKGPIO13
1021  * MYKGPIONAN for no GPIO selected
1022  *
1023  * \retval MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID if gain control is not hybrid
1024  * \retval MYKONOS_ERR_GPIO_HYBRID_RX1_PIN if invalid pin has been passed for RX1 hybrid gain control.
1025  * \retval MYKONOS_ERR_GPIO_HYBRID_RX2_PIN if invalid pin has been passed for RX2 hybrid gain control.
1026  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1027  */
MYKONOS_setRxHybridGainChangePin(mykonosDevice_t * device,mykonosGpioSelect_t rx1GainChangePin,mykonosGpioSelect_t rx2GainChangePin)1028 mykonosGpioErr_t MYKONOS_setRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t rx1GainChangePin, mykonosGpioSelect_t rx2GainChangePin)
1029 {
1030     uint8_t hybridPinWrite = 0x00;
1031     uint8_t pinRx1 = 0x00;
1032     uint8_t pinRx2 = 0x00;
1033 
1034     const uint8_t HYBRID_RX_PIN_MASK = 0x0F;
1035 
1036 #if MYKONOS_VERBOSE == 1
1037     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRxHybridGainChangePin()\n");
1038 #endif
1039 
1040     /* Check if in Hybrid Mode */
1041     if (device->rx->rxGainCtrl->gainMode != HYBRID)
1042     {
1043         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID,
1044                 getGpioMykonosErrorMessage(MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID));
1045         return MYKONOS_ERR_GAIN_CONTROL_NOT_HYBRID;
1046     }
1047 
1048     /* Pin configuration assignment for RX1 and RX2 */
1049     switch (rx1GainChangePin)
1050     {
1051         case MYKGPIO1:
1052             pinRx1 |= 0x00;
1053             break;
1054         case MYKGPIO10:
1055             pinRx1 |= 0x01;
1056             break;
1057         case MYKGPIO11:
1058             pinRx1 |= 0x02;
1059             break;
1060         case MYKGPIONAN:
1061             pinRx1 |= 0x03;
1062             break;
1063         default:
1064             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_RX1_PIN,
1065                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_RX1_PIN));
1066             return MYKONOS_ERR_GPIO_HYBRID_RX1_PIN;
1067     }
1068 
1069     switch (rx2GainChangePin)
1070     {
1071         case MYKGPIO4:
1072             pinRx2 |= 0x00;
1073             break;
1074         case MYKGPIO10:
1075             pinRx2 |= 0x04;
1076             break;
1077         case MYKGPIO13:
1078             pinRx2 |= 0x08;
1079             break;
1080         case MYKGPIONAN:
1081             pinRx2 |= 0x0C;
1082             break;
1083         default:
1084             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_RX2_PIN,
1085                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_RX2_PIN));
1086             return MYKONOS_ERR_GPIO_HYBRID_RX2_PIN;
1087     }
1088 
1089     /* Setting GPIO control for RX1 and RX2 */
1090     hybridPinWrite = (pinRx1 | pinRx2);
1091 
1092     /* Writing GPIO pin configuration for hybrid mode. */
1093     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_GAIN_CHANGE_GPIO_SEL, hybridPinWrite, HYBRID_RX_PIN_MASK, 0);
1094 
1095     return MYKONOS_ERR_GPIO_OK;
1096 }
1097 
1098 
1099 
1100 /**
1101  * \brief This API function gets the pin configuration for hybrid gain control of RX1 and RX2
1102  *
1103  * <B>Dependencies</B>
1104  * - device->spiSettings
1105  * - device->spiSettings->chipSelectIndex
1106  *
1107  * \param device is structure pointer to the Mykonos data structure containing settings
1108  * \param rx1GainChangePin Will return the GPIO pin used for Rx1 in hybrid gain control.
1109  * \param rx2GainChangePin Will return the GPIO pin used for Rx2 in hybrid gain control.
1110  *
1111  * \retval MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM if a null value has been passed to rx1GainChangePin
1112  * \retval MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM if a null value has been passed to rx2GainChangePin
1113  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1114  */
MYKONOS_getRxHybridGainChangePin(mykonosDevice_t * device,mykonosGpioSelect_t * rx1GainChangePin,mykonosGpioSelect_t * rx2GainChangePin)1115 mykonosGpioErr_t MYKONOS_getRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1GainChangePin, mykonosGpioSelect_t *rx2GainChangePin)
1116 {
1117     uint8_t hybridPinRead = 0x00;
1118     uint8_t pinRx1 = 0x00;
1119     uint8_t pinRx2 = 0x00;
1120     mykonosGpioSelect_t rx1Pin = MYKGPIONAN;
1121     mykonosGpioSelect_t rx2Pin = MYKGPIONAN;
1122 
1123     const uint8_t MASK_RX1_PIN = 0x03;
1124     const uint8_t MASK_RX2_PIN = 0x0C;
1125 
1126 #if MYKONOS_VERBOSE == 1
1127     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRxHybridGainChangePin()\n");
1128 #endif
1129 
1130     /* Checking for null passed parameters */
1131     if (rx1GainChangePin == NULL)
1132     {
1133         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM,
1134                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM));
1135         return MYKONOS_ERR_GPIO_HYBRID_RX1_PIN_NULL_PARM;
1136     }
1137 
1138     if (rx2GainChangePin == NULL)
1139     {
1140         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM,
1141                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM));
1142         return MYKONOS_ERR_GPIO_HYBRID_RX2_PIN_NULL_PARM;
1143     }
1144 
1145     /* Getting Pin configuration assignment */
1146     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_GAIN_CHANGE_GPIO_SEL, &hybridPinRead);
1147     pinRx1 = hybridPinRead & MASK_RX1_PIN;
1148     pinRx2 = hybridPinRead & MASK_RX2_PIN;
1149 
1150     /* Pin configuration mapping assignment for RX1 and RX2 */
1151     switch (pinRx1)
1152     {
1153         case 0x00:
1154             rx1Pin = MYKGPIO1;
1155             break;
1156         case 0x01:
1157             rx1Pin = MYKGPIO10;
1158             break;
1159         case 0x02:
1160             rx1Pin = MYKGPIO11;
1161             break;
1162         default:
1163             rx1Pin = MYKGPIONAN;
1164             break;
1165     }
1166 
1167     switch (pinRx2)
1168     {
1169         case 0x00:
1170             rx2Pin = MYKGPIO4;
1171             break;
1172         case 0x04:
1173             rx2Pin = MYKGPIO10;
1174             break;
1175         case 0x08:
1176             rx2Pin = MYKGPIO13;
1177             break;
1178         default:
1179             rx2Pin = MYKGPIONAN;
1180             break;
1181     }
1182 
1183     /* Setting pins to passed pointers */
1184     *rx1GainChangePin = rx1Pin;
1185     *rx2GainChangePin = rx2Pin;
1186 
1187     return MYKONOS_ERR_GPIO_OK;
1188 }
1189 
1190 
1191 /**
1192  * \brief This API function set the pins for hybrid gain control
1193  *
1194  * In order to call this function the gain mode should be set to Hybrid.
1195  * The AGC gain change will be controlled with the selected GPIO pin:
1196  * A pulse on the 'obsRxGainChangePin' in hybrid pin control will enable the AGC gain change for observation channel
1197  *
1198  * <B>Dependencies</B>
1199  * - device->spiSettings
1200  * - device->spiSettings->chipSelectIndex
1201  *
1202  * \param device is structure pointer to the Mykonos data structure containing settings
1203  * \param obsRxGainChangePin GPIO pin that will be used for hybrid gain change control, the available pins for observation channel
1204  * hybrid control are:
1205  * MYKGPIO6
1206  * MYKGPIO10
1207  * MYKGPIO17
1208  * MYKGPIONAN for none selected
1209  *
1210  * \retval MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID if the observation gain mode is not set to Hybrid
1211  * \retval MYKONOS_ERR_GPIO_HYBRID_ORX_PIN if invalid pin has been passed for ORX hybrid gain control.
1212  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1213  */
MYKONOS_setObsRxHybridGainChangePin(mykonosDevice_t * device,mykonosGpioSelect_t obsRxGainChangePin)1214 mykonosGpioErr_t MYKONOS_setObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxGainChangePin)
1215 {
1216     uint8_t hybridPinWrite = 0x00;
1217     uint8_t pinOrx = 0x00;
1218 
1219     const uint8_t HYBRID_ORX_PIN_MASK = 0x30;
1220 
1221 #if MYKONOS_VERBOSE == 1
1222     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setObsRxHybridGainChangePin()\n");
1223 #endif
1224 
1225     /* Check if in Hybrid Mode */
1226     if (device->obsRx->orxGainCtrl->gainMode != HYBRID)
1227     {
1228         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID,
1229                 getGpioMykonosErrorMessage(MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID));
1230         return MYKONOS_ERR_AGC_OBS_NOT_IN_HYBRID;
1231     }
1232 
1233     /* Pin configuration assignment for RX1 and RX2 */
1234     switch (obsRxGainChangePin)
1235     {
1236         case MYKGPIO6:
1237             pinOrx |= 0x00;
1238             break;
1239         case MYKGPIO10:
1240             pinOrx |= 0x10;
1241             break;
1242         case MYKGPIO17:
1243             pinOrx |= 0x20;
1244             break;
1245         case MYKGPIONAN:
1246             pinOrx |= 0x30;
1247             break;
1248         default:
1249             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_ORX_PIN,
1250                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_ORX_PIN));
1251             return MYKONOS_ERR_GPIO_HYBRID_ORX_PIN;
1252     }
1253 
1254     /* Setting GPIO control for observation channel */
1255     hybridPinWrite = pinOrx;
1256 
1257     /* Writing GPIO pin configuration for hybrid mode. */
1258     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_ORX_SNRX_GPIO_SEL, hybridPinWrite, HYBRID_ORX_PIN_MASK, 0);
1259 
1260     return MYKONOS_ERR_GPIO_OK;
1261 }
1262 
1263 /**
1264  * \brief This API function gets the pin configuration for hybrid gain control of observation channel
1265  *
1266  * <B>Dependencies</B>
1267  * - device->spiSettings
1268  * - device->spiSettings->chipSelectIndex
1269  *
1270  * \param device is structure pointer to the Mykonos data structure containing settings
1271  * \param obsRxGainChangePin Will return the GPIO pin used for observation channel in hybrid gain control.
1272  *
1273  * \retval MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM if a null value has been passed to obsRxGainChangePin
1274  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1275  */
MYKONOS_getObsRxHybridGainChangePin(mykonosDevice_t * device,mykonosGpioSelect_t * obsRxGainChangePin)1276 mykonosGpioErr_t MYKONOS_getObsRxHybridGainChangePin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxGainChangePin)
1277 {
1278     uint8_t hybridPinRead = 0x00;
1279     uint8_t pinOrx = 0x00;
1280     mykonosGpioSelect_t orxPin = MYKGPIONAN;
1281 
1282     const uint8_t MASK_ORX_PIN = 0x30;
1283 
1284 #if MYKONOS_VERBOSE == 1
1285     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getObsRxHybridGainChangePin()\n");
1286 #endif
1287 
1288     /* Checking for null passed parameters */
1289     if (obsRxGainChangePin == NULL)
1290     {
1291         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM,
1292                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM));
1293         return MYKONOS_ERR_GPIO_HYBRID_ORX_PIN_NULL_PARM;
1294     }
1295 
1296     /* Getting Pin configuration assignment */
1297     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_ORX_SNRX_GPIO_SEL, &hybridPinRead);
1298     pinOrx = hybridPinRead & MASK_ORX_PIN;
1299 
1300     /* Pin configuration mapping assignment for RX1 and RX2 */
1301     switch (pinOrx)
1302     {
1303         case 0x00:
1304             orxPin = MYKGPIO6;
1305             break;
1306         case 0x10:
1307             orxPin = MYKGPIO10;
1308             break;
1309         case 0x20:
1310             orxPin = MYKGPIO17;
1311             break;
1312         default:
1313             orxPin = MYKGPIONAN;
1314             break;
1315     }
1316 
1317     /* Setting pins to passed pointer */
1318     *obsRxGainChangePin = orxPin;
1319 
1320     return MYKONOS_ERR_GPIO_OK;
1321 }
1322 
1323 /**
1324  * \brief This API function set the pins for sync AGC gain control
1325  *
1326  * In order to call this function the RX gain control should be set to AGC mode.
1327  * The AGC gain sync will be controlled with the selected GPIO pin:
1328  * A pulse on the 'rx1AgcSyncPin' in hybrid pin control will enable the AGC gain sync for RX1
1329  * A pulse on the 'rx2AgcSyncPin' in hybrid pin control will enable the AGC gain sync for RX2
1330  *
1331  * <B>Dependencies</B>
1332  * - device->spiSettings
1333  * - device->spiSettings->chipSelectIndex
1334  *
1335  * \param device is structure pointer to the Mykonos data structure containing settings
1336  * \param rx1AgcSyncPin GPIO pin that will be used for AGC sync gain control, the available pins for RX1 channel are:
1337  * MYKGPIO1
1338  * MYKGPIO10
1339  * MYKGPIO11
1340  * MYKGPIONAN for no GPIO selected
1341  *
1342  * \param rx2AgcSyncPin GPIO pin that will be used for AGC sync gain control, the available pins for RX2 channel are:
1343  * MYKGPIO4
1344  * MYKGPIO10
1345  * MYKGPIO13
1346  * MYKGPIONAN for no GPIO selected
1347  *
1348  * \retval MYKONOS_ERR_GAIN_CONTROL_NOT_AGC if the RX gain control mode is not set to AGC.
1349  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN if invalid pin has been passed for RX1 AGC sync gain control.
1350  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN if invalid pin has been passed for RX2 AGC sync gain control.
1351  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1352  */
MYKONOS_setRxAgcEnSyncPin(mykonosDevice_t * device,mykonosGpioSelect_t rx1AgcSyncPin,mykonosGpioSelect_t rx2AgcSyncPin)1353 mykonosGpioErr_t MYKONOS_setRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t rx1AgcSyncPin, mykonosGpioSelect_t rx2AgcSyncPin)
1354 {
1355     uint8_t agcSyncPinWrite = 0x00;
1356     uint8_t pinRx1 = 0x00;
1357     uint8_t pinRx2 = 0x00;
1358 
1359     const uint8_t SYNC_RX_PIN_MASK = 0x0F;
1360 
1361 #if MYKONOS_VERBOSE == 1
1362     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRxAgcEnSyncPin()\n");
1363 #endif
1364 
1365     /* Check if in Hybrid Mode */
1366     if (device->rx->rxGainCtrl->gainMode != AGC)
1367     {
1368         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAIN_CONTROL_NOT_AGC,
1369                 getGpioMykonosErrorMessage(MYKONOS_ERR_GAIN_CONTROL_NOT_AGC));
1370         return MYKONOS_ERR_GAIN_CONTROL_NOT_AGC;
1371     }
1372 
1373     /* Pin configuration assignment for RX1 and RX2 */
1374     switch (rx1AgcSyncPin)
1375     {
1376         case MYKGPIO1:
1377             pinRx1 |= 0x00;
1378             break;
1379         case MYKGPIO10:
1380             pinRx1 |= 0x01;
1381             break;
1382         case MYKGPIO11:
1383             pinRx1 |= 0x02;
1384             break;
1385         case MYKGPIONAN:
1386             pinRx1 |= 0x03;
1387             break;
1388         default:
1389             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN,
1390                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN));
1391             return MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN;
1392     }
1393 
1394     switch (rx2AgcSyncPin)
1395     {
1396         case MYKGPIO4:
1397             pinRx2 |= 0x00;
1398             break;
1399         case MYKGPIO10:
1400             pinRx2 |= 0x04;
1401             break;
1402         case MYKGPIO13:
1403             pinRx2 |= 0x08;
1404             break;
1405         case MYKGPIONAN:
1406             pinRx2 |= 0x0C;
1407             break;
1408         default:
1409             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN,
1410                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN));
1411             return MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN;
1412     }
1413 
1414     /* Setting GPIO control for RX1 and RX2 */
1415     agcSyncPinWrite = (pinRx1 | pinRx2);
1416 
1417     /* Writing GPIO pin configuration for Sync AGC. */
1418     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_GAIN_CHANGE_GPIO_SEL, agcSyncPinWrite, SYNC_RX_PIN_MASK, 0);
1419 
1420     return MYKONOS_ERR_GPIO_OK;
1421 }
1422 
1423 /**
1424  * \brief This API function gets the GPIO pin configuration for AGC gain sync control of RX1 and RX2
1425  *
1426  * <B>Dependencies</B>
1427  * - device->spiSettings
1428  * - device->spiSettings->chipSelectIndex
1429  *
1430  * \param device is structure pointer to the Mykonos data structure containing settings
1431  * \param rx1AgcSyncPin Will return the GPIO pin used for RX1 channel AGC gain sync control,
1432  *
1433  * \param rx2AgcSyncPin Will return the GPIO pin used for RX2 channel AGC gain sync control,
1434  *
1435  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM if a null value has been passed to rx1AgcSyncPin
1436  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM if a null value has been passed to rx2AgcSyncPin
1437  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1438  */
MYKONOS_getRxAgcEnSyncPin(mykonosDevice_t * device,mykonosGpioSelect_t * rx1AgcSyncPin,mykonosGpioSelect_t * rx2AgcSyncPin)1439 mykonosGpioErr_t MYKONOS_getRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *rx1AgcSyncPin, mykonosGpioSelect_t *rx2AgcSyncPin)
1440 {
1441     uint8_t agcSyncPinRead = 0x00;
1442     uint8_t pinRx1 = 0x00;
1443     uint8_t pinRx2 = 0x00;
1444     mykonosGpioSelect_t rx1Pin = MYKGPIONAN;
1445     mykonosGpioSelect_t rx2Pin = MYKGPIONAN;
1446 
1447     const uint8_t MASK_RX1_PIN = 0x03;
1448     const uint8_t MASK_RX2_PIN = 0x0C;
1449 
1450 #if MYKONOS_VERBOSE == 1
1451     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRxHybridGainChangePin()\n");
1452 #endif
1453 
1454     /* Checking for null passed parameters */
1455     if (rx1AgcSyncPin == NULL)
1456     {
1457         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM,
1458                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM));
1459         return MYKONOS_ERR_GPIO_AGC_SYNC_RX1_PIN_NULL_PARM;
1460     }
1461 
1462     if (rx2AgcSyncPin == NULL)
1463     {
1464         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM,
1465                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM));
1466         return MYKONOS_ERR_GPIO_AGC_SYNC_RX2_PIN_NULL_PARM;
1467     }
1468 
1469     /* Getting Pin configuration assignment */
1470     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_GAIN_CHANGE_GPIO_SEL, &agcSyncPinRead);
1471     pinRx1 = agcSyncPinRead & MASK_RX1_PIN;
1472     pinRx2 = agcSyncPinRead & MASK_RX2_PIN;
1473 
1474     /* Pin configuration mapping assignment for RX1 and RX2 */
1475     switch (pinRx1)
1476     {
1477         case 0x00:
1478             rx1Pin = MYKGPIO1;
1479             break;
1480         case 0x01:
1481             rx1Pin = MYKGPIO10;
1482             break;
1483         case 0x02:
1484             rx1Pin = MYKGPIO11;
1485             break;
1486         default:
1487             rx1Pin = MYKGPIONAN;
1488             break;
1489     }
1490 
1491     switch (pinRx2)
1492     {
1493         case 0x00:
1494             rx2Pin = MYKGPIO4;
1495             break;
1496         case 0x04:
1497             rx2Pin = MYKGPIO10;
1498             break;
1499         case 0x08:
1500             rx2Pin = MYKGPIO13;
1501             break;
1502         default:
1503             rx2Pin = MYKGPIONAN;
1504             break;
1505     }
1506 
1507     /* Setting pins to passed pointers */
1508     *rx1AgcSyncPin = rx1Pin;
1509     *rx2AgcSyncPin = rx2Pin;
1510 
1511     return MYKONOS_ERR_GPIO_OK;
1512 }
1513 
1514 
1515 /**
1516  * \brief This API function set the pins for AGC gain Sync control
1517  *
1518  * In order to call this function the gain mode should be set to AGC mode.
1519  * The AGC gain sync will be controlled with the selected GPIO pin:
1520  * A pulse on the 'obsRxGainChangePin' in hybrid pin control will enable the AGC gain change for observation channel
1521  *
1522  * <B>Dependencies</B>
1523  * - device->spiSettings
1524  * - device->spiSettings->chipSelectIndex
1525  *
1526  * \param device is structure pointer to the Mykonos data structure containing settings
1527  * \param obsRxAgcSyncPin GPIO pin that will be used for AGC sync gain control, the available pins for observation channel are:
1528  * MYKGPIO6
1529  * MYKGPIO10
1530  * MYKGPIO17
1531  * MYKGPIONAN for none selected
1532  *
1533  * \retval MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC if the observation gain control mode is not set to AGC
1534  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN  if invalid pin has been passed for ORX AGC sync gain control.
1535  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1536  */
MYKONOS_setObsRxAgcEnSyncPin(mykonosDevice_t * device,mykonosGpioSelect_t obsRxAgcSyncPin)1537 mykonosGpioErr_t MYKONOS_setObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t obsRxAgcSyncPin)
1538 {
1539     uint8_t agcSyncPinWrite = 0x00;
1540     uint8_t pinOrx = 0x00;
1541 
1542     const uint8_t SYNC_ORX_PIN_MASK = 0x30;
1543 
1544 #if MYKONOS_VERBOSE == 1
1545     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setObsRxAgcEnSyncPin()\n");
1546 #endif
1547 
1548     /* Check if in Hybrid Mode */
1549     if (device->obsRx->orxGainCtrl->gainMode != AGC)
1550     {
1551         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC,
1552                 getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC));
1553         return MYKONOS_ERR_OBS_GAIN_CONTROL_NOT_AGC;
1554     }
1555 
1556     /* Pin configuration assignment for observation channel */
1557     switch (obsRxAgcSyncPin)
1558     {
1559         case MYKGPIO6:
1560             pinOrx |= 0x00;
1561             break;
1562         case MYKGPIO10:
1563             pinOrx |= 0x10;
1564             break;
1565         case MYKGPIO17:
1566             pinOrx |= 0x20;
1567             break;
1568         case MYKGPIONAN:
1569             pinOrx |= 0x30;
1570             break;
1571         default:
1572             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN,
1573                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN));
1574             return MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN;
1575     }
1576 
1577     /* Setting GPIO control for observation channel */
1578     agcSyncPinWrite = pinOrx;
1579 
1580     /* Writing GPIO pin configuration for Sync AGC mode. */
1581     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_ORX_SNRX_GPIO_SEL, agcSyncPinWrite, SYNC_ORX_PIN_MASK, 0);
1582 
1583     return MYKONOS_ERR_GPIO_OK;
1584 }
1585 
1586 /**
1587  * \brief This API function gets the pin configuration for AGC Sync gain control of observation channel
1588  *
1589  * <B>Dependencies</B>
1590  * - device->spiSettings
1591  * - device->spiSettings->chipSelectIndex
1592  *
1593  * \param device is structure pointer to the Mykonos data structure containing settings
1594  * \param obsRxAgcSyncPin Will return the GPIO pin used for observation channel AGC gain sync control,
1595  *
1596  * \retval MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM if a null value has been passed to obsRxAgcSyncPin
1597  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1598  */
MYKONOS_getObsRxAgcEnSyncPin(mykonosDevice_t * device,mykonosGpioSelect_t * obsRxAgcSyncPin)1599 mykonosGpioErr_t MYKONOS_getObsRxAgcEnSyncPin(mykonosDevice_t *device, mykonosGpioSelect_t *obsRxAgcSyncPin)
1600 {
1601     uint8_t agcSyncPinRead = 0x00;
1602     uint8_t pinOrx = 0x00;
1603     mykonosGpioSelect_t orxPin = MYKGPIONAN;
1604 
1605     const uint8_t MASK_ORX_PIN = 0x30;
1606 
1607 #if MYKONOS_VERBOSE == 1
1608     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getObsRxAgcEnSyncPin()\n");
1609 #endif
1610 
1611     /* Checking for null passed parameters */
1612     if (obsRxAgcSyncPin == NULL)
1613     {
1614         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM,
1615                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM));
1616         return MYKONOS_ERR_GPIO_AGC_SYNC_ORX_PIN_NULL_PARM;
1617     }
1618 
1619     /* Getting Pin configuration assignment */
1620     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AGC_ORX_SNRX_GPIO_SEL, &agcSyncPinRead);
1621     pinOrx = agcSyncPinRead & MASK_ORX_PIN;
1622 
1623     /* Pin configuration mapping assignment for observation channel */
1624     switch (pinOrx)
1625     {
1626         case 0x00:
1627             orxPin = MYKGPIO6;
1628             break;
1629         case 0x10:
1630             orxPin = MYKGPIO10;
1631             break;
1632         case 0x20:
1633             orxPin = MYKGPIO17;
1634             break;
1635         default:
1636             orxPin = MYKGPIONAN;
1637             break;
1638     }
1639 
1640     /* Setting pins to passed pointer */
1641     *obsRxAgcSyncPin = orxPin;
1642 
1643     return MYKONOS_ERR_GPIO_OK;
1644 }
1645 
1646 
1647 /**
1648  * \brief This API function configures the GPIO inputs for controlling Tx attenuation settings
1649  *
1650  * This allows to control the TX attenuation using GPIO inputs. When a low to high transition is
1651  * applied to the configure GPIO input the attenuation will change by the desire step.
1652  * The stepSize parameter will set the attenuation change applied.
1653  *
1654  *
1655  * <B>Dependencies</B>
1656  * - device->spiSettings
1657  * - device->spiSettings->chipSelectIndex
1658  *
1659  * \param device is structure pointer to the Mykonos data structure containing settings
1660  *
1661  * \param stepSize the step that will increase or decrease the Tx1 channel attenuation.
1662  * This parameter sets the change in Tx attenuation for each increment or decrement signal received in incr/decr mode.
1663  * Step of 1 changes attenuation by 0.05dB.
1664  *
1665  * \param tx1AttenIncPin This parameter is the GPIO pin configuration that will be controlling the increment
1666  * of Tx attenuation. Available pins are:
1667  * Tx1 increment: MYKGPIO4 or MYKGPIO12
1668  *
1669  * \param tx1AttenDecPin This parameter is the GPIO pin configuration that will be controlling the decrement
1670  * of Tx attenuation. Available pins are:
1671  * Tx1 decrement: MYKGPIO5 or MYKGPIO13
1672  *
1673  * \param enable 0 = Disable the attenuation pin control for Tx1
1674  *               1 = enable the attenuation pin control for Tx1
1675  *
1676  * \param useTx1ForTx2 is used to return if TX1 settings are used for TX2 channel.
1677  *
1678  * \retval MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM if an invalid step size is passed
1679  * \retval MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM if an invalid channel for TX is passed
1680  * \retval MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM if an invalid channel for TX is passed
1681  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1682  */
MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t * device,uint8_t stepSize,mykonosGpioSelect_t tx1AttenIncPin,mykonosGpioSelect_t tx1AttenDecPin,uint8_t enable,uint8_t useTx1ForTx2)1683 mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx1AttenIncPin, mykonosGpioSelect_t tx1AttenDecPin, uint8_t enable, uint8_t useTx1ForTx2)
1684 {
1685     uint8_t wrtPin = 0;
1686     uint8_t tpcMode = 0x0;
1687     uint8_t tpcMaskTx2 = 0x00;
1688     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
1689 
1690     const uint8_t TX_INCDEC_MASK = 0x1F;
1691     const uint8_t TX_PIN_MASK = 0x0F;
1692 
1693 #if MYKONOS_VERBOSE == 1
1694     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setTx1AttenCtrlPin()\n");
1695 #endif
1696 
1697     /* If enable then check for the next otherwise go directly to disable */
1698     if (enable > 0)
1699     {
1700         /* Error checking for correct step. */
1701         if (stepSize >  TX_INCDEC_MASK)
1702         {
1703             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM,
1704                     getGpioMykonosErrorMessage(MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM));
1705             return MYKONOS_ERR_TPCTX1_GPIO_STEP_INV_PARAM;
1706         }
1707 
1708         /* Pin configuration assignment for Tx1 increments */
1709         switch (tx1AttenIncPin)
1710         {
1711             case MYKGPIO4:
1712                 wrtPin |= 0x00;
1713                 break;
1714             case MYKGPIO12:
1715                 wrtPin |= 0x01;
1716                 break;
1717 
1718             default:
1719                 return MYKONOS_ERR_TPCTX1_GPIO_INCPIN_INV_PARAM;
1720         }
1721 
1722         /* Pin configuration assignment for Tx1 decrements */
1723         switch (tx1AttenDecPin)
1724         {
1725             case MYKGPIO5:
1726                 wrtPin |= 0x00;
1727                 break;
1728             case MYKGPIO13:
1729                 wrtPin |= 0x04;
1730                 break;
1731 
1732             default:
1733                 return MYKONOS_ERR_TPCTX1_GPIO_DECPIN_INV_PARAM;
1734         }
1735 
1736         /* Setting TPC mode corresponding to the enable */
1737         tpcMode = 0x03;
1738 
1739         /* Setting TPC control for Tx2 using Tx1 */
1740         if (useTx1ForTx2 > 0)
1741         {
1742             tpcMode |= 0x1C;
1743             tpcMaskTx2 = 0x1F;
1744         }
1745         else
1746         {
1747             tpcMaskTx2 = 0x13;
1748         }
1749     }
1750     else
1751     {
1752         /* Setting TPC mode corresponding for no Pin control */
1753         tpcMode = 0x05;
1754         tpcMaskTx2 = 0x1F;
1755     }
1756 
1757     /* Setting increment step. */
1758     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_INCR_DECR_WORD, stepSize, TX_INCDEC_MASK, 0);
1759 
1760     /* Set the TPC mode for GPIO control. */
1761     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_TPC_CONFIG, tpcMode, tpcMaskTx2, 0);
1762 
1763     /* Set the GPIO input pin configuration and the step size. */
1764     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_TPC_GPIO_CFG, wrtPin, TX_PIN_MASK, 0);
1765 
1766     return error;
1767 }
1768 
1769 /**
1770  * \brief This API function returns the configuration TX1 attenuation Pin control
1771  *
1772  *
1773  * <B>Dependencies</B>
1774  * - device->spiSettings
1775  * - device->spiSettings->chipSelectIndex
1776 
1777  *
1778  * \param device is structure pointer to the Mykonos data structure containing settings
1779  * \param stepSize will contain the step that is used for increment and decrement.
1780  * \param tx1AttenIncPin this will have the pin used for increment.
1781  * \param tx1AttenDecPin this will have the pin used for decrement.
1782  * \param enable will contain the enable status for this channel if it is set to 1 then this
1783  * function is enable for this channel, if it is 0 it is not enable
1784  * \param useTx1ForTx2 is used to return if TX1 settings are used for TX2 channel.
1785  *
1786  * \retval MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM if a null value has been passed to stepSize
1787  * \retval MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM if a null value has been passed to tx1AttenIncPin
1788  * \retval MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM if a null value has been passed to tx1AttenDecPin
1789  * \retval MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM if a null value has been passed to enable
1790  * \retval MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM if a null value has been passed to useTx1ForTx2
1791  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1792  */
MYKONOS_getTx1AttenCtrlPin(mykonosDevice_t * device,uint8_t * stepSize,mykonosGpioSelect_t * tx1AttenIncPin,mykonosGpioSelect_t * tx1AttenDecPin,uint8_t * enable,uint8_t * useTx1ForTx2)1793 mykonosGpioErr_t MYKONOS_getTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx1AttenIncPin, mykonosGpioSelect_t *tx1AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2)
1794 {
1795     uint8_t readVal = 0x00;
1796     uint8_t en = 0x00;
1797 
1798     const uint8_t MASK_TPC_CH1 = 0x03;
1799     const uint8_t MASK_TPC_CH1FCH2 = 0x10;
1800     const uint8_t MASK_TPC_STEP = 0x1F;
1801     const uint8_t MASK_TPC_GPIO_CH1 = 0x0F;
1802 
1803 #if MYKONOS_VERBOSE == 1
1804     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getTx1AttenCtrlPin()\n");
1805 #endif
1806 
1807     /* Checking for null passed parameters */
1808     if (stepSize == NULL)
1809     {
1810         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM,
1811                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM));
1812         return MYKONOS_ERR_GETTX1PIN_STEP_NULL_PARM;
1813     }
1814 
1815     if (tx1AttenIncPin == NULL)
1816     {
1817         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM,
1818                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM));
1819         return MYKONOS_ERR_GETTX1PIN_INC_NULL_PARM;
1820     }
1821 
1822     if (tx1AttenDecPin == NULL)
1823     {
1824         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM,
1825                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM));
1826         return MYKONOS_ERR_GETTX1PIN_DEC_NULL_PARM;
1827     }
1828 
1829     if (enable == NULL)
1830     {
1831         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM,
1832                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM));
1833         return MYKONOS_ERR_GETTX1PIN_EN_NULL_PARM;
1834     }
1835 
1836     if (useTx1ForTx2 == NULL)
1837     {
1838         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM,
1839                getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM));
1840         return MYKONOS_ERR_GETTX1PIN_TX1TX2_NULL_PARM;
1841     }
1842 
1843     /* Getting Pin configuration assignment*/
1844     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_TPC_GPIO_CFG, &readVal);
1845     readVal = readVal & MASK_TPC_GPIO_CH1;
1846 
1847     if (readVal & 0x01)
1848     {
1849         *tx1AttenIncPin = MYKGPIO12;
1850     }
1851     else
1852     {
1853         *tx1AttenIncPin = MYKGPIO4;
1854     }
1855 
1856     if (readVal & 0x04)
1857     {
1858         *tx1AttenDecPin = MYKGPIO13;
1859     }
1860     else
1861     {
1862         *tx1AttenDecPin = MYKGPIO5;
1863     }
1864 
1865     /* Getting Pin configuration assignment*/
1866     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_TPC_CONFIG, &readVal);
1867 
1868     en = readVal & MASK_TPC_CH1;
1869 
1870     *enable = (en == MASK_TPC_CH1) ? 1 : 0;
1871 
1872     *useTx1ForTx2 = readVal & MASK_TPC_CH1FCH2;
1873 
1874     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_INCR_DECR_WORD, &readVal);
1875 
1876     *stepSize = readVal & MASK_TPC_STEP;
1877 
1878     return MYKONOS_ERR_GPIO_OK;
1879 }
1880 
1881 /**
1882  * \brief This API function configures the GPIO inputs for controlling Tx attenuation settings
1883  *
1884  * This allows to control the TX attenuation using GPIO inputs. when a low to high transition is
1885  * applied to the configure GPIO input the attenuation will change by the desire step.
1886  * The stepSize parameter will set the attenuation change applied.
1887  *
1888  *
1889  * <B>Dependencies</B>
1890  * - device->spiSettings
1891  * - device->spiSettings->chipSelectIndex
1892  *
1893  * \param device is structure pointer to the Mykonos data structure containing settings
1894  *
1895  * \param stepSize the step that will increase or decrease the Tx2 channel attenuation.
1896  * This parameter sets the change in Tx attenuation for each increment or decrement signal received in incr/decr mode.
1897  * Step of 1 changes attenuation by 0.05dB.
1898  *
1899  * \param tx2AttenIncPin This parameter is the GPIO pin configuration that will be controlling the increment
1900  * of Tx attenuation. Available pins are:
1901  * Tx2 increment: MYKGPIO6 or MYKGPIO14
1902  *
1903  * \param tx2AttenDecPin This parameter is the GPIO pin configuration that will be controlling the decrement
1904  * of Tx attenuation. Available pins are:
1905  * Tx2 decrement: MYKGPIO7 or MYKGPIO15
1906  *
1907  * \param enable 0 = Disable the attenuation pin control for Tx2
1908  *               1 = enable the attenuation pin control for Tx2
1909  *
1910  * \retval MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM if an invalid step size is passed
1911  * \retval MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM if an invalid channel for TX is passed
1912  * \retval MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM if an invalid channel for TX is passed
1913  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
1914  */
MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t * device,uint8_t stepSize,mykonosGpioSelect_t tx2AttenIncPin,mykonosGpioSelect_t tx2AttenDecPin,uint8_t enable)1915 mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t stepSize, mykonosGpioSelect_t tx2AttenIncPin, mykonosGpioSelect_t tx2AttenDecPin, uint8_t enable)
1916 {
1917     uint8_t wrtPin = 0;
1918     uint8_t tpcMode = 0x0;
1919     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
1920 
1921 
1922     const uint8_t TX_INCDEC_MASK = 0x1F;
1923     const uint8_t TX2_TPC_MASK = 0x1C;
1924     const uint8_t TX2_WRTPIN = 0xf0;
1925 
1926 #if MYKONOS_VERBOSE == 1
1927     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setTx2AttenCtrlPin()\n");
1928 #endif
1929 
1930     /* If enable then check for the next otherwise go directly to disable */
1931     if (enable > 0)
1932     {
1933         /* Error checking for correct step. */
1934         if (stepSize >  TX_INCDEC_MASK)
1935         {
1936             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM,
1937                     getGpioMykonosErrorMessage(MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM));
1938             return MYKONOS_ERR_TPCTX2_GPIO_STEP_INV_PARAM;
1939         }
1940 
1941         /* Pin configuration assignment for Tx2 increments */
1942         switch (tx2AttenIncPin)
1943         {
1944             case MYKGPIO6:
1945                 wrtPin |= 0x00;
1946                 break;
1947             case MYKGPIO14:
1948                 wrtPin |= 0x10;
1949                 break;
1950 
1951             default:
1952                 return MYKONOS_ERR_TPCTX2_GPIO_INCPIN_INV_PARAM;
1953         }
1954 
1955         /* Pin configuration assignment for Tx2 decrements */
1956         switch (tx2AttenDecPin)
1957         {
1958             case MYKGPIO7:
1959                 wrtPin |= 0x00;
1960                 break;
1961             case MYKGPIO15:
1962                 wrtPin |= 0x40;
1963                 break;
1964 
1965             default:
1966                 return MYKONOS_ERR_TPCTX2_GPIO_DECPIN_INV_PARAM;
1967         }
1968 
1969         /* Setting TPC mode corresponding to the enable */
1970         tpcMode = 0x0C;
1971     }
1972     else
1973     {
1974         /* Setting TPC mode corresponding for no Pin control */
1975         tpcMode = 0x05;
1976     }
1977 
1978     /* Setting increment step. */
1979     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_INCR_DECR_WORD, stepSize, TX_INCDEC_MASK, 0);
1980 
1981     /* Set the TPC mode for GPIO control. */
1982     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_TPC_CONFIG, tpcMode, TX2_TPC_MASK, 0);
1983 
1984     /* Set the GPIO input pin configuration and the step size. */
1985     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_TX_TPC_GPIO_CFG, wrtPin, TX2_WRTPIN, 0);
1986 
1987     return error;
1988 }
1989 
1990 /**
1991  * \brief This API function returns the configuration TX2 attenuation Pin control
1992  *
1993  *
1994  * <B>Dependencies</B>
1995  * - device->spiSettings
1996  * - device->spiSettings->chipSelectIndex
1997 
1998  *
1999  * \param device is structure pointer to the Mykonos data structure containing settings
2000  * \param stepSize will contain the step that is used for increment and decrement.
2001  * \param tx2AttenIncPin this will have the pin used for increment.
2002  * \param tx2AttenDecPin this will have the pin used for decrement.
2003  * \param enable will contain the enable status for this channel if it is set to 1 then this
2004  * function is enable for this channel, if it is 0 it is not enable
2005  * \param useTx1ForTx2 is used to return if TX1 settings are used for TX2 channel.
2006  *
2007  * \retval MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM if a null value has been passed to stepSize
2008  * \retval MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM if a null value has been passed to tx1AttenIncPin
2009  * \retval MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM if a null value has been passed to tx1AttenDecPin
2010  * \retval MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM if a null value has been passed to enable
2011  * \retval MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM if a null value has been passed to useTx1ForTx2
2012  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2013  */
MYKONOS_getTx2AttenCtrlPin(mykonosDevice_t * device,uint8_t * stepSize,mykonosGpioSelect_t * tx2AttenIncPin,mykonosGpioSelect_t * tx2AttenDecPin,uint8_t * enable,uint8_t * useTx1ForTx2)2014 mykonosGpioErr_t MYKONOS_getTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t *stepSize, mykonosGpioSelect_t *tx2AttenIncPin, mykonosGpioSelect_t *tx2AttenDecPin, uint8_t *enable, uint8_t *useTx1ForTx2)
2015 {
2016     uint8_t readVal = 0x00;
2017     uint8_t en = 0x00;
2018 
2019     const uint8_t MASK_TPC_CH2 = 0x0C;
2020     const uint8_t MASK_TPC_CH1FCH2 = 0x10;
2021     const uint8_t MASK_TPC_STEP = 0x1F;
2022     const uint8_t MASK_TPC_GPIO_CH2 = 0xF0;
2023 
2024 #if MYKONOS_VERBOSE == 1
2025     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getTx2AttenCtrlPin()\n");
2026 #endif
2027 
2028     /* Checking for null passed parameters */
2029     if (stepSize == NULL)
2030     {
2031         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM,
2032                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM));
2033         return MYKONOS_ERR_GETTX2PIN_STEP_NULL_PARM;
2034     }
2035 
2036     if (tx2AttenIncPin == NULL)
2037     {
2038         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM,
2039                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM));
2040         return MYKONOS_ERR_GETTX2PIN_INC_NULL_PARM;
2041     }
2042 
2043     if (tx2AttenDecPin == NULL)
2044     {
2045         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM,
2046                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM));
2047         return MYKONOS_ERR_GETTX2PIN_DEC_NULL_PARM;
2048     }
2049 
2050     if (enable == NULL)
2051     {
2052         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM,
2053                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM));
2054         return MYKONOS_ERR_GETTX2PIN_EN_NULL_PARM;
2055     }
2056 
2057     if (useTx1ForTx2 == NULL)
2058     {
2059         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM,
2060                getGpioMykonosErrorMessage(MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM));
2061         return MYKONOS_ERR_GETTX2PIN_TX1TX2_NULL_PARM;
2062     }
2063 
2064     /* Getting Pin configuration assignment*/
2065     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_TPC_GPIO_CFG, &readVal);
2066     readVal = readVal & MASK_TPC_GPIO_CH2;
2067 
2068     if (readVal & 0x10)
2069     {
2070         *tx2AttenIncPin = MYKGPIO14;
2071     }
2072     else
2073     {
2074         *tx2AttenIncPin = MYKGPIO6;
2075     }
2076 
2077     if (readVal & 0x40)
2078     {
2079         *tx2AttenDecPin = MYKGPIO15;
2080     }
2081     else
2082     {
2083         *tx2AttenDecPin = MYKGPIO7;
2084     }
2085 
2086     /* Getting Pin configuration assignment*/
2087     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_TPC_CONFIG, &readVal);
2088 
2089     en = readVal & MASK_TPC_CH2;
2090 
2091     *enable = (en == MASK_TPC_CH2) ? 1 : 0;
2092 
2093     *useTx1ForTx2 = readVal & MASK_TPC_CH1FCH2;
2094 
2095     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TX_INCR_DECR_WORD, &readVal);
2096 
2097     *stepSize = readVal & MASK_TPC_STEP;
2098 
2099     return MYKONOS_ERR_GPIO_OK;
2100 }
2101 
2102 /**
2103  * \brief Sets the Mykonos low voltage GPIO output pins level
2104  *
2105  * This function will only affect the GPIO pins that have their OE direction set to output and
2106  * that have the correct source control for the nibbles in GPIO_BITBANG_MODE
2107  *
2108  * <B>Dependencies</B>
2109  * - device->spiSettings->chipSelectIndex
2110  *
2111  * \param device is a pointer to the device settings structure
2112  * \param gpioPinLevel bit per GPIO pin, level to output for each GPIO pin. 0 = low output, 1= high output
2113  *
2114  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2115  */
MYKONOS_setGpioPinLevel(mykonosDevice_t * device,uint32_t gpioPinLevel)2116 mykonosGpioErr_t MYKONOS_setGpioPinLevel(mykonosDevice_t *device, uint32_t gpioPinLevel)
2117 {
2118 
2119     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
2120 
2121 #if MYKONOS_VERBOSE == 1
2122     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioPinLevel()\n");
2123 #endif
2124 
2125     /* writing GPIO configuration registers */
2126     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_7_0, (gpioPinLevel & 0xFF));
2127     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_15_8, ((gpioPinLevel >> 8) & 0xFF));
2128     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_18_16, ((gpioPinLevel >> 16) & 0x07));
2129 
2130     /* Return */
2131     return error;
2132 }
2133 
2134 /**
2135  * \brief Reads the Mykonos low voltage GPIO pin levels and returns their contents in a single 32-bit word
2136  *
2137  *  The GPIO pins that are set to be inputs in BITBANG mode will read back and be returned
2138  *  in the gpioPinLevel parameter. The return value is a bit per pin.  GPIO 0 returns on bit 0 of
2139  *  the gpioPinLevel parameter.  A logic low level returns a 0, a logic high level returns a 1.
2140  *
2141  * <B>Dependencies</B>
2142  * - device->spiSettings->chipSelectIndex
2143  *
2144  * \param device is a pointer to the device settings structure
2145  * \param gpioPinLevel Input Gpio pin levels read back on the pins assigned as inputs (bit per pin)
2146  *
2147  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2148  * \retval MYKONOS_ERR_READGPIOSPI_NULL_PARM The pointer passed for gpioPinLevel parameter is NULL
2149  */
MYKONOS_getGpioPinLevel(mykonosDevice_t * device,uint32_t * gpioPinLevel)2150 mykonosGpioErr_t MYKONOS_getGpioPinLevel(mykonosDevice_t *device, uint32_t *gpioPinLevel)
2151 {
2152     uint8_t readBytes[3] = {0, 0, 0};
2153 
2154 #if MYKONOS_VERBOSE == 1
2155     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioPinLevel()\n");
2156 #endif
2157 
2158     if (gpioPinLevel == NULL)
2159     {
2160         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_READGPIOSPI_NULL_PARM,
2161                 getGpioMykonosErrorMessage(MYKONOS_ERR_READGPIOSPI_NULL_PARM));
2162         return MYKONOS_ERR_READGPIOSPI_NULL_PARM;
2163     }
2164 
2165     /* reading the registers into three-byte array */
2166     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_READ_7_0, &readBytes[0]);
2167     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_READ_15_8, &readBytes[1]);
2168     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_READ_18_16, &readBytes[2]);
2169 
2170     /* performing concatenation and assigning value to gpio1v8SpiRead */
2171     *gpioPinLevel = ((uint32_t)(readBytes[2] & 0x07) << 16) | ((uint32_t)(readBytes[1]) << 8) | (uint32_t)(readBytes[0]);
2172 
2173     return MYKONOS_ERR_GPIO_OK;
2174 }
2175 
2176 /**
2177  * \brief Reads the Mykonos GPIO pin output levels for BITBANG mode
2178  *
2179  *  This function allows reading the value that the GPIO output pins are
2180  *  set to drive out the pins.
2181  *
2182  * <B>Dependencies</B>
2183  * - device->spiSettings->chipSelectIndex
2184  *
2185  * \param device is a pointer to the device settings structure
2186  * \param gpioPinSetLevel is a unit32_t pointer which contains the level of each GPIO pin (bit per pin)
2187  *
2188  *
2189  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2190  * \retval MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM gpioPinSetLevel pointer is NULL in function parameter
2191  *
2192  */
MYKONOS_getGpioSetLevel(mykonosDevice_t * device,uint32_t * gpioPinSetLevel)2193 mykonosGpioErr_t MYKONOS_getGpioSetLevel(mykonosDevice_t *device, uint32_t *gpioPinSetLevel)
2194 {
2195     uint8_t readBytes[3] = {0, 0, 0};
2196 
2197 #if MYKONOS_VERBOSE == 1
2198     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioSetLevel()\n");
2199 #endif
2200 
2201     if (gpioPinSetLevel == NULL)
2202     {
2203         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM,
2204                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM));
2205         return MYKONOS_ERR_GETGPIOSETLEVEL_NULL_PARM;
2206     }
2207 
2208     /* reading the registers into two-byte array */
2209     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_7_0, &readBytes[0]);
2210     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_15_8, &readBytes[1]);
2211     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_SPI_SRC_18_16, &readBytes[2]);
2212 
2213     /* performing concatenation and assigning value to gpioPinSetLevel */
2214     *gpioPinSetLevel = ((uint32_t)(readBytes[2] & 0x07) << 16) | ((uint32_t)(readBytes[1]) << 8) | (uint32_t)(readBytes[0]);
2215 
2216     return MYKONOS_ERR_GPIO_OK;
2217 }
2218 
2219 
2220 
2221 /**
2222  * \brief Sets the General Purpose (GP) interrupt register bit mask to enable interrupt sources to assert the GP Interrupt pin
2223  *
2224  *  Mykonos has a single output pin called General Purpose Interrupt that asserts to a logic high level
2225  *  when certain events occur.  The events that cause the GP Interrupt pin to assert are user
2226  *  selectable by setting the gpMask parameter in this function.  Device default is mask = x1FF = ignore
2227  *  all events.  The ARM Error interrupt can not be ignored and can always assert the GP interrupt pin.
2228  *
2229  *     gpMask  |  Bit description
2230  * ------------|------------
2231  *        [0]  | TXPLL LOCK - 0 = allow PLL unlocking to assert GP Interrupt pin, 1 = ignore TXPLL LOCK
2232  *        [1]  | RXPLL LOCK - 0 = allow PLL unlocking to assert GP Interrupt pin, 1 = ignore RXPLL LOCK
2233  *        [2]  | SNIFFER PLL LOCK - 0 = allow PLL unlocking to assert GP Interrupt pin, 1 = ignore SNIFFER PLL LOCK
2234  *        [3]  | CALIBRATION PLL LOCK - 0 = allow PLL unlocking to assert GP Interrupt pin, 1 = ignore CALIBRATION PLL LOCK
2235  *        [4]  | CLKPLL LOCK - 0 = allow PLL unlocking to assert GP Interrupt pin, 1 = ignore CLKPLL LOCK
2236  *        [5]  | 0 = Allow JESD204 deframer interrupt to assert GP Interrupt pin, 1 = ignore JESD204 deframer interrupt
2237  *        [6]  | Tx1 PA protection - 0 = allow Tx1 PA protection event to assert GP Interrupt pin, 1 = ignore Tx1 PA protection
2238  *        [7]  | Tx2 PA protection - 0 = allow Tx2 PA protection event to assert GP Interrupt pin, 1 = ignore Tx2 PA protection
2239  *        [8]  | Mykonos ARM Watchdog - 0 = allow Mykonos ARM Watchdog timeout to assert GP Interrupt pin, 1 = ignore Watchdog timeout event
2240  *     [15-9]  | Reserved for future use
2241  *
2242  * <B>Dependencies</B>
2243  * - device->spiSettings
2244  *
2245  * \param device Pointer to the device settings structure
2246  * \param gpMask Value is passed to enable one or more general purpose interrupt sources
2247  *               (1=ignore source, 0 = enable source interrupt to GP Interrupt pin)
2248  *
2249  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2250  * \retval MYKONOS_ERR_INV_GP_INT_MASK_PARM if invalid interrupt mask is passed
2251  */
MYKONOS_configGpInterrupt(mykonosDevice_t * device,uint16_t gpMask)2252 mykonosGpioErr_t MYKONOS_configGpInterrupt(mykonosDevice_t *device, uint16_t gpMask)
2253 {
2254     const uint16_t GP_INT_VALID_MASK = 0x1FF;
2255 
2256 #if MYKONOS_VERBOSE == 1
2257     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_configGpInterrupt()\n");
2258 #endif
2259 
2260     /* checking for valid mask setting */
2261     if (gpMask & ~GP_INT_VALID_MASK)
2262     {
2263         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_INV_GP_INT_MASK_PARM,
2264                 getGpioMykonosErrorMessage(MYKONOS_ERR_INV_GP_INT_MASK_PARM));
2265         return MYKONOS_ERR_INV_GP_INT_MASK_PARM;
2266     }
2267 
2268     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GP_INTERRUPT_MASK_1, (gpMask & 0xFF));
2269     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GP_INTERRUPT_MASK_0, ((gpMask >> 8) & 0x01));
2270 
2271     return MYKONOS_ERR_GPIO_OK;
2272 }
2273 
2274 /**
2275  * \brief Reads the General Purpose (GP) interrupt status to determine what caused the GP Interrupt pin to assert
2276  *
2277  *  When the BBIC detects a rising edge on the General Purpose Interrupt pin, this function
2278  *  allows the BBIC to determine the source of the interrupt.  The value returned in the status parameter
2279  *  will show one or more sources for the interrupt based on the following table.
2280  *
2281  *  The PLL unlock bits are not sticky.  They will follow the current status of the PLLs.  If the PLL relocks, the
2282  *  status bit will clear as well.  The GP Interrupt pin is the logical OR of all the sources.  When all the status
2283  *  bits are low, the GP Interrupt pin will be low.  The status word readback will show the current value
2284  *  for all interrupt sources, even if they are disabled by the masked. However, the GP Interrupt pin will only assert
2285  *  for the enabled sources.
2286  *
2287  *     status  |  Bit description
2288  * ------------|------------
2289  *        [0]  | 1 = TXPLL UNLOCK
2290  *        [1]  | 1 = RXPLL UNLOCK
2291  *        [2]  | 1 = SNIFFER PLL UNLOCK
2292  *        [3]  | 1 = CALIBRATION PLL UNLOCK
2293  *        [4]  | 1 = CLK PLL UNLOCK
2294  *        [5]  | 1 = JESD204 deframer interrupt occurred
2295  *        [6]  | 1 = Tx1 PA protection event
2296  *        [7]  | 1 = Tx2 PA protection event
2297  *        [8]  | 1 = Mykonos ARM Watchdog timeout
2298  *        [9]  | 1 = ARM interrupt occurred
2299  *    [15-10]  | Reserved for future use
2300  *
2301  * <B>Dependencies</B>
2302  * - device->spiSettings
2303  *
2304  * \param device Pointer to the device settings structure
2305  * \param status parameter to return the IRQ source(s) that caused the GP Interrpt pin to assert.
2306  *
2307  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2308  * \retval MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM if null *status pointer is passed
2309  */
MYKONOS_readGpInterruptStatus(mykonosDevice_t * device,uint16_t * status)2310 mykonosGpioErr_t MYKONOS_readGpInterruptStatus(mykonosDevice_t *device, uint16_t *status)
2311 {
2312     uint8_t readStatus1 = 0;
2313     uint8_t readStatus0 = 0;
2314 
2315 #if MYKONOS_VERBOSE == 1
2316     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_readGpInterruptStatus()\n");
2317 #endif
2318     /* checking for null pointer */
2319     if (status == NULL)
2320     {
2321         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM,
2322                 getGpioMykonosErrorMessage(MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM));
2323         return MYKONOS_ERR_GP_INT_STATUS_NULL_PARAM;
2324     }
2325 
2326     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GP_INTERRUPT_READ_1, &readStatus1);
2327     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GP_INTERRUPT_READ_0, &readStatus0);
2328 
2329     /* PLL Lock status bits are high when locked, invert to match up with other bits */
2330     *status = ((((uint16_t)(readStatus1) & 0xE0U) | ((~(uint16_t)(readStatus1)) & 0x1F)) | (((uint16_t)(readStatus0) & 0x0003) << 8)) ;
2331 
2332     return MYKONOS_ERR_GPIO_OK;
2333 }
2334 
2335 /**
2336  * \brief Sets the input and output GPIO pin selections for ARM related signals.
2337  *
2338  * The BBP should not have to call this as it will automatically be setup during the
2339  * MYKONOS_loadArmFromBinary() function call.  If the BBP wishes to change the GPIO
2340  * assignments this function can be called again to change the configuration while
2341  * the ARM is in the radioOff state.
2342  *
2343  * <B>Dependencies</B>
2344  * - device->spiSettings->chipSelectIndex
2345  * - device->auxIo->armGpio : all members in structure
2346  *
2347  * \param device is a pointer to the device settings structure
2348  *
2349  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2350  * \retval MYKONOS_ERR_SET_ARMGPIO_INV_POINTER device->auxIo->armGpio pointer is null
2351  * \retval MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID Invalid ARM GPIO pin signal ID
2352  * \retval MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN Invalid GPIO pin selected for ARM output (valid 0-15 + output enable in bit[4])
2353  * \retval MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR ARM returned error setting GPIO pins
2354  */
MYKONOS_setArmGpioPins(mykonosDevice_t * device)2355 mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
2356 {
2357     uint8_t i = 0;
2358     uint8_t gpioConfig[3] = {0};
2359     uint8_t signalId[12] = {ORX_TRIGGER_SIGNALID, ORX_MODE_0_SIGNALID, ORX_MODE_1_SIGNALID, ORX_MODE_2_SIGNALID, RX1_ENABLE_ACK_SIGNALID,
2360             RX2_ENABLE_ACK_SIGNALID, TX1_ENABLE_ACK_SIGNALID, TX2_ENABLE_ACK_SIGNALID, ORX1_ENABLE_ACK_SIGNALID, ORX2_ENABLE_ACK_SIGNALID,
2361             SRX_ENABLE_ACK_SIGNALID, TX_OBS_SELECT_SIGNALID};
2362     uint32_t timeoutMs = 0;
2363     uint8_t cmdStatusByte = 0;
2364     uint32_t gpioOe = 0;
2365     uint32_t gpioUsedMask = 0;
2366     mykonosGpioErr_t retval = MYKONOS_ERR_GPIO_OK;
2367 
2368     const uint8_t GPIO_CTRL_OBJECTID = 0x60;
2369 
2370 #if MYKONOS_VERBOSE == 1
2371     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setArmGpioPins()\n");
2372 #endif
2373 
2374     if (device->auxIo->armGpio == NULL)
2375     {
2376         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_ARMGPIO_INV_POINTER,
2377                 getGpioMykonosErrorMessage(MYKONOS_ERR_SET_ARMGPIO_INV_POINTER));
2378         return MYKONOS_ERR_SET_ARMGPIO_INV_POINTER;
2379     }
2380 
2381     /* Write ARM set command to setup which ARM signals are using which GPIO pins */
2382     /* Setup input pins for ORX_MODE[2:0] and ORX_MODE_Trigger if orx is in pin mode */
2383     for(i = 0; i < sizeof(signalId); i++)
2384     {
2385         gpioConfig[0] = GPIO_CTRL_OBJECTID;
2386         gpioConfig[1] = signalId[i];
2387 
2388         switch(signalId[i])
2389         {
2390             case ORX_TRIGGER_SIGNALID:      gpioConfig[2] = device->auxIo->armGpio->orxTriggerPin;   break;
2391             case ORX_MODE_0_SIGNALID:       gpioConfig[2] = device->auxIo->armGpio->orxMode0Pin;     break;
2392             case ORX_MODE_1_SIGNALID:       gpioConfig[2] = device->auxIo->armGpio->orxMode1Pin;     break;
2393             case ORX_MODE_2_SIGNALID:       gpioConfig[2] = device->auxIo->armGpio->orxMode2Pin;     break;
2394             case RX1_ENABLE_ACK_SIGNALID:   gpioConfig[2] = device->auxIo->armGpio->rx1EnableAck;    break;
2395             case RX2_ENABLE_ACK_SIGNALID:   gpioConfig[2] = device->auxIo->armGpio->rx2EnableAck;    break;
2396             case TX1_ENABLE_ACK_SIGNALID:   gpioConfig[2] = device->auxIo->armGpio->tx1EnableAck;    break;
2397             case TX2_ENABLE_ACK_SIGNALID:   gpioConfig[2] = device->auxIo->armGpio->tx2EnableAck;    break;
2398             case ORX1_ENABLE_ACK_SIGNALID:  gpioConfig[2] = device->auxIo->armGpio->orx1EnableAck;   break;
2399             case ORX2_ENABLE_ACK_SIGNALID:  gpioConfig[2] = device->auxIo->armGpio->orx2EnableAck;   break;
2400             case SRX_ENABLE_ACK_SIGNALID:   gpioConfig[2] = device->auxIo->armGpio->srxEnableAck;    break;
2401             case TX_OBS_SELECT_SIGNALID:    gpioConfig[2] = device->auxIo->armGpio->txObsSelect;     break;
2402             default:
2403             {
2404                 CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex,  MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID,
2405                         getGpioMykonosErrorMessage(MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID));
2406                 return MYKONOS_ERR_SET_ARMGPIO_PINS_INV_SIGNALID;
2407             }
2408         }
2409 
2410         if (gpioConfig[2] > 0x1F)
2411         {
2412             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex,  MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN,
2413                     getGpioMykonosErrorMessage(MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN));
2414             return MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN;
2415         }
2416 
2417         /* if output signal */
2418         if ((signalId[i] >= RX1_ENABLE_ACK_SIGNALID) && (gpioConfig[2] != 0))
2419         {
2420             gpioOe |= (uint32_t)(((gpioConfig[2] >> 4) & 0x01) << (gpioConfig[2] & 0x0F)); /* 1 = output */
2421             gpioUsedMask |= (uint32_t)(1 << (gpioConfig[2] & 0x0F));
2422         }
2423 
2424         /* if input signal and orx Pin mode enabled - currently only input pins are orx pin mode control */
2425         if ((signalId[i] < RX1_ENABLE_ACK_SIGNALID) && (device->auxIo->armGpio->orxPinMode > 0))
2426         {
2427             gpioUsedMask |= (1 << (gpioConfig[2] & 0x1F));
2428         }
2429 
2430         retval = (mykonosGpioErr_t)MYKONOS_sendArmCommand(device, MYKONOS_ARM_SET_OPCODE, &gpioConfig[0], sizeof(gpioConfig));
2431         if (retval != MYKONOS_ERR_GPIO_OK)
2432         {
2433             return retval;
2434         }
2435 
2436         timeoutMs = 1000;
2437 
2438         if (( retval = (mykonosGpioErr_t)MYKONOS_waitArmCmdStatus(device, MYKONOS_ARM_SET_OPCODE, timeoutMs, &cmdStatusByte)) != MYKONOS_ERR_GPIO_OK)
2439         {
2440             return retval;
2441         }
2442 
2443         if (cmdStatusByte > 0)
2444         {
2445             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex,  MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR,
2446                     getGpioMykonosErrorMessage(MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR));
2447             return MYKONOS_ERR_SET_ARMGPIO_PINS_ARMERROR;
2448         }
2449     }
2450 
2451     /* Mykonos SPI regs to set GPIO OE direction only for pins used by ARM */
2452     if ((retval = MYKONOS_setGpioOe(device, gpioOe, gpioUsedMask)) != MYKONOS_ERR_GPIO_OK)
2453     {
2454         return retval;
2455     }
2456 
2457     /* if any output pins enabled, write GPIO nibble source control.  ARM outputs only allowed on GPIO[15:0]*/
2458     if (gpioOe & 0x000F)
2459     {
2460         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, 0x09, 0x0F, 0);
2461     }
2462 
2463     if (gpioOe & 0x00F0)
2464     {
2465         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, 0x09, 0xF0, 4);
2466     }
2467 
2468     if (gpioOe & 0x0F00)
2469     {
2470         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE, 0x09, 0x0F, 0);
2471     }
2472 
2473     if (gpioOe & 0xF000)
2474     {
2475         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE, 0x09, 0xF0, 4);
2476     }
2477 
2478     return MYKONOS_ERR_GPIO_OK;
2479 }
2480 
2481 /**
2482  * \brief Sets up the auxiliary ADC
2483  *
2484  *  This function configures the AuxADC with the requested decimation.  The AuxADC clock is set as close
2485  *  as possible to 40MHz.  The AuxADC conversion time = (1/40Mhz) * decimation, where the decimation ranges
2486  *  from 256 AuxADC clock cycles to 32768 AuxADc clock cycles.
2487  *
2488  *  Note: The AuxADC is intended for relative measurements.  Two back to back measurements can allow a delta
2489  *  measurement with 12bit resolution.  If absolute measurements are required, an accurate
2490  *  reference should be first measured on AuxADC0 input and used to calibrate the offset/gain error of the AuxADC.
2491  *  The reference would need to be measured before each measurement to account for measurement variations caused
2492  *  by the transmitter/receiver transients as other circuits in the device are being powered up/down.
2493  *
2494  * <B>Dependencies</B>
2495  * - device->spiSettings->chipSelectIndex
2496  *
2497  * \param device Pointer to the device settings structure
2498  * \param adcDecimation ADC decimation factor (0-7). Decimates by 256 * 2^(adcDecimation) ADC clock cycles.
2499  * \param enable Stop/run ADC (0/1)
2500  *
2501  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2502  * \retval MYKONOS_ERR_SETUPAUXADC_INV_VCODIV CLKPLL VCO divider is invalid - Check CLKPLL setup
2503  * \retval MYKONOS_ERR_INV_AUX_ADC_DEC_PARM AuxADC decimation out of range (valid 0-7)
2504  */
MYKONOS_setupAuxAdcs(mykonosDevice_t * device,uint8_t adcDecimation,uint8_t enable)2505 mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecimation, uint8_t enable)
2506 {
2507     uint32_t hsDigClk_kHz = 0;
2508     uint32_t auxAdcDiv = 0;
2509     uint32_t auxAdcClk_kHz = 40000;
2510     uint32_t vcoDiv = (uint32_t)device->clocks->clkPllVcoDiv;
2511     uint8_t vcoDivTimes10 = 10;
2512 
2513     const uint8_t AUXADC_POWER_BIT_MASK = 0x80;
2514 
2515 #if MYKONOS_VERBOSE == 1
2516     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupAuxAdcs()\n");
2517 #endif
2518 
2519     if (enable == 0)
2520     {
2521         CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_0, 0xCF);
2522         CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, 0x01);
2523 
2524         return MYKONOS_ERR_GPIO_OK;
2525     }
2526     else
2527     {
2528         switch(vcoDiv)
2529         {
2530             case VCODIV_1:
2531                 vcoDivTimes10 = 10;
2532                 break;
2533             case VCODIV_1p5:
2534                 vcoDivTimes10 = 15;
2535                 break;
2536             case VCODIV_2:
2537                 vcoDivTimes10 = 20;
2538                 break;
2539             case VCODIV_3:
2540                 vcoDivTimes10 = 30;
2541                 break;
2542 
2543             default:
2544                 CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPAUXADC_INV_VCODIV,
2545                         getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPAUXADC_INV_VCODIV));
2546                 return MYKONOS_ERR_SETUPAUXADC_INV_VCODIV;
2547         }
2548 
2549         hsDigClk_kHz = (device->clocks->clkPllVcoFreq_kHz / vcoDivTimes10 / device->clocks->clkPllHsDiv) * 10;
2550         auxAdcDiv = ((hsDigClk_kHz / 2) / (auxAdcClk_kHz)) - 1;
2551 
2552         if (auxAdcDiv > 63)
2553         {
2554             auxAdcDiv = 63;
2555         }
2556 
2557         if (adcDecimation > 0x07)
2558         {
2559             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_INV_AUX_ADC_DEC_PARM,
2560                     getGpioMykonosErrorMessage(MYKONOS_ERR_INV_AUX_ADC_DEC_PARM));
2561             return MYKONOS_ERR_INV_AUX_ADC_DEC_PARM;
2562         }
2563 
2564         CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADR_AUX_ADC_CLOCK_DIVIDE, (uint8_t)(auxAdcDiv));
2565         CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, (uint8_t)((adcDecimation << 1)));
2566         CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, 0x00); /* Set AuxADC select to AuxADC0 */
2567         CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_0, 0, AUXADC_POWER_BIT_MASK, 7);
2568 
2569         /* Set Clock enable bit to latch divider */
2570         CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADR_AUX_ADC_CLOCK_DIVIDE, (uint8_t)(auxAdcDiv | 0x80));
2571     }
2572     return MYKONOS_ERR_GPIO_OK;
2573 }
2574 
2575 /**
2576  * \brief Sets the selected channel of the auxiliary ADC
2577  *
2578  *  After setting the AuxADC channel, wait at least 1 AuxADC conversion time before
2579  *  reading back the AuxADC value.
2580  *
2581  * <B>Dependencies</B>
2582  * - device->spiSettings->chipSelectIndex
2583  *
2584  * \param device is a pointer to the device settings structure
2585  * \param auxAdcChannel desired Aux ADC input(0-4 and 16 = temperature sensor)
2586  *
2587  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2588  * \retval MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM Invalid AuxADC channel (valid 0-4 and 16)
2589  */
MYKONOS_setAuxAdcChannel(mykonosDevice_t * device,mykonosAuxAdcChannels_t auxAdcChannel)2590 mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdcChannels_t auxAdcChannel)
2591 {
2592     uint8_t currentAuxAdcChan = 0x00;
2593 
2594     const uint8_t CHANNEL_MASK = 0x17;
2595     const uint8_t POWER_UP_AUXADC = 0x00;
2596     const uint8_t POWER_DOWN_AUXADC = 0x01;
2597 
2598 #if MYKONOS_VERBOSE == 1
2599     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setAuxAdcChannel()\n");
2600 #endif
2601 
2602     if (((uint8_t)auxAdcChannel & ~CHANNEL_MASK) > 0)
2603     {
2604         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM,
2605                 getGpioMykonosErrorMessage(MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM));
2606         return MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM;
2607     }
2608 
2609     /* Read current selected channel, if different power down AUXADC and change AUXADC */
2610     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, &currentAuxAdcChan);
2611     if (currentAuxAdcChan != (uint8_t)auxAdcChannel)
2612     {
2613         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, POWER_DOWN_AUXADC, 0x01, 0);
2614         CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, ((auxAdcChannel & MYK_AUXADC_0_DIV2) ? 0: auxAdcChannel));
2615         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, POWER_UP_AUXADC, 0x01, 0);
2616     }
2617 
2618     /* Invalid AuxADC channel, the only valid channel for external ref is channel 0 */
2619     if (auxAdcChannel == MYK_AUXADC_0_DIV2)
2620     {
2621         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_1, 0x01, 0x04, 2);
2622     }
2623     else if (auxAdcChannel == MYK_AUXADC_0)
2624     {
2625         CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_1, 0x00, 0x04, 2);
2626     }
2627 
2628     return MYKONOS_ERR_GPIO_OK;
2629 }
2630 
2631 /**
2632  * \brief Reads from the selected channel of the auxiliary ADC
2633  *
2634  *  Before using this function to read back the AuxADC value of the
2635  *  currently selected AuxADC, make sure that at least 1 conversion time
2636  *  of the ADC has passed since setting the AuxADC channel.
2637  *
2638  * <B>Dependencies</B>
2639  * - device->spiSettings->chipSelectIndex
2640  *
2641  * \param device is a pointer to the device settings structure
2642  * \param adcCode is a pointer for return of the 12bit ADC read value
2643  *
2644  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2645  * \retval MYKONOS_ERR_READAUXADC_NULL_PARAM Function parameter adcCode is a NULL pointer
2646  */
MYKONOS_readAuxAdc(mykonosDevice_t * device,uint16_t * adcCode)2647 mykonosGpioErr_t MYKONOS_readAuxAdc(mykonosDevice_t *device, uint16_t *adcCode)
2648 {
2649     uint8_t adcNibble = 0;
2650 
2651     const uint8_t AUXADC_LOCK_BIT_MASK = 0x80;
2652 
2653 #if MYKONOS_VERBOSE == 1
2654     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_readAuxAdcs()\n");
2655 #endif
2656 
2657     if (adcCode == NULL)
2658     {
2659         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_READAUXADC_NULL_PARAM,
2660                 getGpioMykonosErrorMessage(MYKONOS_ERR_READAUXADC_NULL_PARAM));
2661         return MYKONOS_ERR_READAUXADC_NULL_PARAM;
2662     }
2663 
2664     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, 1, AUXADC_LOCK_BIT_MASK, 7);
2665     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_READ_MSB, &adcNibble);
2666     *adcCode = adcNibble << 4;
2667     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_READ_LSB, &adcNibble);
2668     *adcCode |= (adcNibble & 0x0F);
2669 
2670     return MYKONOS_ERR_GPIO_OK;
2671 }
2672 
2673 /**
2674  * \brief Sets up the 10 AuxDACs on the Mykonos device.
2675  *
2676  * This function uses the configuration in the Mykonos device data structure AuxIO substructure to
2677  * setup which of the ten AuxDACs are enabled, their slope, Vref(mid point) and their initial DAC code.
2678  *
2679  *  This function can be called any time after MYKONOS_initialize() to reconfigure, enable, disable the
2680  *  different AuxDAC outputs. The AuxDACs are used in manual control mode.  After calling this setup
2681  *  function, it is possible to change a particular AuxDAC code by calling the writeAuxDac() function.
2682  *
2683  * <B>Dependencies</B>
2684  * - device->spiSettings->chipSelectIndex
2685  * - device->auxIo->auxDacEnable: 1= enabled, 0 = disabled
2686  * - device->auxIo->auxDacSlope[i]: 0 = 1.404mv/code, 1= 0.702mV/code
2687  * - device->auxIo->auxDacVref: 0 = 1v midpoint, 1 = 1.5v midpoint, 2 = 2v midpoint, 3 = 2.5v midpoint
2688  * - device->auxIo->auxDacValue[i]: 10bit DAC code (0-1023)
2689  *
2690  * \param device is a pointer to the device settings structure
2691  *
2692  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2693  * \retval MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM device->auxIo structure has a NULL pointer
2694  * \retval MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE auxDAC code is out of range (valid 0-1023)
2695  */
MYKONOS_setupAuxDacs(mykonosDevice_t * device)2696 mykonosGpioErr_t MYKONOS_setupAuxDacs(mykonosDevice_t *device)
2697 {
2698     uint8_t i = 0; /* for loop index */
2699     uint8_t auxDacConfig = 0 ;
2700     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
2701 
2702 #if MYKONOS_VERBOSE == 1
2703     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupAuxDacs()\n");
2704 #endif
2705 
2706     if (device->auxIo == NULL)
2707     {
2708         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM,
2709                 getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM));
2710         return MYKONOS_ERR_SETUPAUXDAC_NULL_PARAM;
2711     }
2712 
2713     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_CONTROL_5_0, 0x3F); /* Enable Manual AuxDAC control for all AuxDACs[5:0] */
2714     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_CONTROL_9_6, 0x0F); /* Enable Manual AuxDAC control for all AuxDACs[9:6] */
2715     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_5_0, 0x3F); /* Power down all AuxDACs[5:0] */
2716     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_9_6, 0x0F); /* Power down all AuxDACs[9:6] */
2717 
2718     for (i = 0; i < 10; i++)
2719     {
2720         /* If auxDac enabled, setup AuxDAC configuration */
2721         if ((device->auxIo->auxDacEnable >> i) & 0x01)
2722         {
2723             if (device->auxIo->auxDacValue[i] > 1023)
2724             {
2725                 device->auxIo->auxDacValue[i] = 1023; /* clip value to max */
2726                 CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE,
2727                         getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE));
2728                 error = MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE; /* Complete AuxDAC configuration before returning error code */
2729             }
2730 
2731             auxDacConfig = 0x00; /* initialize config variable */
2732 
2733             if (device->auxIo->auxDacSlope[i] > 0)
2734             {
2735                 auxDacConfig = 0x40; /* bit [6] sets the slope */
2736             }
2737 
2738             auxDacConfig |= ((device->auxIo->auxDacVref[i] & 0x03) << 4);
2739 
2740             /* Write AuxDAC config and DAC code */
2741             CMB_SPIWriteByte(device->spiSettings, (MYKONOS_ADDR_AUXDAC_0_WORD_MSB + (i * 2)), (auxDacConfig | ((device->auxIo->auxDacValue[i] >> 8) & 0x0F)));
2742             CMB_SPIWriteByte(device->spiSettings, (MYKONOS_ADDR_AUXDAC_0_WORD_MSB + (i * 2 ) + 1), (device->auxIo->auxDacValue[i] & 0xFF));
2743         }
2744     }
2745 
2746     /* Write enable bit to latch DAC codes into DACs */
2747     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_DAC_LATCH_CONTROL, 0x01);
2748 
2749     /* Power up selected AuxDacs */
2750     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_5_0, (~device->auxIo->auxDacEnable & 0x3F)); /* Power up enabled AuxDACs[5:0] */
2751     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_9_6, (((uint16_t)(~device->auxIo->auxDacEnable) >> 6) & 0x0F)); /* Power up enabled AuxDACs[9:6] */
2752 
2753     return error;
2754 }
2755 
2756 /**
2757  * \brief Writes the current AuxDAC code for a particular AuxDAC
2758  *
2759  * This function updates the 10bit code that controls the AuxDAC output voltage.
2760  * The auxDacCode is updated for the specified auxDAC.  Also the auxDacCode is written
2761  * to the device data structure for future reference.
2762  *
2763  * <B>Dependencies</B>
2764  * - device->spiSettings->chipSelectIndex
2765  * - device->auxIo->auxDacValue[i]
2766  *
2767  * \param device is a pointer to the device settings structure
2768  * \param auxDacIndex AuxDAC to set the DAC code for (0-9)
2769  * \param auxDacCode DAC code to update the AuxDAC to.  Sets the output voltage of the DAC (valid 0-1023)
2770  *
2771  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2772  * \retval MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE AuxDac code invalid (valid 0-1023)
2773  * \retval MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX AuxDAC index out of range (valid 0-9)
2774  * \retval MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO device->auxIo has NULL pointer
2775  */
MYKONOS_writeAuxDac(mykonosDevice_t * device,uint8_t auxDacIndex,uint16_t auxDacCode)2776 mykonosGpioErr_t MYKONOS_writeAuxDac(mykonosDevice_t *device, uint8_t auxDacIndex, uint16_t auxDacCode)
2777 {
2778     uint16_t auxDacAddr = 0;
2779 
2780 #if MYKONOS_VERBOSE == 1
2781     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_writeAuxDac()\n");
2782 #endif
2783 
2784     if (auxDacCode > 1023)
2785     {
2786         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE,
2787                 getGpioMykonosErrorMessage(MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE));
2788         return MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACCODE;
2789     }
2790 
2791     if (auxDacIndex > 9)
2792     {
2793         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX,
2794                 getGpioMykonosErrorMessage(MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX));
2795         return MYKONOS_ERR_WRITEAUXDAC_INV_AUXDACINDEX;
2796     }
2797 
2798     if (device->auxIo == NULL)
2799     {
2800         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO,
2801                 getGpioMykonosErrorMessage(MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO));
2802         return MYKONOS_ERR_WRITEAUXDAC_NULL_AUXIO;
2803     }
2804 
2805     device->auxIo->auxDacValue[auxDacIndex] = auxDacCode;
2806 
2807     auxDacAddr = MYKONOS_ADDR_AUXDAC_0_WORD_MSB + (auxDacIndex * 2);
2808 
2809     /* Write AuxDAC config and DAC code */
2810     CMB_SPIWriteField(device->spiSettings, auxDacAddr, (auxDacCode >> 8), 0x0F, 0);
2811     CMB_SPIWriteByte(device->spiSettings, (auxDacAddr + 1), (auxDacCode & 0xFF));
2812 
2813     /* Write enable bit to latch DAC codes into DACs */
2814     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_DAC_LATCH_CONTROL, 0x01);
2815 
2816     return MYKONOS_ERR_GPIO_OK;
2817 }
2818 
2819 /**
2820  * \brief Sets the Mykonos low voltage GPIO configuration registers
2821  *
2822  * Sets the low voltage GPIO pin direction for each low voltage GPIO pin and
2823  * sets the source control mode (feature) for each group of 4 GPIO pins.
2824  *
2825  * <B>Dependencies</B>
2826  * - device->spiSettings->chipSelectIndex
2827  * - device->auxIo->gpio - all members
2828  *
2829  * \param device is a pointer to the device settings structure
2830  *
2831  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2832  * \retval MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER device->auxIo->gpio pointer is NULL
2833  * \retval MYKONOS_ERR_SET_GPIO_1V8_INV_MODE gpio structure members have invalid enum value for the GPIO source control mode.
2834  */
MYKONOS_setupGpio(mykonosDevice_t * device)2835 mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device)
2836 {
2837     uint32_t srcWrite = 0x000000;
2838     uint32_t oEnMask = 0x7FFFF;
2839     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
2840 
2841 #if MYKONOS_VERBOSE == 1
2842     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupGpio()\n");
2843 #endif
2844 
2845     if (device->auxIo->gpio == NULL)
2846     {
2847         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER,
2848                 getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER));
2849         return MYKONOS_ERR_SET_GPIO_1V8_INV_POINTER;
2850     }
2851 
2852     /* write GPIO pin direction registers */
2853     if ((error = MYKONOS_setGpioOe(device, device->auxIo->gpio->gpioOe, oEnMask)) != MYKONOS_ERR_GPIO_OK)
2854     {
2855         return error;
2856     }
2857 
2858     /* write GPIO source control mode */
2859     if (((uint8_t)device->auxIo->gpio->gpioSrcCtrl3_0 > 15) || ((uint8_t)device->auxIo->gpio->gpioSrcCtrl7_4 > 15) ||
2860         ((uint8_t)device->auxIo->gpio->gpioSrcCtrl11_8 > 15) || ((uint8_t)device->auxIo->gpio->gpioSrcCtrl15_12 > 15) ||
2861         ((uint8_t)device->auxIo->gpio->gpioSrcCtrl18_16 > 15))
2862     {
2863         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_1V8_INV_MODE,
2864                 getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_1V8_INV_MODE));
2865         return MYKONOS_ERR_SET_GPIO_1V8_INV_MODE;
2866     }
2867 
2868     srcWrite = (uint32_t)device->auxIo->gpio->gpioSrcCtrl3_0 + ((uint32_t)device->auxIo->gpio->gpioSrcCtrl7_4 << 4) +
2869             ((uint32_t)device->auxIo->gpio->gpioSrcCtrl11_8 << 8) + ((uint32_t)device->auxIo->gpio->gpioSrcCtrl15_12 << 12) +
2870             ((uint32_t)device->auxIo->gpio->gpioSrcCtrl18_16 << 16);
2871 
2872     error = MYKONOS_setGpioSourceCtrl(device, srcWrite);
2873 
2874     return error;
2875 }
2876 
2877 /**
2878  * \brief Sets the Mykonos low voltage GPIO output pins direction
2879  *
2880  * This function will set the GPIO direction given by the passed parameter,
2881  * the direction can be either output or input.  The gpioUsedMask parameter
2882  * allows the function to only affect the GPIO pins of interest.
2883  *
2884  * <B>Dependencies</B>
2885  * - device->spiSettings->chipSelectIndex
2886  * - device->auxIo->gpio->gpioOe
2887  *
2888  * \param device is a pointer to the device settings structure
2889  * \param gpioOutEn (valid range 0 - 0x07FFFF), bit per GPIO pin, the direction is
2890  *
2891  * gpioOutEn[bit]  |  GPIO[bit] direction
2892  * ----------------|-------------------
2893  *        0        |        input
2894  *        1        |        output
2895  *
2896  * \param gpioUsedMask Mask used to control which Oe bits are set/cleared.  If
2897  *                     mask bit =1, that bit will be modified by gpioOutEn bit
2898  *
2899  * \retval MYKONOS_ERR_GPIO_OE_INV_PARAM If the Output enable parameter is invalid
2900  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2901  */
MYKONOS_setGpioOe(mykonosDevice_t * device,uint32_t gpioOutEn,uint32_t gpioUsedMask)2902 mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn, uint32_t gpioUsedMask)
2903 {
2904     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
2905 
2906     const uint32_t GPIO_OE_MASK = 0x7FFFF;
2907 
2908 #if MYKONOS_VERBOSE == 1
2909     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioOe()\n");
2910 #endif
2911 
2912     /* Error checking for correct number of GPIOs available. */
2913     if (gpioOutEn > GPIO_OE_MASK )
2914     {
2915         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OE_INV_PARAM,
2916                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_OE_INV_PARAM));
2917         return MYKONOS_ERR_GPIO_OE_INV_PARAM;
2918     }
2919 
2920     /* Mykonos SPI regs to set GPIO OE direction */
2921     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_7_0, (gpioOutEn & 0xFF), (gpioUsedMask & 0xFF), 0);
2922     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_15_8, ((gpioOutEn >> 8) & 0xFF), ((gpioUsedMask >> 8) & 0xFF), 0);
2923     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_18_16, ((gpioOutEn >> 16) & 0xFF), ((gpioUsedMask >> 16) & 0xFF), 0);
2924 
2925     /* Updating gpioConfig->gpioSetup->gpioOe output enable */
2926     if ((error = MYKONOS_getGpioOe(device, &gpioOutEn)) != MYKONOS_ERR_GPIO_OK)
2927     {
2928         return error;
2929     }
2930 
2931     device->auxIo->gpio->gpioOe = gpioOutEn;
2932 
2933     /* Return */
2934     return MYKONOS_ERR_GPIO_OK;
2935 }
2936 
2937 
2938 /**
2939  * \brief Gets the Mykonos low voltage GPIO output pins direction
2940  *
2941  * This function will get the GPIO direction currently set in the device,
2942  * the direction can be either output or input. The return gpioOutEn function
2943  * parameter returns a bit per GPIO pin.  1 = output from the Mykonos Device,
2944  * 0 = input into the Mykonos device.
2945  *
2946  *
2947  * <B>Dependencies</B>
2948  * - device->spiSettings->chipSelectIndex
2949  *
2950  * \param device is a pointer to the device settings structure
2951  * \param *gpioOutEn a pointer to the data to be returned with the output enable reading
2952  *
2953  * gpioOutEn[bit]  |  GPIO[bit] direction
2954  * ----------------|-------------------
2955  *        0        |        input
2956  *        1        |        output
2957  *
2958  *
2959  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
2960  * \retval MYKONOS_ERR_GETGPIO_OE_NULL_PARM gpioOutEn function parameter is NULL
2961  */
MYKONOS_getGpioOe(mykonosDevice_t * device,uint32_t * gpioOutEn)2962 mykonosGpioErr_t MYKONOS_getGpioOe(mykonosDevice_t *device, uint32_t *gpioOutEn)
2963 {
2964     uint8_t readBytes[3] = {0};
2965 
2966 #if MYKONOS_VERBOSE == 1
2967     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioOe()\n");
2968 #endif
2969 
2970     if (gpioOutEn == NULL)
2971     {
2972         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIO_OE_NULL_PARM,
2973                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIO_OE_NULL_PARM));
2974         return MYKONOS_ERR_GETGPIO_OE_NULL_PARM;
2975     }
2976 
2977     /* Reading GPIO output enable registers */
2978     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_7_0, &readBytes[0]);
2979     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_15_8, &readBytes[1]);
2980     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_18_16, &readBytes[2]);
2981 
2982     /* Updating gpioConfig->gpioSetup->gpioOe output enable */
2983     *gpioOutEn = ((uint32_t)(readBytes[2] & 0x07) << 16) | ((uint32_t)(readBytes[1]) << 8) | (uint32_t)(readBytes[0]);
2984 
2985     /* Return */
2986     return MYKONOS_ERR_GPIO_OK;
2987 }
2988 
2989 
2990 
2991 /**
2992  * \brief Sets the Mykonos GPIO source control for different GPIO functionality
2993  *
2994  * This function will only affect the GPIO pins that have their OE direction set to output.
2995  *
2996  * <B>Dependencies</B>
2997  * - device->spiSettings->chipSelectIndex
2998  *
2999  * \param device is a pointer to the device settings structure
3000  * \param gpioSrcCtrl nibble based source control, this is a 32 bit containing
3001  * 5 nibbles that will be set the source control.
3002  *
3003  * \retval MYKONOS_ERR_GPIO_SRC_PARAM_INV If the source control parameter is invalid
3004  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3005  */
MYKONOS_setGpioSourceCtrl(mykonosDevice_t * device,uint32_t gpioSrcCtrl)3006 mykonosGpioErr_t MYKONOS_setGpioSourceCtrl(mykonosDevice_t *device, uint32_t gpioSrcCtrl)
3007 {
3008     const uint32_t GPIO_SRC_MASK = 0xFFFFF;
3009 
3010 #if MYKONOS_VERBOSE == 1
3011     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioSourceCtrl()\n");
3012 #endif
3013 
3014     /* writing GPIO configuration registers */
3015     if (gpioSrcCtrl > GPIO_SRC_MASK)
3016     {
3017         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_SRC_PARAM_INV,
3018                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_SRC_PARAM_INV));
3019         return MYKONOS_ERR_GPIO_SRC_PARAM_INV;
3020     }
3021 
3022     /* writing GPIO configuration registers */
3023     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, (gpioSrcCtrl & 0xFF));
3024     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE, ((gpioSrcCtrl >> 8) & 0xFF));
3025     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_EXTRA_BITS, ((gpioSrcCtrl >> 16) & 0x0F));
3026 
3027     /* Updating gpioConfig->gpioSetup source control */
3028     device->auxIo->gpio->gpioSrcCtrl3_0 = (mykonosGpioMode_t)(gpioSrcCtrl & 0x0F);
3029     device->auxIo->gpio->gpioSrcCtrl7_4 = (mykonosGpioMode_t)((gpioSrcCtrl >> 4) & 0x0F);
3030     device->auxIo->gpio->gpioSrcCtrl11_8 = (mykonosGpioMode_t)((gpioSrcCtrl >> 8) & 0x0F);
3031     device->auxIo->gpio->gpioSrcCtrl15_12 = (mykonosGpioMode_t)((gpioSrcCtrl >> 12) & 0x0F);
3032     device->auxIo->gpio->gpioSrcCtrl18_16 = (mykonosGpioMode_t)((gpioSrcCtrl >> 16) & 0x0F);
3033 
3034     /* Return */
3035     return MYKONOS_ERR_GPIO_OK;
3036 }
3037 
3038 /**
3039  * \brief Reads the Mykonos GPIO source control for different GPIO functionality
3040  *
3041  *
3042  * <B>Dependencies</B>
3043  * - device->spiSettings->chipSelectIndex
3044  *
3045  * \param device is a pointer to the device settings structure
3046  * \param gpioSrcCtrl nibble based source control, this is a 32 bit containing
3047  * 5 nibbles that will be set the source control.
3048  *
3049  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3050  */
MYKONOS_getGpioSourceCtrl(mykonosDevice_t * device,uint32_t * gpioSrcCtrl)3051 mykonosGpioErr_t MYKONOS_getGpioSourceCtrl(mykonosDevice_t *device, uint32_t *gpioSrcCtrl)
3052 {
3053     uint8_t readBytes[3] = {0};
3054 
3055 #if MYKONOS_VERBOSE == 1
3056     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioSourceCtrl()\n");
3057 #endif
3058 
3059     if (gpioSrcCtrl == NULL)
3060     {
3061         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM,
3062                 getGpioMykonosErrorMessage(MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM));
3063         return MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM;
3064     }
3065 
3066     /* Reading GPIO output enable registers */
3067     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, &readBytes[0]);
3068     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE, &readBytes[1]);
3069     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_EXTRA_BITS, &readBytes[2]);
3070 
3071     /* Updating gpioConfig->gpioSetup->gpioOe output enable */
3072     *gpioSrcCtrl = ((uint32_t)(readBytes[2] & 0x0F) << 16) | ((uint32_t)(readBytes[1]) << 8) | (uint32_t)(readBytes[0]);
3073 
3074     /* Return */
3075     return MYKONOS_ERR_GPIO_OK;
3076 }
3077 
3078 
3079 
3080 /**
3081  * \brief Sets the Mykonos 3.3 VDC GPIO configuration registers
3082  *
3083  *  This function sets the GPIO 3.3v pin direction (1=output, 0=input) and
3084  *  sets the mode of each nibble of GPIO 3.3v pins. See the mykonosGpio3v3Mode_t
3085  *  enum for possible modes.
3086  *
3087  * <B>Dependencies</B>
3088  * - device->spiSettings->chipSelectIndex
3089  * - device->auxIo->gpio3v3 - all members
3090  *
3091  * \param device is a pointer to the device settings structure
3092  *
3093  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3094  * \retval MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER device->auxIo->gpio3v3 pointer is NULL
3095  * \retval MYKONOS_ERR_SET_GPIO_3V3_INV_MODE gpio3v3 members have invalid enum value for the GPIO3v3 source control mode.
3096  */
MYKONOS_setupGpio3v3(mykonosDevice_t * device)3097 mykonosGpioErr_t MYKONOS_setupGpio3v3(mykonosDevice_t *device)
3098 {
3099     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
3100 
3101 #if MYKONOS_VERBOSE == 1
3102     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupGpio3v3()\n");
3103 #endif
3104 
3105     if (device->auxIo->gpio3v3 == NULL)
3106     {
3107         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER,
3108                 getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER));
3109         return MYKONOS_ERR_SET_GPIO_3V3_INV_POINTER;
3110     }
3111     else
3112     {
3113         /* write GPIO pin direction registers */
3114         if ((error = MYKONOS_setGpio3v3Oe(device, device->auxIo->gpio3v3->gpio3v3Oe)) != MYKONOS_ERR_GPIO_OK)
3115 
3116         /* write GPIO3v3 mode */
3117         if (((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 > 15) ||
3118                 ((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 > 15) ||
3119                 ((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 > 15))
3120         {
3121             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_3V3_INV_MODE,
3122                     getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_3V3_INV_MODE));
3123             return MYKONOS_ERR_SET_GPIO_3V3_INV_MODE;
3124         }
3125 
3126         CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_LSB_SRC_CTL, ((device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 << 4) | device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0));
3127         CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_MSB_SRC_CTL, (device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 & 0x0F));
3128 
3129         return error;
3130     }
3131 }
3132 
3133 /**
3134  * \brief If the GPIO3v3 pins are setup for BITBANG mode, this function sets
3135  *        the output pin levels per pin
3136  *
3137  * <B>Dependencies</B>
3138  * - device->spiSettings->chipSelectIndex
3139  * - device->auxIo->gpio3v3 - all members
3140  *
3141  * \param device is a pointer to the device settings structure
3142  * \param gpio3v3PinLevel Bit per pin to set the level of each GPIO3v3 output pin
3143  *
3144  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3145  */
MYKONOS_setGpio3v3PinLevel(mykonosDevice_t * device,uint16_t gpio3v3PinLevel)3146 mykonosGpioErr_t MYKONOS_setGpio3v3PinLevel(mykonosDevice_t *device, uint16_t gpio3v3PinLevel)
3147 {
3148 
3149 #if MYKONOS_VERBOSE == 1
3150     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpio3v3PinLevel()\n");
3151 #endif
3152 
3153     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_SRC_7_0, (gpio3v3PinLevel & 0xFF));
3154     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_SRC_15_8, ((gpio3v3PinLevel >> 8) & 0x0F));
3155 
3156     return MYKONOS_ERR_GPIO_OK;
3157 }
3158 
3159 /**
3160  * \brief Reads the Mykonos 3.3 VDC GPIO pin output levels for BITBANG mode
3161  *
3162  *  This function allows reading the value that the 3.3v GPIO output pins are
3163  *  set to drive out the pins.
3164  *
3165  * <B>Dependencies</B>
3166  * - device->spiSettings->chipSelectIndex
3167  *
3168  * \param device is a pointer to the device settings structure
3169  * \param gpio3v3SetLevel is a unit16_t pointer which contains the level of each GPIO3V3 pin (bit per pin)
3170  *
3171  *
3172  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3173  * \retval MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM gpio3v3SetLevel pointer is NULL in function parameter
3174  */
MYKONOS_getGpio3v3SetLevel(mykonosDevice_t * device,uint16_t * gpio3v3SetLevel)3175 mykonosGpioErr_t MYKONOS_getGpio3v3SetLevel(mykonosDevice_t *device, uint16_t *gpio3v3SetLevel)
3176 {
3177     uint8_t readBytes[2] = {0};
3178 
3179 #if MYKONOS_VERBOSE == 1
3180     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpio3v3SetLevel()\n");
3181 #endif
3182 
3183     if (gpio3v3SetLevel == NULL)
3184     {
3185         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM,
3186                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM));
3187         return MYKONOS_ERR_GETGPIO3V3OUT_NULL_PARM;
3188     }
3189 
3190     /* reading the registers into two-byte array */
3191     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_SRC_7_0, &readBytes[0]);
3192     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_SRC_15_8, &readBytes[1]);
3193 
3194     /* performing concatenation and assigning value to gpio3v3SpiRead */
3195     *gpio3v3SetLevel = ((uint16_t)(readBytes[1] & 0x0F) << 8) | (uint16_t)(readBytes[0]);
3196 
3197     return MYKONOS_ERR_GPIO_OK;
3198 }
3199 
3200 /**
3201  * \brief Reads the Mykonos 3.3 VDC GPIO pin levels for BITBANG mode
3202  *
3203  *  Note: this function is only capable of reading back pin levels for the
3204  *  3.3v pins set to be inputs.  Any pins set to be a GPIO output will read
3205  *  back as zero.
3206  *
3207  * <B>Dependencies</B>
3208  * - device->spiSettings->chipSelectIndex
3209  *
3210  * \param device is a pointer to the device settings structure
3211  * \param gpio3v3PinLevel is a unit16_t pointer which contains the level of each GPIO3V3 pin
3212  *                        that is defined as an input
3213  *
3214  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3215  * \retval MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM gpio3v3PinLevel pointer is NULL in function parameter
3216  */
MYKONOS_getGpio3v3PinLevel(mykonosDevice_t * device,uint16_t * gpio3v3PinLevel)3217 mykonosGpioErr_t MYKONOS_getGpio3v3PinLevel(mykonosDevice_t *device, uint16_t *gpio3v3PinLevel)
3218 {
3219     uint8_t readBytes[2] = {0};
3220 
3221 #if MYKONOS_VERBOSE == 1
3222     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpio3v3PinLevel()\n");
3223 #endif
3224 
3225     if (gpio3v3PinLevel == NULL)
3226     {
3227         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM,
3228                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM));
3229         return MYKONOS_ERR_GETGPIO3V3SPI_NULL_PARM;
3230     }
3231 
3232     /* reading the registers for input pin levels */
3233     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_READ_7_0, &readBytes[0]);
3234     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_SPI_READ_15_8, &readBytes[1]);
3235 
3236     *gpio3v3PinLevel = ((uint16_t)(readBytes[1] & 0x0F) << 8) | (uint16_t)(readBytes[0]);
3237 
3238     return MYKONOS_ERR_GPIO_OK;
3239 }
3240 
3241 /**
3242  * \brief This function sets the Pin direction control for the Mykonos 3.3 VDC GPIO.
3243  *
3244  * The bits in gpio3v3OutEn are used to configure each corresponding pin as an input or an output.
3245  * If the bit is set, the pin is configured as an output, and if it is clear the pin is configured as an input.
3246  * For example, setting gpio3v3OutEn = 0x02  will configure GPIO_3p3_2 as an output and the rest pins as inputs.
3247  *
3248  * <B>Dependencies</B>
3249  * - device->spiSettings->chipSelectIndex
3250  * - device->auxIo->gpio3v3 - all members
3251  *
3252  * \param device is a pointer to the device settings structure
3253  * \param gpio3v3OutEn Bit per pin to set the level of each GPIO3v3 output pin
3254  *
3255  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3256  */
MYKONOS_setGpio3v3Oe(mykonosDevice_t * device,uint16_t gpio3v3OutEn)3257 mykonosGpioErr_t MYKONOS_setGpio3v3Oe(mykonosDevice_t *device, uint16_t gpio3v3OutEn)
3258 {
3259 
3260 #if MYKONOS_VERBOSE == 1
3261     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpio3v3Oe()\n");
3262 #endif
3263 
3264     /* write GPIO pin direction registers */
3265     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_DIR_CTL_7_0, (gpio3v3OutEn & 0xFF));
3266     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_DIR_CTL_15_8, ((gpio3v3OutEn >> 8) & 0x0F));
3267 
3268     /* update device->auxIo->gpio3v3 structure */
3269     device->auxIo->gpio3v3->gpio3v3Oe = gpio3v3OutEn;
3270 
3271     return MYKONOS_ERR_GPIO_OK;
3272 }
3273 
3274 /**
3275  * \brief Reads the Mykonos 3.3 VDC GPIO pin direction
3276  *
3277  *
3278  * <B>Dependencies</B>
3279  * - device->spiSettings->chipSelectIndex
3280  *
3281  * \param device is a pointer to the device settings structure
3282  * \param gpio3v3OutEn is a unit16_t pointer which will contain the output enable parameter,
3283  * this will be a bit field, if a bit is set then the corresponding GPIO pin is an output,
3284  * if the bit is not set then the corresponding pin is an input
3285  *
3286  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3287  * \retval MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM gpio3v3OutEn pointer is NULL in function parameter
3288  */
MYKONOS_getGpio3v3Oe(mykonosDevice_t * device,uint16_t * gpio3v3OutEn)3289 mykonosGpioErr_t MYKONOS_getGpio3v3Oe(mykonosDevice_t *device, uint16_t *gpio3v3OutEn)
3290 {
3291     uint8_t readBytes[2] = {0};
3292 
3293 #if MYKONOS_VERBOSE == 1
3294     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpio3v3Oe()\n");
3295 #endif
3296 
3297     /* checking for null parameter */
3298     if (gpio3v3OutEn == NULL)
3299     {
3300         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM,
3301                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM));
3302         return MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM;
3303     }
3304 
3305     /* reading the registers for input pin levels */
3306     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_DIR_CTL_7_0, &readBytes[0]);
3307     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_DIR_CTL_15_8, &readBytes[1]);
3308 
3309     *gpio3v3OutEn = ((uint16_t)(readBytes[1] & 0x0F) << 8) | (uint16_t)(readBytes[0]);
3310 
3311     return MYKONOS_ERR_GPIO_OK;
3312 }
3313 
3314 
3315 /**
3316  * \brief Sets the Mykonos GPIO 3.3 VDC source control for different GPIO fucntionality
3317  *
3318  * This function will only affect the GPIO pins that have their OE direction set to output.
3319  *
3320  * <B>Dependencies</B>
3321  * - device->spiSettings->chipSelectIndex
3322  *
3323  * \param device is a pointer to the device settings structure
3324  * \param gpio3v3SrcCtrl nibble based source control, this is a 12 bit containing
3325  * 3 nibbles that will be set the source control.
3326  *
3327  * \retval MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL gpio3v3 members have invalid value for the GPIO3v3 source control mode.
3328  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3329  */
MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t * device,uint16_t gpio3v3SrcCtrl)3330 mykonosGpioErr_t MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t gpio3v3SrcCtrl)
3331 {
3332     const uint16_t GPIO_SRC_MASK = 0x0FFF;
3333 
3334 #if MYKONOS_VERBOSE == 1
3335     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpio3v3SourceCtrl()\n");
3336 #endif
3337 
3338     /* writing GPIO configuration registers */
3339     if (gpio3v3SrcCtrl > GPIO_SRC_MASK)
3340     {
3341         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL,
3342                 getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL));
3343         return MYKONOS_ERR_SET_GPIO_3V3_INV_SRC_CTRL;
3344     }
3345 
3346     /* writing GPIO configuration registers */
3347     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_LSB_SRC_CTL, (gpio3v3SrcCtrl & 0xFF));
3348     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_MSB_SRC_CTL, ((gpio3v3SrcCtrl >> 8) & 0xFF));
3349 
3350     /* Updating gpioConfig->gpioSetup source control */
3351     device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 = (mykonosGpio3v3Mode_t)(gpio3v3SrcCtrl & 0x0F);
3352     device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 = (mykonosGpio3v3Mode_t)(gpio3v3SrcCtrl & 0xF0);
3353     device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 = (mykonosGpio3v3Mode_t)((gpio3v3SrcCtrl >> 8) & 0x0F);
3354 
3355     /* Return */
3356     return MYKONOS_ERR_GPIO_OK;
3357 }
3358 
3359 /**
3360  * \brief Reads the Mykonos 3v3 GPIO source control for different GPIO functionality
3361  *
3362  *
3363  * <B>Dependencies</B>
3364  * - device->spiSettings->chipSelectIndex
3365  *
3366  * \param device is a pointer to the device settings structure
3367  * \param gpio3v3SrcCtrl nibble based source control, this is a 12 bit containing
3368  * 3 nibbles that will be set the source control.
3369  *
3370  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3371  */
MYKONOS_getGpio3v3SourceCtrl(mykonosDevice_t * device,uint16_t * gpio3v3SrcCtrl)3372 mykonosGpioErr_t MYKONOS_getGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t *gpio3v3SrcCtrl)
3373 {
3374     uint8_t readBytes[2] = {0};
3375 
3376 #if MYKONOS_VERBOSE == 1
3377     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpio3v3SourceCtrl()\n");
3378 #endif
3379 
3380     /* checking for null parameter */
3381     if (gpio3v3SrcCtrl == NULL)
3382     {
3383        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM,
3384                getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM));
3385        return MYKONOS_ERR_GPIO3V3OUTEN_NULL_PARM;
3386     }
3387 
3388     /* Reading GPIO output enable registers */
3389     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_LSB_SRC_CTL, &readBytes[0]);
3390     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_MSB_SRC_CTL, &readBytes[1]);
3391 
3392     /* Updating gpioConfig->gpioSetup->gpioOe output enable */
3393     *gpio3v3SrcCtrl = ((uint16_t)(readBytes[1] & 0xFF) << 8) | ((uint16_t)(readBytes[0]));
3394 
3395     /* Return */
3396     return MYKONOS_ERR_GPIO_OK;
3397 }
3398 
3399 
3400 /**
3401  * \brief Gain compensation enable and setup function.
3402  *
3403  * The gain compensation block is a function that compensates for the attenuation in the internal attenuator for the Rx channels.
3404  *
3405  * <B>Dependencies</B>
3406  * - device->spiSettings->chipSelectIndex
3407  *
3408  * \param device is a pointer to the device settings structure
3409  * \param gainComp which is a mykonosGainComp_t structure.
3410  * \param enable this parameter enables or disables the gain compensation block.
3411  * enable = 1
3412  * disable = 0
3413  *
3414  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3415  * \retval MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT gain compensation structure gainComp is not initialised
3416  * \retval MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET gain compensation structure gainComp->rx1Offset is invalid
3417  * \retval MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET gain compensation structure gainComp->rx2Offset is invalid
3418  * \retval MYKONOS_ERR_GAINCOMP_INV_STEP gain compensation structure gainComp->compStep is invalid
3419  * \retval MYKONOS_ERR_GAINCOMP_INV_EN enable is not valid
3420  */
MYKONOS_setRxGainCompensation(mykonosDevice_t * device,mykonosGainComp_t * gainComp,uint8_t enable)3421 mykonosGpioErr_t MYKONOS_setRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t enable)
3422 {
3423     uint8_t regWr2 = 0x00;
3424     uint8_t regWr3 = 0x00;
3425     uint8_t regWr4 = 0x00;
3426 
3427     /* Max parameter values for error checking */
3428     const uint8_t RXOFFSET_RANGE = 0x1F;
3429     const uint8_t STEP_RANGE = 0x07;
3430 
3431 #if MYKONOS_VERBOSE == 1
3432     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRxGainCompensation()\n");
3433 #endif
3434 
3435     /* Check for gainComp initialised */
3436     if (gainComp == NULL)
3437     {
3438         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT,
3439                 getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT));
3440         return MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT;
3441     }
3442 
3443     /* Check for enable */
3444     if (enable > 1)
3445     {
3446       CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_INV_EN,
3447                          getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_INV_EN));
3448       return MYKONOS_ERR_GAINCOMP_INV_EN;
3449     }
3450     else if (enable == 1)
3451     {
3452         /* Check for gain compensation Rx1 offset range */
3453         if (gainComp->rx1Offset > RXOFFSET_RANGE)
3454         {
3455             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET,
3456                                getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET));
3457                 return MYKONOS_ERR_GAINCOMP_INV_RX1_OFFSET;
3458         }
3459 
3460         /* Check for gain compensation Rx2 offset range */
3461         if (gainComp->rx2Offset > RXOFFSET_RANGE)
3462         {
3463             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET,
3464                               getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET));
3465             return MYKONOS_ERR_GAINCOMP_INV_RX2_OFFSET;
3466         }
3467 
3468         /* Check for gain compensation step range */
3469         if (gainComp->compStep > STEP_RANGE)
3470         {
3471             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_INV_STEP,
3472                     getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_INV_STEP));
3473             return MYKONOS_ERR_GAINCOMP_INV_STEP;
3474         }
3475 
3476         /* Enabling gain compensation block */
3477         regWr4 = 0x88 | gainComp->compStep;
3478         regWr3 = gainComp->rx2Offset;
3479         regWr2 = gainComp->rx1Offset;
3480     }
3481 
3482     /* Write gain compensation setup to device */
3483     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_RX1_GAIN_COMP_OFFSET, regWr2);
3484     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_RX2_GAIN_COMP_OFFSET, regWr3);
3485     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_RX_GAIN_COMP_CFG, regWr4);
3486 
3487     /* Return */
3488     return MYKONOS_ERR_GPIO_OK;
3489 }
3490 
3491 /**
3492  * \brief Get gain compensation setup and enabled function.
3493  *
3494  * The gain compensation block is a function that compensates for the attenuation in the internal attenuator for the Rx channels.
3495  * This function will get the current setup and the enable state of the block.
3496  *
3497  * <B>Dependencies</B>
3498  * - device->spiSettings->chipSelectIndex
3499  *
3500  * \param device is a pointer to the device settings structure
3501  * \param gainComp pointer to a mykonosGainComp_t structure, will held the current device gain compensation settings.
3502  * \param enabled pointer this parameter will contain the enable state of the gain compensation block.
3503  * enabled = 1
3504  * disabled = 0
3505  *
3506  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3507  * \retval MYKONOS_ERR_GAINCOMP_NULL_STRUCT gain compensation structure gainComp is not initialised
3508  * \retval MYKONOS_ERR_GAINCOMP_EN_NULL_PARM enable is null pointer for the passed parameter
3509  */
MYKONOS_getRxGainCompensation(mykonosDevice_t * device,mykonosGainComp_t * gainComp,uint8_t * enabled)3510 mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t *enabled)
3511 {
3512     uint8_t regWr2 = 0x00;
3513     uint8_t regWr3 = 0x00;
3514     uint8_t regWr4 = 0x00;
3515 
3516     /* Mask parameter values populating mykonosGainComp_t structure */
3517     const uint8_t ENABLED_MASK = 0x80;
3518     const uint8_t STEP_MASK = 0x07;
3519 
3520     /* Shift values for writing gain values */
3521     const uint8_t ENABLED_SHIFT = 0x07;
3522 
3523 #if MYKONOS_VERBOSE == 1
3524     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRxGainCompensation()\n");
3525 #endif
3526 
3527     /* Check for gainComp for Null */
3528     if (gainComp == NULL)
3529     {
3530         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_NULL_STRUCT,
3531                 getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_NULL_STRUCT));
3532         return MYKONOS_ERR_GAINCOMP_NULL_STRUCT;
3533     }
3534 
3535     if (enabled == NULL)
3536     {
3537         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_EN_NULL_PARM,
3538                 getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_EN_NULL_PARM));
3539         return MYKONOS_ERR_GAINCOMP_EN_NULL_PARM;
3540     }
3541 
3542     /* Read gain compensation setup from device */
3543     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX1_GAIN_COMP_OFFSET, &regWr2);
3544     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX2_GAIN_COMP_OFFSET, &regWr3);
3545     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX_GAIN_COMP_CFG, &regWr4);
3546 
3547 
3548     /* Parsing read data to passed by reference parameters */
3549     *enabled = (regWr4 & ENABLED_MASK) >> ENABLED_SHIFT;
3550     gainComp->compStep = (regWr4 & STEP_MASK);
3551     gainComp->rx2Offset = regWr3;
3552     gainComp->rx1Offset = regWr2;
3553 
3554     /* Return */
3555     return MYKONOS_ERR_GPIO_OK;
3556 }
3557 
3558 
3559 /**
3560  * \brief Gain compensation enable and setup function for the observation channel.
3561  *
3562  * The gain compensation block is a function that compensates for the attenuation in the internal attenuator for the observation channels.
3563  *
3564  * <B>Dependencies</B>
3565  * - device->spiSettings->chipSelectIndex
3566  *
3567  * \param device is a pointer to the device settings structure
3568  * \param gainComp is a pointer to the mykonosObsRxGainComp_t structure.
3569  * \param enable enables or disables the gain compensation block.
3570  * enable = 1
3571  * disable = 0
3572  *
3573  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT gain compensation structure gainComp is not initialised
3574  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET gain compensation structure gainComp->obsRxOffset is invalid
3575  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP gain compensation structure gainComp->compStep is invalid
3576  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN enable is not valid
3577  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3578  */
MYKONOS_setObsRxGainCompensation(mykonosDevice_t * device,mykonosObsRxGainComp_t * gainComp,uint8_t enable)3579 mykonosGpioErr_t MYKONOS_setObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t enable)
3580 {
3581     uint8_t regWr2 = 0x00;
3582     uint8_t regWr3 = 0x00;
3583 
3584     /* Max parameter values for error checking */
3585     const uint8_t RXOFFSET_RANGE = 0x1F;
3586 
3587     /* Shift values for writing gain values */
3588     const uint8_t STEP_RANGE = 0x07;
3589 
3590 #if MYKONOS_VERBOSE == 1
3591     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setObsRxGainCompensation()\n");
3592 #endif
3593 
3594     /* Check for gainComp initialised */
3595     if (gainComp == NULL)
3596     {
3597         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT,
3598                 getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT));
3599         return MYKONOS_ERR_OBS_RX_GAINCOMP_SET_NULL_STRUCT;
3600     }
3601 
3602     /* Check for enable */
3603     if (enable > 1)
3604     {
3605       CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN,
3606                          getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN));
3607       return MYKONOS_ERR_OBS_RX_GAINCOMP_INV_EN;
3608     }
3609     else if (enable == 1)
3610     {
3611         /* Check for gain compensation offset range */
3612         if (gainComp->obsRxOffset > RXOFFSET_RANGE)
3613         {
3614             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET,
3615                                getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET));
3616                 return MYKONOS_ERR_OBS_RX_GAINCOMP_INV_OFFSET;
3617         }
3618 
3619         /* Check for gain compensation step range */
3620         if (gainComp->compStep > STEP_RANGE)
3621         {
3622             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP,
3623                     getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP));
3624             return MYKONOS_ERR_OBS_RX_GAINCOMP_INV_STEP;
3625         }
3626 
3627         /* Enabling gain compensation block */
3628         regWr3 = 0x88 | gainComp->compStep;
3629         regWr2 = ((gainComp->obsRxOffset & 0x1E) >> 1) | ((gainComp->obsRxOffset & 0x01) << 4);
3630     }
3631 
3632     /* Write gain compensation setup to device */
3633     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_OFFSET, regWr2);
3634     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_CFG, regWr3);
3635 
3636     /* Return */
3637     return MYKONOS_ERR_GPIO_OK;
3638 }
3639 
3640 /**
3641  * \brief Get gain compensation setup and enabled function for the observation channel.
3642  *
3643  * The gain compensation block is a function that compensates for the attenuation in the internal attenuator for the observation
3644  * channels.
3645  * This function will get the current setup and the enable state of the block.
3646  *
3647  * <B>Dependencies</B>
3648  * - device->spiSettings->chipSelectIndex
3649  *
3650  * \param device is a pointer to the device settings structure
3651  * \param gainComp pointer to a mykonosObsRxGainComp_t structure, will held the current device gain compensation settings.
3652  * \param enabled pointer this parameter will contain the enable state of the gain compensation block.
3653  * enabled = 1
3654  * disabled = 0
3655  *
3656  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3657  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT observation channel gain compensation structure gainComp is not initialised
3658  * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM enabled is null pointer for the parameter passed
3659  */
MYKONOS_getObsRxGainCompensation(mykonosDevice_t * device,mykonosObsRxGainComp_t * gainComp,uint8_t * enabled)3660 mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t *enabled)
3661 {
3662     uint8_t regRd2 = 0x00;
3663     uint8_t regRd3 = 0x00;
3664 
3665     /* Masks values for populating mykonosObsRxGainComp_t structure */
3666     const uint8_t ENABLED_MASK = 0x80;
3667     const uint8_t STEP_MASK = 0x07;
3668 
3669     /* Shift values for populating mykonosObsRxGainComp_t structure */
3670     const uint8_t ENABLED_SHIFT = 0x07;
3671 
3672 #if MYKONOS_VERBOSE == 1
3673     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getObsRxGainCompensation()\n");
3674 #endif
3675 
3676     /* Check for gainComp for Null */
3677     if (gainComp == NULL)
3678     {
3679         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT,
3680                 getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT));
3681         return MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT;
3682     }
3683 
3684     if (enabled == NULL)
3685     {
3686         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM,
3687                 getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM));
3688         return MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM;
3689     }
3690 
3691     /* Read gain compensation setup from device */
3692     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_OFFSET, &regRd2);
3693     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_CFG, &regRd3);
3694 
3695 
3696     /* Parsing read data to passed by reference parameters */
3697     *enabled = (regRd3 & ENABLED_MASK) >> ENABLED_SHIFT;
3698     gainComp->compStep = (regRd3 & STEP_MASK);
3699     gainComp->obsRxOffset = ((regRd2 & 0x0F) << 1) | ((regRd2 & 0x10) >> 4);
3700 
3701     /* Return */
3702     return MYKONOS_ERR_GPIO_OK;
3703 }
3704 
3705 /**
3706  * \brief Slicer control over GPIO inputs.
3707  *
3708  * The user can control the slicer position via 3 GPIO inputs per channel.
3709  * There are various configurations for the GPIO pins, this configurations are enumerated in the mykonosRxSlicer_t.
3710  *
3711  *
3712  * <B>Dependencies</B>
3713  * - device->spiSettings->chipSelectIndex
3714  * - Gain compensation block has to be enabled in order to user the slicer control
3715  *
3716  * \param device is a pointer to the device settings structure
3717  * \param slicerStep configures the step size of the slicer when external pin contol mode is enabled.
3718  * Slicer gain in this mode is determined by multiplying the step size by the input bit code from the BBP.
3719  * Step sizes are as follows:
3720  * sllicerStep  |  step
3721  * -------------|------------
3722  *       0      |   1
3723  *       1      |   2
3724  *       2      |   3
3725  *       3      |   4
3726  *
3727  * \param rx1Pins Rx1 slicer inputs can take values from one of the following combinations that are specified in mykonosRxSlicer_t enum:
3728  * -GPIO_2, GPIO_1, and GPIO_0
3729  * -GPIO_7, GPIO_6, and GPIO_5
3730  * -GPIO_10, GPIO_9, and GPIO_8
3731  * \param rx2Pins Rx2 slicer inputs can take values from one of the following combinations that are specified in mykonosRxSlicer_t enum:
3732  * -GPIO_7, GPIO_6, and GPIO_5
3733  * -GPIO_13, GPIO_12, and GPIO_11
3734  * \param enable this parameter enables the external pin control mode so the BBP can control the slicer setting.
3735  * enable = 1
3736  * disable = 0
3737  *
3738  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3739  * \retval MYKONOS_ERR_SLICER_INV_RX1_SEL invalid RX1 GPIO pin selection for Slicer control
3740  * \retval MYKONOS_ERR_SLICER_INV_RX2_SEL invalid RX2 GPIO pin selection for Slicer control
3741  * \retval MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE slicer step is out of range
3742  * \retval MYKONOS_ERR_SLICER_EN_INV invalid enable
3743  */
MYKONOS_setRxSlicerCtrl(mykonosDevice_t * device,uint8_t slicerStep,mykonosRxSlicer_t rx1Pins,mykonosRxSlicer_t rx2Pins,uint8_t enable)3744 mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosRxSlicer_t rx1Pins, mykonosRxSlicer_t rx2Pins, uint8_t enable)
3745 {
3746     uint8_t regWr = 0x00;
3747 
3748     const uint8_t STEP_MASK = 0x03;
3749     const uint8_t STEP_SHIFT = 0x05;
3750 
3751 #if MYKONOS_VERBOSE == 1
3752     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRxSlicerCtrl()\n");
3753 #endif
3754 
3755     if (enable > 1)
3756     {
3757         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_EN_INV,
3758                              getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_EN_INV));
3759         return MYKONOS_ERR_SLICER_EN_INV;
3760     }
3761     else if (enable == 1)
3762     {
3763         /* Enabling Slicer input control */
3764         regWr = 0x80;
3765 
3766         /* Check for Rx1 Slicer input control */
3767         switch (rx1Pins)
3768         {
3769             case GPIO_0_1_2:
3770                 regWr |= 0x00;
3771                 break;
3772             case GPIO_5_6_7:
3773                 regWr |= 0x01;
3774                 break;
3775             case GPIO_8_9_10:
3776                 regWr |= 0x02;
3777                 break;
3778             default:
3779                 CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_INV_RX1_SEL,
3780                                getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_INV_RX1_SEL));
3781                 return MYKONOS_ERR_SLICER_INV_RX1_SEL;
3782         }
3783 
3784         /* Check for Rx2 Slicer input control */
3785         switch (rx2Pins)
3786         {
3787             case GPIO_11_12_13:
3788                regWr |= 0x00;
3789                break;
3790            case GPIO_5_6_7:
3791                regWr |= 0x04;
3792                break;
3793            default:
3794                CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_INV_RX2_SEL,
3795                               getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_INV_RX2_SEL));
3796                return MYKONOS_ERR_SLICER_INV_RX2_SEL;
3797         }
3798 
3799         /* Check for Slicer input step size control */
3800         if (slicerStep > STEP_MASK)
3801         {
3802             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE,
3803                     getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE));
3804             return MYKONOS_ERR_SLICER_STEP_OUT_OF_RANGE;
3805         }
3806         else
3807         {
3808             regWr |= (uint8_t)(slicerStep << STEP_SHIFT);
3809         }
3810     }
3811 
3812     /* Write to device the slicer configuration */
3813     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_RX_SLCR_PIN_CFG, regWr);
3814 
3815     return MYKONOS_ERR_GPIO_OK;
3816 }
3817 
3818 /**
3819  * \brief This function will get the programmed Slicer control for Rx1 and Rx2 channels.
3820  *
3821  * The user can control the slicer position via 3 GPIO inputs per channel.
3822  * There are various configurations for the GPIO pins, this configurations are enumerated in the mykonosRxSlicer_t.
3823  *
3824  *
3825  * <B>Dependencies</B>
3826  * - device->spiSettings->chipSelectIndex
3827  *
3828  * \param device is a pointer to the device settings structure
3829  * \param slicerStep will contain the configured step size
3830  * \param rx1Pins will contain the configured GPIO combination for Rx1
3831  * \param rx2Pins will contain the configured GPIO combination for Rx2
3832  * \param enable will contain the programmed enable setting
3833  *
3834  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3835  * \retval MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM rx1Pins is null pointer for the passed parameter
3836  * \retval MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM rx1Pins is null pointer for the passed parameter
3837  * \retval MYKONOS_ERR_SLICER_STEP_NULL_PARM slicerStep is null pointer for the passed parameter
3838  * \retval MYKONOS_ERR_SLICER_EN_NULL_PARM enable is null pointer for the passed parameter
3839  */
MYKONOS_getRxSlicerCtrl(mykonosDevice_t * device,uint8_t * slicerStep,mykonosRxSlicer_t * rx1Pins,mykonosRxSlicer_t * rx2Pins,uint8_t * enable)3840 mykonosGpioErr_t MYKONOS_getRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosRxSlicer_t *rx1Pins, mykonosRxSlicer_t *rx2Pins, uint8_t *enable)
3841 {
3842     uint8_t regRd = 0x00;
3843 
3844     /* Mask parameter values populating parameters */
3845     const uint8_t EN_MASK = 0x80;
3846     const uint8_t STEP_MASK = 0x60;
3847     const uint8_t RX1_MASK = 0x03;
3848     const uint8_t RX2_MASK = 0x0C;
3849 
3850     /* Shift values for populating passed parameters */
3851     const uint8_t EN_SHIFT = 0x07;
3852     const uint8_t STEP_SHIFT = 0x05;
3853     const uint8_t RX1_SHIFT = 0x00;
3854     const uint8_t RX2_SHIFT = 0x02;
3855 
3856 #if MYKONOS_VERBOSE == 1
3857     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRxSlicerCtrl()\n");
3858 #endif
3859 
3860     /* Check for Rx1 Slicer input control null parameter */
3861     if (rx1Pins == NULL)
3862     {
3863         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM,
3864                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM));
3865         return MYKONOS_ERR_SLICER_RX1PIN_NULL_PARM;
3866     }
3867 
3868     /* Check for Rx2 Slicer input control null parameter */
3869     if (rx2Pins == NULL)
3870     {
3871         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM,
3872                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM));
3873         return MYKONOS_ERR_SLICER_RX2PIN_NULL_PARM;
3874     }
3875 
3876     /* Check for Slicer step control null parameter */
3877     if (slicerStep == NULL)
3878     {
3879         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_STEP_NULL_PARM,
3880                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_STEP_NULL_PARM));
3881         return MYKONOS_ERR_SLICER_STEP_NULL_PARM;
3882     }
3883 
3884     /* Check for Slicer step control null parameter */
3885     if (enable == NULL)
3886     {
3887         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_EN_NULL_PARM,
3888                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_EN_NULL_PARM));
3889         return MYKONOS_ERR_SLICER_EN_NULL_PARM;
3890     }
3891 
3892     /* Reading SLicer control register */
3893     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX_SLCR_PIN_CFG, &regRd);
3894 
3895     /* Parsing values */
3896     *enable = (regRd & EN_MASK) >> EN_SHIFT;
3897     *slicerStep = (regRd & STEP_MASK) >> STEP_SHIFT;
3898 
3899     /* Map to enum */
3900     switch ((regRd & RX2_MASK) >> RX2_SHIFT)
3901     {
3902         case 0:
3903             *rx2Pins = GPIO_11_12_13;
3904             break;
3905         case 1:
3906             *rx2Pins = GPIO_5_6_7;
3907             break;
3908 
3909         default:
3910             *rx2Pins = GPIO_11_12_13;
3911             break;
3912     }
3913 
3914     *rx1Pins = (mykonosRxSlicer_t)((regRd & RX1_MASK) >> RX1_SHIFT);
3915 
3916     /* Return */
3917     return MYKONOS_ERR_GPIO_OK;
3918 }
3919 
3920 /**
3921  * \brief Slicer control over GPIO inputs for the observation channel.
3922  *
3923  * The user can control the slicer position via 3 GPIO inputs for the observation channel.
3924  * There are various configurations for the GPIO pins, this configurations are enumerated in the mykonosObsRxSlicer_t.
3925  *
3926  *
3927  * <B>Dependencies</B>
3928  * - device->spiSettings->chipSelectIndex
3929  * - Gain compensation block has to be enabled in order to user the slicer control
3930  *
3931  * \param device is a pointer to the device settings structure
3932  * \param slicerStep configures the step size of the slicer when external pin contol mode is enabled.
3933  * Slicer gain in this mode is determined by multiplying the step size by the input bit code from the BBP.
3934  * Step sizes are as follows:
3935  * sllicerStep  |  step
3936  * -------------|------------
3937  *       0      |   1
3938  *       1      |   2
3939  *       2      |   3
3940  *       3      |   4
3941  *
3942  * \param obsRxPins observation slicer inputs can take values from one of the following combinations that are specified in mykonosObsRxSlicer_t enum:
3943  * -GPIO_18, GPIO_17 and GPIO_16
3944  * -GPIO_16, GPIO_15 and GPIO_14
3945  * \param enable enables the external pin control mode so the BBP can control the slicer setting.
3946  * enable = 1
3947  * disable = 0
3948  *
3949  * \retval MYKONOS_ERR_SLICER_INV_OBS_RX_SEL invalid observation channel GPIO pin selection for Slicer control
3950  * \retval MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE slicer step is out of range
3951  * \retval MYKONOS_ERR_SLICER_OBS_RX_EN_INV invalid enable
3952  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
3953  */
MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t * device,uint8_t slicerStep,mykonosObsRxSlicer_t obsRxPins,uint8_t enable)3954 mykonosGpioErr_t MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicerStep, mykonosObsRxSlicer_t obsRxPins, uint8_t enable)
3955 {
3956     uint8_t regWr = 0x00;
3957 
3958     const uint8_t STEP_MASK = 0x03;
3959     const uint8_t STEP_SHIFT = 0x05;
3960 
3961 #if MYKONOS_VERBOSE == 1
3962     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setObsRxSlicerCtrl()\n");
3963 #endif
3964 
3965     if (enable > 1)
3966     {
3967         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_OBS_RX_EN_INV,
3968                              getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_OBS_RX_EN_INV));
3969         return MYKONOS_ERR_SLICER_OBS_RX_EN_INV;
3970     }
3971     else if (enable == 1)
3972     {
3973         /* Enabling Slicer input control */
3974         regWr = 0x80;
3975 
3976         /* Check for Rx1 Slicer input control */
3977         switch (obsRxPins)
3978         {
3979             case GPIO_18_17_16:
3980                 regWr |= 0x00;
3981                 break;
3982             case GPIO_16_15_14:
3983                 regWr |= 0x01;
3984                 break;
3985 
3986             default:
3987                 CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_INV_OBS_RX_SEL,
3988                                getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_INV_OBS_RX_SEL));
3989                 return MYKONOS_ERR_SLICER_INV_OBS_RX_SEL;
3990         }
3991 
3992         /* Check for Slicer input step size control */
3993         if (slicerStep & ~STEP_MASK)
3994         {
3995             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE,
3996                     getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE));
3997             return MYKONOS_ERR_SLICER_OBS_RX_STEP_OUT_OF_RANGE;
3998         }
3999         else
4000         {
4001             regWr |= (uint8_t)((slicerStep << STEP_SHIFT));
4002         }
4003     }
4004 
4005     /* Write to device the slicer configuration */
4006     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_SLCR_PIN_CFG, regWr);
4007 
4008     return MYKONOS_ERR_GPIO_OK;
4009 }
4010 
4011 /**
4012  * \brief This function will get the programmed Slicer control for observation channel.
4013  *
4014  * <B>Dependencies</B>
4015  * - device->spiSettings->chipSelectIndex
4016  *
4017  * \param device is a pointer to the device settings structure
4018  * \param slicerStep will contain the configured step size
4019  * \param obsRxPins will contain the configured GPIO combination
4020  * \param enable will contain the programmed enable setting
4021  *
4022  * \retval MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM obsRxPins is null pointer for the passed parameter
4023  * \retval MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM slicerStep is null pointer for the passed parameter
4024  * \retval MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM, enable is null pointer for the passed parameter
4025  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4026  */
MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t * device,uint8_t * slicerStep,mykonosObsRxSlicer_t * obsRxPins,uint8_t * enable)4027 mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slicerStep, mykonosObsRxSlicer_t *obsRxPins, uint8_t *enable)
4028 {
4029     uint8_t regRd = 0x00;
4030 
4031     /* Mask parameter values populating slicer parameters */
4032     const uint8_t EN_MASK = 0x80;
4033     const uint8_t STEP_MASK = 0x60;
4034     const uint8_t OBS_RX_MASK = 0x03;
4035 
4036     /* Shift values for writing slicer parameters */
4037     const uint8_t EN_SHIFT = 0x07;
4038     const uint8_t STEP_SHIFT = 0x05;
4039 
4040 #if MYKONOS_VERBOSE == 1
4041     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getObsRxSlicerCtrl()\n");
4042 #endif
4043 
4044     /* Check for Rx1 Slicer input control null parameter */
4045     if (obsRxPins == NULL)
4046     {
4047         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM,
4048                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM));
4049         return MYKONOS_ERR_SLICER_OBS_RXPIN_NULL_PARM;
4050     }
4051 
4052     /* Check for Slicer step control null parameter */
4053     if (slicerStep == NULL)
4054     {
4055         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM,
4056                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM));
4057         return MYKONOS_ERR_SLICER_OBS_RX_STEP_NULL_PARM;
4058     }
4059 
4060     /* Check for Slicer step control null parameter */
4061     if (enable == NULL)
4062     {
4063         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM,
4064                 getGpioMykonosErrorMessage(MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM));
4065         return MYKONOS_ERR_SLICER_OBS_RX_EN_NULL_PARM;
4066     }
4067 
4068     /* Reading Slicer control register */
4069     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_SLCR_PIN_CFG, &regRd);
4070 
4071     /* Parsing values */
4072     *enable = (regRd & EN_MASK) >> EN_SHIFT;
4073     *slicerStep = (regRd & STEP_MASK) >> STEP_SHIFT;
4074 
4075     /* Map to enum */
4076     switch (regRd & OBS_RX_MASK)
4077     {
4078         case 0:
4079             *obsRxPins = GPIO_18_17_16;
4080             break;
4081         case 1:
4082             *obsRxPins = GPIO_16_15_14;
4083             break;
4084 
4085         default:
4086             *obsRxPins = (mykonosObsRxSlicer_t)0;
4087             break;
4088     }
4089 
4090     /* Return */
4091     return MYKONOS_ERR_GPIO_OK;
4092 }
4093 
4094 
4095 /**
4096  * \brief Floating point formatter enable and setup function.
4097  *
4098  * The floating point formatter block is a function that works in conjunction with the gain
4099  * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
4100  * which increases the bitwidth in the digital datapath.
4101  *
4102  * <B>Dependencies</B>
4103  * - device->spiSettings->chipSelectIndex
4104  * - Gain compensation block has to be enabled in order to user floating point formatter
4105  *
4106  * \param device is a pointer to the device settings structure
4107  * \param floatFrmt which is a mykonosFloatPntFrmt_t structure.
4108  *
4109  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4110  * \retval MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT floating point formatter structure floatFrmt not initialized
4111  * \retval MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE floating point formatter structure floatFrmt.roundMode not valid parameter
4112  * \retval MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT floating point formatter structure floatFrmt.dataFormat not valid parameter
4113  * \retval MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN floating point formatter structure floatFrmt.encNan not valid parameter
4114  * \retval MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS floating point formatter structure floatFrmt.expBits not valid parameter
4115  * \retval MYKONOS_ERR_FLOATFRMT_INV_LEADING floating point formatter structure floatFrmt.leading not valid parameter
4116  */
MYKONOS_setFloatPointFrmt(mykonosDevice_t * device,mykonosFloatPntFrmt_t * floatFrmt)4117 mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt)
4118 {
4119     uint8_t regWr1 = 0x00;
4120 
4121     /* Max parameter values for error checking */
4122     const uint8_t ROUND_RANGE = 0x04;
4123     const uint8_t DATA_FRMT_RANGE = 0x01;
4124     const uint8_t ENCODE_RANGE = 0x01;
4125     const uint8_t EXPBITS_RANGE = 0x03;
4126     const uint8_t LEADING_RANGE = 0x01;
4127 
4128     /* Shift values for writing mykonosFloatPntFrmt_t values */
4129     const uint8_t ROUND_SHIFT = 0x05;
4130     const uint8_t DATA_FRMT_SHIFT = 0x04;
4131     const uint8_t ENCODE_SHIFT = 0x03;
4132     const uint8_t EXPBITS_SHIFT = 0x01;
4133     const uint8_t LEADING_SHIFT = 0x00;
4134 
4135 #if MYKONOS_VERBOSE == 1
4136     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setFloatPointFrmt()\n");
4137 #endif
4138 
4139     /* Check for gainComp initialised */
4140     if (floatFrmt == NULL)
4141     {
4142         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT,
4143                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT));
4144         return MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT;
4145     }
4146 
4147     /* Check for floating point round mode */
4148     if (floatFrmt->roundMode > ROUND_RANGE)
4149     {
4150         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE,
4151                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE));
4152         return MYKONOS_ERR_FLOATFRMT_INV_ROUND_MODE;
4153     }
4154 
4155     /* Check for floating point data format */
4156     if (floatFrmt->dataFormat > DATA_FRMT_RANGE)
4157     {
4158         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT,
4159                            getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT));
4160             return MYKONOS_ERR_FLOATFRMT_INV_DATA_FORMAT;
4161     }
4162 
4163     /* Check for floating point encode NaN */
4164     if (floatFrmt->encNan > ENCODE_RANGE)
4165     {
4166         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN,
4167                           getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN));
4168         return MYKONOS_ERR_FLOATFRMT_INV_ENC_NAN;
4169     }
4170 
4171     /* Check for floating point exponent bits range */
4172     if (floatFrmt->expBits > EXPBITS_RANGE)
4173     {
4174         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS,
4175                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS));
4176         return MYKONOS_ERR_FLOATFRMT_INV_EXP_BITS;
4177     }
4178 
4179     /* Check for floating point hide leading ones */
4180     if (floatFrmt->leading > LEADING_RANGE)
4181     {
4182         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_LEADING,
4183                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_LEADING));
4184         return MYKONOS_ERR_FLOATFRMT_INV_LEADING;
4185     }
4186 
4187     regWr1 = (uint8_t)((floatFrmt->roundMode << ROUND_SHIFT) | (floatFrmt->dataFormat << DATA_FRMT_SHIFT) |
4188              (floatFrmt->encNan << ENCODE_SHIFT) | (floatFrmt->expBits << EXPBITS_SHIFT) |
4189              (floatFrmt->leading << LEADING_SHIFT));
4190 
4191 
4192     /* Write gain compensation setup to device */
4193     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_CFG, regWr1);
4194 
4195     /* Return */
4196     return MYKONOS_ERR_GPIO_OK;
4197 }
4198 
4199 /**
4200  * \brief Floating point formatter setup function.
4201  *
4202  * The floating point formatter block is a function that works in conjunction with the gain
4203  * compensating block, as the gain compensation requires increased dynamic range
4204  * which increases the bit-width in the digital data-path.
4205  *
4206  * <B>Dependencies</B>
4207  * - device->spiSettings->chipSelectIndex
4208  * - Gain compensation block has to be enabled in order to user floating point formatter
4209  *
4210  * \param device is a pointer to the device settings structure
4211  * \param floatFrmt which is a mykonosFloatPntFrmt_t structure.
4212  *
4213  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4214  * \retval MYKONOS_ERR_FLOATFRMT_NULL_STRUCT floating point formatter structure floatFrmt not initialized
4215  *
4216  */
MYKONOS_getFloatPointFrmt(mykonosDevice_t * device,mykonosFloatPntFrmt_t * floatFrmt)4217 mykonosGpioErr_t MYKONOS_getFloatPointFrmt (mykonosDevice_t *device, mykonosFloatPntFrmt_t *floatFrmt)
4218 {
4219     uint8_t regRd1 = 0x00;
4220 
4221     /* Mask parameter values populating mykonosGainComp_t structure */
4222     const uint8_t ROUND_MASK = 0xE0;
4223     const uint8_t DATA_FRMT_MASK = 0x10;
4224     const uint8_t ENCODE_MASK = 0x08;
4225     const uint8_t EXPBITS_MASK = 0x06;
4226     const uint8_t LEADING_MASK = 0x01;
4227 
4228     /* Shift values for writing gain values */
4229     const uint8_t ROUND_SHIFT = 0x05;
4230     const uint8_t DATA_FRMT_SHIFT = 0x04;
4231     const uint8_t ENCODE_SHIFT = 0x03;
4232     const uint8_t EXPBITS_SHIFT = 0x01;
4233 
4234 #if MYKONOS_VERBOSE == 1
4235     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getFloatPointFrmt()\n");
4236 #endif
4237 
4238     /* Check floatFrmt for Null */
4239     if (floatFrmt == NULL)
4240     {
4241         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_STRUCT,
4242                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_STRUCT));
4243         return MYKONOS_ERR_FLOATFRMT_NULL_STRUCT;
4244     }
4245 
4246     /* Read gain compensation setup from device */
4247     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_CFG, &regRd1);
4248 
4249     /* Parsing read data to passed by reference parameters */
4250     floatFrmt->roundMode = (regRd1 & ROUND_MASK) >> ROUND_SHIFT;
4251     floatFrmt->dataFormat = (regRd1 & DATA_FRMT_MASK) >> DATA_FRMT_SHIFT;
4252     floatFrmt->encNan = (regRd1 & ENCODE_MASK) >> ENCODE_SHIFT;
4253     floatFrmt->expBits = (regRd1 & EXPBITS_MASK) >> EXPBITS_SHIFT;
4254     floatFrmt->leading = regRd1 & LEADING_MASK;
4255 
4256     /* Return */
4257     return MYKONOS_ERR_GPIO_OK;
4258 }
4259 
4260 /**
4261  * \brief Floating point formatter enable/disable Rx1 and Rx2 function.
4262  *
4263  * The floating point formatter block is a function that works in conjunction with the gain
4264  * compensating block, as the gain compensation requires increased dynamic range
4265  * which increases the bit-width in the digital data-path.
4266  *
4267  * <B>Dependencies</B>
4268  * - device->spiSettings->chipSelectIndex
4269  * - Gain compensation block has to be enabled in order to user floating point formatter
4270  *
4271  * \param device is a pointer to the device settings structure
4272  * \param rx1Att this parameter sets the integer data attenuation for the Rx1 channel in 6dB steps
4273  * to enable the entire data range to be represented in the selected floating point format.
4274  * \param rx2Att this parameter sets the integer data attenuation for the Rx2 channel in 6dB steps
4275  * to enable the entire data range to be represented in the selected floating point format.
4276  * \param enable this parameter enables or disables the gain compensation block.
4277  * enable = 1
4278  * disable = 0
4279  *
4280  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4281  * \retval MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT not valid rx1 attenuation parameter passed in MYKONOS_setRxEnFloatPntFrmt()
4282  * \retval MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT not valid rx2 attenuation parameter passed in MYKONOS_setRxEnFloatPntFrmt()
4283  * \retval MYKONOS_ERR_FLOATFRMT_SET_INV_EN not valid enable parameter passed in MYKONOS_setRxEnFloatPntFrmt()
4284  */
MYKONOS_setRxEnFloatPntFrmt(mykonosDevice_t * device,uint8_t rx1Att,uint8_t rx2Att,uint8_t enable)4285 mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t rx1Att, uint8_t rx2Att, uint8_t enable)
4286 {
4287     uint8_t regWr = 0x00;
4288 
4289     const uint8_t RXATT_RANGE = 0x07;
4290     const uint8_t RX1ATT_SHIFT = 0x01;
4291     const uint8_t RX2ATT_SHIFT = 0x05;
4292 
4293 #if MYKONOS_VERBOSE == 1
4294     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRxEnFloatPntFrmt()\n");
4295 #endif
4296 
4297     if (enable > 1)
4298     {
4299        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_SET_INV_EN,
4300                           getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_SET_INV_EN));
4301        return MYKONOS_ERR_FLOATFRMT_SET_INV_EN;
4302     }
4303     else if (enable == 1)
4304     {
4305         /* Check for rx1Att range */
4306         if (rx1Att > RXATT_RANGE)
4307         {
4308             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT,
4309                     getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT));
4310             return MYKONOS_ERR_FLOATFRMT_SET_INV_RX1ATT;
4311         }
4312 
4313         /* Check for rx2Att range */
4314         if (rx2Att > RXATT_RANGE)
4315         {
4316            CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT,
4317                    getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT));
4318            return MYKONOS_ERR_FLOATFRMT_SET_INV_RX2ATT;
4319         }
4320 
4321         /* Enabling floating point formatter for Rx1 and Rx2 */
4322         regWr = 0x11;
4323         regWr |= (uint8_t)((rx1Att << RX1ATT_SHIFT) | (rx2Att << RX2ATT_SHIFT));
4324     }
4325 
4326     /* Writing floating point formatter enables for Rx1 and Rx2 */
4327     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_RX_CTRL, regWr);
4328 
4329     /* Return */
4330     return MYKONOS_ERR_GPIO_OK;
4331 }
4332 
4333 /**
4334  * \brief Floating point formatter setup function.
4335  *
4336  * The floating point formatter block is a function that works in conjunction with the gain
4337  * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
4338  * which increases the bitwidth in the digital datapath.
4339  *
4340  * <B>Dependencies</B>
4341  * - device->spiSettings->chipSelectIndex
4342  *
4343  * \param device is a pointer to the device settings structure
4344  * \param rx1Att this parameter sets the integer data attenuation for the Rx1 channel in 6dB steps
4345  * to enable the entire data range to be represented in the selected floating point format.
4346  * \param rx2Att this parameter sets the integer data attenuation for the Rx2 channel in 6dB steps
4347  * to enable the entire data range to be represented in the selected floating point format.
4348  * \param enable this parameter enables or disables the gain compensation block.
4349  * enable = 1
4350  * disable = 0
4351  *
4352  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4353  * \retval MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT null pointer passed for rx1 attenuation in MYKONOS_setRxEnFloatPntFrmt()
4354  * \retval MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT null pointer passed for rx2 attenuation in MYKONOS_setRxEnFloatPntFrmt()
4355  * \retval MYKONOS_ERR_FLOATFRMT_NULL_ENABLE null pointer passed for enable in MYKONOS_setRxEnFloatPntFrmt()
4356  */
MYKONOS_getRxEnFloatPntFrmt(mykonosDevice_t * device,uint8_t * rx1Att,uint8_t * rx2Att,uint8_t * enable)4357 mykonosGpioErr_t MYKONOS_getRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *rx1Att, uint8_t *rx2Att, uint8_t *enable)
4358 {
4359     uint8_t regRd = 0x00;
4360 
4361     const uint8_t EN_MASK = 0x11;
4362     const uint8_t RX1ATT_MASK = 0x0E;
4363     const uint8_t RX1ATT_SHIFT = 0x01;
4364     const uint8_t RX2ATT_MASK = 0xE0;
4365     const uint8_t RX2ATT_SHIFT = 0x05;
4366 
4367 #if MYKONOS_VERBOSE == 1
4368     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getRxEnFloatPntFrmt()\n");
4369 #endif
4370 
4371     /* Check for rx1Att NULL parameter */
4372     if (rx1Att == NULL)
4373     {
4374         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT,
4375                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT));
4376         return MYKONOS_ERR_FLOATFRMT_NULL_RX1ATT;
4377     }
4378 
4379     /* Check for rx2Att NULL parameter */
4380     if (rx2Att == NULL)
4381     {
4382        CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT,
4383                getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT));
4384        return MYKONOS_ERR_FLOATFRMT_NULL_RX2ATT;
4385     }
4386 
4387     /* Check for enable NULL parameter */
4388     if (enable == NULL)
4389     {
4390       CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_ENABLE,
4391               getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_ENABLE));
4392       return MYKONOS_ERR_FLOATFRMT_NULL_ENABLE;
4393     }
4394 
4395     /* Read Rx1 and Rx2 floating point enables */
4396     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_RX_CTRL, &regRd);
4397 
4398     *rx1Att = (regRd & RX1ATT_MASK) >> RX1ATT_SHIFT;
4399     *rx2Att = (regRd & RX2ATT_MASK) >> RX2ATT_SHIFT ;
4400     *enable = (regRd & EN_MASK) ? 1 : 0;
4401 
4402     /* Return */
4403     return MYKONOS_ERR_GPIO_OK;
4404 }
4405 
4406 
4407 
4408 /**
4409  * \brief Floating point formatter enable function for ORx channel.
4410  *
4411  * The floating point formatter block is a function that works in conjunction with the gain
4412  * compensating block, as the gain compensation requires increased dynamic range
4413  * which increases the bit-width in the digital data-path.
4414  *
4415  * <B>Dependencies</B>
4416  * - device->spiSettings->chipSelectIndex
4417  *
4418  * \param device is a pointer to the device settings structure
4419  * \param orxAtt this parameter sets the integer data attenuation for the ORx channel in 6dB steps
4420  * to enable the entire data range to be represented in the selected floating point format.
4421  * * \param enable this parameter enables or disables the gain compensation block.
4422  * enable = 1
4423  * disable = 0
4424  *
4425  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4426  * \retval MYKONOS_ERR_FLOATFRMT_INV_ORXATT not valid Orx attenuation parameter passed in MYKONOS_setOrxEnFloatPntFrmt()
4427  * \retval MYKONOS_ERR_FLOATFRMT_INV_ORXEN not valid enable parameter passed in MYKONOS_setOrxEnFloatPntFrmt()
4428  */
MYKONOS_setOrxEnFloatPntFrmt(mykonosDevice_t * device,uint8_t orxAtt,uint8_t enable)4429 mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t orxAtt, uint8_t enable)
4430 {
4431     uint8_t regWr = 0x00;
4432 
4433     const uint8_t ORXATT_RANGE = 0x07;
4434     const uint8_t ORXATT_SHIFT = 0x01;
4435 
4436 #if MYKONOS_VERBOSE == 1
4437     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setOrxEnFloatPntFrmt()\n");
4438 #endif
4439 
4440     /* Check for enable */
4441     if (enable > 1)
4442     {
4443         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_ORXEN,
4444                           getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_ORXEN));
4445         return MYKONOS_ERR_FLOATFRMT_INV_ORXEN;
4446     }
4447     else if (enable == 1)
4448     {
4449         /* Check for rx1Att range */
4450         if (orxAtt > ORXATT_RANGE)
4451         {
4452            CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_INV_ORXATT,
4453                    getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_INV_ORXATT));
4454            return MYKONOS_ERR_FLOATFRMT_INV_ORXATT;
4455         }
4456 
4457         /* Enabling floating point formatter for Rx1 and Rx2 */
4458         regWr = 0x01;
4459         regWr |= (uint8_t)(orxAtt << ORXATT_SHIFT);
4460     }
4461 
4462     /* Writing floating point formatter enable for ORX channel */
4463     CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_ORX_CTRL, regWr);
4464 
4465     /* Return */
4466     return MYKONOS_ERR_GPIO_OK;
4467 }
4468 
4469 
4470 /**
4471  * \brief Floating point formatter enable and setup function.
4472  *
4473  * The floating point formatter block is a function that works in conjunction with the gain
4474  * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
4475  * which increases the bitwidth in the digital datapath.
4476  *
4477  * <B>Dependencies</B>
4478  * - device->spiSettings->chipSelectIndex
4479  *
4480  * \param device is a pointer to the device settings structure
4481  * \param orxAtt this parameter sets the integer data attenuation for the ORx channel in 6dB steps
4482  * to enable the entire data range to be represented in the selected floating point format.
4483  * \param enable this parameter enables or disables the gain compensation block.
4484  * enable = 1
4485  * disable = 0
4486  *
4487  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4488  * \retval MYKONOS_ERR_FLOATFRMT_NULL_ORXATT null pointer passed for orxAtt
4489  * \retval MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE null pointer passed for enable
4490  */
MYKONOS_getOrxEnFloatPntFrmt(mykonosDevice_t * device,uint8_t * orxAtt,uint8_t * enable)4491 mykonosGpioErr_t MYKONOS_getOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t *orxAtt, uint8_t *enable)
4492 {
4493     uint8_t regRd = 0x00;
4494 
4495     const uint8_t EN_MASK = 0x01;
4496     const uint8_t ORXATT_MASK = 0x0E;
4497     const uint8_t ORXATT_SHIFT = 0x01;
4498 
4499 #if MYKONOS_VERBOSE == 1
4500     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getOrxEnFloatPntFrmt()\n");
4501 #endif
4502 
4503     /* Check for orxAtt NULL parameter */
4504     if (orxAtt == NULL)
4505     {
4506         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_ORXATT,
4507                 getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_ORXATT));
4508         return MYKONOS_ERR_FLOATFRMT_NULL_ORXATT;
4509     }
4510 
4511     /* Check for enable NULL parameter */
4512     if (enable == NULL)
4513     {
4514       CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE,
4515               getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE));
4516       return MYKONOS_ERR_FLOATFRMT_NULL_ORXENABLE;
4517     }
4518 
4519     /* Read Rx1 and Rx2 floating point enables */
4520     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_FLOATING_POINT_ORX_CTRL, &regRd);
4521 
4522     *orxAtt = (regRd  & ORXATT_MASK) >> ORXATT_SHIFT;
4523     *enable = (regRd & EN_MASK) ? 1 : 0;
4524 
4525     /* Return */
4526     return MYKONOS_ERR_GPIO_OK;
4527 }
4528 
4529 
4530 /**
4531  * \brief Sets up the Temperature Sensor
4532  *
4533  *  Before using this function to set up the temp sensor,
4534  *  make sure that you call the MYKONOS_setupAuxADC() function
4535  *  to ensure that the AuxADC clock is setup and running correctly at 40 MHz,
4536  *  and that the structure mykonosTempSensorConfig_t tempSensor is populated.
4537  *
4538  * <B>Dependencies</B>
4539  * - device->spiSettings->chipSelectIndex
4540  *
4541  * \param device is a pointer to the device settings structure
4542  * \param tempSensor is a pointer to the mykonosTempSensorConfig_t which holds
4543  * the configuration settings for the temperature sensor
4544  *
4545  * \retval MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM Function parameter tempSensor is a NULL pointer
4546  * \retval MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION tempDecimation value out of range (0-7)
4547  * \retval MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET offset value out of range (0-255)
4548  * \retval MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW tempWindow out of range (0-15)
4549  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4550  */
MYKONOS_setupTempSensor(mykonosDevice_t * device,mykonosTempSensorConfig_t * tempSensor)4551 mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor)
4552 {
4553     uint8_t offsetFromDevice = 0;
4554 
4555     const uint8_t OFFSET_API = 0x43;
4556 /*    const uint8_t TEMP_OFFSET_MASK = 0xFF;*/
4557     const uint8_t TEMP_WINDOW_MASK = 0xF0;
4558     const uint8_t TEMP_WINDOW_CHECK = 0x0F;
4559     const uint8_t TEMP_DEC_MASK = 0x07;
4560     const uint8_t OFFSET_OVERRIDE_MASK = 0x10;
4561 
4562 #ifdef MYKONOS_VERBOSE
4563     CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupTempSensor()\n");
4564 #endif
4565 
4566     /* Check for structure initialisation mykonosTempSensorConfig_t */
4567     if (tempSensor == NULL)
4568     {
4569         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM,
4570                 getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM));
4571         return MYKONOS_ERR_SETUPTEMPSENSOR_NULL_PARAM;
4572     }
4573 
4574     /* Check Temperature sensor decimation range */
4575     if ((tempSensor->tempDecimation & ~TEMP_DEC_MASK) > 0)
4576     {
4577         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION,
4578                 getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION));
4579         return MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPDECIMATION;
4580     }
4581 
4582     /* Override fused offset */
4583     if (tempSensor->overrideFusedOffset > 0)
4584     {
4585         /* Check Temperature sensor offset range */
4586 /*        if (tempSensor->offset & ~TEMP_OFFSET_MASK)
4587         {
4588             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET,
4589                     getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET));
4590             return MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET;
4591         }*/
4592 
4593         CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, 1, OFFSET_OVERRIDE_MASK, 4);
4594         CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_OFFSET, tempSensor->offset);
4595     }
4596     else
4597     {
4598         /* If manual override was not requested, read back device offset value.
4599          * If factory fused it is non-zero; else API adds a typical offset value */
4600         CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_OFFSET, &(offsetFromDevice));
4601         if (offsetFromDevice == 0)
4602         {
4603             CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_OFFSET, OFFSET_API);
4604         }
4605     }
4606 
4607     /* Check Temperature sensor window range */
4608     if ((tempSensor->tempWindow & ~TEMP_WINDOW_CHECK) > 0)
4609     {
4610         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW,
4611                 getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW));
4612         return MYKONOS_ERR_SETUPTEMPSENSOR_INV_TEMPWINDOW;
4613     }
4614     else
4615     {
4616         CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB, tempSensor->tempWindow, TEMP_WINDOW_MASK, 4);
4617     }
4618 
4619     /* Single shot setup */
4620     CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_MSB, 0x00);
4621 
4622     /* Write decimation factor for the Temperature sensor */
4623     CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, tempSensor->tempDecimation, TEMP_DEC_MASK, 0);
4624 
4625     return MYKONOS_ERR_GPIO_OK;
4626 }
4627 
4628 /**
4629  * \brief Reads from the Temperature Sensor registers and populates device data structure
4630  *
4631  *  After this function is executed, the tempSensor parameter holds updated values
4632  *  from the device registers.
4633  *
4634  * <B>Dependencies</B>
4635  * - device->spiSettings->chipSelectIndex
4636  *
4637  * \param device is a pointer to the device settings structure
4638  * \param tempSensor is a pointer to the mykonosTempSensorConfig_t which holds
4639  * the configuration settings for the tempSensor
4640  *
4641  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4642  * \retval MYKONOS_ERR_GETTEMPSENSORCONFIG_NULL_PARAM Function parameter tempSensor is a NULL pointer
4643  */
MYKONOS_getTempSensorConfig(mykonosDevice_t * device,mykonosTempSensorConfig_t * tempSensor)4644 mykonosGpioErr_t MYKONOS_getTempSensorConfig(mykonosDevice_t *device, mykonosTempSensorConfig_t *tempSensor)
4645 {
4646     uint8_t tempConfig = 0;
4647 
4648     const uint8_t TEMP_WINDOW_MASK = 0xF0;
4649     const uint8_t TEMP_FUSE_MASK = 0x10;
4650     const uint8_t TEMP_DECIMATION_MASK = 0x07;
4651     const uint8_t TEMP_FUSE_SHIFT = 0x04;
4652 
4653 #ifdef MYKONOS_VERBOSE
4654     CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getTempSensorConfig()\n");
4655 #endif
4656 
4657     /* Check tempSensor null parameter passed */
4658     if (tempSensor == NULL)
4659     {
4660         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM,
4661                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM));
4662         return MYKONOS_ERR_GETTEMPSENSORCFG_NULL_PARAM;
4663     }
4664 
4665     /* Read back factory offset, if fused; else manual offset value */
4666     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_OFFSET, &(tempSensor->offset));
4667 
4668     /* Read back Decimation and override Offset Temperature sensor parameters */
4669     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, &tempConfig);
4670     tempSensor->overrideFusedOffset = (tempConfig & TEMP_FUSE_MASK) >> TEMP_FUSE_SHIFT;
4671     tempSensor->tempDecimation = (tempConfig & TEMP_DECIMATION_MASK);
4672 
4673     /* Read back tempWindow */
4674     CMB_SPIReadField(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB, &tempConfig, TEMP_WINDOW_MASK, 4);
4675     tempSensor->tempWindow = tempConfig;
4676 
4677     return MYKONOS_ERR_GPIO_OK;
4678 }
4679 
4680 /**
4681  * \brief Initiates temperature measurement
4682  *
4683  * This function will initiate the Temperature sensor measurement.
4684  *
4685  * \pre
4686  * MYKONOS_setupTempSensor() function to set the temperature sensor.
4687  * MYKONOS_setAuxAdcChannel() function with the AuxADC setting for Temperature sensor channel MYK_TEMPSENSOR
4688  * from the enum type mykonosAuxAdcChannels_t.
4689  *
4690  * \post
4691  * Internal temperature sensor will perform measurement and updated register values,
4692  * read back using MYKONOS_readTempSensor() function.
4693  *
4694  * <B>Dependencies</B>
4695  * - device->spiSettings->chipSelectIndex
4696  *
4697  * \param device is a pointer to the device settings structure
4698  *
4699  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4700  */
MYKONOS_startTempMeasurement(mykonosDevice_t * device)4701 mykonosGpioErr_t MYKONOS_startTempMeasurement(mykonosDevice_t *device)
4702 {
4703     const uint8_t TEMP_LOCK_MASK = 0x80;
4704     const uint8_t TEMP_LOCK_BIT = 0x01;
4705     const uint8_t MEASUREMENT_MASK = 0x01;
4706 
4707 #ifdef MYKONOS_VERBOSE
4708     CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_startTempMeasurement()\n");
4709 #endif
4710 
4711     /* Write the lock bit to ensure that a valid measurement is achieved */
4712     CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, TEMP_LOCK_BIT, TEMP_LOCK_MASK, 7);
4713 
4714     /* Initiate Temperature measurement */
4715     CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB, 1, MEASUREMENT_MASK, 0);
4716     CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB, 0, MEASUREMENT_MASK, 0);
4717 
4718     return MYKONOS_ERR_GPIO_OK;
4719 }
4720 
4721 /**
4722  * \brief Reads temperature code and statuses from the Temperature Sensor registers
4723  *
4724  *  This function reads the temperature sensor's statuses and temperature code.
4725  *  Allow at least one computation period to elapse.
4726  *  The temperature sensor computation period is as 6 times the AuxADC conversion time.
4727  *  AuxADC conversion time = (1/40Mhz) * (256 * 2^(tempDecimation))
4728  *
4729  *  Before using this function to read back the temperature, make sure that temperature sensor
4730  *  is setup using the MYKONOS_setupTempSensor() function.
4731  *
4732  * \pre Before using this function to read back the sensor value:
4733  *  MYKONOS_setupTempSensor() function is needed in order to set up the Temperature sensor.
4734  *  MYKONOS_setAuxAdcChannel() function has to be called in order to set the proper AuxADC
4735  *  channel. AuxADC channel MYK_TEMPSENSOR is used for the Temperature sensor.
4736  *  MYKONOS_startTempMeasurement() this function will start the Temperature sensor, this
4737  *  function is needed to be called for every reading that needs to be performed.
4738  *
4739  * \post "tempStatus" structure will contain the status information and the temperature
4740  *  code.
4741  *  If a valid measurement is achieved then tempStatus->tempValid will be set and
4742  *  tempStatus->tempCode will contain the actual reading.
4743  *
4744  * <B>Dependencies</B>
4745  * - device->spiSettings->chipSelectIndex
4746  *
4747  * \param device is a pointer to the device settings structure
4748  * \param tempStatus is a pointer to the mykonosTempSensorStatus_t structure which will be updated
4749  * with the temp sensor readings
4750  *
4751  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4752  * \retval MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM Function parameter tempSensor is a NULL pointer
4753  * \retval MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED temperature sensor reading is not locked
4754  */
MYKONOS_readTempSensor(mykonosDevice_t * device,mykonosTempSensorStatus_t * tempStatus)4755 mykonosGpioErr_t MYKONOS_readTempSensor(mykonosDevice_t *device, mykonosTempSensorStatus_t *tempStatus)
4756 {
4757     int16_t temperature = 0;
4758     uint8_t statusWord = 0;
4759     uint8_t rgRd = 0x00;
4760 
4761     const uint8_t CODE_TO_DEGREE_CELSIUS = 0x67;
4762     const uint8_t TEMP_VALID_MASK = 0x02;
4763     const uint8_t WINDOW_EXCEED_MASK = 0x08;
4764     const uint8_t WINDOW_HI_LO_MASK = 0x04;
4765     const uint8_t TEMP_LOCK = 0x80;
4766 
4767 #ifdef MYKONOS_VERBOSE
4768     CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_readTempSensor()\n");
4769 #endif
4770 
4771     if (tempStatus == NULL)
4772     {
4773         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM,
4774                 getGpioMykonosErrorMessage(MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM));
4775         return MYKONOS_ERR_READTEMPSENSOR_NULL_PARAM;
4776     }
4777 
4778     /* Check for temperature sensor value lock */
4779     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, &rgRd);
4780     if ((rgRd & TEMP_LOCK) == TEMP_LOCK)
4781     {
4782         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED,
4783                         getGpioMykonosErrorMessage(MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED));
4784         return MYKONOS_ERR_READTEMPSENSOR_NOT_LOCKED;
4785     }
4786 
4787     /* Perform temperature status reading */
4788     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONTROL_LSB, &statusWord);
4789     tempStatus->windowExceeded = (statusWord & WINDOW_EXCEED_MASK) >> 3;
4790     tempStatus->windowHiLo = (statusWord & WINDOW_HI_LO_MASK) >> 2;
4791     tempStatus->tempValid = (0x01 & ~((statusWord & TEMP_VALID_MASK) >> 1));
4792 
4793     /* Perform temperature reading */
4794     CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_READ, &rgRd);
4795     temperature = rgRd - CODE_TO_DEGREE_CELSIUS;
4796     tempStatus->tempCode = temperature;
4797 
4798     return MYKONOS_ERR_GPIO_OK;
4799 }
4800 
4801 /**
4802  * \brief This function sets the drive strength for the required GPIOs.
4803  *
4804  * This function will set the required drive strength, the settings for GPIO drive strength are normal drive and double drive.
4805  *
4806  * GPIO pins that can be assigned independent drive strength are:
4807  * -MYKGPIO0 to MYKGPIO7 and MYKGPIO18
4808  *
4809  * The rest of GPIOs are paired as:
4810  * -MYKGPIO17 and MYKGPIO16
4811  * -MYKGPIO8 and MYKGPIO15
4812  * -MYKGPIO14 and MYKGPIO13
4813  * -MYKGPIO10 and MYKGPIO9
4814  * -MYKGPIO12 and MYKGPIO11
4815  *
4816  * This means that if it is required to double the drive strength for MYKGPIO17 then the drive strength will also be doubled for MYKGPIO16.
4817  *
4818  * If the particular bitfield for gpioDrv is set then the drive strength will be doubled. Note that multiple GPIOs can be set at a time.
4819  *
4820  * <B>Dependencies</B>
4821  * - device->spiSettings->chipSelectIndex
4822  *
4823  * \param device is a pointer to the device settings structure
4824  * \param gpioDrv GPIO drive strength setup, valid range is from 0x00000 to 0x7FFFF.
4825  *
4826  * \retval MYKONOS_ERR_GPIO_DRV_INV_PARAM GPIO out of range- valid GPIOs are in the range 0x00000 to 0x7FFFF.
4827  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4828  */
MYKONOS_setGpioDrv(mykonosDevice_t * device,uint32_t gpioDrv)4829 mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, uint32_t gpioDrv)
4830 {
4831     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
4832     uint8_t reg0 = 0x00;
4833     uint8_t reg1 = 0x00;
4834 
4835     const uint32_t GPIO_MASK = 0x7FFFF;
4836 
4837 #if MYKONOS_VERBOSE == 1
4838     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioDrv()\n");
4839 #endif
4840 
4841     /* Error checking for correct number of GPIOs. */
4842     if (gpioDrv > GPIO_MASK )
4843     {
4844         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_DRV_INV_PARAM,
4845                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_DRV_INV_PARAM));
4846         return MYKONOS_ERR_GPIO_DRV_INV_PARAM;
4847     }
4848 
4849     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_DRV_CTL_0, &reg0);
4850     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_DRV_CTL_1, &reg1);
4851 
4852     reg1 = reg1 & 0xC0;
4853 
4854     if (gpioDrv & 0xFF)
4855     {
4856         reg0 = (uint8_t)(gpioDrv & 0xFF);
4857     }
4858     else
4859     {
4860         reg0 = 0x00;
4861     }
4862 
4863     if (gpioDrv & (uint32_t)MYKGPIO18)
4864     {
4865         reg1 |= 0x01;
4866     }
4867 
4868     if ((gpioDrv & (uint32_t)MYKGPIO17) || (gpioDrv & (uint32_t)MYKGPIO16))
4869     {
4870         reg1 |= 0x02;
4871     }
4872 
4873     if ((gpioDrv & (uint32_t)MYKGPIO15) || (gpioDrv & (uint32_t)MYKGPIO8))
4874     {
4875         reg1 |= 0x04;
4876     }
4877 
4878     if ((gpioDrv & (uint32_t)MYKGPIO14) || (gpioDrv & (uint32_t)MYKGPIO13))
4879     {
4880         reg1 |= 0x08;
4881     }
4882 
4883     if ((gpioDrv & (uint32_t)MYKGPIO10) || (gpioDrv & (uint32_t)MYKGPIO9))
4884     {
4885         reg1 |= 0x10;
4886     }
4887 
4888     if ((gpioDrv & (uint32_t)MYKGPIO12) || (gpioDrv & (uint32_t)MYKGPIO11))
4889     {
4890         reg1 |= 0x20;
4891     }
4892 
4893     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_DRV_CTL_0, reg0);
4894     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_DRV_CTL_1, reg1);
4895 
4896     return error;
4897 }
4898 
4899 
4900 /**
4901  * \brief This function gets the GPIOs drive strength.
4902  *
4903  * This function will get the programmed drive strength for all the GPIOs
4904  *
4905  * <B>Dependencies</B>
4906  * - device->spiSettings->chipSelectIndex
4907  *
4908  * \param device is a pointer to the device settings structure.
4909  * \param gpioDrv will contain the current GPIOs drive strength setting.
4910  *
4911  * \retval MYKONOS_ERR_GETGPIODRV_NULL_PARAM null parameter passed to the function.
4912  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
4913  */
MYKONOS_getGpioDrv(mykonosDevice_t * device,uint32_t * gpioDrv)4914 mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, uint32_t *gpioDrv)
4915 {
4916     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
4917     uint8_t reg0 = 0x00;
4918     uint8_t reg1 = 0x00;
4919     uint32_t gpioDrvRd = 0x00;
4920 
4921 #if MYKONOS_VERBOSE == 1
4922     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioDrv()\n");
4923 #endif
4924 
4925     /* Error checking for correct number of GPIOs. */
4926     if (gpioDrv == NULL )
4927     {
4928         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GETGPIODRV_NULL_PARAM,
4929                 getGpioMykonosErrorMessage(MYKONOS_ERR_GETGPIODRV_NULL_PARAM));
4930         return MYKONOS_ERR_GETGPIODRV_NULL_PARAM;
4931     }
4932 
4933     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_DRV_CTL_0, &reg0);
4934     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_DRV_CTL_1, &reg1);
4935 
4936     gpioDrvRd = (uint32_t)reg0 & 0xFF;
4937 
4938     if (reg1 & 0x01)
4939     {
4940         gpioDrvRd |= (uint32_t)MYKGPIO18;
4941     }
4942 
4943     if (reg1 & 0x02)
4944     {
4945         gpioDrvRd |= (uint32_t)MYKGPIO17 | (uint32_t)MYKGPIO16;
4946     }
4947 
4948     if (reg1 & 0x04)
4949     {
4950         gpioDrvRd |= (uint32_t)MYKGPIO8 | (uint32_t)MYKGPIO15;
4951     }
4952 
4953     if (reg1 & 0x08)
4954     {
4955         gpioDrvRd |= (uint32_t)MYKGPIO14 | (uint32_t)MYKGPIO13;
4956     }
4957 
4958     if (reg1 & 0x10)
4959     {
4960         gpioDrvRd |= (uint32_t)MYKGPIO10 | (uint32_t)MYKGPIO9;
4961     }
4962 
4963     if (reg1 & 0x20)
4964     {
4965         gpioDrvRd |= (uint32_t)MYKGPIO12 | (uint32_t)MYKGPIO11;
4966     }
4967 
4968     *gpioDrv = (mykonosGpioSelect_t)gpioDrvRd;
4969 
4970     return error;
4971 }
4972 
4973 /**
4974  * \brief This function sets the slew rate for the required GPIOs.
4975  *
4976  * This function will set the required slew rate, the settings for GPIO slew rate are given by the enumeration type mykonosGpioSlewRate_t.
4977  *
4978  * GPIO pins that can be assigned independent slew rate are:
4979  * -MYKGPIO0 to MYKGPIO7 and MYKGPIO18
4980  *
4981  * The rest of GPIOs are paired as:
4982  * -MYKGPIO17 and MYKGPIO16
4983  * -MYKGPIO8 and MYKGPIO15
4984  * -MYKGPIO14 and MYKGPIO13
4985  * -MYKGPIO10 and MYKGPIO9
4986  * -MYKGPIO12 and MYKGPIO11
4987  *
4988  * This means that if it is required to set the slew rate for MYKGPIO17 then the same slew rate will be applied for MYKGPIO16.
4989  *
4990  * If the particular bitfield for gpioSelect is set then slewRate will be set for that GPIO. Note that multiple GPIOs can be set at a time.
4991  *
4992  * <B>Dependencies</B>
4993  * - device->spiSettings->chipSelectIndex
4994  *
4995  * \param device is a pointer to the device settings structure
4996  * \param gpioSelect GPIO for which the slew rate will be changed, valid range 0x00000 to 0x7FFFF.
4997  * \param slewRate slew rate setting, valid slew rate settings are given by the enumeration type mykonosGpioSlewRate_t
4998  *
4999  * \retval MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM GPIO out of range- valid GPIOs are in the range 0x00000 to 0x7FFFF.
5000  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
5001  */
MYKONOS_setGpioSlewRate(mykonosDevice_t * device,mykonosGpioSelect_t gpioSelect,mykonosGpioSlewRate_t slewRate)5002 mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t slewRate)
5003 {
5004     mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
5005     uint8_t reg0 = 0x00;
5006     uint8_t reg1 = 0x00;
5007     uint8_t reg2 = 0x00;
5008     uint8_t reg3 = 0x00;
5009 
5010     const uint32_t GPIO_MASK = 0x7FFFF;
5011     const uint8_t SLEWRATE_MASK = 0x03;
5012     const uint32_t SHIFT4NIBLE = 0x06;
5013     const uint32_t SHIFT3NIBLE = 0x04;
5014     const uint32_t SHIFT2NIBLE = 0x02;
5015 
5016 #if MYKONOS_VERBOSE == 1
5017     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioSlewRate()\n");
5018 #endif
5019 
5020     /* Error checking for correct number of GPIOs. */
5021     if (((uint32_t)gpioSelect > GPIO_MASK) || ((uint8_t)slewRate > SLEWRATE_MASK))
5022     {
5023         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
5024                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM));
5025         return MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM;
5026     }
5027 
5028     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_0, &reg0);
5029     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_1, &reg1);
5030     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_2, &reg2);
5031     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, &reg3);
5032 
5033     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO18)
5034     {
5035         reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
5036     }
5037     if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO17) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO16))
5038     {
5039         reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
5040     }
5041     if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO15) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO8))
5042     {
5043         reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
5044     }
5045     if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO14) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO13))
5046     {
5047         reg0 = (reg0 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
5048     }
5049     if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO11) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO12))
5050     {
5051         reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
5052     }
5053     if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO9) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO10))
5054     {
5055         reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
5056     }
5057     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO7)
5058     {
5059         reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
5060     }
5061     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO6)
5062     {
5063         reg1 = (reg1 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
5064     }
5065     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO5)
5066     {
5067         reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
5068     }
5069     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO4)
5070     {
5071         reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
5072     }
5073     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO3)
5074     {
5075         reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
5076     }
5077     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO2)
5078     {
5079         reg2 = (reg2 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
5080     }
5081     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO1)
5082     {
5083         reg3 = (reg3 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
5084     }
5085     if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO0)
5086     {
5087         reg3 = (reg3 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
5088     }
5089 
5090     /* Prepare registers */
5091     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_SLEW_CTL_0, reg0);
5092     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_SLEW_CTL_1, reg1);
5093     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_SLEW_CTL_2, reg2);
5094     CMB_SPIWriteByte (device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, reg3);
5095 
5096     return error;
5097 }
5098 
5099 
5100 /**
5101  * \brief This function gets the GPIO slew rate setting.
5102  *
5103  * This function will get the programmed slew rate for the GPIO given by slewRateGpio.
5104  *
5105  * <B>Dependencies</B>
5106  * - device->spiSettings->chipSelectIndex
5107  *
5108  * \param device is a pointer to the device settings structure.
5109  * \param gpioSelect GPIO selection for getting the slew rate setting.
5110  * \param slewRate will contain the GPIO slew rate setting.
5111  *
5112  * \retval MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM null parameter passed to the function.
5113  * \retval MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM GPIO out of range- valid GPIOs are in the range 0x00000 to 0x7FFFF.
5114  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
5115  */
MYKONOS_getGpioSlewRate(mykonosDevice_t * device,mykonosGpioSelect_t gpioSelect,mykonosGpioSlewRate_t * slewRate)5116 mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t *slewRate)
5117 {
5118     uint8_t reg0 = 0x00;
5119     uint8_t reg1 = 0x00;
5120     uint8_t reg2 = 0x00;
5121     uint8_t reg3 = 0x00;
5122     mykonosGpioSlewRate_t slewSetting = MYK_SLEWRATE_NONE;
5123 
5124     const uint32_t SLEWRATE_MASK = 0x03;
5125     const uint32_t SHIFT4NIBLE = 0x06;
5126     const uint32_t SHIFT3NIBLE = 0x04;
5127     const uint32_t SHIFT2NIBLE = 0x02;
5128 
5129 #if MYKONOS_VERBOSE == 1
5130     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioSlewRate()\n");
5131 #endif
5132 
5133     /* Error checking for NULL parameter. */
5134     if (slewRate == NULL)
5135     {
5136         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM,
5137                 getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM));
5138         return MYKONOS_ERR_GPIO_GETSLEW_NULL_PARAM;
5139     }
5140 
5141     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_0, &reg0);
5142     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_1, &reg1);
5143     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_2, &reg2);
5144     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, &reg3);
5145 
5146     switch (gpioSelect)
5147     {
5148         case MYKGPIO18:
5149             slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
5150             break;
5151         case MYKGPIO17:
5152         case MYKGPIO16:
5153             slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
5154             break;
5155         case MYKGPIO15:
5156         case MYKGPIO8:
5157             slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
5158             break;
5159         case MYKGPIO14:
5160         case MYKGPIO13:
5161             slewSetting = (mykonosGpioSlewRate_t)(reg0 & (SLEWRATE_MASK));
5162             break;
5163         case MYKGPIO11:
5164         case MYKGPIO12:
5165             slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
5166             break;
5167         case MYKGPIO9:
5168         case MYKGPIO10:
5169             slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
5170             break;
5171         case MYKGPIO7:
5172             slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
5173             break;
5174         case MYKGPIO6:
5175             slewSetting = (mykonosGpioSlewRate_t)(reg1 & (SLEWRATE_MASK));
5176             break;
5177         case MYKGPIO5:
5178             slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
5179             break;
5180         case MYKGPIO4:
5181             slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
5182             break;
5183         case MYKGPIO3:
5184             slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
5185             break;
5186         case MYKGPIO2:
5187             slewSetting = (mykonosGpioSlewRate_t)(reg2 & (SLEWRATE_MASK));
5188             break;
5189         case MYKGPIO1:
5190             slewSetting = (mykonosGpioSlewRate_t)((reg3 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
5191             break;
5192         case MYKGPIO0:
5193             slewSetting = (mykonosGpioSlewRate_t)(reg3 & (SLEWRATE_MASK));
5194             break;
5195         default:
5196             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
5197                     getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM));
5198             return MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM;
5199     }
5200 
5201     *slewRate = slewSetting;
5202 
5203     return MYKONOS_ERR_GPIO_OK;
5204 }
5205 
5206 
5207 /**
5208  * \brief This function sets the CMOS output driver.
5209  *
5210  * This function sets the CMOS output driver to increase pad drive strength for the SPI_DIO and GP_INTERRUPT pads
5211  * according to the following settings of the enumeration type mykonosCmosPadDrvStr_t
5212  *
5213  * <B>Dependencies</B>
5214  * - device->spiSettings->chipSelectIndex
5215  *
5216  * \param device is a pointer to the device settings structure
5217  * \param cmosDrv drive for the CMOS output driver
5218  *
5219  * \retval MYKONOS_ERR_CMOS_DRV_INV_PARAM invalid drive strength, valid settings are given by mykonosCmosPadDrvStr_t
5220  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
5221  */
MYKONOS_setCmosDrv(mykonosDevice_t * device,mykonosCmosPadDrvStr_t cmosDrv)5222 mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t cmosDrv)
5223 {
5224     const uint8_t CMOS_DRV_MASK = 0x0F;
5225     const uint8_t CMOS_DRV_SHIFT = 0x04;
5226 
5227 #if MYKONOS_VERBOSE == 1
5228     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setCmosDrv()\n");
5229 #endif
5230 
5231     /* Error checking for correct drive */
5232     switch (cmosDrv)
5233     {   /* fall through since this is only checking */
5234         case MYK_CMOSPAD_DRV_1X:
5235         case MYK_CMOSPAD_DRV_2X:
5236         case MYK_CMOSPAD_DRV_3X:
5237         case MYK_CMOSPAD_DRV_4X:
5238         case MYK_CMOSPAD_DRV_5X:
5239             break;
5240         default:
5241             CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_CMOS_DRV_INV_PARAM,
5242                 getGpioMykonosErrorMessage(MYKONOS_ERR_CMOS_DRV_INV_PARAM));
5243             return MYKONOS_ERR_CMOS_DRV_INV_PARAM;
5244     }
5245 
5246     CMB_SPIWriteField(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, cmosDrv, (~CMOS_DRV_MASK), CMOS_DRV_SHIFT);
5247 
5248     return MYKONOS_ERR_GPIO_OK;
5249 }
5250 
5251 /**
5252  * \brief This function gets the programmed CMOS output driver
5253  *
5254  *
5255  * <B>Dependencies</B>
5256  * - device->spiSettings->chipSelectIndex
5257  *
5258  * \param device is a pointer to the device settings structure
5259  * \param cmosDrv will be the programmed drive for the CMOS output driver
5260  *
5261  * \retval MYKONOS_ERR_CMOS_DRV_NULL_PARAM Null parameter passed to the function
5262  * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
5263  */
MYKONOS_getCmosDrv(mykonosDevice_t * device,mykonosCmosPadDrvStr_t * cmosDrv)5264 mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvStr_t *cmosDrv)
5265 {
5266     uint8_t regRd = 0x00;
5267 
5268     const uint8_t CMOS_DRV_MASK = 0xF0;
5269     const uint8_t CMOS_DRV_SHIFT = 0x04;
5270 
5271 #if MYKONOS_VERBOSE == 1
5272     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getCmosDrv()\n");
5273 #endif
5274 
5275     if (cmosDrv == NULL)
5276     {
5277         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_CMOS_DRV_NULL_PARAM,
5278                 getGpioMykonosErrorMessage(MYKONOS_ERR_CMOS_DRV_NULL_PARAM));
5279         return MYKONOS_ERR_CMOS_DRV_NULL_PARAM;
5280     }
5281 
5282     CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, &regRd);
5283 
5284     *cmosDrv = (mykonosCmosPadDrvStr_t)((regRd & CMOS_DRV_MASK) >> CMOS_DRV_SHIFT);
5285 
5286     return MYKONOS_ERR_GPIO_OK;
5287 }
5288 
5289 /**
5290 * \brief This API function configures and enables the secondary SPI port.
5291 *
5292 * This port allows control compatibility with BBPs that employ dual SPI ports.
5293 * The GPIO mapping for the SPI2 is fixed:
5294 *  SPI signal  |   GPIO
5295 * -------------|-------------------
5296 *  CSB_2       |   GPIO 3
5297 *  SCLK_2      |   GPIO 2
5298 *  SDO_2       |   GPIO 1
5299 *  SDO_2/SDI2  |   GPIO 0
5300 *
5301 * The secondary SPI port only has a small subset of registers that affect the
5302 * attenuation of the TX channels. It uses a fifth GPIO pin in order to decide
5303 * which TxAttenuation word is active. The Tx Attenuation words in the 2nd SPI
5304 * port are different than the first SPI port.  On the 2nd SPI port, each
5305 * transmitter has two Tx Attenuation words (an active word and an inactive
5306 * word).  The BBIC should write to the inactive TxAttenuation word. Then the
5307 * fifth GPIO pin should be asserted to make the inactive TxAttenuation word
5308 * active.  This allows the BBIC to tightly control in real time when the
5309 * TxAttenuation updates.
5310 *
5311 * <B>Dependencies</B>
5312 * - device->spiSettings
5313 * - device->spiSettings->chipSelectIndex
5314 *
5315 * \param device is a pointer to the device settings structure
5316 * \param enable This is parameter will enable the secondary SPI port: 1 = enable, 0 = disable
5317 * \param updateTxAttenPinSelect This parameter set the GPIO pin to be toggle for using the inactive attenuation words for both channels
5318 *  tx update  |   GPIO
5319 * ------------|-------------------
5320 *     0x00    |   GPIO 4
5321 *     0x01    |   GPIO 8
5322 *     0x02    |   GPIO 14
5323 *     0x03    |   none selected
5324 *
5325 * \retval MYKONOS_ERR_SPI2_INV_GPIO if an invalid GPIO pin configuration is passed
5326 * \retval MYKONOS_ERR_HAL_LAYER if HAL function error is passed
5327 * \retval MYKONOS_ERR_OK Function completed successfully
5328 */
MYKONOS_spi2GpioSetup(mykonosDevice_t * device,uint8_t enable,uint8_t updateTxAttenPinSelect)5329 mykonosGpioErr_t MYKONOS_spi2GpioSetup(mykonosDevice_t *device, uint8_t enable, uint8_t updateTxAttenPinSelect)
5330 {
5331     uint8_t regWrite = 0;
5332     uint8_t enableBit = 0;
5333 
5334     const uint32_t SPI2_PIN_MASK = 0x03;
5335 
5336 #ifdef MYKONOS_VERBOSE
5337     CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_spi2GpioSetup()\n");
5338 #endif
5339 
5340     /* Error checking for correctness of GPIO to control attenuation word. */
5341     if (updateTxAttenPinSelect & ~SPI2_PIN_MASK)
5342     {
5343         CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex,  MYKONOS_ERR_SPI2_INV_GPIO,
5344                 getGpioMykonosErrorMessage(MYKONOS_ERR_SPI2_INV_GPIO));
5345         return MYKONOS_ERR_SPI2_INV_GPIO;
5346     }
5347 
5348     /* masking the enable bit and the required pin */
5349     enableBit = (enable > 0) ? 1 : 0;
5350     regWrite = (uint8_t)((updateTxAttenPinSelect << 4) | (enableBit << 3));
5351 
5352     /* Set the SPI2 enable and the GPIO pin associated. */
5353     CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_CONFIGURATION_CONTROL_1, regWrite, 0x38, 0);
5354 
5355     return MYKONOS_ERR_GPIO_OK;
5356 }
5357 
5358