1; Lattice Mico32 CPU description. -*- Scheme -*- 2; Copyright 2008-2013 Free Software Foundation, Inc. 3; Contributed by Jon Beniston <jon@beniston.com> 4; 5; This file is part of the GNU Binutils. 6; 7; This program is free software; you can redistribute it and/or modify 8; it under the terms of the GNU General Public License as published by 9; the Free Software Foundation; either version 3 of the License, or 10; (at your option) any later version. 11; 12; This program is distributed in the hope that it will be useful, 13; but WITHOUT ANY WARRANTY; without even the implied warranty of 14; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15; GNU General Public License for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with this program; if not, write to the Free Software 19; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20; MA 02110-1301, USA. 21 22(include "simplify.inc") 23 24(define-arch 25 (name lm32) ; name of cpu family 26 (comment "Lattice Mico32") 27 (default-alignment aligned) 28 (insn-lsb0? #t) 29 (machs lm32) 30 (isas lm32) 31) 32 33 34; Instruction sets. 35 36(define-isa 37 (name lm32) 38 (comment "Lattice Mico32 ISA") 39 (default-insn-word-bitsize 32) 40 (default-insn-bitsize 32) 41 (base-insn-bitsize 32) 42 (decode-assist (31 30 29 28 27 26)) 43) 44 45 46; Cpu family definitions. 47 48(define-cpu 49 ; cpu names must be distinct from the architecture name and machine name 50 (name lm32bf) 51 (comment "Lattice Mico32 CPU") 52 (endian big) 53 (word-bitsize 32) 54) 55 56(define-mach 57 (name lm32) 58 (comment "Lattice Mico32 MACH") 59 (cpu lm32bf) 60) 61 62(define-model 63 (name lm32) 64 (comment "Lattice Mico32 reference implementation") 65 (mach lm32) 66 (unit u-exec "Execution unit" () 67 1 1 () () () ()) 68) 69 70 71; Hardware elements. 72 73(dnh h-pc "Program counter" (PC) (pc) () () ()) 74 75(dnh h-gr "General purpose registers" 76 () 77 (register SI (32)) 78 (keyword "" ( 79 (gp 26) (fp 27) (sp 28) (ra 29) (ea 30) (ba 31) 80 (r0 0) (r1 1) (r2 2) (r3 3) 81 (r4 4) (r5 5) (r6 6) (r7 7) 82 (r8 8) (r9 9) (r10 10) (r11 11) 83 (r12 12) (r13 13) (r14 14) (r15 15) 84 (r16 16) (r17 17) (r18 18) (r19 19) 85 (r20 20) (r21 21) (r22 22) (r23 23) 86 (r24 24) (r25 25) (r26 26) (r27 27) 87 (r28 28) (r29 29) (r30 30) (r31 31) 88 ) 89 ) 90 () () 91) 92 93(dnh h-csr "Control and status registers" 94 () 95 (register SI (32)) 96 (keyword "" ( 97 (IE 0) (IM 1) (IP 2) 98 (ICC 3) (DCC 4) 99 (CC 5) 100 (CFG 6) 101 (EBA 7) 102 (DC 8) 103 (DEBA 9) 104 (CFG2 10) 105 (JTX 14) (JRX 15) 106 (BP0 16) (BP1 17) (BP2 18) (BP3 19) 107 (WP0 24) (WP1 25) (WP2 26) (WP3 27) 108 (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31) 109 ) 110 ) 111 () () 112) 113 114 115; Instruction fields. 116 117(dnf f-opcode "opcode field" () 31 6) 118(dnf f-r0 "register index 0 field" () 25 5) 119(dnf f-r1 "register index 1 field" () 20 5) 120(dnf f-r2 "register index 2 field" () 15 5) 121(dnf f-resv0 "reserved" (RESERVED) 10 11) 122(dnf f-shift "shift amount field" () 4 5) 123(df f-imm "signed immediate field" () 15 16 INT #f #f) 124(dnf f-uimm "unsigned immediate field" () 15 16) 125(dnf f-csr "csr field" () 25 5) 126(dnf f-user "user defined field" () 10 11) 127(dnf f-exception "exception field" () 25 26) 128 129(df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT 130 ((value pc) (sra SI (sub SI value pc) 2)) 131 ((value pc) (add SI pc (sub (xor (sll (and value #xffff) 2) 132 #x20000) 133 #x20000))) 134) 135(df f-call "call offset field" (PCREL-ADDR) 25 26 INT 136 ((value pc) (sra SI (sub SI value pc) 2)) 137 ((value pc) (add SI pc (sub (xor (sll (and value #x3ffffff) 2) 138 #x8000000) 139 #x8000000))) 140) 141 142 143; Operands. 144 145(dnop r0 "register 0" () h-gr f-r0) 146(dnop r1 "register 1" () h-gr f-r1) 147(dnop r2 "register 2" () h-gr f-r2) 148(dnop shift "shift amout" () h-uint f-shift) 149(dnop imm "signed immediate" () h-sint f-imm) 150(dnop uimm "unsigned immediate" () h-uint f-uimm) 151(dnop branch "branch offset" () h-iaddr f-branch) 152(dnop call "call offset" () h-iaddr f-call) 153(dnop csr "csr" () h-csr f-csr) 154(dnop user "user" () h-uint f-user) 155(dnop exception "exception" () h-uint f-exception) 156 157(define-operand 158 (name hi16) 159 (comment "high 16-bit immediate") 160 (attrs) 161 (type h-uint) 162 (index f-uimm) 163 (handlers (parse "hi16")) 164) 165 166(define-operand 167 (name lo16) 168 (comment "low 16-bit immediate") 169 (attrs) 170 (type h-uint) 171 (index f-uimm) 172 (handlers (parse "lo16")) 173) 174 175(define-operand 176 (name gp16) 177 (comment "gp relative 16-bit immediate") 178 (attrs) 179 (type h-sint) 180 (index f-imm) 181 (handlers (parse "gp16")) 182) 183 184(define-operand 185 (name got16) 186 (comment "got 16-bit immediate") 187 (attrs) 188 (type h-sint) 189 (index f-imm) 190 (handlers (parse "got16")) 191) 192 193(define-operand 194 (name gotoffhi16) 195 (comment "got offset high 16-bit immediate") 196 (attrs) 197 (type h-sint) 198 (index f-imm) 199 (handlers (parse "gotoff_hi16")) 200) 201 202(define-operand 203 (name gotofflo16) 204 (comment "got offset low 16-bit immediate") 205 (attrs) 206 (type h-sint) 207 (index f-imm) 208 (handlers (parse "gotoff_lo16")) 209) 210 211 212; Enumerations. 213 214(define-normal-insn-enum 215 opcodes "opcodes" () OP_ f-opcode 216 (("ADD" 45) 217 ("ADDI" 13) 218 ("AND" 40) 219 ("ANDI" 8) 220 ("ANDHI" 24) 221 ("B" 48) 222 ("BI" 56) 223 ("BE" 17) 224 ("BG" 18) 225 ("BGE" 19) 226 ("BGEU" 20) 227 ("BGU" 21) 228 ("BNE" 23) 229 ("CALL" 54) 230 ("CALLI" 62) 231 ("CMPE" 57) 232 ("CMPEI" 25) 233 ("CMPG" 58) 234 ("CMPGI" 26) 235 ("CMPGE" 59) 236 ("CMPGEI" 27) 237 ("CMPGEU" 60) 238 ("CMPGEUI" 28) 239 ("CMPGU" 61) 240 ("CMPGUI" 29) 241 ("CMPNE" 63) 242 ("CMPNEI" 31) 243 ("DIVU" 35) 244 ("LB" 4) 245 ("LBU" 16) 246 ("LH" 7) 247 ("LHU" 11) 248 ("LW" 10) 249 ("MODU" 49) 250 ("MUL" 34) 251 ("MULI" 2) 252 ("NOR" 33) 253 ("NORI" 1) 254 ("OR" 46) 255 ("ORI" 14) 256 ("ORHI" 30) 257 ("RAISE" 43) 258 ("RCSR" 36) 259 ("SB" 12) 260 ("SEXTB" 44) 261 ("SEXTH" 55) 262 ("SH" 3) 263 ("SL" 47) 264 ("SLI" 15) 265 ("SR" 37) 266 ("SRI" 5) 267 ("SRU" 32) 268 ("SRUI" 0) 269 ("SUB" 50) 270 ("SW" 22) 271 ("USER" 51) 272 ("WCSR" 52) 273 ("XNOR" 41) 274 ("XNORI" 9) 275 ("XOR" 38) 276 ("XORI" 6) 277 ) 278) 279 280 281; Instructions. Note: Reg-reg must come before reg-imm. 282 283(dni add "add" () 284 "add $r2,$r0,$r1" 285 (+ OP_ADD r0 r1 r2 (f-resv0 0)) 286 (set r2 (add r0 r1)) 287 () 288) 289 290(dni addi "add immediate" () 291 "addi $r1,$r0,$imm" 292 (+ OP_ADDI r0 r1 imm) 293 (set r1 (add r0 (ext SI (trunc HI imm)))) 294 () 295) 296 297(dni and "and" () 298 "and $r2,$r0,$r1" 299 (+ OP_AND r0 r1 r2 (f-resv0 0)) 300 (set r2 (and r0 r1)) 301 () 302) 303 304(dni andi "and immediate" () 305 "andi $r1,$r0,$uimm" 306 (+ OP_ANDI r0 r1 uimm) 307 (set r1 (and r0 (zext SI uimm))) 308 () 309) 310 311(dni andhii "and high immediate" () 312 "andhi $r1,$r0,$hi16" 313 (+ OP_ANDHI r0 r1 hi16) 314 (set r1 (and r0 (sll SI hi16 16))) 315 () 316) 317 318(dni b "branch" () 319 "b $r0" 320 (+ OP_B r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 321 (set pc (c-call USI "@cpu@_b_insn" r0 f-r0)) 322 () 323) 324 325(dni bi "branch immediate" () 326 "bi $call" 327 (+ OP_BI call) 328 (set pc (ext SI call)) 329 () 330) 331 332(dni be "branch equal" () 333 "be $r0,$r1,$branch" 334 (+ OP_BE r0 r1 branch) 335 (if (eq r0 r1) 336 (set pc branch) 337 ) 338 () 339) 340 341(dni bg "branch greater" () 342 "bg $r0,$r1,$branch" 343 (+ OP_BG r0 r1 branch) 344 (if (gt r0 r1) 345 (set pc branch) 346 ) 347 () 348) 349 350(dni bge "branch greater or equal" () 351 "bge $r0,$r1,$branch" 352 (+ OP_BGE r0 r1 branch) 353 (if (ge r0 r1) 354 (set pc branch) 355 ) 356 () 357) 358 359(dni bgeu "branch greater or equal unsigned" () 360 "bgeu $r0,$r1,$branch" 361 (+ OP_BGEU r0 r1 branch) 362 (if (geu r0 r1) 363 (set pc branch) 364 ) 365 () 366) 367 368(dni bgu "branch greater unsigned" () 369 "bgu $r0,$r1,$branch" 370 (+ OP_BGU r0 r1 branch) 371 (if (gtu r0 r1) 372 (set pc branch) 373 ) 374 () 375) 376 377(dni bne "branch not equal" () 378 "bne $r0,$r1,$branch" 379 (+ OP_BNE r0 r1 branch) 380 (if (ne r0 r1) 381 (set pc branch) 382 ) 383 () 384) 385 386(dni call "call" () 387 "call $r0" 388 (+ OP_CALL r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 389 (sequence () 390 (set (reg h-gr 29) (add pc 4)) 391 (set pc r0) 392 ) 393 () 394) 395 396(dni calli "call immediate" () 397 "calli $call" 398 (+ OP_CALLI call) 399 (sequence () 400 (set (reg h-gr 29) (add pc 4)) 401 (set pc (ext SI call)) 402 ) 403 () 404) 405 406(dni cmpe "compare equal" () 407 "cmpe $r2,$r0,$r1" 408 (+ OP_CMPE r0 r1 r2 (f-resv0 0)) 409 (set r2 (eq SI r0 r1)) 410 () 411) 412 413(dni cmpei "compare equal immediate" () 414 "cmpei $r1,$r0,$imm" 415 (+ OP_CMPEI r0 r1 imm) 416 (set r1 (eq SI r0 (ext SI (trunc HI imm)))) 417 () 418) 419 420(dni cmpg "compare greater than" () 421 "cmpg $r2,$r0,$r1" 422 (+ OP_CMPG r0 r1 r2 (f-resv0 0)) 423 (set r2 (gt SI r0 r1)) 424 () 425) 426 427(dni cmpgi "compare greater than immediate" () 428 "cmpgi $r1,$r0,$imm" 429 (+ OP_CMPGI r0 r1 imm) 430 (set r1 (gt SI r0 (ext SI (trunc HI imm)))) 431 () 432) 433 434(dni cmpge "compare greater or equal" () 435 "cmpge $r2,$r0,$r1" 436 (+ OP_CMPGE r0 r1 r2 (f-resv0 0)) 437 (set r2 (ge SI r0 r1)) 438 () 439) 440 441(dni cmpgei "compare greater or equal immediate" () 442 "cmpgei $r1,$r0,$imm" 443 (+ OP_CMPGEI r0 r1 imm) 444 (set r1 (ge SI r0 (ext SI (trunc HI imm)))) 445 () 446) 447 448(dni cmpgeu "compare greater or equal unsigned" () 449 "cmpgeu $r2,$r0,$r1" 450 (+ OP_CMPGEU r0 r1 r2 (f-resv0 0)) 451 (set r2 (geu SI r0 r1)) 452 () 453) 454 455(dni cmpgeui "compare greater or equal unsigned immediate" () 456 "cmpgeui $r1,$r0,$uimm" 457 (+ OP_CMPGEUI r0 r1 uimm) 458 (set r1 (geu SI r0 (zext SI uimm))) 459 () 460) 461 462(dni cmpgu "compare greater than unsigned" () 463 "cmpgu $r2,$r0,$r1" 464 (+ OP_CMPGU r0 r1 r2 (f-resv0 0)) 465 (set r2 (gtu SI r0 r1)) 466 () 467) 468 469(dni cmpgui "compare greater than unsigned immediate" () 470 "cmpgui $r1,$r0,$uimm" 471 (+ OP_CMPGUI r0 r1 uimm) 472 (set r1 (gtu SI r0 (zext SI uimm))) 473 () 474) 475 476(dni cmpne "compare not equal" () 477 "cmpne $r2,$r0,$r1" 478 (+ OP_CMPNE r0 r1 r2 (f-resv0 0)) 479 (set r2 (ne SI r0 r1)) 480 () 481) 482 483(dni cmpnei "compare not equal immediate" () 484 "cmpnei $r1,$r0,$imm" 485 (+ OP_CMPNEI r0 r1 imm) 486 (set r1 (ne SI r0 (ext SI (trunc HI imm)))) 487 () 488) 489 490(dni divu "unsigned divide" () 491 "divu $r2,$r0,$r1" 492 (+ OP_DIVU r0 r1 r2 (f-resv0 0)) 493 (set pc (c-call USI "@cpu@_divu_insn" pc f-r0 f-r1 f-r2)) 494 () 495) 496 497(dni lb "load byte" () 498 "lb $r1,($r0+$imm)" 499 (+ OP_LB r0 r1 imm) 500 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 501 () 502) 503 504(dni lbu "load byte unsigned" () 505 "lbu $r1,($r0+$imm)" 506 (+ OP_LBU r0 r1 imm) 507 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 508 () 509) 510 511(dni lh "load halfword" () 512 "lh $r1,($r0+$imm)" 513 (+ OP_LH r0 r1 imm) 514 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 515 () 516) 517 518(dni lhu "load halfword unsigned" () 519 "lhu $r1,($r0+$imm)" 520 (+ OP_LHU r0 r1 imm) 521 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 522 () 523) 524 525(dni lw "load word" () 526 "lw $r1,($r0+$imm)" 527 (+ OP_LW r0 r1 imm) 528 (set r1 (mem SI (add r0 (ext SI (trunc HI imm))))) 529 () 530) 531 532(dni modu "unsigned modulus" () 533 "modu $r2,$r0,$r1" 534 (+ OP_MODU r0 r1 r2 (f-resv0 0)) 535 (set pc (c-call USI "@cpu@_modu_insn" pc f-r0 f-r1 f-r2)) 536 () 537) 538 539(dni mul "mulitply" () 540 "mul $r2,$r0,$r1" 541 (+ OP_MUL r0 r1 r2 (f-resv0 0)) 542 (set r2 (mul r0 r1)) 543 () 544) 545 546(dni muli "multiply immediate" () 547 "muli $r1,$r0,$imm" 548 (+ OP_MULI r0 r1 imm) 549 (set r1 (mul r0 (ext SI (trunc HI imm)))) 550 () 551) 552 553(dni nor "nor" () 554 "nor $r2,$r0,$r1" 555 (+ OP_NOR r0 r1 r2 (f-resv0 0)) 556 (set r2 (inv (or r0 r1))) 557 () 558) 559 560(dni nori "nor immediate" () 561 "nori $r1,$r0,$uimm" 562 (+ OP_NORI r0 r1 uimm) 563 (set r1 (inv (or r0 (zext SI uimm)))) 564 () 565) 566 567(dni or "or" () 568 "or $r2,$r0,$r1" 569 (+ OP_OR r0 r1 r2 (f-resv0 0)) 570 (set r2 (or r0 r1)) 571 () 572) 573 574(dni ori "or immediate" () 575 "ori $r1,$r0,$lo16" 576 (+ OP_ORI r0 r1 lo16) 577 (set r1 (or r0 (zext SI lo16))) 578 () 579) 580 581(dni orhii "or high immediate" () 582 "orhi $r1,$r0,$hi16" 583 (+ OP_ORHI r0 r1 hi16) 584 (set r1 (or r0 (sll SI hi16 16))) 585 () 586) 587 588(dni rcsr "read control or status register" () 589 "rcsr $r2,$csr" 590 (+ OP_RCSR csr (f-r1 0) r2 (f-resv0 0)) 591 (set r2 csr) 592 () 593) 594 595(dni sb "store byte" () 596 "sb ($r0+$imm),$r1" 597 (+ OP_SB r0 r1 imm) 598 (set (mem QI (add r0 (ext SI (trunc HI imm)))) r1) 599 () 600) 601 602(dni sextb "sign extend byte" () 603 "sextb $r2,$r0" 604 (+ OP_SEXTB r0 (f-r1 0) r2 (f-resv0 0)) 605 (set r2 (ext SI (trunc QI r0))) 606 () 607) 608 609(dni sexth "sign extend half-word" () 610 "sexth $r2,$r0" 611 (+ OP_SEXTH r0 (f-r1 0) r2 (f-resv0 0)) 612 (set r2 (ext SI (trunc HI r0))) 613 () 614) 615 616(dni sh "store halfword" () 617 "sh ($r0+$imm),$r1" 618 (+ OP_SH r0 r1 imm) 619 (set (mem HI (add r0 (ext SI (trunc HI imm)))) r1) 620 () 621) 622 623(dni sl "shift left" () 624 "sl $r2,$r0,$r1" 625 (+ OP_SL r0 r1 r2 (f-resv0 0)) 626 (set r2 (sll SI r0 r1)) 627 () 628) 629 630(dni sli "shift left immediate" () 631 "sli $r1,$r0,$imm" 632 (+ OP_SLI r0 r1 imm) 633 (set r1 (sll SI r0 imm)) 634 () 635) 636 637(dni sr "shift right" () 638 "sr $r2,$r0,$r1" 639 (+ OP_SR r0 r1 r2 (f-resv0 0)) 640 (set r2 (sra SI r0 r1)) 641 () 642) 643 644(dni sri "shift right immediate" () 645 "sri $r1,$r0,$imm" 646 (+ OP_SRI r0 r1 imm) 647 (set r1 (sra SI r0 imm)) 648 () 649) 650 651(dni sru "shift right unsigned" () 652 "sru $r2,$r0,$r1" 653 (+ OP_SRU r0 r1 r2 (f-resv0 0)) 654 (set r2 (srl SI r0 r1)) 655 () 656) 657 658(dni srui "shift right unsigned immediate" () 659 "srui $r1,$r0,$imm" 660 (+ OP_SRUI r0 r1 imm) 661 (set r1 (srl SI r0 imm)) 662 () 663) 664 665(dni sub "subtract" () 666 "sub $r2,$r0,$r1" 667 (+ OP_SUB r0 r1 r2 (f-resv0 0)) 668 (set r2 (sub r0 r1)) 669 () 670) 671 672(dni sw "store word" () 673 "sw ($r0+$imm),$r1" 674 (+ OP_SW r0 r1 imm) 675 (set (mem SI (add r0 (ext SI (trunc HI imm)))) r1) 676 () 677) 678 679(dni user "user defined instruction" () 680 "user $r2,$r0,$r1,$user" 681 (+ OP_USER r0 r1 r2 user) 682 (set r2 (c-call SI "@cpu@_user_insn" r0 r1 user)) 683 () 684) 685 686(dni wcsr "write control or status register" () 687 "wcsr $csr,$r1" 688 (+ OP_WCSR csr r1 (f-r2 0) (f-resv0 0)) 689 (c-call VOID "@cpu@_wcsr_insn" f-csr r1) 690 () 691) 692 693(dni xor "xor" () 694 "xor $r2,$r0,$r1" 695 (+ OP_XOR r0 r1 r2 (f-resv0 0)) 696 (set r2 (xor r0 r1)) 697 () 698) 699 700(dni xori "xor immediate" () 701 "xori $r1,$r0,$uimm" 702 (+ OP_XORI r0 r1 uimm) 703 (set r1 (xor r0 (zext SI uimm))) 704 () 705) 706 707(dni xnor "xnor" () 708 "xnor $r2,$r0,$r1" 709 (+ OP_XNOR r0 r1 r2 (f-resv0 0)) 710 (set r2 (inv (xor r0 r1))) 711 () 712) 713 714(dni xnori "xnor immediate" () 715 "xnori $r1,$r0,$uimm" 716 (+ OP_XNORI r0 r1 uimm) 717 (set r1 (inv (xor r0 (zext SI uimm)))) 718 () 719) 720 721; Pseudo instructions 722 723(dni break "breakpoint" () 724 "break" 725 (+ OP_RAISE (f-exception 2)) 726 (set pc (c-call USI "@cpu@_break_insn" pc)) 727 () 728) 729 730(dni scall "system call" () 731 "scall" 732 (+ OP_RAISE (f-exception 7)) 733 (set pc (c-call USI "@cpu@_scall_insn" pc)) 734 () 735) 736 737(dni bret "return from breakpoint" (ALIAS) 738 "bret" 739 (+ OP_B (f-r0 31) (f-r1 0) (f-r2 0) (f-resv0 0)) 740 (set pc (c-call USI "@cpu@_bret_insn" r0)) 741 () 742) 743 744(dni eret "return from exception" (ALIAS) 745 "eret" 746 (+ OP_B (f-r0 30) (f-r1 0) (f-r2 0) (f-resv0 0)) 747 (set pc (c-call USI "@cpu@_eret_insn" r0)) 748 () 749) 750 751(dni ret "return" (ALIAS) 752 "ret" 753 (+ OP_B (f-r0 29) (f-r1 0) (f-r2 0) (f-resv0 0)) 754 (set pc r0) 755 () 756) 757 758(dni mv "move" (ALIAS) 759 "mv $r2,$r0" 760 (+ OP_OR r0 (f-r1 0) r2 (f-resv0 0)) 761 (set r2 r0) 762 () 763) 764 765(dni mvi "move immediate" (ALIAS) 766 "mvi $r1,$imm" 767 (+ OP_ADDI (f-r0 0) r1 imm) 768 (set r1 (add r0 (ext SI (trunc HI imm)))) 769 () 770) 771 772(dni mvui "move unsigned immediate" (ALIAS) 773 "mvu $r1,$lo16" 774 (+ OP_ORI (f-r0 0) r1 lo16) 775 (set r1 (zext SI lo16)) 776 () 777) 778 779(dni mvhi "move high immediate" (ALIAS) 780 "mvhi $r1,$hi16" 781 (+ OP_ORHI (f-r0 0) r1 hi16) 782 (set r1 (or r0 (sll SI hi16 16))) 783 () 784) 785 786(dni mva "move address" (ALIAS) 787 "mva $r1,$gp16" 788 (+ OP_ADDI (f-r0 26) r1 gp16) 789 (set r1 (add r0 (ext SI (trunc HI gp16)))) 790 () 791) 792 793(dni not "not" (ALIAS) 794 "not $r2,$r0" 795 (+ OP_XNOR r0 (f-r1 0) r2 (f-resv0 0)) 796 (set r2 (inv r0)) 797 () 798) 799 800(dni nop "nop" (ALIAS) 801 "nop" 802 (+ OP_ADDI (f-r0 0) (f-r1 0) (f-imm 0)) 803 (set r0 r0) 804 () 805) 806 807(dni lbgprel "load byte gp relative" (ALIAS) 808 "lb $r1,$gp16" 809 (+ OP_LB (f-r0 26) r1 gp16) 810 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 811 () 812) 813 814(dni lbugprel "load byte unsigned gp relative" (ALIAS) 815 "lbu $r1,$gp16" 816 (+ OP_LBU (f-r0 26) r1 gp16) 817 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 818 () 819) 820 821(dni lhgprel "load halfword gp relative" (ALIAS) 822 "lh $r1,$gp16" 823 (+ OP_LH (f-r0 26) r1 gp16) 824 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 825 () 826) 827 828(dni lhugprel "load halfword unsigned gp relative" (ALIAS) 829 "lhu $r1,$gp16" 830 (+ OP_LHU (f-r0 26) r1 gp16) 831 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 832 () 833) 834 835(dni lwgprel "load word gp relative" (ALIAS) 836 "lw $r1,$gp16" 837 (+ OP_LW (f-r0 26) r1 gp16) 838 (set r1 (mem SI (add r0 (ext SI (trunc HI gp16))))) 839 () 840) 841 842(dni sbgprel "store byte gp relative" (ALIAS) 843 "sb $gp16,$r1" 844 (+ OP_SB (f-r0 26) r1 gp16) 845 (set (mem QI (add r0 (ext SI (trunc HI gp16)))) r1) 846 () 847) 848 849(dni shgprel "store halfword gp relative" (ALIAS) 850 "sh $gp16,$r1" 851 (+ OP_SH (f-r0 26) r1 gp16) 852 (set (mem HI (add r0 (ext SI (trunc HI gp16)))) r1) 853 () 854) 855 856(dni swgprel "store word gp relative" (ALIAS) 857 "sw $gp16,$r1" 858 (+ OP_SW (f-r0 26) r1 gp16) 859 (set (mem SI (add r0 (ext SI (trunc HI gp16)))) r1) 860 () 861) 862 863(dni lwgotrel "load word got relative" (ALIAS) 864 "lw $r1,(gp+$got16)" 865 (+ OP_LW (f-r0 26) r1 got16) 866 (set r1 (mem SI (add r0 (ext SI (trunc HI got16))))) 867 () 868) 869 870(dni orhigotoffi "or high got offset immediate" (ALIAS) 871 "orhi $r1,$r0,$gotoffhi16" 872 (+ OP_ORHI r0 r1 gotoffhi16) 873 (set r1 (or r0 (sll SI gotoffhi16 16))) 874 () 875) 876 877(dni addgotoff "add got offset" (ALIAS) 878 "addi $r1,$r0,$gotofflo16" 879 (+ OP_ADDI r0 r1 gotofflo16) 880 (set r1 (add r0 (ext SI (trunc HI gotofflo16)))) 881 () 882) 883 884(dni swgotoff "store word got offset" (ALIAS) 885 "sw ($r0+$gotofflo16),$r1" 886 (+ OP_SW r0 r1 gotofflo16) 887 (set (mem SI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 888 () 889) 890 891(dni lwgotoff "load word got offset" (ALIAS) 892 "lw $r1,($r0+$gotofflo16)" 893 (+ OP_LW r0 r1 gotofflo16) 894 (set r1 (mem SI (add r0 (ext SI (trunc HI gotofflo16))))) 895 () 896) 897 898(dni shgotoff "store half word got offset" (ALIAS) 899 "sh ($r0+$gotofflo16),$r1" 900 (+ OP_SH r0 r1 gotofflo16) 901 (set (mem HI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 902 () 903) 904 905(dni lhgotoff "load half word got offset" (ALIAS) 906 "lh $r1,($r0+$gotofflo16)" 907 (+ OP_LH r0 r1 gotofflo16) 908 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 909 () 910) 911 912(dni lhugotoff "load half word got offset unsigned" (ALIAS) 913 "lhu $r1,($r0+$gotofflo16)" 914 (+ OP_LHU r0 r1 gotofflo16) 915 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 916 () 917) 918 919(dni sbgotoff "store byte got offset" (ALIAS) 920 "sb ($r0+$gotofflo16),$r1" 921 (+ OP_SB r0 r1 gotofflo16) 922 (set (mem QI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 923 () 924) 925 926(dni lbgotoff "load byte got offset" (ALIAS) 927 "lb $r1,($r0+$gotofflo16)" 928 (+ OP_LB r0 r1 gotofflo16) 929 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 930 () 931) 932 933(dni lbugotoff "load byte got offset unsigned" (ALIAS) 934 "lbu $r1,($r0+$gotofflo16)" 935 (+ OP_LBU r0 r1 gotofflo16) 936 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 937 () 938) 939