1 /* Test the vqdmlal_lane_s16 AArch64 SIMD intrinsic.  */
2 
3 /* { dg-do compile } */
4 /* { dg-options "-save-temps -O3 -fno-inline" } */
5 
6 #include "arm_neon.h"
7 
8 int32x4_t
t_vqdmlal_lane_s16(int32x4_t a,int16x4_t b,int16x4_t c)9 t_vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
10 {
11   return vqdmlal_lane_s16 (a, b, c, 0);
12 }
13 
14 /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
15