1 /* Verify that overloaded built-ins for vec_st* with int
2 inputs produce the right code. */
3
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
7
8 #include <altivec.h>
9 // void vec_st (vector signed int, int, vector signed int *);
10
11 void
testst_1(vector signed int vsi1,int i1,vector signed int * vsip)12 testst_1 (vector signed int vsi1, int i1, vector signed int * vsip)
13 {
14 return vec_st(vsi1, i1, vsip);
15 }
16 void
testst_2(vector signed int vsi1,int i1,signed int * sip)17 testst_2 (vector signed int vsi1, int i1, signed int * sip)
18 {
19 return vec_st(vsi1, i1, sip);
20 }
21 void
testst_3(vector unsigned int vui1,int i1,vector unsigned int * vsip)22 testst_3 (vector unsigned int vui1, int i1, vector unsigned int * vsip)
23 {
24 return vec_st(vui1, i1, vsip);
25 }
26 void
testst_4(vector unsigned int vui1,int i1,unsigned int * sip)27 testst_4 (vector unsigned int vui1, int i1, unsigned int * sip)
28 {
29 return vec_st(vui1, i1, sip);
30 }
31 void
testst_5(vector bool int vbi1,int i1,vector bool int * vbip)32 testst_5 (vector bool int vbi1, int i1, vector bool int * vbip)
33 {
34 return vec_st(vbi1, i1, vbip);
35 }
36 void
testst_6(vector bool int vbi1,int i1,unsigned int * vuip)37 testst_6 (vector bool int vbi1, int i1, unsigned int * vuip)
38 {
39 return vec_st(vbi1, i1, vuip);
40 }
41 void
testst_7(vector bool int vbi1,int i1,signed int * vsip)42 testst_7 (vector bool int vbi1, int i1, signed int * vsip)
43 {
44 return vec_st(vbi1, i1, vsip);
45 }
46
47 void
testst_cst1(vector signed int vsi1,int i1,vector signed int * vsip)48 testst_cst1 (vector signed int vsi1, int i1, vector signed int * vsip)
49 {
50 return vec_st(vsi1, 12, vsip);
51 }
52 void
testst_cst2(vector signed int vsi1,int i1,signed int * sip)53 testst_cst2 (vector signed int vsi1, int i1, signed int * sip)
54 {
55 return vec_st(vsi1, 16, sip);
56 }
57 void
testst_cst3(vector unsigned int vui1,int i1,vector unsigned int * vsip)58 testst_cst3 (vector unsigned int vui1, int i1, vector unsigned int * vsip)
59 {
60 return vec_st(vui1, 20, vsip);
61 }
62 void
testst_cst4(vector unsigned int vui1,int i1,unsigned int * sip)63 testst_cst4 (vector unsigned int vui1, int i1, unsigned int * sip)
64 {
65 return vec_st(vui1, 24, sip);
66 }
67 void
testst_cst5(vector bool int vbi1,int i1,vector bool int * vbip)68 testst_cst5 (vector bool int vbi1, int i1, vector bool int * vbip)
69 {
70 return vec_st(vbi1, 28, vbip);
71 }
72 void
testst_cst6(vector bool int vbi1,int i1,unsigned int * vuip)73 testst_cst6 (vector bool int vbi1, int i1, unsigned int * vuip)
74 {
75 return vec_st(vbi1, 32, vuip);
76 }
77 void
testst_cst7(vector bool int vbi1,int i1,signed int * vsip)78 testst_cst7 (vector bool int vbi1, int i1, signed int * vsip)
79 {
80 return vec_st(vbi1, 36, vsip);
81 }
82
83 /* { dg-final { scan-assembler-times {\mstvx\M} 14 } } */
84
85