1 /* { dg-do compile { target powerpc*-*-* } } */
2 /* { dg-require-effective-target powerpc_altivec_ok } */
3 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
4 /* { dg-options "-mcpu=power6 -maltivec" } */
5
6
7 vector unsigned char
foo_char(void)8 foo_char (void)
9 {
10 return (vector unsigned char) {
11 #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
12 0x80, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
13 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
14 #else
15 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
16 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x80
17 #endif
18 };
19 }
20
21 vector unsigned short
foo_short(void)22 foo_short (void)
23 {
24 return (vector unsigned short) {
25 #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
26 0x8000, 0x8000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff
27 #else
28 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x8000, 0x8000
29 #endif
30 };
31 }
32
33 vector unsigned int
foo_int(void)34 foo_int (void)
35 {
36 return (vector unsigned int) {
37 #if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
38 0x80000000u, 0x80000000u, 0xffffffffu, 0xffffffffu,
39 #else
40 0xffffffffu, 0xffffffffu, 0x80000000u, 0x80000000u,
41 #endif
42 };
43 }
44
45 /* { dg-final { scan-assembler-times "vslb" 1 } } */
46 /* { dg-final { scan-assembler-times "vslh" 1 } } */
47 /* { dg-final { scan-assembler-times "vslw" 1 } } */
48 /* { dg-final { scan-assembler-times "vsldoi" 3 } } */
49