1 /* Definitions of types that are used to store AVR architecture and 2 device information. 3 Copyright (C) 2012-2014 Free Software Foundation, Inc. 4 Contributed by Georg-Johann Lay (avr@gjlay.de) 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 23 /* This enum supplies indices into the avr_arch_types[] table below. */ 24 25 enum avr_arch 26 { 27 ARCH_UNKNOWN, 28 ARCH_AVR1, 29 ARCH_AVR2, 30 ARCH_AVR25, 31 ARCH_AVR3, 32 ARCH_AVR31, 33 ARCH_AVR35, 34 ARCH_AVR4, 35 ARCH_AVR5, 36 ARCH_AVR51, 37 ARCH_AVR6, 38 ARCH_AVRXMEGA2, 39 ARCH_AVRXMEGA4, 40 ARCH_AVRXMEGA5, 41 ARCH_AVRXMEGA6, 42 ARCH_AVRXMEGA7 43 }; 44 45 46 /* Architecture-specific properties. */ 47 48 typedef struct 49 { 50 /* Assembler only. */ 51 int asm_only; 52 53 /* Core have 'MUL*' instructions. */ 54 int have_mul; 55 56 /* Core have 'CALL' and 'JMP' instructions. */ 57 int have_jmp_call; 58 59 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */ 60 int have_movw_lpmx; 61 62 /* Core have 'ELPM' instructions. */ 63 int have_elpm; 64 65 /* Core have 'ELPM Rx,Z' instructions. */ 66 int have_elpmx; 67 68 /* Core have 'EICALL' and 'EIJMP' instructions. */ 69 int have_eijmp_eicall; 70 71 /* This is an XMEGA core. */ 72 int xmega_p; 73 74 /* This core has the RAMPD special function register 75 and thus also the RAMPX, RAMPY and RAMPZ registers. */ 76 int have_rampd; 77 78 /* Default start of data section address for architecture. */ 79 int default_data_section_start; 80 81 /* Offset between SFR address and RAM address: 82 SFR-address = RAM-address - sfr_offset */ 83 int sfr_offset; 84 85 /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */ 86 const char *const macro; 87 88 /* Architecture name. */ 89 const char *const arch_name; 90 } avr_arch_t; 91 92 93 /* Device-specific properties. */ 94 95 typedef struct 96 { 97 /* Device name. */ 98 const char *const name; 99 100 /* Index in avr_arch_types[]. */ 101 enum avr_arch arch; 102 103 /* device specific feature */ 104 int dev_attribute; 105 106 /* Must lie outside user's namespace. NULL == no macro. */ 107 const char *const macro; 108 109 /* Start of data section. */ 110 int data_section_start; 111 112 /* Number of 64k segments in the flash. */ 113 int n_flash; 114 115 /* Name of device library. */ 116 const char *const library_name; 117 } avr_mcu_t; 118 119 /* AVR device specific features. 120 121 AVR_ISA_RMW 122 Only few avr devices have Read-Modify-Write (RMW) instructions 123 (XCH, LAC, LAS and LAT) 124 125 AVR_SHORT_SP 126 Stack Pointer has only 8 bit width. 127 The device / multilib has an 8-bit stack pointer (no SPH). 128 129 AVR_ERRATA_SKIP 130 Some AVR devices have a core erratum when skipping a 2-word instruction. 131 Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE. 132 Problems will occur with return address is IRQ executes during the 133 skip sequence. 134 135 A support ticket from Atmel returned the following information: 136 137 Subject: (ATTicket:644469) On AVR skip-bug core Erratum 138 From: avr@atmel.com Date: 2011-07-27 139 (Please keep the subject when replying to this mail) 140 141 This errata exists only in AT90S8515 and ATmega103 devices. 142 143 For information please refer the following respective errata links 144 http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf 145 http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */ 146 147 enum avr_device_specific_features 148 { 149 AVR_ISA_NONE, 150 AVR_ISA_RMW = 0x1, /* device has RMW instructions. */ 151 AVR_SHORT_SP = 0x2, /* Stack Pointer has 8 bits width. */ 152 AVR_ERRATA_SKIP = 0x4 /* device has a core erratum. */ 153 }; 154 155 /* Map architecture to its texinfo string. */ 156 157 typedef struct 158 { 159 /* Architecture ID. */ 160 enum avr_arch arch; 161 162 /* textinfo source to describe the archtiecture. */ 163 const char *texinfo; 164 } avr_arch_info_t; 165 166 /* Preprocessor macros to define depending on MCU type. */ 167 168 extern const avr_arch_t avr_arch_types[]; 169 extern const avr_arch_t *avr_current_arch; 170 171 extern const avr_mcu_t avr_mcu_types[]; 172 extern const avr_mcu_t *avr_current_device; 173