1 ifndef regz380inc ; avoid multiple inclusion 2reg380inc equ 1 3 4 save 5 listing off ; no listing over this file 6;**************************************************************************** 7;* * 8;* AS 1.42 - File REGZ380.INC * 9;* * 10;* Contains Register Definitions for the Z380 * 11;* These Registers may only be accessed via the instructions IN0, OUT0, * 12;* and TSTIO. * 13;* * 14;**************************************************************************** 15 16 if (MOMCPU<>896) 17 fatal "wrong target selected: only Z380 allowed" 18 endif 19 20 21 if MOMPASS=1 22 message "Z380 Register Definitions (C) 1994 Alfred Arnold, Leonhard Schneider" 23 endif 24 25;---------------------------------------------------------------------------- 26 27LMCS0 port 00h ; Lower Memory Chip Select Registers 28LMCS1 port 01h 29UMCS0 port 02h ; Upper Memory Chip Select Registers 30UMCS1 port 03h 31MMCS0 port 04h ; Midrange Memory Chip Select Registers 32MMCS1 port 05h 33MMCS2 port 06h 34MMCS3 port 07h 35LMWR port 08h ; Lower Memory Waits Register 36UMWR port 09h ; Upper Memory Waits Register 37MMWR0 port 0ah ; Midrange Memory Waits Registers 38MMWR1 port 0bh 39MMWR2 port 0ch 40MMWR3 port 0dh 41IOWR port 0eh ; I/O Waits Register 42RFWR port 0fh ; Refresh Waits Register 43MSMER port 10h ; Memory Select Master Enable Register 44IOCR0 port 11h ; I/O Bus Control Registers 45IOCR1 port 12h 46RFSHR0 port 13h ; Refresh Registers 47RFSHR1 port 14h 48RFSHR2 port 15h 49SMCR port 16h ; Standby Mode Control Register 50IER port 17h ; Interrupt Enable 51AVBR port 18h ; Interrupt Vectors Offset 52TRPBK port 19h ; indicates whether trap or break occured 53 54CHIPVERSION port 0ffh ; Chip Version (00=Z380MPU) 55 56;---------------------------------------------------------------------------- 57 58 restore ; re-allow listing 59 60 endif ; reg380inc 61 62 63