1# Intel(r) Wireless MMX(tm) technology testcase for WACC
2# mach: xscale
3# as: -mcpu=xscale+iwmmxt
4
5	.include "testutils.inc"
6
7	start
8
9	.global wacc
10wacc:
11	# Enable access to CoProcessors 0 & 1 before
12        # we attempt these instructions.
13
14	mvi_h_gr   r1, 3
15	mcr        p15, 0, r1, cr15, cr1, 0
16
17	# Test Unsigned Byte Wide Accumulation
18
19	mvi_h_gr   r0, 0x12345678
20	mvi_h_gr   r1, 0x9abcdef0
21	mvi_h_gr   r2, 0
22	mvi_h_gr   r3, 0
23
24	tmcrr	   wr0, r0, r1
25	tmcrr	   wr1, r2, r3
26
27	waccb	   wr1, wr0
28
29	tmrrc	   r0, r1, wr0
30	tmrrc	   r2, r3, wr1
31
32	test_h_gr  r0, 0x12345678
33	test_h_gr  r1, 0x9abcdef0
34	test_h_gr  r2, 0x00000438
35	test_h_gr  r3, 0x00000000
36
37	# Test Unsigned Half Word Wide Accumulation
38
39	mvi_h_gr   r0, 0x12345678
40	mvi_h_gr   r1, 0x9abcdef0
41	mvi_h_gr   r2, 0
42	mvi_h_gr   r3, 0
43
44	tmcrr	   wr0, r0, r1
45	tmcrr	   wr1, r2, r3
46
47	wacch	   wr1, wr0
48
49	tmrrc	   r0, r1, wr0
50	tmrrc	   r2, r3, wr1
51
52	test_h_gr  r0, 0x12345678
53	test_h_gr  r1, 0x9abcdef0
54	test_h_gr  r2, 0x0001e258
55	test_h_gr  r3, 0x00000000
56
57	# Test Unsigned Word Wide Accumulation
58
59	mvi_h_gr   r0, 0x12345678
60	mvi_h_gr   r1, 0x9abcdef0
61	mvi_h_gr   r2, 0
62	mvi_h_gr   r3, 0
63
64	tmcrr	   wr0, r0, r1
65	tmcrr	   wr1, r2, r3
66
67	waccw	   wr1, wr0
68
69	tmrrc	   r0, r1, wr0
70	tmrrc	   r2, r3, wr1
71
72	test_h_gr  r0, 0x12345678
73	test_h_gr  r1, 0x9abcdef0
74	test_h_gr  r2, 0xacf13568
75	test_h_gr  r3, 0x00000000
76
77	pass
78