1 #objdump: -dr --prefix-addresses --show-raw-insn 2 #name: MIPS PIC branch relaxation with offset 3 #as: -32 -relax-branch 4 #warning_output: relax-offset.l 5 #source: relax-offset.s 6 7 .*: +file format .*mips.* 8 9 Disassembly of section \.text: 10 [0-9a-f]+ <[^>]*> 41bc 0000 lui gp,0x0 11 [ ]*[0-9a-f]+: R_MICROMIPS_HI16 _gp_disp 12 [0-9a-f]+ <[^>]*> 339c 0000 addiu gp,gp,0 13 [ ]*[0-9a-f]+: R_MICROMIPS_LO16 _gp_disp 14 [0-9a-f]+ <[^>]*> 033c e150 addu gp,gp,t9 15 [0-9a-f]+ <[^>]*> 40a4 fffe bnezc a0,0000000c <foo\+0xc> 16 [ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .* 17 [0-9a-f]+ <[^>]*> fc3c 0002 lw at,2\(gp\) 18 [ ]*[0-9a-f]+: R_MICROMIPS_GOT16 \.text 19 [0-9a-f]+ <[^>]*> 3021 0025 addiu at,at,37 20 [ ]*[0-9a-f]+: R_MICROMIPS_LO16 \.text 21 [0-9a-f]+ <[^>]*> 45a1 jrc at 22 [0-9a-f]+ <[^>]*> 45bf jrc ra 23 \.\.\. 24 [0-9a-f]+ <[^>]*> 0000 8b7c syscall 25 [0-9a-f]+ <[^>]*> 45bf jrc ra 26 \.\.\. 27