1 #objdump: -dr --prefix-addresses --show-raw-insn 2 #name: MIPS16 PC-relative relocation with addend 8 3 #as: -32 4 5 .*: +file format .*mips.* 6 7 Disassembly of section \.text: 8 \.\.\. 9 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 10 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 11 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 12 [0-9a-f]+ <[^>]*> f000 4a00 addiu v0,0 13 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 14 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 15 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 16 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 17 [0-9a-f]+ <[^>]*> f000 9a40 lw v0,0\(v0\) 18 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 19 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 20 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 21 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 22 [0-9a-f]+ <[^>]*> f464 4a08 addiu v0,9320 23 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 24 [0-9a-f]+ <[^>]*> f000 6a00 li v0,0 25 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 26 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 27 [0-9a-f]+ <[^>]*> f464 9a48 lw v0,9320\(v0\) 28 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 29 [0-9a-f]+ <[^>]*> f222 6a14 li v0,4660 30 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 31 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 32 [0-9a-f]+ <[^>]*> f66a 4a18 addiu v0,22136 33 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 34 [0-9a-f]+ <[^>]*> f222 6a14 li v0,4660 35 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 36 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 37 [0-9a-f]+ <[^>]*> f66a 9a58 lw v0,22136\(v0\) 38 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 39 [0-9a-f]+ <[^>]*> f464 6a09 li v0,9321 40 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 41 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 42 [0-9a-f]+ <[^>]*> f4f5 4a00 addiu v0,-21280 43 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 44 [0-9a-f]+ <[^>]*> f464 6a09 li v0,9321 45 [ ]*[0-9a-f]+: R_MIPS16_HI16 bar 46 [0-9a-f]+ <[^>]*> f400 3240 sll v0,16 47 [0-9a-f]+ <[^>]*> f4f5 9a40 lw v0,-21280\(v0\) 48 [ ]*[0-9a-f]+: R_MIPS16_LO16 bar 49 [0-9a-f]+ <[^>]*> 6500 nop 50 \.\.\. 51