1 #objdump: -dr --prefix-addresses --show-raw-insn 2 #name: MIPS PREF instruction 3 #as: -32 --defsym tpref=1 4 #source: cache.s 5 6 # Check MIPS PREF instruction assembly. 7 8 .*: +file format .*mips.* 9 10 Disassembly of section \.text: 11 [0-9a-f]+ <[^>]*> cc4507ff pref 0x5,2047\(v0\) 12 [0-9a-f]+ <[^>]*> cc65f800 pref 0x5,-2048\(v1\) 13 [0-9a-f]+ <[^>]*> cc850800 pref 0x5,2048\(a0\) 14 [0-9a-f]+ <[^>]*> cca5f7ff pref 0x5,-2049\(a1\) 15 [0-9a-f]+ <[^>]*> ccc57fff pref 0x5,32767\(a2\) 16 [0-9a-f]+ <[^>]*> cce58000 pref 0x5,-32768\(a3\) 17 [0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 18 [0-9a-f]+ <[^>]*> 00280821 addu at,at,t0 19 [0-9a-f]+ <[^>]*> cc258000 pref 0x5,-32768\(at\) 20 [0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff 21 [0-9a-f]+ <[^>]*> 00290821 addu at,at,t1 22 [0-9a-f]+ <[^>]*> cc257fff pref 0x5,32767\(at\) 23 [0-9a-f]+ <[^>]*> 3c010001 lui at,0x1 24 [0-9a-f]+ <[^>]*> 002a0821 addu at,at,t2 25 [0-9a-f]+ <[^>]*> cc259000 pref 0x5,-28672\(at\) 26 [0-9a-f]+ <[^>]*> 3c01ffff lui at,0xffff 27 [0-9a-f]+ <[^>]*> 002b0821 addu at,at,t3 28 [0-9a-f]+ <[^>]*> cc256fff pref 0x5,28671\(at\) 29 \.\.\. 30