1 /* Capstone Disassembly Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
3
4 #ifdef CAPSTONE_HAS_ARM64
5
6 #include <stdio.h> // debug
7 #include <string.h>
8
9 #include "../../utils.h"
10
11 #include "AArch64Mapping.h"
12
13 #define GET_INSTRINFO_ENUM
14 #include "AArch64GenInstrInfo.inc"
15
16 #ifndef CAPSTONE_DIET
17 static const name_map reg_name_maps[] = {
18 { ARM64_REG_INVALID, NULL },
19
20 { ARM64_REG_X29, "x29"},
21 { ARM64_REG_X30, "x30"},
22 { ARM64_REG_NZCV, "nzcv"},
23 { ARM64_REG_SP, "sp"},
24 { ARM64_REG_WSP, "wsp"},
25 { ARM64_REG_WZR, "wzr"},
26 { ARM64_REG_XZR, "xzr"},
27 { ARM64_REG_B0, "b0"},
28 { ARM64_REG_B1, "b1"},
29 { ARM64_REG_B2, "b2"},
30 { ARM64_REG_B3, "b3"},
31 { ARM64_REG_B4, "b4"},
32 { ARM64_REG_B5, "b5"},
33 { ARM64_REG_B6, "b6"},
34 { ARM64_REG_B7, "b7"},
35 { ARM64_REG_B8, "b8"},
36 { ARM64_REG_B9, "b9"},
37 { ARM64_REG_B10, "b10"},
38 { ARM64_REG_B11, "b11"},
39 { ARM64_REG_B12, "b12"},
40 { ARM64_REG_B13, "b13"},
41 { ARM64_REG_B14, "b14"},
42 { ARM64_REG_B15, "b15"},
43 { ARM64_REG_B16, "b16"},
44 { ARM64_REG_B17, "b17"},
45 { ARM64_REG_B18, "b18"},
46 { ARM64_REG_B19, "b19"},
47 { ARM64_REG_B20, "b20"},
48 { ARM64_REG_B21, "b21"},
49 { ARM64_REG_B22, "b22"},
50 { ARM64_REG_B23, "b23"},
51 { ARM64_REG_B24, "b24"},
52 { ARM64_REG_B25, "b25"},
53 { ARM64_REG_B26, "b26"},
54 { ARM64_REG_B27, "b27"},
55 { ARM64_REG_B28, "b28"},
56 { ARM64_REG_B29, "b29"},
57 { ARM64_REG_B30, "b30"},
58 { ARM64_REG_B31, "b31"},
59 { ARM64_REG_D0, "d0"},
60 { ARM64_REG_D1, "d1"},
61 { ARM64_REG_D2, "d2"},
62 { ARM64_REG_D3, "d3"},
63 { ARM64_REG_D4, "d4"},
64 { ARM64_REG_D5, "d5"},
65 { ARM64_REG_D6, "d6"},
66 { ARM64_REG_D7, "d7"},
67 { ARM64_REG_D8, "d8"},
68 { ARM64_REG_D9, "d9"},
69 { ARM64_REG_D10, "d10"},
70 { ARM64_REG_D11, "d11"},
71 { ARM64_REG_D12, "d12"},
72 { ARM64_REG_D13, "d13"},
73 { ARM64_REG_D14, "d14"},
74 { ARM64_REG_D15, "d15"},
75 { ARM64_REG_D16, "d16"},
76 { ARM64_REG_D17, "d17"},
77 { ARM64_REG_D18, "d18"},
78 { ARM64_REG_D19, "d19"},
79 { ARM64_REG_D20, "d20"},
80 { ARM64_REG_D21, "d21"},
81 { ARM64_REG_D22, "d22"},
82 { ARM64_REG_D23, "d23"},
83 { ARM64_REG_D24, "d24"},
84 { ARM64_REG_D25, "d25"},
85 { ARM64_REG_D26, "d26"},
86 { ARM64_REG_D27, "d27"},
87 { ARM64_REG_D28, "d28"},
88 { ARM64_REG_D29, "d29"},
89 { ARM64_REG_D30, "d30"},
90 { ARM64_REG_D31, "d31"},
91 { ARM64_REG_H0, "h0"},
92 { ARM64_REG_H1, "h1"},
93 { ARM64_REG_H2, "h2"},
94 { ARM64_REG_H3, "h3"},
95 { ARM64_REG_H4, "h4"},
96 { ARM64_REG_H5, "h5"},
97 { ARM64_REG_H6, "h6"},
98 { ARM64_REG_H7, "h7"},
99 { ARM64_REG_H8, "h8"},
100 { ARM64_REG_H9, "h9"},
101 { ARM64_REG_H10, "h10"},
102 { ARM64_REG_H11, "h11"},
103 { ARM64_REG_H12, "h12"},
104 { ARM64_REG_H13, "h13"},
105 { ARM64_REG_H14, "h14"},
106 { ARM64_REG_H15, "h15"},
107 { ARM64_REG_H16, "h16"},
108 { ARM64_REG_H17, "h17"},
109 { ARM64_REG_H18, "h18"},
110 { ARM64_REG_H19, "h19"},
111 { ARM64_REG_H20, "h20"},
112 { ARM64_REG_H21, "h21"},
113 { ARM64_REG_H22, "h22"},
114 { ARM64_REG_H23, "h23"},
115 { ARM64_REG_H24, "h24"},
116 { ARM64_REG_H25, "h25"},
117 { ARM64_REG_H26, "h26"},
118 { ARM64_REG_H27, "h27"},
119 { ARM64_REG_H28, "h28"},
120 { ARM64_REG_H29, "h29"},
121 { ARM64_REG_H30, "h30"},
122 { ARM64_REG_H31, "h31"},
123 { ARM64_REG_Q0, "q0"},
124 { ARM64_REG_Q1, "q1"},
125 { ARM64_REG_Q2, "q2"},
126 { ARM64_REG_Q3, "q3"},
127 { ARM64_REG_Q4, "q4"},
128 { ARM64_REG_Q5, "q5"},
129 { ARM64_REG_Q6, "q6"},
130 { ARM64_REG_Q7, "q7"},
131 { ARM64_REG_Q8, "q8"},
132 { ARM64_REG_Q9, "q9"},
133 { ARM64_REG_Q10, "q10"},
134 { ARM64_REG_Q11, "q11"},
135 { ARM64_REG_Q12, "q12"},
136 { ARM64_REG_Q13, "q13"},
137 { ARM64_REG_Q14, "q14"},
138 { ARM64_REG_Q15, "q15"},
139 { ARM64_REG_Q16, "q16"},
140 { ARM64_REG_Q17, "q17"},
141 { ARM64_REG_Q18, "q18"},
142 { ARM64_REG_Q19, "q19"},
143 { ARM64_REG_Q20, "q20"},
144 { ARM64_REG_Q21, "q21"},
145 { ARM64_REG_Q22, "q22"},
146 { ARM64_REG_Q23, "q23"},
147 { ARM64_REG_Q24, "q24"},
148 { ARM64_REG_Q25, "q25"},
149 { ARM64_REG_Q26, "q26"},
150 { ARM64_REG_Q27, "q27"},
151 { ARM64_REG_Q28, "q28"},
152 { ARM64_REG_Q29, "q29"},
153 { ARM64_REG_Q30, "q30"},
154 { ARM64_REG_Q31, "q31"},
155 { ARM64_REG_S0, "s0"},
156 { ARM64_REG_S1, "s1"},
157 { ARM64_REG_S2, "s2"},
158 { ARM64_REG_S3, "s3"},
159 { ARM64_REG_S4, "s4"},
160 { ARM64_REG_S5, "s5"},
161 { ARM64_REG_S6, "s6"},
162 { ARM64_REG_S7, "s7"},
163 { ARM64_REG_S8, "s8"},
164 { ARM64_REG_S9, "s9"},
165 { ARM64_REG_S10, "s10"},
166 { ARM64_REG_S11, "s11"},
167 { ARM64_REG_S12, "s12"},
168 { ARM64_REG_S13, "s13"},
169 { ARM64_REG_S14, "s14"},
170 { ARM64_REG_S15, "s15"},
171 { ARM64_REG_S16, "s16"},
172 { ARM64_REG_S17, "s17"},
173 { ARM64_REG_S18, "s18"},
174 { ARM64_REG_S19, "s19"},
175 { ARM64_REG_S20, "s20"},
176 { ARM64_REG_S21, "s21"},
177 { ARM64_REG_S22, "s22"},
178 { ARM64_REG_S23, "s23"},
179 { ARM64_REG_S24, "s24"},
180 { ARM64_REG_S25, "s25"},
181 { ARM64_REG_S26, "s26"},
182 { ARM64_REG_S27, "s27"},
183 { ARM64_REG_S28, "s28"},
184 { ARM64_REG_S29, "s29"},
185 { ARM64_REG_S30, "s30"},
186 { ARM64_REG_S31, "s31"},
187 { ARM64_REG_W0, "w0"},
188 { ARM64_REG_W1, "w1"},
189 { ARM64_REG_W2, "w2"},
190 { ARM64_REG_W3, "w3"},
191 { ARM64_REG_W4, "w4"},
192 { ARM64_REG_W5, "w5"},
193 { ARM64_REG_W6, "w6"},
194 { ARM64_REG_W7, "w7"},
195 { ARM64_REG_W8, "w8"},
196 { ARM64_REG_W9, "w9"},
197 { ARM64_REG_W10, "w10"},
198 { ARM64_REG_W11, "w11"},
199 { ARM64_REG_W12, "w12"},
200 { ARM64_REG_W13, "w13"},
201 { ARM64_REG_W14, "w14"},
202 { ARM64_REG_W15, "w15"},
203 { ARM64_REG_W16, "w16"},
204 { ARM64_REG_W17, "w17"},
205 { ARM64_REG_W18, "w18"},
206 { ARM64_REG_W19, "w19"},
207 { ARM64_REG_W20, "w20"},
208 { ARM64_REG_W21, "w21"},
209 { ARM64_REG_W22, "w22"},
210 { ARM64_REG_W23, "w23"},
211 { ARM64_REG_W24, "w24"},
212 { ARM64_REG_W25, "w25"},
213 { ARM64_REG_W26, "w26"},
214 { ARM64_REG_W27, "w27"},
215 { ARM64_REG_W28, "w28"},
216 { ARM64_REG_W29, "w29"},
217 { ARM64_REG_W30, "w30"},
218 { ARM64_REG_X0, "x0"},
219 { ARM64_REG_X1, "x1"},
220 { ARM64_REG_X2, "x2"},
221 { ARM64_REG_X3, "x3"},
222 { ARM64_REG_X4, "x4"},
223 { ARM64_REG_X5, "x5"},
224 { ARM64_REG_X6, "x6"},
225 { ARM64_REG_X7, "x7"},
226 { ARM64_REG_X8, "x8"},
227 { ARM64_REG_X9, "x9"},
228 { ARM64_REG_X10, "x10"},
229 { ARM64_REG_X11, "x11"},
230 { ARM64_REG_X12, "x12"},
231 { ARM64_REG_X13, "x13"},
232 { ARM64_REG_X14, "x14"},
233 { ARM64_REG_X15, "x15"},
234 { ARM64_REG_X16, "x16"},
235 { ARM64_REG_X17, "x17"},
236 { ARM64_REG_X18, "x18"},
237 { ARM64_REG_X19, "x19"},
238 { ARM64_REG_X20, "x20"},
239 { ARM64_REG_X21, "x21"},
240 { ARM64_REG_X22, "x22"},
241 { ARM64_REG_X23, "x23"},
242 { ARM64_REG_X24, "x24"},
243 { ARM64_REG_X25, "x25"},
244 { ARM64_REG_X26, "x26"},
245 { ARM64_REG_X27, "x27"},
246 { ARM64_REG_X28, "x28"},
247
248 { ARM64_REG_V0, "v0"},
249 { ARM64_REG_V1, "v1"},
250 { ARM64_REG_V2, "v2"},
251 { ARM64_REG_V3, "v3"},
252 { ARM64_REG_V4, "v4"},
253 { ARM64_REG_V5, "v5"},
254 { ARM64_REG_V6, "v6"},
255 { ARM64_REG_V7, "v7"},
256 { ARM64_REG_V8, "v8"},
257 { ARM64_REG_V9, "v9"},
258 { ARM64_REG_V10, "v10"},
259 { ARM64_REG_V11, "v11"},
260 { ARM64_REG_V12, "v12"},
261 { ARM64_REG_V13, "v13"},
262 { ARM64_REG_V14, "v14"},
263 { ARM64_REG_V15, "v15"},
264 { ARM64_REG_V16, "v16"},
265 { ARM64_REG_V17, "v17"},
266 { ARM64_REG_V18, "v18"},
267 { ARM64_REG_V19, "v19"},
268 { ARM64_REG_V20, "v20"},
269 { ARM64_REG_V21, "v21"},
270 { ARM64_REG_V22, "v22"},
271 { ARM64_REG_V23, "v23"},
272 { ARM64_REG_V24, "v24"},
273 { ARM64_REG_V25, "v25"},
274 { ARM64_REG_V26, "v26"},
275 { ARM64_REG_V27, "v27"},
276 { ARM64_REG_V28, "v28"},
277 { ARM64_REG_V29, "v29"},
278 { ARM64_REG_V30, "v30"},
279 { ARM64_REG_V31, "v31"},
280 };
281 #endif
282
AArch64_reg_name(csh handle,unsigned int reg)283 const char *AArch64_reg_name(csh handle, unsigned int reg)
284 {
285 #ifndef CAPSTONE_DIET
286 if (reg >= ARM64_REG_ENDING)
287 return NULL;
288
289 return reg_name_maps[reg].name;
290 #else
291 return NULL;
292 #endif
293 }
294
295 static const insn_map insns[] = {
296 // dummy item
297 {
298 0, 0,
299 #ifndef CAPSTONE_DIET
300 { 0 }, { 0 }, { 0 }, 0, 0
301 #endif
302 },
303
304 {
305 AArch64_ABSv16i8, ARM64_INS_ABS,
306 #ifndef CAPSTONE_DIET
307 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
308 #endif
309 },
310 {
311 AArch64_ABSv1i64, ARM64_INS_ABS,
312 #ifndef CAPSTONE_DIET
313 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
314 #endif
315 },
316 {
317 AArch64_ABSv2i32, ARM64_INS_ABS,
318 #ifndef CAPSTONE_DIET
319 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
320 #endif
321 },
322 {
323 AArch64_ABSv2i64, ARM64_INS_ABS,
324 #ifndef CAPSTONE_DIET
325 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
326 #endif
327 },
328 {
329 AArch64_ABSv4i16, ARM64_INS_ABS,
330 #ifndef CAPSTONE_DIET
331 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
332 #endif
333 },
334 {
335 AArch64_ABSv4i32, ARM64_INS_ABS,
336 #ifndef CAPSTONE_DIET
337 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
338 #endif
339 },
340 {
341 AArch64_ABSv8i16, ARM64_INS_ABS,
342 #ifndef CAPSTONE_DIET
343 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
344 #endif
345 },
346 {
347 AArch64_ABSv8i8, ARM64_INS_ABS,
348 #ifndef CAPSTONE_DIET
349 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
350 #endif
351 },
352 {
353 AArch64_ADCSWr, ARM64_INS_ADC,
354 #ifndef CAPSTONE_DIET
355 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
356 #endif
357 },
358 {
359 AArch64_ADCSXr, ARM64_INS_ADC,
360 #ifndef CAPSTONE_DIET
361 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
362 #endif
363 },
364 {
365 AArch64_ADCWr, ARM64_INS_ADC,
366 #ifndef CAPSTONE_DIET
367 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
368 #endif
369 },
370 {
371 AArch64_ADCXr, ARM64_INS_ADC,
372 #ifndef CAPSTONE_DIET
373 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
374 #endif
375 },
376 {
377 AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN,
378 #ifndef CAPSTONE_DIET
379 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
380 #endif
381 },
382 {
383 AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2,
384 #ifndef CAPSTONE_DIET
385 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
386 #endif
387 },
388 {
389 AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN,
390 #ifndef CAPSTONE_DIET
391 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
392 #endif
393 },
394 {
395 AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2,
396 #ifndef CAPSTONE_DIET
397 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
398 #endif
399 },
400 {
401 AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2,
402 #ifndef CAPSTONE_DIET
403 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
404 #endif
405 },
406 {
407 AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN,
408 #ifndef CAPSTONE_DIET
409 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
410 #endif
411 },
412 {
413 AArch64_ADDPv16i8, ARM64_INS_ADDP,
414 #ifndef CAPSTONE_DIET
415 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
416 #endif
417 },
418 {
419 AArch64_ADDPv2i32, ARM64_INS_ADDP,
420 #ifndef CAPSTONE_DIET
421 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
422 #endif
423 },
424 {
425 AArch64_ADDPv2i64, ARM64_INS_ADDP,
426 #ifndef CAPSTONE_DIET
427 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
428 #endif
429 },
430 {
431 AArch64_ADDPv2i64p, ARM64_INS_ADDP,
432 #ifndef CAPSTONE_DIET
433 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
434 #endif
435 },
436 {
437 AArch64_ADDPv4i16, ARM64_INS_ADDP,
438 #ifndef CAPSTONE_DIET
439 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
440 #endif
441 },
442 {
443 AArch64_ADDPv4i32, ARM64_INS_ADDP,
444 #ifndef CAPSTONE_DIET
445 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
446 #endif
447 },
448 {
449 AArch64_ADDPv8i16, ARM64_INS_ADDP,
450 #ifndef CAPSTONE_DIET
451 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
452 #endif
453 },
454 {
455 AArch64_ADDPv8i8, ARM64_INS_ADDP,
456 #ifndef CAPSTONE_DIET
457 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
458 #endif
459 },
460 {
461 AArch64_ADDSWri, ARM64_INS_ADD,
462 #ifndef CAPSTONE_DIET
463 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
464 #endif
465 },
466 {
467 AArch64_ADDSWrs, ARM64_INS_ADD,
468 #ifndef CAPSTONE_DIET
469 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
470 #endif
471 },
472 {
473 AArch64_ADDSWrx, ARM64_INS_ADD,
474 #ifndef CAPSTONE_DIET
475 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
476 #endif
477 },
478 {
479 AArch64_ADDSXri, ARM64_INS_ADD,
480 #ifndef CAPSTONE_DIET
481 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
482 #endif
483 },
484 {
485 AArch64_ADDSXrs, ARM64_INS_ADD,
486 #ifndef CAPSTONE_DIET
487 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
488 #endif
489 },
490 {
491 AArch64_ADDSXrx, ARM64_INS_ADD,
492 #ifndef CAPSTONE_DIET
493 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
494 #endif
495 },
496 {
497 AArch64_ADDSXrx64, ARM64_INS_ADD,
498 #ifndef CAPSTONE_DIET
499 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
500 #endif
501 },
502 {
503 AArch64_ADDVv16i8v, ARM64_INS_ADDV,
504 #ifndef CAPSTONE_DIET
505 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
506 #endif
507 },
508 {
509 AArch64_ADDVv4i16v, ARM64_INS_ADDV,
510 #ifndef CAPSTONE_DIET
511 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
512 #endif
513 },
514 {
515 AArch64_ADDVv4i32v, ARM64_INS_ADDV,
516 #ifndef CAPSTONE_DIET
517 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
518 #endif
519 },
520 {
521 AArch64_ADDVv8i16v, ARM64_INS_ADDV,
522 #ifndef CAPSTONE_DIET
523 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
524 #endif
525 },
526 {
527 AArch64_ADDVv8i8v, ARM64_INS_ADDV,
528 #ifndef CAPSTONE_DIET
529 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
530 #endif
531 },
532 {
533 AArch64_ADDWri, ARM64_INS_ADD,
534 #ifndef CAPSTONE_DIET
535 { 0 }, { 0 }, { 0 }, 0, 0
536 #endif
537 },
538 {
539 AArch64_ADDWrs, ARM64_INS_ADD,
540 #ifndef CAPSTONE_DIET
541 { 0 }, { 0 }, { 0 }, 0, 0
542 #endif
543 },
544 {
545 AArch64_ADDWrx, ARM64_INS_ADD,
546 #ifndef CAPSTONE_DIET
547 { 0 }, { 0 }, { 0 }, 0, 0
548 #endif
549 },
550 {
551 AArch64_ADDXri, ARM64_INS_ADD,
552 #ifndef CAPSTONE_DIET
553 { 0 }, { 0 }, { 0 }, 0, 0
554 #endif
555 },
556 {
557 AArch64_ADDXrs, ARM64_INS_ADD,
558 #ifndef CAPSTONE_DIET
559 { 0 }, { 0 }, { 0 }, 0, 0
560 #endif
561 },
562 {
563 AArch64_ADDXrx, ARM64_INS_ADD,
564 #ifndef CAPSTONE_DIET
565 { 0 }, { 0 }, { 0 }, 0, 0
566 #endif
567 },
568 {
569 AArch64_ADDXrx64, ARM64_INS_ADD,
570 #ifndef CAPSTONE_DIET
571 { 0 }, { 0 }, { 0 }, 0, 0
572 #endif
573 },
574 {
575 AArch64_ADDv16i8, ARM64_INS_ADD,
576 #ifndef CAPSTONE_DIET
577 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
578 #endif
579 },
580 {
581 AArch64_ADDv1i64, ARM64_INS_ADD,
582 #ifndef CAPSTONE_DIET
583 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
584 #endif
585 },
586 {
587 AArch64_ADDv2i32, ARM64_INS_ADD,
588 #ifndef CAPSTONE_DIET
589 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
590 #endif
591 },
592 {
593 AArch64_ADDv2i64, ARM64_INS_ADD,
594 #ifndef CAPSTONE_DIET
595 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
596 #endif
597 },
598 {
599 AArch64_ADDv4i16, ARM64_INS_ADD,
600 #ifndef CAPSTONE_DIET
601 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
602 #endif
603 },
604 {
605 AArch64_ADDv4i32, ARM64_INS_ADD,
606 #ifndef CAPSTONE_DIET
607 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
608 #endif
609 },
610 {
611 AArch64_ADDv8i16, ARM64_INS_ADD,
612 #ifndef CAPSTONE_DIET
613 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
614 #endif
615 },
616 {
617 AArch64_ADDv8i8, ARM64_INS_ADD,
618 #ifndef CAPSTONE_DIET
619 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
620 #endif
621 },
622 {
623 AArch64_ADR, ARM64_INS_ADR,
624 #ifndef CAPSTONE_DIET
625 { 0 }, { 0 }, { 0 }, 0, 0
626 #endif
627 },
628 {
629 AArch64_ADRP, ARM64_INS_ADRP,
630 #ifndef CAPSTONE_DIET
631 { 0 }, { 0 }, { 0 }, 0, 0
632 #endif
633 },
634 {
635 AArch64_AESDrr, ARM64_INS_AESD,
636 #ifndef CAPSTONE_DIET
637 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
638 #endif
639 },
640 {
641 AArch64_AESErr, ARM64_INS_AESE,
642 #ifndef CAPSTONE_DIET
643 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
644 #endif
645 },
646 {
647 AArch64_AESIMCrr, ARM64_INS_AESIMC,
648 #ifndef CAPSTONE_DIET
649 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
650 #endif
651 },
652 {
653 AArch64_AESMCrr, ARM64_INS_AESMC,
654 #ifndef CAPSTONE_DIET
655 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
656 #endif
657 },
658 {
659 AArch64_ANDSWri, ARM64_INS_AND,
660 #ifndef CAPSTONE_DIET
661 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
662 #endif
663 },
664 {
665 AArch64_ANDSWrs, ARM64_INS_AND,
666 #ifndef CAPSTONE_DIET
667 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
668 #endif
669 },
670 {
671 AArch64_ANDSXri, ARM64_INS_AND,
672 #ifndef CAPSTONE_DIET
673 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
674 #endif
675 },
676 {
677 AArch64_ANDSXrs, ARM64_INS_AND,
678 #ifndef CAPSTONE_DIET
679 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
680 #endif
681 },
682 {
683 AArch64_ANDWri, ARM64_INS_AND,
684 #ifndef CAPSTONE_DIET
685 { 0 }, { 0 }, { 0 }, 0, 0
686 #endif
687 },
688 {
689 AArch64_ANDWrs, ARM64_INS_AND,
690 #ifndef CAPSTONE_DIET
691 { 0 }, { 0 }, { 0 }, 0, 0
692 #endif
693 },
694 {
695 AArch64_ANDXri, ARM64_INS_AND,
696 #ifndef CAPSTONE_DIET
697 { 0 }, { 0 }, { 0 }, 0, 0
698 #endif
699 },
700 {
701 AArch64_ANDXrs, ARM64_INS_AND,
702 #ifndef CAPSTONE_DIET
703 { 0 }, { 0 }, { 0 }, 0, 0
704 #endif
705 },
706 {
707 AArch64_ANDv16i8, ARM64_INS_AND,
708 #ifndef CAPSTONE_DIET
709 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
710 #endif
711 },
712 {
713 AArch64_ANDv8i8, ARM64_INS_AND,
714 #ifndef CAPSTONE_DIET
715 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
716 #endif
717 },
718 {
719 AArch64_ASRVWr, ARM64_INS_ASR,
720 #ifndef CAPSTONE_DIET
721 { 0 }, { 0 }, { 0 }, 0, 0
722 #endif
723 },
724 {
725 AArch64_ASRVXr, ARM64_INS_ASR,
726 #ifndef CAPSTONE_DIET
727 { 0 }, { 0 }, { 0 }, 0, 0
728 #endif
729 },
730 {
731 AArch64_B, ARM64_INS_B,
732 #ifndef CAPSTONE_DIET
733 { 0 }, { 0 }, { 0 }, 1, 0
734 #endif
735 },
736 {
737 AArch64_BFMWri, ARM64_INS_BFM,
738 #ifndef CAPSTONE_DIET
739 { 0 }, { 0 }, { 0 }, 0, 0
740 #endif
741 },
742 {
743 AArch64_BFMXri, ARM64_INS_BFM,
744 #ifndef CAPSTONE_DIET
745 { 0 }, { 0 }, { 0 }, 0, 0
746 #endif
747 },
748 {
749 AArch64_BICSWrs, ARM64_INS_BIC,
750 #ifndef CAPSTONE_DIET
751 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
752 #endif
753 },
754 {
755 AArch64_BICSXrs, ARM64_INS_BIC,
756 #ifndef CAPSTONE_DIET
757 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
758 #endif
759 },
760 {
761 AArch64_BICWrs, ARM64_INS_BIC,
762 #ifndef CAPSTONE_DIET
763 { 0 }, { 0 }, { 0 }, 0, 0
764 #endif
765 },
766 {
767 AArch64_BICXrs, ARM64_INS_BIC,
768 #ifndef CAPSTONE_DIET
769 { 0 }, { 0 }, { 0 }, 0, 0
770 #endif
771 },
772 {
773 AArch64_BICv16i8, ARM64_INS_BIC,
774 #ifndef CAPSTONE_DIET
775 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
776 #endif
777 },
778 {
779 AArch64_BICv2i32, ARM64_INS_BIC,
780 #ifndef CAPSTONE_DIET
781 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
782 #endif
783 },
784 {
785 AArch64_BICv4i16, ARM64_INS_BIC,
786 #ifndef CAPSTONE_DIET
787 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
788 #endif
789 },
790 {
791 AArch64_BICv4i32, ARM64_INS_BIC,
792 #ifndef CAPSTONE_DIET
793 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
794 #endif
795 },
796 {
797 AArch64_BICv8i16, ARM64_INS_BIC,
798 #ifndef CAPSTONE_DIET
799 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
800 #endif
801 },
802 {
803 AArch64_BICv8i8, ARM64_INS_BIC,
804 #ifndef CAPSTONE_DIET
805 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
806 #endif
807 },
808 {
809 AArch64_BIFv16i8, ARM64_INS_BIF,
810 #ifndef CAPSTONE_DIET
811 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
812 #endif
813 },
814 {
815 AArch64_BIFv8i8, ARM64_INS_BIF,
816 #ifndef CAPSTONE_DIET
817 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
818 #endif
819 },
820 {
821 AArch64_BITv16i8, ARM64_INS_BIT,
822 #ifndef CAPSTONE_DIET
823 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
824 #endif
825 },
826 {
827 AArch64_BITv8i8, ARM64_INS_BIT,
828 #ifndef CAPSTONE_DIET
829 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
830 #endif
831 },
832 {
833 AArch64_BL, ARM64_INS_BL,
834 #ifndef CAPSTONE_DIET
835 { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
836 #endif
837 },
838 {
839 AArch64_BLR, ARM64_INS_BLR,
840 #ifndef CAPSTONE_DIET
841 { 0 }, { ARM64_REG_LR, 0 }, { 0 }, 0, 0
842 #endif
843 },
844 {
845 AArch64_BR, ARM64_INS_BR,
846 #ifndef CAPSTONE_DIET
847 { 0 }, { 0 }, { 0 }, 1, 1
848 #endif
849 },
850 {
851 AArch64_BRK, ARM64_INS_BRK,
852 #ifndef CAPSTONE_DIET
853 { 0 }, { 0 }, { 0 }, 0, 0
854 #endif
855 },
856 {
857 AArch64_BSLv16i8, ARM64_INS_BSL,
858 #ifndef CAPSTONE_DIET
859 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
860 #endif
861 },
862 {
863 AArch64_BSLv8i8, ARM64_INS_BSL,
864 #ifndef CAPSTONE_DIET
865 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
866 #endif
867 },
868 {
869 AArch64_Bcc, ARM64_INS_B,
870 #ifndef CAPSTONE_DIET
871 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 1, 0
872 #endif
873 },
874 {
875 AArch64_CBNZW, ARM64_INS_CBNZ,
876 #ifndef CAPSTONE_DIET
877 { 0 }, { 0 }, { 0 }, 1, 0
878 #endif
879 },
880 {
881 AArch64_CBNZX, ARM64_INS_CBNZ,
882 #ifndef CAPSTONE_DIET
883 { 0 }, { 0 }, { 0 }, 1, 0
884 #endif
885 },
886 {
887 AArch64_CBZW, ARM64_INS_CBZ,
888 #ifndef CAPSTONE_DIET
889 { 0 }, { 0 }, { 0 }, 1, 0
890 #endif
891 },
892 {
893 AArch64_CBZX, ARM64_INS_CBZ,
894 #ifndef CAPSTONE_DIET
895 { 0 }, { 0 }, { 0 }, 1, 0
896 #endif
897 },
898 {
899 AArch64_CCMNWi, ARM64_INS_CCMN,
900 #ifndef CAPSTONE_DIET
901 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
902 #endif
903 },
904 {
905 AArch64_CCMNWr, ARM64_INS_CCMN,
906 #ifndef CAPSTONE_DIET
907 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
908 #endif
909 },
910 {
911 AArch64_CCMNXi, ARM64_INS_CCMN,
912 #ifndef CAPSTONE_DIET
913 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
914 #endif
915 },
916 {
917 AArch64_CCMNXr, ARM64_INS_CCMN,
918 #ifndef CAPSTONE_DIET
919 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
920 #endif
921 },
922 {
923 AArch64_CCMPWi, ARM64_INS_CCMP,
924 #ifndef CAPSTONE_DIET
925 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
926 #endif
927 },
928 {
929 AArch64_CCMPWr, ARM64_INS_CCMP,
930 #ifndef CAPSTONE_DIET
931 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
932 #endif
933 },
934 {
935 AArch64_CCMPXi, ARM64_INS_CCMP,
936 #ifndef CAPSTONE_DIET
937 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
938 #endif
939 },
940 {
941 AArch64_CCMPXr, ARM64_INS_CCMP,
942 #ifndef CAPSTONE_DIET
943 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
944 #endif
945 },
946 {
947 AArch64_CLREX, ARM64_INS_CLREX,
948 #ifndef CAPSTONE_DIET
949 { 0 }, { 0 }, { 0 }, 0, 0
950 #endif
951 },
952 {
953 AArch64_CLSWr, ARM64_INS_CLS,
954 #ifndef CAPSTONE_DIET
955 { 0 }, { 0 }, { 0 }, 0, 0
956 #endif
957 },
958 {
959 AArch64_CLSXr, ARM64_INS_CLS,
960 #ifndef CAPSTONE_DIET
961 { 0 }, { 0 }, { 0 }, 0, 0
962 #endif
963 },
964 {
965 AArch64_CLSv16i8, ARM64_INS_CLS,
966 #ifndef CAPSTONE_DIET
967 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
968 #endif
969 },
970 {
971 AArch64_CLSv2i32, ARM64_INS_CLS,
972 #ifndef CAPSTONE_DIET
973 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
974 #endif
975 },
976 {
977 AArch64_CLSv4i16, ARM64_INS_CLS,
978 #ifndef CAPSTONE_DIET
979 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
980 #endif
981 },
982 {
983 AArch64_CLSv4i32, ARM64_INS_CLS,
984 #ifndef CAPSTONE_DIET
985 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
986 #endif
987 },
988 {
989 AArch64_CLSv8i16, ARM64_INS_CLS,
990 #ifndef CAPSTONE_DIET
991 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
992 #endif
993 },
994 {
995 AArch64_CLSv8i8, ARM64_INS_CLS,
996 #ifndef CAPSTONE_DIET
997 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
998 #endif
999 },
1000 {
1001 AArch64_CLZWr, ARM64_INS_CLZ,
1002 #ifndef CAPSTONE_DIET
1003 { 0 }, { 0 }, { 0 }, 0, 0
1004 #endif
1005 },
1006 {
1007 AArch64_CLZXr, ARM64_INS_CLZ,
1008 #ifndef CAPSTONE_DIET
1009 { 0 }, { 0 }, { 0 }, 0, 0
1010 #endif
1011 },
1012 {
1013 AArch64_CLZv16i8, ARM64_INS_CLZ,
1014 #ifndef CAPSTONE_DIET
1015 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1016 #endif
1017 },
1018 {
1019 AArch64_CLZv2i32, ARM64_INS_CLZ,
1020 #ifndef CAPSTONE_DIET
1021 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1022 #endif
1023 },
1024 {
1025 AArch64_CLZv4i16, ARM64_INS_CLZ,
1026 #ifndef CAPSTONE_DIET
1027 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1028 #endif
1029 },
1030 {
1031 AArch64_CLZv4i32, ARM64_INS_CLZ,
1032 #ifndef CAPSTONE_DIET
1033 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1034 #endif
1035 },
1036 {
1037 AArch64_CLZv8i16, ARM64_INS_CLZ,
1038 #ifndef CAPSTONE_DIET
1039 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1040 #endif
1041 },
1042 {
1043 AArch64_CLZv8i8, ARM64_INS_CLZ,
1044 #ifndef CAPSTONE_DIET
1045 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1046 #endif
1047 },
1048 {
1049 AArch64_CMEQv16i8, ARM64_INS_CMEQ,
1050 #ifndef CAPSTONE_DIET
1051 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1052 #endif
1053 },
1054 {
1055 AArch64_CMEQv16i8rz, ARM64_INS_CMEQ,
1056 #ifndef CAPSTONE_DIET
1057 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1058 #endif
1059 },
1060 {
1061 AArch64_CMEQv1i64, ARM64_INS_CMEQ,
1062 #ifndef CAPSTONE_DIET
1063 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1064 #endif
1065 },
1066 {
1067 AArch64_CMEQv1i64rz, ARM64_INS_CMEQ,
1068 #ifndef CAPSTONE_DIET
1069 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1070 #endif
1071 },
1072 {
1073 AArch64_CMEQv2i32, ARM64_INS_CMEQ,
1074 #ifndef CAPSTONE_DIET
1075 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1076 #endif
1077 },
1078 {
1079 AArch64_CMEQv2i32rz, ARM64_INS_CMEQ,
1080 #ifndef CAPSTONE_DIET
1081 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1082 #endif
1083 },
1084 {
1085 AArch64_CMEQv2i64, ARM64_INS_CMEQ,
1086 #ifndef CAPSTONE_DIET
1087 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1088 #endif
1089 },
1090 {
1091 AArch64_CMEQv2i64rz, ARM64_INS_CMEQ,
1092 #ifndef CAPSTONE_DIET
1093 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1094 #endif
1095 },
1096 {
1097 AArch64_CMEQv4i16, ARM64_INS_CMEQ,
1098 #ifndef CAPSTONE_DIET
1099 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1100 #endif
1101 },
1102 {
1103 AArch64_CMEQv4i16rz, ARM64_INS_CMEQ,
1104 #ifndef CAPSTONE_DIET
1105 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1106 #endif
1107 },
1108 {
1109 AArch64_CMEQv4i32, ARM64_INS_CMEQ,
1110 #ifndef CAPSTONE_DIET
1111 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1112 #endif
1113 },
1114 {
1115 AArch64_CMEQv4i32rz, ARM64_INS_CMEQ,
1116 #ifndef CAPSTONE_DIET
1117 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1118 #endif
1119 },
1120 {
1121 AArch64_CMEQv8i16, ARM64_INS_CMEQ,
1122 #ifndef CAPSTONE_DIET
1123 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1124 #endif
1125 },
1126 {
1127 AArch64_CMEQv8i16rz, ARM64_INS_CMEQ,
1128 #ifndef CAPSTONE_DIET
1129 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1130 #endif
1131 },
1132 {
1133 AArch64_CMEQv8i8, ARM64_INS_CMEQ,
1134 #ifndef CAPSTONE_DIET
1135 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1136 #endif
1137 },
1138 {
1139 AArch64_CMEQv8i8rz, ARM64_INS_CMEQ,
1140 #ifndef CAPSTONE_DIET
1141 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1142 #endif
1143 },
1144 {
1145 AArch64_CMGEv16i8, ARM64_INS_CMGE,
1146 #ifndef CAPSTONE_DIET
1147 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1148 #endif
1149 },
1150 {
1151 AArch64_CMGEv16i8rz, ARM64_INS_CMGE,
1152 #ifndef CAPSTONE_DIET
1153 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1154 #endif
1155 },
1156 {
1157 AArch64_CMGEv1i64, ARM64_INS_CMGE,
1158 #ifndef CAPSTONE_DIET
1159 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1160 #endif
1161 },
1162 {
1163 AArch64_CMGEv1i64rz, ARM64_INS_CMGE,
1164 #ifndef CAPSTONE_DIET
1165 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1166 #endif
1167 },
1168 {
1169 AArch64_CMGEv2i32, ARM64_INS_CMGE,
1170 #ifndef CAPSTONE_DIET
1171 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1172 #endif
1173 },
1174 {
1175 AArch64_CMGEv2i32rz, ARM64_INS_CMGE,
1176 #ifndef CAPSTONE_DIET
1177 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1178 #endif
1179 },
1180 {
1181 AArch64_CMGEv2i64, ARM64_INS_CMGE,
1182 #ifndef CAPSTONE_DIET
1183 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1184 #endif
1185 },
1186 {
1187 AArch64_CMGEv2i64rz, ARM64_INS_CMGE,
1188 #ifndef CAPSTONE_DIET
1189 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1190 #endif
1191 },
1192 {
1193 AArch64_CMGEv4i16, ARM64_INS_CMGE,
1194 #ifndef CAPSTONE_DIET
1195 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1196 #endif
1197 },
1198 {
1199 AArch64_CMGEv4i16rz, ARM64_INS_CMGE,
1200 #ifndef CAPSTONE_DIET
1201 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1202 #endif
1203 },
1204 {
1205 AArch64_CMGEv4i32, ARM64_INS_CMGE,
1206 #ifndef CAPSTONE_DIET
1207 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1208 #endif
1209 },
1210 {
1211 AArch64_CMGEv4i32rz, ARM64_INS_CMGE,
1212 #ifndef CAPSTONE_DIET
1213 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1214 #endif
1215 },
1216 {
1217 AArch64_CMGEv8i16, ARM64_INS_CMGE,
1218 #ifndef CAPSTONE_DIET
1219 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1220 #endif
1221 },
1222 {
1223 AArch64_CMGEv8i16rz, ARM64_INS_CMGE,
1224 #ifndef CAPSTONE_DIET
1225 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1226 #endif
1227 },
1228 {
1229 AArch64_CMGEv8i8, ARM64_INS_CMGE,
1230 #ifndef CAPSTONE_DIET
1231 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1232 #endif
1233 },
1234 {
1235 AArch64_CMGEv8i8rz, ARM64_INS_CMGE,
1236 #ifndef CAPSTONE_DIET
1237 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1238 #endif
1239 },
1240 {
1241 AArch64_CMGTv16i8, ARM64_INS_CMGT,
1242 #ifndef CAPSTONE_DIET
1243 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1244 #endif
1245 },
1246 {
1247 AArch64_CMGTv16i8rz, ARM64_INS_CMGT,
1248 #ifndef CAPSTONE_DIET
1249 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1250 #endif
1251 },
1252 {
1253 AArch64_CMGTv1i64, ARM64_INS_CMGT,
1254 #ifndef CAPSTONE_DIET
1255 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1256 #endif
1257 },
1258 {
1259 AArch64_CMGTv1i64rz, ARM64_INS_CMGT,
1260 #ifndef CAPSTONE_DIET
1261 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1262 #endif
1263 },
1264 {
1265 AArch64_CMGTv2i32, ARM64_INS_CMGT,
1266 #ifndef CAPSTONE_DIET
1267 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1268 #endif
1269 },
1270 {
1271 AArch64_CMGTv2i32rz, ARM64_INS_CMGT,
1272 #ifndef CAPSTONE_DIET
1273 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1274 #endif
1275 },
1276 {
1277 AArch64_CMGTv2i64, ARM64_INS_CMGT,
1278 #ifndef CAPSTONE_DIET
1279 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1280 #endif
1281 },
1282 {
1283 AArch64_CMGTv2i64rz, ARM64_INS_CMGT,
1284 #ifndef CAPSTONE_DIET
1285 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1286 #endif
1287 },
1288 {
1289 AArch64_CMGTv4i16, ARM64_INS_CMGT,
1290 #ifndef CAPSTONE_DIET
1291 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1292 #endif
1293 },
1294 {
1295 AArch64_CMGTv4i16rz, ARM64_INS_CMGT,
1296 #ifndef CAPSTONE_DIET
1297 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1298 #endif
1299 },
1300 {
1301 AArch64_CMGTv4i32, ARM64_INS_CMGT,
1302 #ifndef CAPSTONE_DIET
1303 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1304 #endif
1305 },
1306 {
1307 AArch64_CMGTv4i32rz, ARM64_INS_CMGT,
1308 #ifndef CAPSTONE_DIET
1309 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1310 #endif
1311 },
1312 {
1313 AArch64_CMGTv8i16, ARM64_INS_CMGT,
1314 #ifndef CAPSTONE_DIET
1315 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1316 #endif
1317 },
1318 {
1319 AArch64_CMGTv8i16rz, ARM64_INS_CMGT,
1320 #ifndef CAPSTONE_DIET
1321 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1322 #endif
1323 },
1324 {
1325 AArch64_CMGTv8i8, ARM64_INS_CMGT,
1326 #ifndef CAPSTONE_DIET
1327 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1328 #endif
1329 },
1330 {
1331 AArch64_CMGTv8i8rz, ARM64_INS_CMGT,
1332 #ifndef CAPSTONE_DIET
1333 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1334 #endif
1335 },
1336 {
1337 AArch64_CMHIv16i8, ARM64_INS_CMHI,
1338 #ifndef CAPSTONE_DIET
1339 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1340 #endif
1341 },
1342 {
1343 AArch64_CMHIv1i64, ARM64_INS_CMHI,
1344 #ifndef CAPSTONE_DIET
1345 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1346 #endif
1347 },
1348 {
1349 AArch64_CMHIv2i32, ARM64_INS_CMHI,
1350 #ifndef CAPSTONE_DIET
1351 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1352 #endif
1353 },
1354 {
1355 AArch64_CMHIv2i64, ARM64_INS_CMHI,
1356 #ifndef CAPSTONE_DIET
1357 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1358 #endif
1359 },
1360 {
1361 AArch64_CMHIv4i16, ARM64_INS_CMHI,
1362 #ifndef CAPSTONE_DIET
1363 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1364 #endif
1365 },
1366 {
1367 AArch64_CMHIv4i32, ARM64_INS_CMHI,
1368 #ifndef CAPSTONE_DIET
1369 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1370 #endif
1371 },
1372 {
1373 AArch64_CMHIv8i16, ARM64_INS_CMHI,
1374 #ifndef CAPSTONE_DIET
1375 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1376 #endif
1377 },
1378 {
1379 AArch64_CMHIv8i8, ARM64_INS_CMHI,
1380 #ifndef CAPSTONE_DIET
1381 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1382 #endif
1383 },
1384 {
1385 AArch64_CMHSv16i8, ARM64_INS_CMHS,
1386 #ifndef CAPSTONE_DIET
1387 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1388 #endif
1389 },
1390 {
1391 AArch64_CMHSv1i64, ARM64_INS_CMHS,
1392 #ifndef CAPSTONE_DIET
1393 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1394 #endif
1395 },
1396 {
1397 AArch64_CMHSv2i32, ARM64_INS_CMHS,
1398 #ifndef CAPSTONE_DIET
1399 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1400 #endif
1401 },
1402 {
1403 AArch64_CMHSv2i64, ARM64_INS_CMHS,
1404 #ifndef CAPSTONE_DIET
1405 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1406 #endif
1407 },
1408 {
1409 AArch64_CMHSv4i16, ARM64_INS_CMHS,
1410 #ifndef CAPSTONE_DIET
1411 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1412 #endif
1413 },
1414 {
1415 AArch64_CMHSv4i32, ARM64_INS_CMHS,
1416 #ifndef CAPSTONE_DIET
1417 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1418 #endif
1419 },
1420 {
1421 AArch64_CMHSv8i16, ARM64_INS_CMHS,
1422 #ifndef CAPSTONE_DIET
1423 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1424 #endif
1425 },
1426 {
1427 AArch64_CMHSv8i8, ARM64_INS_CMHS,
1428 #ifndef CAPSTONE_DIET
1429 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1430 #endif
1431 },
1432 {
1433 AArch64_CMLEv16i8rz, ARM64_INS_CMLE,
1434 #ifndef CAPSTONE_DIET
1435 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1436 #endif
1437 },
1438 {
1439 AArch64_CMLEv1i64rz, ARM64_INS_CMLE,
1440 #ifndef CAPSTONE_DIET
1441 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1442 #endif
1443 },
1444 {
1445 AArch64_CMLEv2i32rz, ARM64_INS_CMLE,
1446 #ifndef CAPSTONE_DIET
1447 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1448 #endif
1449 },
1450 {
1451 AArch64_CMLEv2i64rz, ARM64_INS_CMLE,
1452 #ifndef CAPSTONE_DIET
1453 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1454 #endif
1455 },
1456 {
1457 AArch64_CMLEv4i16rz, ARM64_INS_CMLE,
1458 #ifndef CAPSTONE_DIET
1459 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1460 #endif
1461 },
1462 {
1463 AArch64_CMLEv4i32rz, ARM64_INS_CMLE,
1464 #ifndef CAPSTONE_DIET
1465 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1466 #endif
1467 },
1468 {
1469 AArch64_CMLEv8i16rz, ARM64_INS_CMLE,
1470 #ifndef CAPSTONE_DIET
1471 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1472 #endif
1473 },
1474 {
1475 AArch64_CMLEv8i8rz, ARM64_INS_CMLE,
1476 #ifndef CAPSTONE_DIET
1477 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1478 #endif
1479 },
1480 {
1481 AArch64_CMLTv16i8rz, ARM64_INS_CMLT,
1482 #ifndef CAPSTONE_DIET
1483 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1484 #endif
1485 },
1486 {
1487 AArch64_CMLTv1i64rz, ARM64_INS_CMLT,
1488 #ifndef CAPSTONE_DIET
1489 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1490 #endif
1491 },
1492 {
1493 AArch64_CMLTv2i32rz, ARM64_INS_CMLT,
1494 #ifndef CAPSTONE_DIET
1495 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1496 #endif
1497 },
1498 {
1499 AArch64_CMLTv2i64rz, ARM64_INS_CMLT,
1500 #ifndef CAPSTONE_DIET
1501 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1502 #endif
1503 },
1504 {
1505 AArch64_CMLTv4i16rz, ARM64_INS_CMLT,
1506 #ifndef CAPSTONE_DIET
1507 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1508 #endif
1509 },
1510 {
1511 AArch64_CMLTv4i32rz, ARM64_INS_CMLT,
1512 #ifndef CAPSTONE_DIET
1513 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1514 #endif
1515 },
1516 {
1517 AArch64_CMLTv8i16rz, ARM64_INS_CMLT,
1518 #ifndef CAPSTONE_DIET
1519 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1520 #endif
1521 },
1522 {
1523 AArch64_CMLTv8i8rz, ARM64_INS_CMLT,
1524 #ifndef CAPSTONE_DIET
1525 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1526 #endif
1527 },
1528 {
1529 AArch64_CMTSTv16i8, ARM64_INS_CMTST,
1530 #ifndef CAPSTONE_DIET
1531 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1532 #endif
1533 },
1534 {
1535 AArch64_CMTSTv1i64, ARM64_INS_CMTST,
1536 #ifndef CAPSTONE_DIET
1537 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1538 #endif
1539 },
1540 {
1541 AArch64_CMTSTv2i32, ARM64_INS_CMTST,
1542 #ifndef CAPSTONE_DIET
1543 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1544 #endif
1545 },
1546 {
1547 AArch64_CMTSTv2i64, ARM64_INS_CMTST,
1548 #ifndef CAPSTONE_DIET
1549 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1550 #endif
1551 },
1552 {
1553 AArch64_CMTSTv4i16, ARM64_INS_CMTST,
1554 #ifndef CAPSTONE_DIET
1555 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1556 #endif
1557 },
1558 {
1559 AArch64_CMTSTv4i32, ARM64_INS_CMTST,
1560 #ifndef CAPSTONE_DIET
1561 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1562 #endif
1563 },
1564 {
1565 AArch64_CMTSTv8i16, ARM64_INS_CMTST,
1566 #ifndef CAPSTONE_DIET
1567 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1568 #endif
1569 },
1570 {
1571 AArch64_CMTSTv8i8, ARM64_INS_CMTST,
1572 #ifndef CAPSTONE_DIET
1573 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1574 #endif
1575 },
1576 {
1577 AArch64_CNTv16i8, ARM64_INS_CNT,
1578 #ifndef CAPSTONE_DIET
1579 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1580 #endif
1581 },
1582 {
1583 AArch64_CNTv8i8, ARM64_INS_CNT,
1584 #ifndef CAPSTONE_DIET
1585 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1586 #endif
1587 },
1588 {
1589 AArch64_CPYi16, ARM64_INS_MOV,
1590 #ifndef CAPSTONE_DIET
1591 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1592 #endif
1593 },
1594 {
1595 AArch64_CPYi32, ARM64_INS_MOV,
1596 #ifndef CAPSTONE_DIET
1597 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1598 #endif
1599 },
1600 {
1601 AArch64_CPYi64, ARM64_INS_MOV,
1602 #ifndef CAPSTONE_DIET
1603 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1604 #endif
1605 },
1606 {
1607 AArch64_CPYi8, ARM64_INS_MOV,
1608 #ifndef CAPSTONE_DIET
1609 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1610 #endif
1611 },
1612 {
1613 AArch64_CRC32Brr, ARM64_INS_CRC32B,
1614 #ifndef CAPSTONE_DIET
1615 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1616 #endif
1617 },
1618 {
1619 AArch64_CRC32CBrr, ARM64_INS_CRC32CB,
1620 #ifndef CAPSTONE_DIET
1621 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1622 #endif
1623 },
1624 {
1625 AArch64_CRC32CHrr, ARM64_INS_CRC32CH,
1626 #ifndef CAPSTONE_DIET
1627 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1628 #endif
1629 },
1630 {
1631 AArch64_CRC32CWrr, ARM64_INS_CRC32CW,
1632 #ifndef CAPSTONE_DIET
1633 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1634 #endif
1635 },
1636 {
1637 AArch64_CRC32CXrr, ARM64_INS_CRC32CX,
1638 #ifndef CAPSTONE_DIET
1639 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1640 #endif
1641 },
1642 {
1643 AArch64_CRC32Hrr, ARM64_INS_CRC32H,
1644 #ifndef CAPSTONE_DIET
1645 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1646 #endif
1647 },
1648 {
1649 AArch64_CRC32Wrr, ARM64_INS_CRC32W,
1650 #ifndef CAPSTONE_DIET
1651 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1652 #endif
1653 },
1654 {
1655 AArch64_CRC32Xrr, ARM64_INS_CRC32X,
1656 #ifndef CAPSTONE_DIET
1657 { 0 }, { 0 }, { ARM64_GRP_CRC, 0 }, 0, 0
1658 #endif
1659 },
1660 {
1661 AArch64_CSELWr, ARM64_INS_CSEL,
1662 #ifndef CAPSTONE_DIET
1663 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1664 #endif
1665 },
1666 {
1667 AArch64_CSELXr, ARM64_INS_CSEL,
1668 #ifndef CAPSTONE_DIET
1669 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1670 #endif
1671 },
1672 {
1673 AArch64_CSINCWr, ARM64_INS_CSINC,
1674 #ifndef CAPSTONE_DIET
1675 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1676 #endif
1677 },
1678 {
1679 AArch64_CSINCXr, ARM64_INS_CSINC,
1680 #ifndef CAPSTONE_DIET
1681 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1682 #endif
1683 },
1684 {
1685 AArch64_CSINVWr, ARM64_INS_CSINV,
1686 #ifndef CAPSTONE_DIET
1687 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1688 #endif
1689 },
1690 {
1691 AArch64_CSINVXr, ARM64_INS_CSINV,
1692 #ifndef CAPSTONE_DIET
1693 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1694 #endif
1695 },
1696 {
1697 AArch64_CSNEGWr, ARM64_INS_CSNEG,
1698 #ifndef CAPSTONE_DIET
1699 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1700 #endif
1701 },
1702 {
1703 AArch64_CSNEGXr, ARM64_INS_CSNEG,
1704 #ifndef CAPSTONE_DIET
1705 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
1706 #endif
1707 },
1708 {
1709 AArch64_DCPS1, ARM64_INS_DCPS1,
1710 #ifndef CAPSTONE_DIET
1711 { 0 }, { 0 }, { 0 }, 0, 0
1712 #endif
1713 },
1714 {
1715 AArch64_DCPS2, ARM64_INS_DCPS2,
1716 #ifndef CAPSTONE_DIET
1717 { 0 }, { 0 }, { 0 }, 0, 0
1718 #endif
1719 },
1720 {
1721 AArch64_DCPS3, ARM64_INS_DCPS3,
1722 #ifndef CAPSTONE_DIET
1723 { 0 }, { 0 }, { 0 }, 0, 0
1724 #endif
1725 },
1726 {
1727 AArch64_DMB, ARM64_INS_DMB,
1728 #ifndef CAPSTONE_DIET
1729 { 0 }, { 0 }, { 0 }, 0, 0
1730 #endif
1731 },
1732 {
1733 AArch64_DRPS, ARM64_INS_DRPS,
1734 #ifndef CAPSTONE_DIET
1735 { 0 }, { 0 }, { 0 }, 0, 0
1736 #endif
1737 },
1738 {
1739 AArch64_DSB, ARM64_INS_DSB,
1740 #ifndef CAPSTONE_DIET
1741 { 0 }, { 0 }, { 0 }, 0, 0
1742 #endif
1743 },
1744 {
1745 AArch64_DUPv16i8gpr, ARM64_INS_DUP,
1746 #ifndef CAPSTONE_DIET
1747 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1748 #endif
1749 },
1750 {
1751 AArch64_DUPv16i8lane, ARM64_INS_DUP,
1752 #ifndef CAPSTONE_DIET
1753 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1754 #endif
1755 },
1756 {
1757 AArch64_DUPv2i32gpr, ARM64_INS_DUP,
1758 #ifndef CAPSTONE_DIET
1759 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1760 #endif
1761 },
1762 {
1763 AArch64_DUPv2i32lane, ARM64_INS_DUP,
1764 #ifndef CAPSTONE_DIET
1765 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1766 #endif
1767 },
1768 {
1769 AArch64_DUPv2i64gpr, ARM64_INS_DUP,
1770 #ifndef CAPSTONE_DIET
1771 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1772 #endif
1773 },
1774 {
1775 AArch64_DUPv2i64lane, ARM64_INS_DUP,
1776 #ifndef CAPSTONE_DIET
1777 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1778 #endif
1779 },
1780 {
1781 AArch64_DUPv4i16gpr, ARM64_INS_DUP,
1782 #ifndef CAPSTONE_DIET
1783 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1784 #endif
1785 },
1786 {
1787 AArch64_DUPv4i16lane, ARM64_INS_DUP,
1788 #ifndef CAPSTONE_DIET
1789 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1790 #endif
1791 },
1792 {
1793 AArch64_DUPv4i32gpr, ARM64_INS_DUP,
1794 #ifndef CAPSTONE_DIET
1795 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1796 #endif
1797 },
1798 {
1799 AArch64_DUPv4i32lane, ARM64_INS_DUP,
1800 #ifndef CAPSTONE_DIET
1801 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1802 #endif
1803 },
1804 {
1805 AArch64_DUPv8i16gpr, ARM64_INS_DUP,
1806 #ifndef CAPSTONE_DIET
1807 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1808 #endif
1809 },
1810 {
1811 AArch64_DUPv8i16lane, ARM64_INS_DUP,
1812 #ifndef CAPSTONE_DIET
1813 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1814 #endif
1815 },
1816 {
1817 AArch64_DUPv8i8gpr, ARM64_INS_DUP,
1818 #ifndef CAPSTONE_DIET
1819 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1820 #endif
1821 },
1822 {
1823 AArch64_DUPv8i8lane, ARM64_INS_DUP,
1824 #ifndef CAPSTONE_DIET
1825 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1826 #endif
1827 },
1828 {
1829 AArch64_EONWrs, ARM64_INS_EON,
1830 #ifndef CAPSTONE_DIET
1831 { 0 }, { 0 }, { 0 }, 0, 0
1832 #endif
1833 },
1834 {
1835 AArch64_EONXrs, ARM64_INS_EON,
1836 #ifndef CAPSTONE_DIET
1837 { 0 }, { 0 }, { 0 }, 0, 0
1838 #endif
1839 },
1840 {
1841 AArch64_EORWri, ARM64_INS_EOR,
1842 #ifndef CAPSTONE_DIET
1843 { 0 }, { 0 }, { 0 }, 0, 0
1844 #endif
1845 },
1846 {
1847 AArch64_EORWrs, ARM64_INS_EOR,
1848 #ifndef CAPSTONE_DIET
1849 { 0 }, { 0 }, { 0 }, 0, 0
1850 #endif
1851 },
1852 {
1853 AArch64_EORXri, ARM64_INS_EOR,
1854 #ifndef CAPSTONE_DIET
1855 { 0 }, { 0 }, { 0 }, 0, 0
1856 #endif
1857 },
1858 {
1859 AArch64_EORXrs, ARM64_INS_EOR,
1860 #ifndef CAPSTONE_DIET
1861 { 0 }, { 0 }, { 0 }, 0, 0
1862 #endif
1863 },
1864 {
1865 AArch64_EORv16i8, ARM64_INS_EOR,
1866 #ifndef CAPSTONE_DIET
1867 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1868 #endif
1869 },
1870 {
1871 AArch64_EORv8i8, ARM64_INS_EOR,
1872 #ifndef CAPSTONE_DIET
1873 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1874 #endif
1875 },
1876 {
1877 AArch64_ERET, ARM64_INS_ERET,
1878 #ifndef CAPSTONE_DIET
1879 { 0 }, { 0 }, { 0 }, 0, 0
1880 #endif
1881 },
1882 {
1883 AArch64_EXTRWrri, ARM64_INS_EXTR,
1884 #ifndef CAPSTONE_DIET
1885 { 0 }, { 0 }, { 0 }, 0, 0
1886 #endif
1887 },
1888 {
1889 AArch64_EXTRXrri, ARM64_INS_EXTR,
1890 #ifndef CAPSTONE_DIET
1891 { 0 }, { 0 }, { 0 }, 0, 0
1892 #endif
1893 },
1894 {
1895 AArch64_EXTv16i8, ARM64_INS_EXT,
1896 #ifndef CAPSTONE_DIET
1897 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1898 #endif
1899 },
1900 {
1901 AArch64_EXTv8i8, ARM64_INS_EXT,
1902 #ifndef CAPSTONE_DIET
1903 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1904 #endif
1905 },
1906 {
1907 AArch64_FABD32, ARM64_INS_FABD,
1908 #ifndef CAPSTONE_DIET
1909 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1910 #endif
1911 },
1912 {
1913 AArch64_FABD64, ARM64_INS_FABD,
1914 #ifndef CAPSTONE_DIET
1915 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1916 #endif
1917 },
1918 {
1919 AArch64_FABDv2f32, ARM64_INS_FABD,
1920 #ifndef CAPSTONE_DIET
1921 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1922 #endif
1923 },
1924 {
1925 AArch64_FABDv2f64, ARM64_INS_FABD,
1926 #ifndef CAPSTONE_DIET
1927 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1928 #endif
1929 },
1930 {
1931 AArch64_FABDv4f32, ARM64_INS_FABD,
1932 #ifndef CAPSTONE_DIET
1933 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1934 #endif
1935 },
1936 {
1937 AArch64_FABSDr, ARM64_INS_FABS,
1938 #ifndef CAPSTONE_DIET
1939 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
1940 #endif
1941 },
1942 {
1943 AArch64_FABSSr, ARM64_INS_FABS,
1944 #ifndef CAPSTONE_DIET
1945 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
1946 #endif
1947 },
1948 {
1949 AArch64_FABSv2f32, ARM64_INS_FABS,
1950 #ifndef CAPSTONE_DIET
1951 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1952 #endif
1953 },
1954 {
1955 AArch64_FABSv2f64, ARM64_INS_FABS,
1956 #ifndef CAPSTONE_DIET
1957 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1958 #endif
1959 },
1960 {
1961 AArch64_FABSv4f32, ARM64_INS_FABS,
1962 #ifndef CAPSTONE_DIET
1963 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1964 #endif
1965 },
1966 {
1967 AArch64_FACGE32, ARM64_INS_FACGE,
1968 #ifndef CAPSTONE_DIET
1969 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1970 #endif
1971 },
1972 {
1973 AArch64_FACGE64, ARM64_INS_FACGE,
1974 #ifndef CAPSTONE_DIET
1975 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1976 #endif
1977 },
1978 {
1979 AArch64_FACGEv2f32, ARM64_INS_FACGE,
1980 #ifndef CAPSTONE_DIET
1981 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1982 #endif
1983 },
1984 {
1985 AArch64_FACGEv2f64, ARM64_INS_FACGE,
1986 #ifndef CAPSTONE_DIET
1987 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1988 #endif
1989 },
1990 {
1991 AArch64_FACGEv4f32, ARM64_INS_FACGE,
1992 #ifndef CAPSTONE_DIET
1993 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
1994 #endif
1995 },
1996 {
1997 AArch64_FACGT32, ARM64_INS_FACGT,
1998 #ifndef CAPSTONE_DIET
1999 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2000 #endif
2001 },
2002 {
2003 AArch64_FACGT64, ARM64_INS_FACGT,
2004 #ifndef CAPSTONE_DIET
2005 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2006 #endif
2007 },
2008 {
2009 AArch64_FACGTv2f32, ARM64_INS_FACGT,
2010 #ifndef CAPSTONE_DIET
2011 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2012 #endif
2013 },
2014 {
2015 AArch64_FACGTv2f64, ARM64_INS_FACGT,
2016 #ifndef CAPSTONE_DIET
2017 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2018 #endif
2019 },
2020 {
2021 AArch64_FACGTv4f32, ARM64_INS_FACGT,
2022 #ifndef CAPSTONE_DIET
2023 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2024 #endif
2025 },
2026 {
2027 AArch64_FADDDrr, ARM64_INS_FADD,
2028 #ifndef CAPSTONE_DIET
2029 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2030 #endif
2031 },
2032 {
2033 AArch64_FADDPv2f32, ARM64_INS_FADDP,
2034 #ifndef CAPSTONE_DIET
2035 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2036 #endif
2037 },
2038 {
2039 AArch64_FADDPv2f64, ARM64_INS_FADDP,
2040 #ifndef CAPSTONE_DIET
2041 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2042 #endif
2043 },
2044 {
2045 AArch64_FADDPv2i32p, ARM64_INS_FADDP,
2046 #ifndef CAPSTONE_DIET
2047 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2048 #endif
2049 },
2050 {
2051 AArch64_FADDPv2i64p, ARM64_INS_FADDP,
2052 #ifndef CAPSTONE_DIET
2053 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2054 #endif
2055 },
2056 {
2057 AArch64_FADDPv4f32, ARM64_INS_FADDP,
2058 #ifndef CAPSTONE_DIET
2059 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2060 #endif
2061 },
2062 {
2063 AArch64_FADDSrr, ARM64_INS_FADD,
2064 #ifndef CAPSTONE_DIET
2065 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2066 #endif
2067 },
2068 {
2069 AArch64_FADDv2f32, ARM64_INS_FADD,
2070 #ifndef CAPSTONE_DIET
2071 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2072 #endif
2073 },
2074 {
2075 AArch64_FADDv2f64, ARM64_INS_FADD,
2076 #ifndef CAPSTONE_DIET
2077 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2078 #endif
2079 },
2080 {
2081 AArch64_FADDv4f32, ARM64_INS_FADD,
2082 #ifndef CAPSTONE_DIET
2083 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2084 #endif
2085 },
2086 {
2087 AArch64_FCCMPDrr, ARM64_INS_FCCMP,
2088 #ifndef CAPSTONE_DIET
2089 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2090 #endif
2091 },
2092 {
2093 AArch64_FCCMPEDrr, ARM64_INS_FCCMPE,
2094 #ifndef CAPSTONE_DIET
2095 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2096 #endif
2097 },
2098 {
2099 AArch64_FCCMPESrr, ARM64_INS_FCCMPE,
2100 #ifndef CAPSTONE_DIET
2101 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2102 #endif
2103 },
2104 {
2105 AArch64_FCCMPSrr, ARM64_INS_FCCMP,
2106 #ifndef CAPSTONE_DIET
2107 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2108 #endif
2109 },
2110 {
2111 AArch64_FCMEQ32, ARM64_INS_FCMEQ,
2112 #ifndef CAPSTONE_DIET
2113 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2114 #endif
2115 },
2116 {
2117 AArch64_FCMEQ64, ARM64_INS_FCMEQ,
2118 #ifndef CAPSTONE_DIET
2119 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2120 #endif
2121 },
2122 {
2123 AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ,
2124 #ifndef CAPSTONE_DIET
2125 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2126 #endif
2127 },
2128 {
2129 AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ,
2130 #ifndef CAPSTONE_DIET
2131 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2132 #endif
2133 },
2134 {
2135 AArch64_FCMEQv2f32, ARM64_INS_FCMEQ,
2136 #ifndef CAPSTONE_DIET
2137 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2138 #endif
2139 },
2140 {
2141 AArch64_FCMEQv2f64, ARM64_INS_FCMEQ,
2142 #ifndef CAPSTONE_DIET
2143 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2144 #endif
2145 },
2146 {
2147 AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ,
2148 #ifndef CAPSTONE_DIET
2149 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2150 #endif
2151 },
2152 {
2153 AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ,
2154 #ifndef CAPSTONE_DIET
2155 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2156 #endif
2157 },
2158 {
2159 AArch64_FCMEQv4f32, ARM64_INS_FCMEQ,
2160 #ifndef CAPSTONE_DIET
2161 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2162 #endif
2163 },
2164 {
2165 AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ,
2166 #ifndef CAPSTONE_DIET
2167 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2168 #endif
2169 },
2170 {
2171 AArch64_FCMGE32, ARM64_INS_FCMGE,
2172 #ifndef CAPSTONE_DIET
2173 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2174 #endif
2175 },
2176 {
2177 AArch64_FCMGE64, ARM64_INS_FCMGE,
2178 #ifndef CAPSTONE_DIET
2179 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2180 #endif
2181 },
2182 {
2183 AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE,
2184 #ifndef CAPSTONE_DIET
2185 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2186 #endif
2187 },
2188 {
2189 AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE,
2190 #ifndef CAPSTONE_DIET
2191 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2192 #endif
2193 },
2194 {
2195 AArch64_FCMGEv2f32, ARM64_INS_FCMGE,
2196 #ifndef CAPSTONE_DIET
2197 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2198 #endif
2199 },
2200 {
2201 AArch64_FCMGEv2f64, ARM64_INS_FCMGE,
2202 #ifndef CAPSTONE_DIET
2203 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2204 #endif
2205 },
2206 {
2207 AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE,
2208 #ifndef CAPSTONE_DIET
2209 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2210 #endif
2211 },
2212 {
2213 AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE,
2214 #ifndef CAPSTONE_DIET
2215 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2216 #endif
2217 },
2218 {
2219 AArch64_FCMGEv4f32, ARM64_INS_FCMGE,
2220 #ifndef CAPSTONE_DIET
2221 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2222 #endif
2223 },
2224 {
2225 AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE,
2226 #ifndef CAPSTONE_DIET
2227 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2228 #endif
2229 },
2230 {
2231 AArch64_FCMGT32, ARM64_INS_FCMGT,
2232 #ifndef CAPSTONE_DIET
2233 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2234 #endif
2235 },
2236 {
2237 AArch64_FCMGT64, ARM64_INS_FCMGT,
2238 #ifndef CAPSTONE_DIET
2239 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2240 #endif
2241 },
2242 {
2243 AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT,
2244 #ifndef CAPSTONE_DIET
2245 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2246 #endif
2247 },
2248 {
2249 AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT,
2250 #ifndef CAPSTONE_DIET
2251 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2252 #endif
2253 },
2254 {
2255 AArch64_FCMGTv2f32, ARM64_INS_FCMGT,
2256 #ifndef CAPSTONE_DIET
2257 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2258 #endif
2259 },
2260 {
2261 AArch64_FCMGTv2f64, ARM64_INS_FCMGT,
2262 #ifndef CAPSTONE_DIET
2263 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2264 #endif
2265 },
2266 {
2267 AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT,
2268 #ifndef CAPSTONE_DIET
2269 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2270 #endif
2271 },
2272 {
2273 AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT,
2274 #ifndef CAPSTONE_DIET
2275 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2276 #endif
2277 },
2278 {
2279 AArch64_FCMGTv4f32, ARM64_INS_FCMGT,
2280 #ifndef CAPSTONE_DIET
2281 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2282 #endif
2283 },
2284 {
2285 AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT,
2286 #ifndef CAPSTONE_DIET
2287 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2288 #endif
2289 },
2290 {
2291 AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE,
2292 #ifndef CAPSTONE_DIET
2293 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2294 #endif
2295 },
2296 {
2297 AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE,
2298 #ifndef CAPSTONE_DIET
2299 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2300 #endif
2301 },
2302 {
2303 AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE,
2304 #ifndef CAPSTONE_DIET
2305 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2306 #endif
2307 },
2308 {
2309 AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE,
2310 #ifndef CAPSTONE_DIET
2311 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2312 #endif
2313 },
2314 {
2315 AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE,
2316 #ifndef CAPSTONE_DIET
2317 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2318 #endif
2319 },
2320 {
2321 AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT,
2322 #ifndef CAPSTONE_DIET
2323 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2324 #endif
2325 },
2326 {
2327 AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT,
2328 #ifndef CAPSTONE_DIET
2329 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2330 #endif
2331 },
2332 {
2333 AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT,
2334 #ifndef CAPSTONE_DIET
2335 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2336 #endif
2337 },
2338 {
2339 AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT,
2340 #ifndef CAPSTONE_DIET
2341 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2342 #endif
2343 },
2344 {
2345 AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT,
2346 #ifndef CAPSTONE_DIET
2347 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2348 #endif
2349 },
2350 {
2351 AArch64_FCMPDri, ARM64_INS_FCMP,
2352 #ifndef CAPSTONE_DIET
2353 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2354 #endif
2355 },
2356 {
2357 AArch64_FCMPDrr, ARM64_INS_FCMP,
2358 #ifndef CAPSTONE_DIET
2359 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2360 #endif
2361 },
2362 {
2363 AArch64_FCMPEDri, ARM64_INS_FCMPE,
2364 #ifndef CAPSTONE_DIET
2365 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2366 #endif
2367 },
2368 {
2369 AArch64_FCMPEDrr, ARM64_INS_FCMPE,
2370 #ifndef CAPSTONE_DIET
2371 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2372 #endif
2373 },
2374 {
2375 AArch64_FCMPESri, ARM64_INS_FCMPE,
2376 #ifndef CAPSTONE_DIET
2377 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2378 #endif
2379 },
2380 {
2381 AArch64_FCMPESrr, ARM64_INS_FCMPE,
2382 #ifndef CAPSTONE_DIET
2383 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2384 #endif
2385 },
2386 {
2387 AArch64_FCMPSri, ARM64_INS_FCMP,
2388 #ifndef CAPSTONE_DIET
2389 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2390 #endif
2391 },
2392 {
2393 AArch64_FCMPSrr, ARM64_INS_FCMP,
2394 #ifndef CAPSTONE_DIET
2395 { 0 }, { ARM64_REG_NZCV, 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2396 #endif
2397 },
2398 {
2399 AArch64_FCSELDrrr, ARM64_INS_FCSEL,
2400 #ifndef CAPSTONE_DIET
2401 { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2402 #endif
2403 },
2404 {
2405 AArch64_FCSELSrrr, ARM64_INS_FCSEL,
2406 #ifndef CAPSTONE_DIET
2407 { ARM64_REG_NZCV, 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2408 #endif
2409 },
2410 {
2411 AArch64_FCVTASUWDr, ARM64_INS_FCVTAS,
2412 #ifndef CAPSTONE_DIET
2413 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2414 #endif
2415 },
2416 {
2417 AArch64_FCVTASUWSr, ARM64_INS_FCVTAS,
2418 #ifndef CAPSTONE_DIET
2419 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2420 #endif
2421 },
2422 {
2423 AArch64_FCVTASUXDr, ARM64_INS_FCVTAS,
2424 #ifndef CAPSTONE_DIET
2425 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2426 #endif
2427 },
2428 {
2429 AArch64_FCVTASUXSr, ARM64_INS_FCVTAS,
2430 #ifndef CAPSTONE_DIET
2431 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2432 #endif
2433 },
2434 {
2435 AArch64_FCVTASv1i32, ARM64_INS_FCVTAS,
2436 #ifndef CAPSTONE_DIET
2437 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2438 #endif
2439 },
2440 {
2441 AArch64_FCVTASv1i64, ARM64_INS_FCVTAS,
2442 #ifndef CAPSTONE_DIET
2443 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2444 #endif
2445 },
2446 {
2447 AArch64_FCVTASv2f32, ARM64_INS_FCVTAS,
2448 #ifndef CAPSTONE_DIET
2449 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2450 #endif
2451 },
2452 {
2453 AArch64_FCVTASv2f64, ARM64_INS_FCVTAS,
2454 #ifndef CAPSTONE_DIET
2455 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2456 #endif
2457 },
2458 {
2459 AArch64_FCVTASv4f32, ARM64_INS_FCVTAS,
2460 #ifndef CAPSTONE_DIET
2461 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2462 #endif
2463 },
2464 {
2465 AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU,
2466 #ifndef CAPSTONE_DIET
2467 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2468 #endif
2469 },
2470 {
2471 AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU,
2472 #ifndef CAPSTONE_DIET
2473 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2474 #endif
2475 },
2476 {
2477 AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU,
2478 #ifndef CAPSTONE_DIET
2479 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2480 #endif
2481 },
2482 {
2483 AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU,
2484 #ifndef CAPSTONE_DIET
2485 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2486 #endif
2487 },
2488 {
2489 AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU,
2490 #ifndef CAPSTONE_DIET
2491 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2492 #endif
2493 },
2494 {
2495 AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU,
2496 #ifndef CAPSTONE_DIET
2497 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2498 #endif
2499 },
2500 {
2501 AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU,
2502 #ifndef CAPSTONE_DIET
2503 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2504 #endif
2505 },
2506 {
2507 AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU,
2508 #ifndef CAPSTONE_DIET
2509 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2510 #endif
2511 },
2512 {
2513 AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU,
2514 #ifndef CAPSTONE_DIET
2515 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2516 #endif
2517 },
2518 {
2519 AArch64_FCVTDHr, ARM64_INS_FCVT,
2520 #ifndef CAPSTONE_DIET
2521 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2522 #endif
2523 },
2524 {
2525 AArch64_FCVTDSr, ARM64_INS_FCVT,
2526 #ifndef CAPSTONE_DIET
2527 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2528 #endif
2529 },
2530 {
2531 AArch64_FCVTHDr, ARM64_INS_FCVT,
2532 #ifndef CAPSTONE_DIET
2533 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2534 #endif
2535 },
2536 {
2537 AArch64_FCVTHSr, ARM64_INS_FCVT,
2538 #ifndef CAPSTONE_DIET
2539 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2540 #endif
2541 },
2542 {
2543 AArch64_FCVTLv2i32, ARM64_INS_FCVTL,
2544 #ifndef CAPSTONE_DIET
2545 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2546 #endif
2547 },
2548 {
2549 AArch64_FCVTLv4i16, ARM64_INS_FCVTL,
2550 #ifndef CAPSTONE_DIET
2551 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2552 #endif
2553 },
2554 {
2555 AArch64_FCVTLv4i32, ARM64_INS_FCVTL2,
2556 #ifndef CAPSTONE_DIET
2557 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2558 #endif
2559 },
2560 {
2561 AArch64_FCVTLv8i16, ARM64_INS_FCVTL2,
2562 #ifndef CAPSTONE_DIET
2563 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2564 #endif
2565 },
2566 {
2567 AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS,
2568 #ifndef CAPSTONE_DIET
2569 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2570 #endif
2571 },
2572 {
2573 AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS,
2574 #ifndef CAPSTONE_DIET
2575 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2576 #endif
2577 },
2578 {
2579 AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS,
2580 #ifndef CAPSTONE_DIET
2581 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2582 #endif
2583 },
2584 {
2585 AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS,
2586 #ifndef CAPSTONE_DIET
2587 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2588 #endif
2589 },
2590 {
2591 AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS,
2592 #ifndef CAPSTONE_DIET
2593 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2594 #endif
2595 },
2596 {
2597 AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS,
2598 #ifndef CAPSTONE_DIET
2599 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2600 #endif
2601 },
2602 {
2603 AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS,
2604 #ifndef CAPSTONE_DIET
2605 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2606 #endif
2607 },
2608 {
2609 AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS,
2610 #ifndef CAPSTONE_DIET
2611 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2612 #endif
2613 },
2614 {
2615 AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS,
2616 #ifndef CAPSTONE_DIET
2617 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2618 #endif
2619 },
2620 {
2621 AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU,
2622 #ifndef CAPSTONE_DIET
2623 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2624 #endif
2625 },
2626 {
2627 AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU,
2628 #ifndef CAPSTONE_DIET
2629 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2630 #endif
2631 },
2632 {
2633 AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU,
2634 #ifndef CAPSTONE_DIET
2635 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2636 #endif
2637 },
2638 {
2639 AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU,
2640 #ifndef CAPSTONE_DIET
2641 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2642 #endif
2643 },
2644 {
2645 AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU,
2646 #ifndef CAPSTONE_DIET
2647 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2648 #endif
2649 },
2650 {
2651 AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU,
2652 #ifndef CAPSTONE_DIET
2653 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2654 #endif
2655 },
2656 {
2657 AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU,
2658 #ifndef CAPSTONE_DIET
2659 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2660 #endif
2661 },
2662 {
2663 AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU,
2664 #ifndef CAPSTONE_DIET
2665 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2666 #endif
2667 },
2668 {
2669 AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU,
2670 #ifndef CAPSTONE_DIET
2671 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2672 #endif
2673 },
2674 {
2675 AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS,
2676 #ifndef CAPSTONE_DIET
2677 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2678 #endif
2679 },
2680 {
2681 AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS,
2682 #ifndef CAPSTONE_DIET
2683 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2684 #endif
2685 },
2686 {
2687 AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS,
2688 #ifndef CAPSTONE_DIET
2689 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2690 #endif
2691 },
2692 {
2693 AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS,
2694 #ifndef CAPSTONE_DIET
2695 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2696 #endif
2697 },
2698 {
2699 AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS,
2700 #ifndef CAPSTONE_DIET
2701 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2702 #endif
2703 },
2704 {
2705 AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS,
2706 #ifndef CAPSTONE_DIET
2707 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2708 #endif
2709 },
2710 {
2711 AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS,
2712 #ifndef CAPSTONE_DIET
2713 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2714 #endif
2715 },
2716 {
2717 AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS,
2718 #ifndef CAPSTONE_DIET
2719 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2720 #endif
2721 },
2722 {
2723 AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS,
2724 #ifndef CAPSTONE_DIET
2725 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2726 #endif
2727 },
2728 {
2729 AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU,
2730 #ifndef CAPSTONE_DIET
2731 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2732 #endif
2733 },
2734 {
2735 AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU,
2736 #ifndef CAPSTONE_DIET
2737 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2738 #endif
2739 },
2740 {
2741 AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU,
2742 #ifndef CAPSTONE_DIET
2743 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2744 #endif
2745 },
2746 {
2747 AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU,
2748 #ifndef CAPSTONE_DIET
2749 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2750 #endif
2751 },
2752 {
2753 AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU,
2754 #ifndef CAPSTONE_DIET
2755 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2756 #endif
2757 },
2758 {
2759 AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU,
2760 #ifndef CAPSTONE_DIET
2761 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2762 #endif
2763 },
2764 {
2765 AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU,
2766 #ifndef CAPSTONE_DIET
2767 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2768 #endif
2769 },
2770 {
2771 AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU,
2772 #ifndef CAPSTONE_DIET
2773 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2774 #endif
2775 },
2776 {
2777 AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU,
2778 #ifndef CAPSTONE_DIET
2779 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2780 #endif
2781 },
2782 {
2783 AArch64_FCVTNv2i32, ARM64_INS_FCVTN,
2784 #ifndef CAPSTONE_DIET
2785 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2786 #endif
2787 },
2788 {
2789 AArch64_FCVTNv4i16, ARM64_INS_FCVTN,
2790 #ifndef CAPSTONE_DIET
2791 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2792 #endif
2793 },
2794 {
2795 AArch64_FCVTNv4i32, ARM64_INS_FCVTN2,
2796 #ifndef CAPSTONE_DIET
2797 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2798 #endif
2799 },
2800 {
2801 AArch64_FCVTNv8i16, ARM64_INS_FCVTN2,
2802 #ifndef CAPSTONE_DIET
2803 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2804 #endif
2805 },
2806 {
2807 AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS,
2808 #ifndef CAPSTONE_DIET
2809 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2810 #endif
2811 },
2812 {
2813 AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS,
2814 #ifndef CAPSTONE_DIET
2815 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2816 #endif
2817 },
2818 {
2819 AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS,
2820 #ifndef CAPSTONE_DIET
2821 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2822 #endif
2823 },
2824 {
2825 AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS,
2826 #ifndef CAPSTONE_DIET
2827 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2828 #endif
2829 },
2830 {
2831 AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS,
2832 #ifndef CAPSTONE_DIET
2833 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2834 #endif
2835 },
2836 {
2837 AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS,
2838 #ifndef CAPSTONE_DIET
2839 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2840 #endif
2841 },
2842 {
2843 AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS,
2844 #ifndef CAPSTONE_DIET
2845 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2846 #endif
2847 },
2848 {
2849 AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS,
2850 #ifndef CAPSTONE_DIET
2851 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2852 #endif
2853 },
2854 {
2855 AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS,
2856 #ifndef CAPSTONE_DIET
2857 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2858 #endif
2859 },
2860 {
2861 AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU,
2862 #ifndef CAPSTONE_DIET
2863 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2864 #endif
2865 },
2866 {
2867 AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU,
2868 #ifndef CAPSTONE_DIET
2869 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2870 #endif
2871 },
2872 {
2873 AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU,
2874 #ifndef CAPSTONE_DIET
2875 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2876 #endif
2877 },
2878 {
2879 AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU,
2880 #ifndef CAPSTONE_DIET
2881 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2882 #endif
2883 },
2884 {
2885 AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU,
2886 #ifndef CAPSTONE_DIET
2887 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2888 #endif
2889 },
2890 {
2891 AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU,
2892 #ifndef CAPSTONE_DIET
2893 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2894 #endif
2895 },
2896 {
2897 AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU,
2898 #ifndef CAPSTONE_DIET
2899 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2900 #endif
2901 },
2902 {
2903 AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU,
2904 #ifndef CAPSTONE_DIET
2905 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2906 #endif
2907 },
2908 {
2909 AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU,
2910 #ifndef CAPSTONE_DIET
2911 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2912 #endif
2913 },
2914 {
2915 AArch64_FCVTSDr, ARM64_INS_FCVT,
2916 #ifndef CAPSTONE_DIET
2917 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2918 #endif
2919 },
2920 {
2921 AArch64_FCVTSHr, ARM64_INS_FCVT,
2922 #ifndef CAPSTONE_DIET
2923 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2924 #endif
2925 },
2926 {
2927 AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN,
2928 #ifndef CAPSTONE_DIET
2929 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2930 #endif
2931 },
2932 {
2933 AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN,
2934 #ifndef CAPSTONE_DIET
2935 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2936 #endif
2937 },
2938 {
2939 AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2,
2940 #ifndef CAPSTONE_DIET
2941 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
2942 #endif
2943 },
2944 {
2945 AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS,
2946 #ifndef CAPSTONE_DIET
2947 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2948 #endif
2949 },
2950 {
2951 AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS,
2952 #ifndef CAPSTONE_DIET
2953 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2954 #endif
2955 },
2956 {
2957 AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS,
2958 #ifndef CAPSTONE_DIET
2959 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2960 #endif
2961 },
2962 {
2963 AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS,
2964 #ifndef CAPSTONE_DIET
2965 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2966 #endif
2967 },
2968 {
2969 AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS,
2970 #ifndef CAPSTONE_DIET
2971 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2972 #endif
2973 },
2974 {
2975 AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS,
2976 #ifndef CAPSTONE_DIET
2977 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2978 #endif
2979 },
2980 {
2981 AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS,
2982 #ifndef CAPSTONE_DIET
2983 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2984 #endif
2985 },
2986 {
2987 AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS,
2988 #ifndef CAPSTONE_DIET
2989 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2990 #endif
2991 },
2992 {
2993 AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS,
2994 #ifndef CAPSTONE_DIET
2995 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
2996 #endif
2997 },
2998 {
2999 AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS,
3000 #ifndef CAPSTONE_DIET
3001 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3002 #endif
3003 },
3004 {
3005 AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS,
3006 #ifndef CAPSTONE_DIET
3007 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3008 #endif
3009 },
3010 {
3011 AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS,
3012 #ifndef CAPSTONE_DIET
3013 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3014 #endif
3015 },
3016 {
3017 AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS,
3018 #ifndef CAPSTONE_DIET
3019 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3020 #endif
3021 },
3022 {
3023 AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS,
3024 #ifndef CAPSTONE_DIET
3025 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3026 #endif
3027 },
3028 {
3029 AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS,
3030 #ifndef CAPSTONE_DIET
3031 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3032 #endif
3033 },
3034 {
3035 AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS,
3036 #ifndef CAPSTONE_DIET
3037 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3038 #endif
3039 },
3040 {
3041 AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS,
3042 #ifndef CAPSTONE_DIET
3043 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3044 #endif
3045 },
3046 {
3047 AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS,
3048 #ifndef CAPSTONE_DIET
3049 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3050 #endif
3051 },
3052 {
3053 AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS,
3054 #ifndef CAPSTONE_DIET
3055 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3056 #endif
3057 },
3058 {
3059 AArch64_FCVTZSd, ARM64_INS_FCVTZS,
3060 #ifndef CAPSTONE_DIET
3061 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3062 #endif
3063 },
3064 {
3065 AArch64_FCVTZSs, ARM64_INS_FCVTZS,
3066 #ifndef CAPSTONE_DIET
3067 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3068 #endif
3069 },
3070 {
3071 AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS,
3072 #ifndef CAPSTONE_DIET
3073 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3074 #endif
3075 },
3076 {
3077 AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS,
3078 #ifndef CAPSTONE_DIET
3079 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3080 #endif
3081 },
3082 {
3083 AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS,
3084 #ifndef CAPSTONE_DIET
3085 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3086 #endif
3087 },
3088 {
3089 AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS,
3090 #ifndef CAPSTONE_DIET
3091 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3092 #endif
3093 },
3094 {
3095 AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS,
3096 #ifndef CAPSTONE_DIET
3097 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3098 #endif
3099 },
3100 {
3101 AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS,
3102 #ifndef CAPSTONE_DIET
3103 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3104 #endif
3105 },
3106 {
3107 AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS,
3108 #ifndef CAPSTONE_DIET
3109 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3110 #endif
3111 },
3112 {
3113 AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS,
3114 #ifndef CAPSTONE_DIET
3115 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3116 #endif
3117 },
3118 {
3119 AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU,
3120 #ifndef CAPSTONE_DIET
3121 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3122 #endif
3123 },
3124 {
3125 AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU,
3126 #ifndef CAPSTONE_DIET
3127 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3128 #endif
3129 },
3130 {
3131 AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU,
3132 #ifndef CAPSTONE_DIET
3133 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3134 #endif
3135 },
3136 {
3137 AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU,
3138 #ifndef CAPSTONE_DIET
3139 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3140 #endif
3141 },
3142 {
3143 AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU,
3144 #ifndef CAPSTONE_DIET
3145 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3146 #endif
3147 },
3148 {
3149 AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU,
3150 #ifndef CAPSTONE_DIET
3151 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3152 #endif
3153 },
3154 {
3155 AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU,
3156 #ifndef CAPSTONE_DIET
3157 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3158 #endif
3159 },
3160 {
3161 AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU,
3162 #ifndef CAPSTONE_DIET
3163 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3164 #endif
3165 },
3166 {
3167 AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU,
3168 #ifndef CAPSTONE_DIET
3169 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3170 #endif
3171 },
3172 {
3173 AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU,
3174 #ifndef CAPSTONE_DIET
3175 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3176 #endif
3177 },
3178 {
3179 AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU,
3180 #ifndef CAPSTONE_DIET
3181 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3182 #endif
3183 },
3184 {
3185 AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU,
3186 #ifndef CAPSTONE_DIET
3187 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3188 #endif
3189 },
3190 {
3191 AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU,
3192 #ifndef CAPSTONE_DIET
3193 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3194 #endif
3195 },
3196 {
3197 AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU,
3198 #ifndef CAPSTONE_DIET
3199 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3200 #endif
3201 },
3202 {
3203 AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU,
3204 #ifndef CAPSTONE_DIET
3205 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3206 #endif
3207 },
3208 {
3209 AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU,
3210 #ifndef CAPSTONE_DIET
3211 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3212 #endif
3213 },
3214 {
3215 AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU,
3216 #ifndef CAPSTONE_DIET
3217 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3218 #endif
3219 },
3220 {
3221 AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU,
3222 #ifndef CAPSTONE_DIET
3223 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3224 #endif
3225 },
3226 {
3227 AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU,
3228 #ifndef CAPSTONE_DIET
3229 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3230 #endif
3231 },
3232 {
3233 AArch64_FCVTZUd, ARM64_INS_FCVTZU,
3234 #ifndef CAPSTONE_DIET
3235 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3236 #endif
3237 },
3238 {
3239 AArch64_FCVTZUs, ARM64_INS_FCVTZU,
3240 #ifndef CAPSTONE_DIET
3241 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3242 #endif
3243 },
3244 {
3245 AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU,
3246 #ifndef CAPSTONE_DIET
3247 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3248 #endif
3249 },
3250 {
3251 AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU,
3252 #ifndef CAPSTONE_DIET
3253 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3254 #endif
3255 },
3256 {
3257 AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU,
3258 #ifndef CAPSTONE_DIET
3259 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3260 #endif
3261 },
3262 {
3263 AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU,
3264 #ifndef CAPSTONE_DIET
3265 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3266 #endif
3267 },
3268 {
3269 AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU,
3270 #ifndef CAPSTONE_DIET
3271 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3272 #endif
3273 },
3274 {
3275 AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU,
3276 #ifndef CAPSTONE_DIET
3277 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3278 #endif
3279 },
3280 {
3281 AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU,
3282 #ifndef CAPSTONE_DIET
3283 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3284 #endif
3285 },
3286 {
3287 AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU,
3288 #ifndef CAPSTONE_DIET
3289 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3290 #endif
3291 },
3292 {
3293 AArch64_FDIVDrr, ARM64_INS_FDIV,
3294 #ifndef CAPSTONE_DIET
3295 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3296 #endif
3297 },
3298 {
3299 AArch64_FDIVSrr, ARM64_INS_FDIV,
3300 #ifndef CAPSTONE_DIET
3301 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3302 #endif
3303 },
3304 {
3305 AArch64_FDIVv2f32, ARM64_INS_FDIV,
3306 #ifndef CAPSTONE_DIET
3307 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3308 #endif
3309 },
3310 {
3311 AArch64_FDIVv2f64, ARM64_INS_FDIV,
3312 #ifndef CAPSTONE_DIET
3313 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3314 #endif
3315 },
3316 {
3317 AArch64_FDIVv4f32, ARM64_INS_FDIV,
3318 #ifndef CAPSTONE_DIET
3319 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3320 #endif
3321 },
3322 {
3323 AArch64_FMADDDrrr, ARM64_INS_FMADD,
3324 #ifndef CAPSTONE_DIET
3325 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3326 #endif
3327 },
3328 {
3329 AArch64_FMADDSrrr, ARM64_INS_FMADD,
3330 #ifndef CAPSTONE_DIET
3331 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3332 #endif
3333 },
3334 {
3335 AArch64_FMAXDrr, ARM64_INS_FMAX,
3336 #ifndef CAPSTONE_DIET
3337 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3338 #endif
3339 },
3340 {
3341 AArch64_FMAXNMDrr, ARM64_INS_FMAXNM,
3342 #ifndef CAPSTONE_DIET
3343 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3344 #endif
3345 },
3346 {
3347 AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP,
3348 #ifndef CAPSTONE_DIET
3349 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3350 #endif
3351 },
3352 {
3353 AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP,
3354 #ifndef CAPSTONE_DIET
3355 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3356 #endif
3357 },
3358 {
3359 AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP,
3360 #ifndef CAPSTONE_DIET
3361 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3362 #endif
3363 },
3364 {
3365 AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP,
3366 #ifndef CAPSTONE_DIET
3367 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3368 #endif
3369 },
3370 {
3371 AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP,
3372 #ifndef CAPSTONE_DIET
3373 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3374 #endif
3375 },
3376 {
3377 AArch64_FMAXNMSrr, ARM64_INS_FMAXNM,
3378 #ifndef CAPSTONE_DIET
3379 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3380 #endif
3381 },
3382 {
3383 AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV,
3384 #ifndef CAPSTONE_DIET
3385 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3386 #endif
3387 },
3388 {
3389 AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM,
3390 #ifndef CAPSTONE_DIET
3391 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3392 #endif
3393 },
3394 {
3395 AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM,
3396 #ifndef CAPSTONE_DIET
3397 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3398 #endif
3399 },
3400 {
3401 AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM,
3402 #ifndef CAPSTONE_DIET
3403 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3404 #endif
3405 },
3406 {
3407 AArch64_FMAXPv2f32, ARM64_INS_FMAXP,
3408 #ifndef CAPSTONE_DIET
3409 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3410 #endif
3411 },
3412 {
3413 AArch64_FMAXPv2f64, ARM64_INS_FMAXP,
3414 #ifndef CAPSTONE_DIET
3415 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3416 #endif
3417 },
3418 {
3419 AArch64_FMAXPv2i32p, ARM64_INS_FMAXP,
3420 #ifndef CAPSTONE_DIET
3421 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3422 #endif
3423 },
3424 {
3425 AArch64_FMAXPv2i64p, ARM64_INS_FMAXP,
3426 #ifndef CAPSTONE_DIET
3427 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3428 #endif
3429 },
3430 {
3431 AArch64_FMAXPv4f32, ARM64_INS_FMAXP,
3432 #ifndef CAPSTONE_DIET
3433 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3434 #endif
3435 },
3436 {
3437 AArch64_FMAXSrr, ARM64_INS_FMAX,
3438 #ifndef CAPSTONE_DIET
3439 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3440 #endif
3441 },
3442 {
3443 AArch64_FMAXVv4i32v, ARM64_INS_FMAXV,
3444 #ifndef CAPSTONE_DIET
3445 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3446 #endif
3447 },
3448 {
3449 AArch64_FMAXv2f32, ARM64_INS_FMAX,
3450 #ifndef CAPSTONE_DIET
3451 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3452 #endif
3453 },
3454 {
3455 AArch64_FMAXv2f64, ARM64_INS_FMAX,
3456 #ifndef CAPSTONE_DIET
3457 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3458 #endif
3459 },
3460 {
3461 AArch64_FMAXv4f32, ARM64_INS_FMAX,
3462 #ifndef CAPSTONE_DIET
3463 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3464 #endif
3465 },
3466 {
3467 AArch64_FMINDrr, ARM64_INS_FMIN,
3468 #ifndef CAPSTONE_DIET
3469 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3470 #endif
3471 },
3472 {
3473 AArch64_FMINNMDrr, ARM64_INS_FMINNM,
3474 #ifndef CAPSTONE_DIET
3475 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3476 #endif
3477 },
3478 {
3479 AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP,
3480 #ifndef CAPSTONE_DIET
3481 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3482 #endif
3483 },
3484 {
3485 AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP,
3486 #ifndef CAPSTONE_DIET
3487 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3488 #endif
3489 },
3490 {
3491 AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP,
3492 #ifndef CAPSTONE_DIET
3493 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3494 #endif
3495 },
3496 {
3497 AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP,
3498 #ifndef CAPSTONE_DIET
3499 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3500 #endif
3501 },
3502 {
3503 AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP,
3504 #ifndef CAPSTONE_DIET
3505 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3506 #endif
3507 },
3508 {
3509 AArch64_FMINNMSrr, ARM64_INS_FMINNM,
3510 #ifndef CAPSTONE_DIET
3511 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3512 #endif
3513 },
3514 {
3515 AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV,
3516 #ifndef CAPSTONE_DIET
3517 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3518 #endif
3519 },
3520 {
3521 AArch64_FMINNMv2f32, ARM64_INS_FMINNM,
3522 #ifndef CAPSTONE_DIET
3523 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3524 #endif
3525 },
3526 {
3527 AArch64_FMINNMv2f64, ARM64_INS_FMINNM,
3528 #ifndef CAPSTONE_DIET
3529 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3530 #endif
3531 },
3532 {
3533 AArch64_FMINNMv4f32, ARM64_INS_FMINNM,
3534 #ifndef CAPSTONE_DIET
3535 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3536 #endif
3537 },
3538 {
3539 AArch64_FMINPv2f32, ARM64_INS_FMINP,
3540 #ifndef CAPSTONE_DIET
3541 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3542 #endif
3543 },
3544 {
3545 AArch64_FMINPv2f64, ARM64_INS_FMINP,
3546 #ifndef CAPSTONE_DIET
3547 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3548 #endif
3549 },
3550 {
3551 AArch64_FMINPv2i32p, ARM64_INS_FMINP,
3552 #ifndef CAPSTONE_DIET
3553 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3554 #endif
3555 },
3556 {
3557 AArch64_FMINPv2i64p, ARM64_INS_FMINP,
3558 #ifndef CAPSTONE_DIET
3559 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3560 #endif
3561 },
3562 {
3563 AArch64_FMINPv4f32, ARM64_INS_FMINP,
3564 #ifndef CAPSTONE_DIET
3565 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3566 #endif
3567 },
3568 {
3569 AArch64_FMINSrr, ARM64_INS_FMIN,
3570 #ifndef CAPSTONE_DIET
3571 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3572 #endif
3573 },
3574 {
3575 AArch64_FMINVv4i32v, ARM64_INS_FMINV,
3576 #ifndef CAPSTONE_DIET
3577 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3578 #endif
3579 },
3580 {
3581 AArch64_FMINv2f32, ARM64_INS_FMIN,
3582 #ifndef CAPSTONE_DIET
3583 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3584 #endif
3585 },
3586 {
3587 AArch64_FMINv2f64, ARM64_INS_FMIN,
3588 #ifndef CAPSTONE_DIET
3589 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3590 #endif
3591 },
3592 {
3593 AArch64_FMINv4f32, ARM64_INS_FMIN,
3594 #ifndef CAPSTONE_DIET
3595 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3596 #endif
3597 },
3598 {
3599 AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA,
3600 #ifndef CAPSTONE_DIET
3601 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3602 #endif
3603 },
3604 {
3605 AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA,
3606 #ifndef CAPSTONE_DIET
3607 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3608 #endif
3609 },
3610 {
3611 AArch64_FMLAv2f32, ARM64_INS_FMLA,
3612 #ifndef CAPSTONE_DIET
3613 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3614 #endif
3615 },
3616 {
3617 AArch64_FMLAv2f64, ARM64_INS_FMLA,
3618 #ifndef CAPSTONE_DIET
3619 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3620 #endif
3621 },
3622 {
3623 AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA,
3624 #ifndef CAPSTONE_DIET
3625 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3626 #endif
3627 },
3628 {
3629 AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA,
3630 #ifndef CAPSTONE_DIET
3631 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3632 #endif
3633 },
3634 {
3635 AArch64_FMLAv4f32, ARM64_INS_FMLA,
3636 #ifndef CAPSTONE_DIET
3637 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3638 #endif
3639 },
3640 {
3641 AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA,
3642 #ifndef CAPSTONE_DIET
3643 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3644 #endif
3645 },
3646 {
3647 AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS,
3648 #ifndef CAPSTONE_DIET
3649 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3650 #endif
3651 },
3652 {
3653 AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS,
3654 #ifndef CAPSTONE_DIET
3655 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3656 #endif
3657 },
3658 {
3659 AArch64_FMLSv2f32, ARM64_INS_FMLS,
3660 #ifndef CAPSTONE_DIET
3661 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3662 #endif
3663 },
3664 {
3665 AArch64_FMLSv2f64, ARM64_INS_FMLS,
3666 #ifndef CAPSTONE_DIET
3667 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3668 #endif
3669 },
3670 {
3671 AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS,
3672 #ifndef CAPSTONE_DIET
3673 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3674 #endif
3675 },
3676 {
3677 AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS,
3678 #ifndef CAPSTONE_DIET
3679 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3680 #endif
3681 },
3682 {
3683 AArch64_FMLSv4f32, ARM64_INS_FMLS,
3684 #ifndef CAPSTONE_DIET
3685 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3686 #endif
3687 },
3688 {
3689 AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS,
3690 #ifndef CAPSTONE_DIET
3691 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3692 #endif
3693 },
3694 {
3695 AArch64_FMOVDXHighr, ARM64_INS_FMOV,
3696 #ifndef CAPSTONE_DIET
3697 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3698 #endif
3699 },
3700 {
3701 AArch64_FMOVDXr, ARM64_INS_FMOV,
3702 #ifndef CAPSTONE_DIET
3703 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3704 #endif
3705 },
3706 {
3707 AArch64_FMOVDi, ARM64_INS_FMOV,
3708 #ifndef CAPSTONE_DIET
3709 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3710 #endif
3711 },
3712 {
3713 AArch64_FMOVDr, ARM64_INS_FMOV,
3714 #ifndef CAPSTONE_DIET
3715 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3716 #endif
3717 },
3718 {
3719 AArch64_FMOVSWr, ARM64_INS_FMOV,
3720 #ifndef CAPSTONE_DIET
3721 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3722 #endif
3723 },
3724 {
3725 AArch64_FMOVSi, ARM64_INS_FMOV,
3726 #ifndef CAPSTONE_DIET
3727 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3728 #endif
3729 },
3730 {
3731 AArch64_FMOVSr, ARM64_INS_FMOV,
3732 #ifndef CAPSTONE_DIET
3733 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3734 #endif
3735 },
3736 {
3737 AArch64_FMOVWSr, ARM64_INS_FMOV,
3738 #ifndef CAPSTONE_DIET
3739 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3740 #endif
3741 },
3742 {
3743 AArch64_FMOVXDHighr, ARM64_INS_FMOV,
3744 #ifndef CAPSTONE_DIET
3745 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3746 #endif
3747 },
3748 {
3749 AArch64_FMOVXDr, ARM64_INS_FMOV,
3750 #ifndef CAPSTONE_DIET
3751 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3752 #endif
3753 },
3754 {
3755 AArch64_FMOVv2f32_ns, ARM64_INS_FMOV,
3756 #ifndef CAPSTONE_DIET
3757 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3758 #endif
3759 },
3760 {
3761 AArch64_FMOVv2f64_ns, ARM64_INS_FMOV,
3762 #ifndef CAPSTONE_DIET
3763 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3764 #endif
3765 },
3766 {
3767 AArch64_FMOVv4f32_ns, ARM64_INS_FMOV,
3768 #ifndef CAPSTONE_DIET
3769 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3770 #endif
3771 },
3772 {
3773 AArch64_FMSUBDrrr, ARM64_INS_FMSUB,
3774 #ifndef CAPSTONE_DIET
3775 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3776 #endif
3777 },
3778 {
3779 AArch64_FMSUBSrrr, ARM64_INS_FMSUB,
3780 #ifndef CAPSTONE_DIET
3781 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3782 #endif
3783 },
3784 {
3785 AArch64_FMULDrr, ARM64_INS_FMUL,
3786 #ifndef CAPSTONE_DIET
3787 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3788 #endif
3789 },
3790 {
3791 AArch64_FMULSrr, ARM64_INS_FMUL,
3792 #ifndef CAPSTONE_DIET
3793 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3794 #endif
3795 },
3796 {
3797 AArch64_FMULX32, ARM64_INS_FMULX,
3798 #ifndef CAPSTONE_DIET
3799 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3800 #endif
3801 },
3802 {
3803 AArch64_FMULX64, ARM64_INS_FMULX,
3804 #ifndef CAPSTONE_DIET
3805 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3806 #endif
3807 },
3808 {
3809 AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX,
3810 #ifndef CAPSTONE_DIET
3811 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3812 #endif
3813 },
3814 {
3815 AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX,
3816 #ifndef CAPSTONE_DIET
3817 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3818 #endif
3819 },
3820 {
3821 AArch64_FMULXv2f32, ARM64_INS_FMULX,
3822 #ifndef CAPSTONE_DIET
3823 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3824 #endif
3825 },
3826 {
3827 AArch64_FMULXv2f64, ARM64_INS_FMULX,
3828 #ifndef CAPSTONE_DIET
3829 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3830 #endif
3831 },
3832 {
3833 AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX,
3834 #ifndef CAPSTONE_DIET
3835 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3836 #endif
3837 },
3838 {
3839 AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX,
3840 #ifndef CAPSTONE_DIET
3841 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3842 #endif
3843 },
3844 {
3845 AArch64_FMULXv4f32, ARM64_INS_FMULX,
3846 #ifndef CAPSTONE_DIET
3847 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3848 #endif
3849 },
3850 {
3851 AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX,
3852 #ifndef CAPSTONE_DIET
3853 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3854 #endif
3855 },
3856 {
3857 AArch64_FMULv1i32_indexed, ARM64_INS_FMUL,
3858 #ifndef CAPSTONE_DIET
3859 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3860 #endif
3861 },
3862 {
3863 AArch64_FMULv1i64_indexed, ARM64_INS_FMUL,
3864 #ifndef CAPSTONE_DIET
3865 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3866 #endif
3867 },
3868 {
3869 AArch64_FMULv2f32, ARM64_INS_FMUL,
3870 #ifndef CAPSTONE_DIET
3871 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3872 #endif
3873 },
3874 {
3875 AArch64_FMULv2f64, ARM64_INS_FMUL,
3876 #ifndef CAPSTONE_DIET
3877 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3878 #endif
3879 },
3880 {
3881 AArch64_FMULv2i32_indexed, ARM64_INS_FMUL,
3882 #ifndef CAPSTONE_DIET
3883 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3884 #endif
3885 },
3886 {
3887 AArch64_FMULv2i64_indexed, ARM64_INS_FMUL,
3888 #ifndef CAPSTONE_DIET
3889 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3890 #endif
3891 },
3892 {
3893 AArch64_FMULv4f32, ARM64_INS_FMUL,
3894 #ifndef CAPSTONE_DIET
3895 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3896 #endif
3897 },
3898 {
3899 AArch64_FMULv4i32_indexed, ARM64_INS_FMUL,
3900 #ifndef CAPSTONE_DIET
3901 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3902 #endif
3903 },
3904 {
3905 AArch64_FNEGDr, ARM64_INS_FNEG,
3906 #ifndef CAPSTONE_DIET
3907 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3908 #endif
3909 },
3910 {
3911 AArch64_FNEGSr, ARM64_INS_FNEG,
3912 #ifndef CAPSTONE_DIET
3913 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3914 #endif
3915 },
3916 {
3917 AArch64_FNEGv2f32, ARM64_INS_FNEG,
3918 #ifndef CAPSTONE_DIET
3919 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3920 #endif
3921 },
3922 {
3923 AArch64_FNEGv2f64, ARM64_INS_FNEG,
3924 #ifndef CAPSTONE_DIET
3925 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3926 #endif
3927 },
3928 {
3929 AArch64_FNEGv4f32, ARM64_INS_FNEG,
3930 #ifndef CAPSTONE_DIET
3931 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3932 #endif
3933 },
3934 {
3935 AArch64_FNMADDDrrr, ARM64_INS_FNMADD,
3936 #ifndef CAPSTONE_DIET
3937 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3938 #endif
3939 },
3940 {
3941 AArch64_FNMADDSrrr, ARM64_INS_FNMADD,
3942 #ifndef CAPSTONE_DIET
3943 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3944 #endif
3945 },
3946 {
3947 AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB,
3948 #ifndef CAPSTONE_DIET
3949 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3950 #endif
3951 },
3952 {
3953 AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB,
3954 #ifndef CAPSTONE_DIET
3955 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3956 #endif
3957 },
3958 {
3959 AArch64_FNMULDrr, ARM64_INS_FNMUL,
3960 #ifndef CAPSTONE_DIET
3961 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3962 #endif
3963 },
3964 {
3965 AArch64_FNMULSrr, ARM64_INS_FNMUL,
3966 #ifndef CAPSTONE_DIET
3967 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
3968 #endif
3969 },
3970 {
3971 AArch64_FRECPEv1i32, ARM64_INS_FRECPE,
3972 #ifndef CAPSTONE_DIET
3973 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3974 #endif
3975 },
3976 {
3977 AArch64_FRECPEv1i64, ARM64_INS_FRECPE,
3978 #ifndef CAPSTONE_DIET
3979 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3980 #endif
3981 },
3982 {
3983 AArch64_FRECPEv2f32, ARM64_INS_FRECPE,
3984 #ifndef CAPSTONE_DIET
3985 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3986 #endif
3987 },
3988 {
3989 AArch64_FRECPEv2f64, ARM64_INS_FRECPE,
3990 #ifndef CAPSTONE_DIET
3991 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3992 #endif
3993 },
3994 {
3995 AArch64_FRECPEv4f32, ARM64_INS_FRECPE,
3996 #ifndef CAPSTONE_DIET
3997 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
3998 #endif
3999 },
4000 {
4001 AArch64_FRECPS32, ARM64_INS_FRECPS,
4002 #ifndef CAPSTONE_DIET
4003 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4004 #endif
4005 },
4006 {
4007 AArch64_FRECPS64, ARM64_INS_FRECPS,
4008 #ifndef CAPSTONE_DIET
4009 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4010 #endif
4011 },
4012 {
4013 AArch64_FRECPSv2f32, ARM64_INS_FRECPS,
4014 #ifndef CAPSTONE_DIET
4015 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4016 #endif
4017 },
4018 {
4019 AArch64_FRECPSv2f64, ARM64_INS_FRECPS,
4020 #ifndef CAPSTONE_DIET
4021 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4022 #endif
4023 },
4024 {
4025 AArch64_FRECPSv4f32, ARM64_INS_FRECPS,
4026 #ifndef CAPSTONE_DIET
4027 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4028 #endif
4029 },
4030 {
4031 AArch64_FRECPXv1i32, ARM64_INS_FRECPX,
4032 #ifndef CAPSTONE_DIET
4033 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4034 #endif
4035 },
4036 {
4037 AArch64_FRECPXv1i64, ARM64_INS_FRECPX,
4038 #ifndef CAPSTONE_DIET
4039 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4040 #endif
4041 },
4042 {
4043 AArch64_FRINTADr, ARM64_INS_FRINTA,
4044 #ifndef CAPSTONE_DIET
4045 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4046 #endif
4047 },
4048 {
4049 AArch64_FRINTASr, ARM64_INS_FRINTA,
4050 #ifndef CAPSTONE_DIET
4051 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4052 #endif
4053 },
4054 {
4055 AArch64_FRINTAv2f32, ARM64_INS_FRINTA,
4056 #ifndef CAPSTONE_DIET
4057 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4058 #endif
4059 },
4060 {
4061 AArch64_FRINTAv2f64, ARM64_INS_FRINTA,
4062 #ifndef CAPSTONE_DIET
4063 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4064 #endif
4065 },
4066 {
4067 AArch64_FRINTAv4f32, ARM64_INS_FRINTA,
4068 #ifndef CAPSTONE_DIET
4069 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4070 #endif
4071 },
4072 {
4073 AArch64_FRINTIDr, ARM64_INS_FRINTI,
4074 #ifndef CAPSTONE_DIET
4075 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4076 #endif
4077 },
4078 {
4079 AArch64_FRINTISr, ARM64_INS_FRINTI,
4080 #ifndef CAPSTONE_DIET
4081 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4082 #endif
4083 },
4084 {
4085 AArch64_FRINTIv2f32, ARM64_INS_FRINTI,
4086 #ifndef CAPSTONE_DIET
4087 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4088 #endif
4089 },
4090 {
4091 AArch64_FRINTIv2f64, ARM64_INS_FRINTI,
4092 #ifndef CAPSTONE_DIET
4093 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4094 #endif
4095 },
4096 {
4097 AArch64_FRINTIv4f32, ARM64_INS_FRINTI,
4098 #ifndef CAPSTONE_DIET
4099 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4100 #endif
4101 },
4102 {
4103 AArch64_FRINTMDr, ARM64_INS_FRINTM,
4104 #ifndef CAPSTONE_DIET
4105 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4106 #endif
4107 },
4108 {
4109 AArch64_FRINTMSr, ARM64_INS_FRINTM,
4110 #ifndef CAPSTONE_DIET
4111 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4112 #endif
4113 },
4114 {
4115 AArch64_FRINTMv2f32, ARM64_INS_FRINTM,
4116 #ifndef CAPSTONE_DIET
4117 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4118 #endif
4119 },
4120 {
4121 AArch64_FRINTMv2f64, ARM64_INS_FRINTM,
4122 #ifndef CAPSTONE_DIET
4123 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4124 #endif
4125 },
4126 {
4127 AArch64_FRINTMv4f32, ARM64_INS_FRINTM,
4128 #ifndef CAPSTONE_DIET
4129 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4130 #endif
4131 },
4132 {
4133 AArch64_FRINTNDr, ARM64_INS_FRINTN,
4134 #ifndef CAPSTONE_DIET
4135 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4136 #endif
4137 },
4138 {
4139 AArch64_FRINTNSr, ARM64_INS_FRINTN,
4140 #ifndef CAPSTONE_DIET
4141 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4142 #endif
4143 },
4144 {
4145 AArch64_FRINTNv2f32, ARM64_INS_FRINTN,
4146 #ifndef CAPSTONE_DIET
4147 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4148 #endif
4149 },
4150 {
4151 AArch64_FRINTNv2f64, ARM64_INS_FRINTN,
4152 #ifndef CAPSTONE_DIET
4153 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4154 #endif
4155 },
4156 {
4157 AArch64_FRINTNv4f32, ARM64_INS_FRINTN,
4158 #ifndef CAPSTONE_DIET
4159 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4160 #endif
4161 },
4162 {
4163 AArch64_FRINTPDr, ARM64_INS_FRINTP,
4164 #ifndef CAPSTONE_DIET
4165 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4166 #endif
4167 },
4168 {
4169 AArch64_FRINTPSr, ARM64_INS_FRINTP,
4170 #ifndef CAPSTONE_DIET
4171 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4172 #endif
4173 },
4174 {
4175 AArch64_FRINTPv2f32, ARM64_INS_FRINTP,
4176 #ifndef CAPSTONE_DIET
4177 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4178 #endif
4179 },
4180 {
4181 AArch64_FRINTPv2f64, ARM64_INS_FRINTP,
4182 #ifndef CAPSTONE_DIET
4183 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4184 #endif
4185 },
4186 {
4187 AArch64_FRINTPv4f32, ARM64_INS_FRINTP,
4188 #ifndef CAPSTONE_DIET
4189 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4190 #endif
4191 },
4192 {
4193 AArch64_FRINTXDr, ARM64_INS_FRINTX,
4194 #ifndef CAPSTONE_DIET
4195 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4196 #endif
4197 },
4198 {
4199 AArch64_FRINTXSr, ARM64_INS_FRINTX,
4200 #ifndef CAPSTONE_DIET
4201 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4202 #endif
4203 },
4204 {
4205 AArch64_FRINTXv2f32, ARM64_INS_FRINTX,
4206 #ifndef CAPSTONE_DIET
4207 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4208 #endif
4209 },
4210 {
4211 AArch64_FRINTXv2f64, ARM64_INS_FRINTX,
4212 #ifndef CAPSTONE_DIET
4213 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4214 #endif
4215 },
4216 {
4217 AArch64_FRINTXv4f32, ARM64_INS_FRINTX,
4218 #ifndef CAPSTONE_DIET
4219 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4220 #endif
4221 },
4222 {
4223 AArch64_FRINTZDr, ARM64_INS_FRINTZ,
4224 #ifndef CAPSTONE_DIET
4225 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4226 #endif
4227 },
4228 {
4229 AArch64_FRINTZSr, ARM64_INS_FRINTZ,
4230 #ifndef CAPSTONE_DIET
4231 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4232 #endif
4233 },
4234 {
4235 AArch64_FRINTZv2f32, ARM64_INS_FRINTZ,
4236 #ifndef CAPSTONE_DIET
4237 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4238 #endif
4239 },
4240 {
4241 AArch64_FRINTZv2f64, ARM64_INS_FRINTZ,
4242 #ifndef CAPSTONE_DIET
4243 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4244 #endif
4245 },
4246 {
4247 AArch64_FRINTZv4f32, ARM64_INS_FRINTZ,
4248 #ifndef CAPSTONE_DIET
4249 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4250 #endif
4251 },
4252 {
4253 AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE,
4254 #ifndef CAPSTONE_DIET
4255 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4256 #endif
4257 },
4258 {
4259 AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE,
4260 #ifndef CAPSTONE_DIET
4261 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4262 #endif
4263 },
4264 {
4265 AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE,
4266 #ifndef CAPSTONE_DIET
4267 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4268 #endif
4269 },
4270 {
4271 AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE,
4272 #ifndef CAPSTONE_DIET
4273 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4274 #endif
4275 },
4276 {
4277 AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE,
4278 #ifndef CAPSTONE_DIET
4279 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4280 #endif
4281 },
4282 {
4283 AArch64_FRSQRTS32, ARM64_INS_FRSQRTS,
4284 #ifndef CAPSTONE_DIET
4285 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4286 #endif
4287 },
4288 {
4289 AArch64_FRSQRTS64, ARM64_INS_FRSQRTS,
4290 #ifndef CAPSTONE_DIET
4291 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4292 #endif
4293 },
4294 {
4295 AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS,
4296 #ifndef CAPSTONE_DIET
4297 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4298 #endif
4299 },
4300 {
4301 AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS,
4302 #ifndef CAPSTONE_DIET
4303 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4304 #endif
4305 },
4306 {
4307 AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS,
4308 #ifndef CAPSTONE_DIET
4309 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4310 #endif
4311 },
4312 {
4313 AArch64_FSQRTDr, ARM64_INS_FSQRT,
4314 #ifndef CAPSTONE_DIET
4315 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4316 #endif
4317 },
4318 {
4319 AArch64_FSQRTSr, ARM64_INS_FSQRT,
4320 #ifndef CAPSTONE_DIET
4321 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4322 #endif
4323 },
4324 {
4325 AArch64_FSQRTv2f32, ARM64_INS_FSQRT,
4326 #ifndef CAPSTONE_DIET
4327 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4328 #endif
4329 },
4330 {
4331 AArch64_FSQRTv2f64, ARM64_INS_FSQRT,
4332 #ifndef CAPSTONE_DIET
4333 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4334 #endif
4335 },
4336 {
4337 AArch64_FSQRTv4f32, ARM64_INS_FSQRT,
4338 #ifndef CAPSTONE_DIET
4339 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4340 #endif
4341 },
4342 {
4343 AArch64_FSUBDrr, ARM64_INS_FSUB,
4344 #ifndef CAPSTONE_DIET
4345 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4346 #endif
4347 },
4348 {
4349 AArch64_FSUBSrr, ARM64_INS_FSUB,
4350 #ifndef CAPSTONE_DIET
4351 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
4352 #endif
4353 },
4354 {
4355 AArch64_FSUBv2f32, ARM64_INS_FSUB,
4356 #ifndef CAPSTONE_DIET
4357 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4358 #endif
4359 },
4360 {
4361 AArch64_FSUBv2f64, ARM64_INS_FSUB,
4362 #ifndef CAPSTONE_DIET
4363 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4364 #endif
4365 },
4366 {
4367 AArch64_FSUBv4f32, ARM64_INS_FSUB,
4368 #ifndef CAPSTONE_DIET
4369 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4370 #endif
4371 },
4372 {
4373 AArch64_HINT, ARM64_INS_HINT,
4374 #ifndef CAPSTONE_DIET
4375 { 0 }, { 0 }, { 0 }, 0, 0
4376 #endif
4377 },
4378 {
4379 AArch64_HLT, ARM64_INS_HLT,
4380 #ifndef CAPSTONE_DIET
4381 { 0 }, { 0 }, { 0 }, 0, 0
4382 #endif
4383 },
4384 {
4385 AArch64_HVC, ARM64_INS_HVC,
4386 #ifndef CAPSTONE_DIET
4387 { 0 }, { 0 }, { 0 }, 0, 0
4388 #endif
4389 },
4390 {
4391 AArch64_INSvi16gpr, ARM64_INS_INS,
4392 #ifndef CAPSTONE_DIET
4393 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4394 #endif
4395 },
4396 {
4397 AArch64_INSvi16lane, ARM64_INS_INS,
4398 #ifndef CAPSTONE_DIET
4399 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4400 #endif
4401 },
4402 {
4403 AArch64_INSvi32gpr, ARM64_INS_INS,
4404 #ifndef CAPSTONE_DIET
4405 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4406 #endif
4407 },
4408 {
4409 AArch64_INSvi32lane, ARM64_INS_INS,
4410 #ifndef CAPSTONE_DIET
4411 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4412 #endif
4413 },
4414 {
4415 AArch64_INSvi64gpr, ARM64_INS_INS,
4416 #ifndef CAPSTONE_DIET
4417 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4418 #endif
4419 },
4420 {
4421 AArch64_INSvi64lane, ARM64_INS_INS,
4422 #ifndef CAPSTONE_DIET
4423 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4424 #endif
4425 },
4426 {
4427 AArch64_INSvi8gpr, ARM64_INS_INS,
4428 #ifndef CAPSTONE_DIET
4429 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4430 #endif
4431 },
4432 {
4433 AArch64_INSvi8lane, ARM64_INS_INS,
4434 #ifndef CAPSTONE_DIET
4435 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4436 #endif
4437 },
4438 {
4439 AArch64_ISB, ARM64_INS_ISB,
4440 #ifndef CAPSTONE_DIET
4441 { 0 }, { 0 }, { 0 }, 0, 0
4442 #endif
4443 },
4444 {
4445 AArch64_LD1Fourv16b, ARM64_INS_LD1,
4446 #ifndef CAPSTONE_DIET
4447 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4448 #endif
4449 },
4450 {
4451 AArch64_LD1Fourv16b_POST, ARM64_INS_LD1,
4452 #ifndef CAPSTONE_DIET
4453 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4454 #endif
4455 },
4456 {
4457 AArch64_LD1Fourv1d, ARM64_INS_LD1,
4458 #ifndef CAPSTONE_DIET
4459 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4460 #endif
4461 },
4462 {
4463 AArch64_LD1Fourv1d_POST, ARM64_INS_LD1,
4464 #ifndef CAPSTONE_DIET
4465 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4466 #endif
4467 },
4468 {
4469 AArch64_LD1Fourv2d, ARM64_INS_LD1,
4470 #ifndef CAPSTONE_DIET
4471 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4472 #endif
4473 },
4474 {
4475 AArch64_LD1Fourv2d_POST, ARM64_INS_LD1,
4476 #ifndef CAPSTONE_DIET
4477 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4478 #endif
4479 },
4480 {
4481 AArch64_LD1Fourv2s, ARM64_INS_LD1,
4482 #ifndef CAPSTONE_DIET
4483 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4484 #endif
4485 },
4486 {
4487 AArch64_LD1Fourv2s_POST, ARM64_INS_LD1,
4488 #ifndef CAPSTONE_DIET
4489 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4490 #endif
4491 },
4492 {
4493 AArch64_LD1Fourv4h, ARM64_INS_LD1,
4494 #ifndef CAPSTONE_DIET
4495 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4496 #endif
4497 },
4498 {
4499 AArch64_LD1Fourv4h_POST, ARM64_INS_LD1,
4500 #ifndef CAPSTONE_DIET
4501 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4502 #endif
4503 },
4504 {
4505 AArch64_LD1Fourv4s, ARM64_INS_LD1,
4506 #ifndef CAPSTONE_DIET
4507 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4508 #endif
4509 },
4510 {
4511 AArch64_LD1Fourv4s_POST, ARM64_INS_LD1,
4512 #ifndef CAPSTONE_DIET
4513 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4514 #endif
4515 },
4516 {
4517 AArch64_LD1Fourv8b, ARM64_INS_LD1,
4518 #ifndef CAPSTONE_DIET
4519 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4520 #endif
4521 },
4522 {
4523 AArch64_LD1Fourv8b_POST, ARM64_INS_LD1,
4524 #ifndef CAPSTONE_DIET
4525 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4526 #endif
4527 },
4528 {
4529 AArch64_LD1Fourv8h, ARM64_INS_LD1,
4530 #ifndef CAPSTONE_DIET
4531 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4532 #endif
4533 },
4534 {
4535 AArch64_LD1Fourv8h_POST, ARM64_INS_LD1,
4536 #ifndef CAPSTONE_DIET
4537 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4538 #endif
4539 },
4540 {
4541 AArch64_LD1Onev16b, ARM64_INS_LD1,
4542 #ifndef CAPSTONE_DIET
4543 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4544 #endif
4545 },
4546 {
4547 AArch64_LD1Onev16b_POST, ARM64_INS_LD1,
4548 #ifndef CAPSTONE_DIET
4549 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4550 #endif
4551 },
4552 {
4553 AArch64_LD1Onev1d, ARM64_INS_LD1,
4554 #ifndef CAPSTONE_DIET
4555 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4556 #endif
4557 },
4558 {
4559 AArch64_LD1Onev1d_POST, ARM64_INS_LD1,
4560 #ifndef CAPSTONE_DIET
4561 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4562 #endif
4563 },
4564 {
4565 AArch64_LD1Onev2d, ARM64_INS_LD1,
4566 #ifndef CAPSTONE_DIET
4567 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4568 #endif
4569 },
4570 {
4571 AArch64_LD1Onev2d_POST, ARM64_INS_LD1,
4572 #ifndef CAPSTONE_DIET
4573 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4574 #endif
4575 },
4576 {
4577 AArch64_LD1Onev2s, ARM64_INS_LD1,
4578 #ifndef CAPSTONE_DIET
4579 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4580 #endif
4581 },
4582 {
4583 AArch64_LD1Onev2s_POST, ARM64_INS_LD1,
4584 #ifndef CAPSTONE_DIET
4585 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4586 #endif
4587 },
4588 {
4589 AArch64_LD1Onev4h, ARM64_INS_LD1,
4590 #ifndef CAPSTONE_DIET
4591 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4592 #endif
4593 },
4594 {
4595 AArch64_LD1Onev4h_POST, ARM64_INS_LD1,
4596 #ifndef CAPSTONE_DIET
4597 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4598 #endif
4599 },
4600 {
4601 AArch64_LD1Onev4s, ARM64_INS_LD1,
4602 #ifndef CAPSTONE_DIET
4603 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4604 #endif
4605 },
4606 {
4607 AArch64_LD1Onev4s_POST, ARM64_INS_LD1,
4608 #ifndef CAPSTONE_DIET
4609 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4610 #endif
4611 },
4612 {
4613 AArch64_LD1Onev8b, ARM64_INS_LD1,
4614 #ifndef CAPSTONE_DIET
4615 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4616 #endif
4617 },
4618 {
4619 AArch64_LD1Onev8b_POST, ARM64_INS_LD1,
4620 #ifndef CAPSTONE_DIET
4621 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4622 #endif
4623 },
4624 {
4625 AArch64_LD1Onev8h, ARM64_INS_LD1,
4626 #ifndef CAPSTONE_DIET
4627 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4628 #endif
4629 },
4630 {
4631 AArch64_LD1Onev8h_POST, ARM64_INS_LD1,
4632 #ifndef CAPSTONE_DIET
4633 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4634 #endif
4635 },
4636 {
4637 AArch64_LD1Rv16b, ARM64_INS_LD1R,
4638 #ifndef CAPSTONE_DIET
4639 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4640 #endif
4641 },
4642 {
4643 AArch64_LD1Rv16b_POST, ARM64_INS_LD1R,
4644 #ifndef CAPSTONE_DIET
4645 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4646 #endif
4647 },
4648 {
4649 AArch64_LD1Rv1d, ARM64_INS_LD1R,
4650 #ifndef CAPSTONE_DIET
4651 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4652 #endif
4653 },
4654 {
4655 AArch64_LD1Rv1d_POST, ARM64_INS_LD1R,
4656 #ifndef CAPSTONE_DIET
4657 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4658 #endif
4659 },
4660 {
4661 AArch64_LD1Rv2d, ARM64_INS_LD1R,
4662 #ifndef CAPSTONE_DIET
4663 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4664 #endif
4665 },
4666 {
4667 AArch64_LD1Rv2d_POST, ARM64_INS_LD1R,
4668 #ifndef CAPSTONE_DIET
4669 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4670 #endif
4671 },
4672 {
4673 AArch64_LD1Rv2s, ARM64_INS_LD1R,
4674 #ifndef CAPSTONE_DIET
4675 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4676 #endif
4677 },
4678 {
4679 AArch64_LD1Rv2s_POST, ARM64_INS_LD1R,
4680 #ifndef CAPSTONE_DIET
4681 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4682 #endif
4683 },
4684 {
4685 AArch64_LD1Rv4h, ARM64_INS_LD1R,
4686 #ifndef CAPSTONE_DIET
4687 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4688 #endif
4689 },
4690 {
4691 AArch64_LD1Rv4h_POST, ARM64_INS_LD1R,
4692 #ifndef CAPSTONE_DIET
4693 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4694 #endif
4695 },
4696 {
4697 AArch64_LD1Rv4s, ARM64_INS_LD1R,
4698 #ifndef CAPSTONE_DIET
4699 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4700 #endif
4701 },
4702 {
4703 AArch64_LD1Rv4s_POST, ARM64_INS_LD1R,
4704 #ifndef CAPSTONE_DIET
4705 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4706 #endif
4707 },
4708 {
4709 AArch64_LD1Rv8b, ARM64_INS_LD1R,
4710 #ifndef CAPSTONE_DIET
4711 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4712 #endif
4713 },
4714 {
4715 AArch64_LD1Rv8b_POST, ARM64_INS_LD1R,
4716 #ifndef CAPSTONE_DIET
4717 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4718 #endif
4719 },
4720 {
4721 AArch64_LD1Rv8h, ARM64_INS_LD1R,
4722 #ifndef CAPSTONE_DIET
4723 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4724 #endif
4725 },
4726 {
4727 AArch64_LD1Rv8h_POST, ARM64_INS_LD1R,
4728 #ifndef CAPSTONE_DIET
4729 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4730 #endif
4731 },
4732 {
4733 AArch64_LD1Threev16b, ARM64_INS_LD1,
4734 #ifndef CAPSTONE_DIET
4735 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4736 #endif
4737 },
4738 {
4739 AArch64_LD1Threev16b_POST, ARM64_INS_LD1,
4740 #ifndef CAPSTONE_DIET
4741 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4742 #endif
4743 },
4744 {
4745 AArch64_LD1Threev1d, ARM64_INS_LD1,
4746 #ifndef CAPSTONE_DIET
4747 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4748 #endif
4749 },
4750 {
4751 AArch64_LD1Threev1d_POST, ARM64_INS_LD1,
4752 #ifndef CAPSTONE_DIET
4753 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4754 #endif
4755 },
4756 {
4757 AArch64_LD1Threev2d, ARM64_INS_LD1,
4758 #ifndef CAPSTONE_DIET
4759 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4760 #endif
4761 },
4762 {
4763 AArch64_LD1Threev2d_POST, ARM64_INS_LD1,
4764 #ifndef CAPSTONE_DIET
4765 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4766 #endif
4767 },
4768 {
4769 AArch64_LD1Threev2s, ARM64_INS_LD1,
4770 #ifndef CAPSTONE_DIET
4771 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4772 #endif
4773 },
4774 {
4775 AArch64_LD1Threev2s_POST, ARM64_INS_LD1,
4776 #ifndef CAPSTONE_DIET
4777 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4778 #endif
4779 },
4780 {
4781 AArch64_LD1Threev4h, ARM64_INS_LD1,
4782 #ifndef CAPSTONE_DIET
4783 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4784 #endif
4785 },
4786 {
4787 AArch64_LD1Threev4h_POST, ARM64_INS_LD1,
4788 #ifndef CAPSTONE_DIET
4789 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4790 #endif
4791 },
4792 {
4793 AArch64_LD1Threev4s, ARM64_INS_LD1,
4794 #ifndef CAPSTONE_DIET
4795 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4796 #endif
4797 },
4798 {
4799 AArch64_LD1Threev4s_POST, ARM64_INS_LD1,
4800 #ifndef CAPSTONE_DIET
4801 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4802 #endif
4803 },
4804 {
4805 AArch64_LD1Threev8b, ARM64_INS_LD1,
4806 #ifndef CAPSTONE_DIET
4807 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4808 #endif
4809 },
4810 {
4811 AArch64_LD1Threev8b_POST, ARM64_INS_LD1,
4812 #ifndef CAPSTONE_DIET
4813 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4814 #endif
4815 },
4816 {
4817 AArch64_LD1Threev8h, ARM64_INS_LD1,
4818 #ifndef CAPSTONE_DIET
4819 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4820 #endif
4821 },
4822 {
4823 AArch64_LD1Threev8h_POST, ARM64_INS_LD1,
4824 #ifndef CAPSTONE_DIET
4825 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4826 #endif
4827 },
4828 {
4829 AArch64_LD1Twov16b, ARM64_INS_LD1,
4830 #ifndef CAPSTONE_DIET
4831 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4832 #endif
4833 },
4834 {
4835 AArch64_LD1Twov16b_POST, ARM64_INS_LD1,
4836 #ifndef CAPSTONE_DIET
4837 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4838 #endif
4839 },
4840 {
4841 AArch64_LD1Twov1d, ARM64_INS_LD1,
4842 #ifndef CAPSTONE_DIET
4843 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4844 #endif
4845 },
4846 {
4847 AArch64_LD1Twov1d_POST, ARM64_INS_LD1,
4848 #ifndef CAPSTONE_DIET
4849 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4850 #endif
4851 },
4852 {
4853 AArch64_LD1Twov2d, ARM64_INS_LD1,
4854 #ifndef CAPSTONE_DIET
4855 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4856 #endif
4857 },
4858 {
4859 AArch64_LD1Twov2d_POST, ARM64_INS_LD1,
4860 #ifndef CAPSTONE_DIET
4861 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4862 #endif
4863 },
4864 {
4865 AArch64_LD1Twov2s, ARM64_INS_LD1,
4866 #ifndef CAPSTONE_DIET
4867 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4868 #endif
4869 },
4870 {
4871 AArch64_LD1Twov2s_POST, ARM64_INS_LD1,
4872 #ifndef CAPSTONE_DIET
4873 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4874 #endif
4875 },
4876 {
4877 AArch64_LD1Twov4h, ARM64_INS_LD1,
4878 #ifndef CAPSTONE_DIET
4879 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4880 #endif
4881 },
4882 {
4883 AArch64_LD1Twov4h_POST, ARM64_INS_LD1,
4884 #ifndef CAPSTONE_DIET
4885 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4886 #endif
4887 },
4888 {
4889 AArch64_LD1Twov4s, ARM64_INS_LD1,
4890 #ifndef CAPSTONE_DIET
4891 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4892 #endif
4893 },
4894 {
4895 AArch64_LD1Twov4s_POST, ARM64_INS_LD1,
4896 #ifndef CAPSTONE_DIET
4897 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4898 #endif
4899 },
4900 {
4901 AArch64_LD1Twov8b, ARM64_INS_LD1,
4902 #ifndef CAPSTONE_DIET
4903 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4904 #endif
4905 },
4906 {
4907 AArch64_LD1Twov8b_POST, ARM64_INS_LD1,
4908 #ifndef CAPSTONE_DIET
4909 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4910 #endif
4911 },
4912 {
4913 AArch64_LD1Twov8h, ARM64_INS_LD1,
4914 #ifndef CAPSTONE_DIET
4915 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4916 #endif
4917 },
4918 {
4919 AArch64_LD1Twov8h_POST, ARM64_INS_LD1,
4920 #ifndef CAPSTONE_DIET
4921 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4922 #endif
4923 },
4924 {
4925 AArch64_LD1i16, ARM64_INS_LD1,
4926 #ifndef CAPSTONE_DIET
4927 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4928 #endif
4929 },
4930 {
4931 AArch64_LD1i16_POST, ARM64_INS_LD1,
4932 #ifndef CAPSTONE_DIET
4933 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4934 #endif
4935 },
4936 {
4937 AArch64_LD1i32, ARM64_INS_LD1,
4938 #ifndef CAPSTONE_DIET
4939 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4940 #endif
4941 },
4942 {
4943 AArch64_LD1i32_POST, ARM64_INS_LD1,
4944 #ifndef CAPSTONE_DIET
4945 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4946 #endif
4947 },
4948 {
4949 AArch64_LD1i64, ARM64_INS_LD1,
4950 #ifndef CAPSTONE_DIET
4951 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4952 #endif
4953 },
4954 {
4955 AArch64_LD1i64_POST, ARM64_INS_LD1,
4956 #ifndef CAPSTONE_DIET
4957 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4958 #endif
4959 },
4960 {
4961 AArch64_LD1i8, ARM64_INS_LD1,
4962 #ifndef CAPSTONE_DIET
4963 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4964 #endif
4965 },
4966 {
4967 AArch64_LD1i8_POST, ARM64_INS_LD1,
4968 #ifndef CAPSTONE_DIET
4969 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4970 #endif
4971 },
4972 {
4973 AArch64_LD2Rv16b, ARM64_INS_LD2R,
4974 #ifndef CAPSTONE_DIET
4975 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4976 #endif
4977 },
4978 {
4979 AArch64_LD2Rv16b_POST, ARM64_INS_LD2R,
4980 #ifndef CAPSTONE_DIET
4981 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4982 #endif
4983 },
4984 {
4985 AArch64_LD2Rv1d, ARM64_INS_LD2R,
4986 #ifndef CAPSTONE_DIET
4987 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4988 #endif
4989 },
4990 {
4991 AArch64_LD2Rv1d_POST, ARM64_INS_LD2R,
4992 #ifndef CAPSTONE_DIET
4993 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
4994 #endif
4995 },
4996 {
4997 AArch64_LD2Rv2d, ARM64_INS_LD2R,
4998 #ifndef CAPSTONE_DIET
4999 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5000 #endif
5001 },
5002 {
5003 AArch64_LD2Rv2d_POST, ARM64_INS_LD2R,
5004 #ifndef CAPSTONE_DIET
5005 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5006 #endif
5007 },
5008 {
5009 AArch64_LD2Rv2s, ARM64_INS_LD2R,
5010 #ifndef CAPSTONE_DIET
5011 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5012 #endif
5013 },
5014 {
5015 AArch64_LD2Rv2s_POST, ARM64_INS_LD2R,
5016 #ifndef CAPSTONE_DIET
5017 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5018 #endif
5019 },
5020 {
5021 AArch64_LD2Rv4h, ARM64_INS_LD2R,
5022 #ifndef CAPSTONE_DIET
5023 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5024 #endif
5025 },
5026 {
5027 AArch64_LD2Rv4h_POST, ARM64_INS_LD2R,
5028 #ifndef CAPSTONE_DIET
5029 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5030 #endif
5031 },
5032 {
5033 AArch64_LD2Rv4s, ARM64_INS_LD2R,
5034 #ifndef CAPSTONE_DIET
5035 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5036 #endif
5037 },
5038 {
5039 AArch64_LD2Rv4s_POST, ARM64_INS_LD2R,
5040 #ifndef CAPSTONE_DIET
5041 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5042 #endif
5043 },
5044 {
5045 AArch64_LD2Rv8b, ARM64_INS_LD2R,
5046 #ifndef CAPSTONE_DIET
5047 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5048 #endif
5049 },
5050 {
5051 AArch64_LD2Rv8b_POST, ARM64_INS_LD2R,
5052 #ifndef CAPSTONE_DIET
5053 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5054 #endif
5055 },
5056 {
5057 AArch64_LD2Rv8h, ARM64_INS_LD2R,
5058 #ifndef CAPSTONE_DIET
5059 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5060 #endif
5061 },
5062 {
5063 AArch64_LD2Rv8h_POST, ARM64_INS_LD2R,
5064 #ifndef CAPSTONE_DIET
5065 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5066 #endif
5067 },
5068 {
5069 AArch64_LD2Twov16b, ARM64_INS_LD2,
5070 #ifndef CAPSTONE_DIET
5071 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5072 #endif
5073 },
5074 {
5075 AArch64_LD2Twov16b_POST, ARM64_INS_LD2,
5076 #ifndef CAPSTONE_DIET
5077 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5078 #endif
5079 },
5080 {
5081 AArch64_LD2Twov2d, ARM64_INS_LD2,
5082 #ifndef CAPSTONE_DIET
5083 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5084 #endif
5085 },
5086 {
5087 AArch64_LD2Twov2d_POST, ARM64_INS_LD2,
5088 #ifndef CAPSTONE_DIET
5089 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5090 #endif
5091 },
5092 {
5093 AArch64_LD2Twov2s, ARM64_INS_LD2,
5094 #ifndef CAPSTONE_DIET
5095 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5096 #endif
5097 },
5098 {
5099 AArch64_LD2Twov2s_POST, ARM64_INS_LD2,
5100 #ifndef CAPSTONE_DIET
5101 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5102 #endif
5103 },
5104 {
5105 AArch64_LD2Twov4h, ARM64_INS_LD2,
5106 #ifndef CAPSTONE_DIET
5107 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5108 #endif
5109 },
5110 {
5111 AArch64_LD2Twov4h_POST, ARM64_INS_LD2,
5112 #ifndef CAPSTONE_DIET
5113 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5114 #endif
5115 },
5116 {
5117 AArch64_LD2Twov4s, ARM64_INS_LD2,
5118 #ifndef CAPSTONE_DIET
5119 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5120 #endif
5121 },
5122 {
5123 AArch64_LD2Twov4s_POST, ARM64_INS_LD2,
5124 #ifndef CAPSTONE_DIET
5125 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5126 #endif
5127 },
5128 {
5129 AArch64_LD2Twov8b, ARM64_INS_LD2,
5130 #ifndef CAPSTONE_DIET
5131 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5132 #endif
5133 },
5134 {
5135 AArch64_LD2Twov8b_POST, ARM64_INS_LD2,
5136 #ifndef CAPSTONE_DIET
5137 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5138 #endif
5139 },
5140 {
5141 AArch64_LD2Twov8h, ARM64_INS_LD2,
5142 #ifndef CAPSTONE_DIET
5143 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5144 #endif
5145 },
5146 {
5147 AArch64_LD2Twov8h_POST, ARM64_INS_LD2,
5148 #ifndef CAPSTONE_DIET
5149 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5150 #endif
5151 },
5152 {
5153 AArch64_LD2i16, ARM64_INS_LD2,
5154 #ifndef CAPSTONE_DIET
5155 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5156 #endif
5157 },
5158 {
5159 AArch64_LD2i16_POST, ARM64_INS_LD2,
5160 #ifndef CAPSTONE_DIET
5161 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5162 #endif
5163 },
5164 {
5165 AArch64_LD2i32, ARM64_INS_LD2,
5166 #ifndef CAPSTONE_DIET
5167 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5168 #endif
5169 },
5170 {
5171 AArch64_LD2i32_POST, ARM64_INS_LD2,
5172 #ifndef CAPSTONE_DIET
5173 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5174 #endif
5175 },
5176 {
5177 AArch64_LD2i64, ARM64_INS_LD2,
5178 #ifndef CAPSTONE_DIET
5179 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5180 #endif
5181 },
5182 {
5183 AArch64_LD2i64_POST, ARM64_INS_LD2,
5184 #ifndef CAPSTONE_DIET
5185 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5186 #endif
5187 },
5188 {
5189 AArch64_LD2i8, ARM64_INS_LD2,
5190 #ifndef CAPSTONE_DIET
5191 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5192 #endif
5193 },
5194 {
5195 AArch64_LD2i8_POST, ARM64_INS_LD2,
5196 #ifndef CAPSTONE_DIET
5197 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5198 #endif
5199 },
5200 {
5201 AArch64_LD3Rv16b, ARM64_INS_LD3R,
5202 #ifndef CAPSTONE_DIET
5203 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5204 #endif
5205 },
5206 {
5207 AArch64_LD3Rv16b_POST, ARM64_INS_LD3R,
5208 #ifndef CAPSTONE_DIET
5209 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5210 #endif
5211 },
5212 {
5213 AArch64_LD3Rv1d, ARM64_INS_LD3R,
5214 #ifndef CAPSTONE_DIET
5215 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5216 #endif
5217 },
5218 {
5219 AArch64_LD3Rv1d_POST, ARM64_INS_LD3R,
5220 #ifndef CAPSTONE_DIET
5221 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5222 #endif
5223 },
5224 {
5225 AArch64_LD3Rv2d, ARM64_INS_LD3R,
5226 #ifndef CAPSTONE_DIET
5227 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5228 #endif
5229 },
5230 {
5231 AArch64_LD3Rv2d_POST, ARM64_INS_LD3R,
5232 #ifndef CAPSTONE_DIET
5233 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5234 #endif
5235 },
5236 {
5237 AArch64_LD3Rv2s, ARM64_INS_LD3R,
5238 #ifndef CAPSTONE_DIET
5239 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5240 #endif
5241 },
5242 {
5243 AArch64_LD3Rv2s_POST, ARM64_INS_LD3R,
5244 #ifndef CAPSTONE_DIET
5245 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5246 #endif
5247 },
5248 {
5249 AArch64_LD3Rv4h, ARM64_INS_LD3R,
5250 #ifndef CAPSTONE_DIET
5251 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5252 #endif
5253 },
5254 {
5255 AArch64_LD3Rv4h_POST, ARM64_INS_LD3R,
5256 #ifndef CAPSTONE_DIET
5257 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5258 #endif
5259 },
5260 {
5261 AArch64_LD3Rv4s, ARM64_INS_LD3R,
5262 #ifndef CAPSTONE_DIET
5263 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5264 #endif
5265 },
5266 {
5267 AArch64_LD3Rv4s_POST, ARM64_INS_LD3R,
5268 #ifndef CAPSTONE_DIET
5269 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5270 #endif
5271 },
5272 {
5273 AArch64_LD3Rv8b, ARM64_INS_LD3R,
5274 #ifndef CAPSTONE_DIET
5275 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5276 #endif
5277 },
5278 {
5279 AArch64_LD3Rv8b_POST, ARM64_INS_LD3R,
5280 #ifndef CAPSTONE_DIET
5281 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5282 #endif
5283 },
5284 {
5285 AArch64_LD3Rv8h, ARM64_INS_LD3R,
5286 #ifndef CAPSTONE_DIET
5287 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5288 #endif
5289 },
5290 {
5291 AArch64_LD3Rv8h_POST, ARM64_INS_LD3R,
5292 #ifndef CAPSTONE_DIET
5293 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5294 #endif
5295 },
5296 {
5297 AArch64_LD3Threev16b, ARM64_INS_LD3,
5298 #ifndef CAPSTONE_DIET
5299 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5300 #endif
5301 },
5302 {
5303 AArch64_LD3Threev16b_POST, ARM64_INS_LD3,
5304 #ifndef CAPSTONE_DIET
5305 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5306 #endif
5307 },
5308 {
5309 AArch64_LD3Threev2d, ARM64_INS_LD3,
5310 #ifndef CAPSTONE_DIET
5311 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5312 #endif
5313 },
5314 {
5315 AArch64_LD3Threev2d_POST, ARM64_INS_LD3,
5316 #ifndef CAPSTONE_DIET
5317 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5318 #endif
5319 },
5320 {
5321 AArch64_LD3Threev2s, ARM64_INS_LD3,
5322 #ifndef CAPSTONE_DIET
5323 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5324 #endif
5325 },
5326 {
5327 AArch64_LD3Threev2s_POST, ARM64_INS_LD3,
5328 #ifndef CAPSTONE_DIET
5329 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5330 #endif
5331 },
5332 {
5333 AArch64_LD3Threev4h, ARM64_INS_LD3,
5334 #ifndef CAPSTONE_DIET
5335 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5336 #endif
5337 },
5338 {
5339 AArch64_LD3Threev4h_POST, ARM64_INS_LD3,
5340 #ifndef CAPSTONE_DIET
5341 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5342 #endif
5343 },
5344 {
5345 AArch64_LD3Threev4s, ARM64_INS_LD3,
5346 #ifndef CAPSTONE_DIET
5347 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5348 #endif
5349 },
5350 {
5351 AArch64_LD3Threev4s_POST, ARM64_INS_LD3,
5352 #ifndef CAPSTONE_DIET
5353 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5354 #endif
5355 },
5356 {
5357 AArch64_LD3Threev8b, ARM64_INS_LD3,
5358 #ifndef CAPSTONE_DIET
5359 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5360 #endif
5361 },
5362 {
5363 AArch64_LD3Threev8b_POST, ARM64_INS_LD3,
5364 #ifndef CAPSTONE_DIET
5365 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5366 #endif
5367 },
5368 {
5369 AArch64_LD3Threev8h, ARM64_INS_LD3,
5370 #ifndef CAPSTONE_DIET
5371 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5372 #endif
5373 },
5374 {
5375 AArch64_LD3Threev8h_POST, ARM64_INS_LD3,
5376 #ifndef CAPSTONE_DIET
5377 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5378 #endif
5379 },
5380 {
5381 AArch64_LD3i16, ARM64_INS_LD3,
5382 #ifndef CAPSTONE_DIET
5383 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5384 #endif
5385 },
5386 {
5387 AArch64_LD3i16_POST, ARM64_INS_LD3,
5388 #ifndef CAPSTONE_DIET
5389 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5390 #endif
5391 },
5392 {
5393 AArch64_LD3i32, ARM64_INS_LD3,
5394 #ifndef CAPSTONE_DIET
5395 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5396 #endif
5397 },
5398 {
5399 AArch64_LD3i32_POST, ARM64_INS_LD3,
5400 #ifndef CAPSTONE_DIET
5401 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5402 #endif
5403 },
5404 {
5405 AArch64_LD3i64, ARM64_INS_LD3,
5406 #ifndef CAPSTONE_DIET
5407 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5408 #endif
5409 },
5410 {
5411 AArch64_LD3i64_POST, ARM64_INS_LD3,
5412 #ifndef CAPSTONE_DIET
5413 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5414 #endif
5415 },
5416 {
5417 AArch64_LD3i8, ARM64_INS_LD3,
5418 #ifndef CAPSTONE_DIET
5419 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5420 #endif
5421 },
5422 {
5423 AArch64_LD3i8_POST, ARM64_INS_LD3,
5424 #ifndef CAPSTONE_DIET
5425 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5426 #endif
5427 },
5428 {
5429 AArch64_LD4Fourv16b, ARM64_INS_LD4,
5430 #ifndef CAPSTONE_DIET
5431 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5432 #endif
5433 },
5434 {
5435 AArch64_LD4Fourv16b_POST, ARM64_INS_LD4,
5436 #ifndef CAPSTONE_DIET
5437 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5438 #endif
5439 },
5440 {
5441 AArch64_LD4Fourv2d, ARM64_INS_LD4,
5442 #ifndef CAPSTONE_DIET
5443 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5444 #endif
5445 },
5446 {
5447 AArch64_LD4Fourv2d_POST, ARM64_INS_LD4,
5448 #ifndef CAPSTONE_DIET
5449 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5450 #endif
5451 },
5452 {
5453 AArch64_LD4Fourv2s, ARM64_INS_LD4,
5454 #ifndef CAPSTONE_DIET
5455 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5456 #endif
5457 },
5458 {
5459 AArch64_LD4Fourv2s_POST, ARM64_INS_LD4,
5460 #ifndef CAPSTONE_DIET
5461 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5462 #endif
5463 },
5464 {
5465 AArch64_LD4Fourv4h, ARM64_INS_LD4,
5466 #ifndef CAPSTONE_DIET
5467 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5468 #endif
5469 },
5470 {
5471 AArch64_LD4Fourv4h_POST, ARM64_INS_LD4,
5472 #ifndef CAPSTONE_DIET
5473 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5474 #endif
5475 },
5476 {
5477 AArch64_LD4Fourv4s, ARM64_INS_LD4,
5478 #ifndef CAPSTONE_DIET
5479 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5480 #endif
5481 },
5482 {
5483 AArch64_LD4Fourv4s_POST, ARM64_INS_LD4,
5484 #ifndef CAPSTONE_DIET
5485 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5486 #endif
5487 },
5488 {
5489 AArch64_LD4Fourv8b, ARM64_INS_LD4,
5490 #ifndef CAPSTONE_DIET
5491 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5492 #endif
5493 },
5494 {
5495 AArch64_LD4Fourv8b_POST, ARM64_INS_LD4,
5496 #ifndef CAPSTONE_DIET
5497 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5498 #endif
5499 },
5500 {
5501 AArch64_LD4Fourv8h, ARM64_INS_LD4,
5502 #ifndef CAPSTONE_DIET
5503 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5504 #endif
5505 },
5506 {
5507 AArch64_LD4Fourv8h_POST, ARM64_INS_LD4,
5508 #ifndef CAPSTONE_DIET
5509 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5510 #endif
5511 },
5512 {
5513 AArch64_LD4Rv16b, ARM64_INS_LD4R,
5514 #ifndef CAPSTONE_DIET
5515 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5516 #endif
5517 },
5518 {
5519 AArch64_LD4Rv16b_POST, ARM64_INS_LD4R,
5520 #ifndef CAPSTONE_DIET
5521 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5522 #endif
5523 },
5524 {
5525 AArch64_LD4Rv1d, ARM64_INS_LD4R,
5526 #ifndef CAPSTONE_DIET
5527 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5528 #endif
5529 },
5530 {
5531 AArch64_LD4Rv1d_POST, ARM64_INS_LD4R,
5532 #ifndef CAPSTONE_DIET
5533 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5534 #endif
5535 },
5536 {
5537 AArch64_LD4Rv2d, ARM64_INS_LD4R,
5538 #ifndef CAPSTONE_DIET
5539 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5540 #endif
5541 },
5542 {
5543 AArch64_LD4Rv2d_POST, ARM64_INS_LD4R,
5544 #ifndef CAPSTONE_DIET
5545 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5546 #endif
5547 },
5548 {
5549 AArch64_LD4Rv2s, ARM64_INS_LD4R,
5550 #ifndef CAPSTONE_DIET
5551 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5552 #endif
5553 },
5554 {
5555 AArch64_LD4Rv2s_POST, ARM64_INS_LD4R,
5556 #ifndef CAPSTONE_DIET
5557 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5558 #endif
5559 },
5560 {
5561 AArch64_LD4Rv4h, ARM64_INS_LD4R,
5562 #ifndef CAPSTONE_DIET
5563 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5564 #endif
5565 },
5566 {
5567 AArch64_LD4Rv4h_POST, ARM64_INS_LD4R,
5568 #ifndef CAPSTONE_DIET
5569 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5570 #endif
5571 },
5572 {
5573 AArch64_LD4Rv4s, ARM64_INS_LD4R,
5574 #ifndef CAPSTONE_DIET
5575 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5576 #endif
5577 },
5578 {
5579 AArch64_LD4Rv4s_POST, ARM64_INS_LD4R,
5580 #ifndef CAPSTONE_DIET
5581 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5582 #endif
5583 },
5584 {
5585 AArch64_LD4Rv8b, ARM64_INS_LD4R,
5586 #ifndef CAPSTONE_DIET
5587 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5588 #endif
5589 },
5590 {
5591 AArch64_LD4Rv8b_POST, ARM64_INS_LD4R,
5592 #ifndef CAPSTONE_DIET
5593 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5594 #endif
5595 },
5596 {
5597 AArch64_LD4Rv8h, ARM64_INS_LD4R,
5598 #ifndef CAPSTONE_DIET
5599 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5600 #endif
5601 },
5602 {
5603 AArch64_LD4Rv8h_POST, ARM64_INS_LD4R,
5604 #ifndef CAPSTONE_DIET
5605 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5606 #endif
5607 },
5608 {
5609 AArch64_LD4i16, ARM64_INS_LD4,
5610 #ifndef CAPSTONE_DIET
5611 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5612 #endif
5613 },
5614 {
5615 AArch64_LD4i16_POST, ARM64_INS_LD4,
5616 #ifndef CAPSTONE_DIET
5617 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5618 #endif
5619 },
5620 {
5621 AArch64_LD4i32, ARM64_INS_LD4,
5622 #ifndef CAPSTONE_DIET
5623 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5624 #endif
5625 },
5626 {
5627 AArch64_LD4i32_POST, ARM64_INS_LD4,
5628 #ifndef CAPSTONE_DIET
5629 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5630 #endif
5631 },
5632 {
5633 AArch64_LD4i64, ARM64_INS_LD4,
5634 #ifndef CAPSTONE_DIET
5635 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5636 #endif
5637 },
5638 {
5639 AArch64_LD4i64_POST, ARM64_INS_LD4,
5640 #ifndef CAPSTONE_DIET
5641 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5642 #endif
5643 },
5644 {
5645 AArch64_LD4i8, ARM64_INS_LD4,
5646 #ifndef CAPSTONE_DIET
5647 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5648 #endif
5649 },
5650 {
5651 AArch64_LD4i8_POST, ARM64_INS_LD4,
5652 #ifndef CAPSTONE_DIET
5653 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
5654 #endif
5655 },
5656 {
5657 AArch64_LDARB, ARM64_INS_LDARB,
5658 #ifndef CAPSTONE_DIET
5659 { 0 }, { 0 }, { 0 }, 0, 0
5660 #endif
5661 },
5662 {
5663 AArch64_LDARH, ARM64_INS_LDARH,
5664 #ifndef CAPSTONE_DIET
5665 { 0 }, { 0 }, { 0 }, 0, 0
5666 #endif
5667 },
5668 {
5669 AArch64_LDARW, ARM64_INS_LDAR,
5670 #ifndef CAPSTONE_DIET
5671 { 0 }, { 0 }, { 0 }, 0, 0
5672 #endif
5673 },
5674 {
5675 AArch64_LDARX, ARM64_INS_LDAR,
5676 #ifndef CAPSTONE_DIET
5677 { 0 }, { 0 }, { 0 }, 0, 0
5678 #endif
5679 },
5680 {
5681 AArch64_LDAXPW, ARM64_INS_LDAXP,
5682 #ifndef CAPSTONE_DIET
5683 { 0 }, { 0 }, { 0 }, 0, 0
5684 #endif
5685 },
5686 {
5687 AArch64_LDAXPX, ARM64_INS_LDAXP,
5688 #ifndef CAPSTONE_DIET
5689 { 0 }, { 0 }, { 0 }, 0, 0
5690 #endif
5691 },
5692 {
5693 AArch64_LDAXRB, ARM64_INS_LDAXRB,
5694 #ifndef CAPSTONE_DIET
5695 { 0 }, { 0 }, { 0 }, 0, 0
5696 #endif
5697 },
5698 {
5699 AArch64_LDAXRH, ARM64_INS_LDAXRH,
5700 #ifndef CAPSTONE_DIET
5701 { 0 }, { 0 }, { 0 }, 0, 0
5702 #endif
5703 },
5704 {
5705 AArch64_LDAXRW, ARM64_INS_LDAXR,
5706 #ifndef CAPSTONE_DIET
5707 { 0 }, { 0 }, { 0 }, 0, 0
5708 #endif
5709 },
5710 {
5711 AArch64_LDAXRX, ARM64_INS_LDAXR,
5712 #ifndef CAPSTONE_DIET
5713 { 0 }, { 0 }, { 0 }, 0, 0
5714 #endif
5715 },
5716 {
5717 AArch64_LDNPDi, ARM64_INS_LDNP,
5718 #ifndef CAPSTONE_DIET
5719 { 0 }, { 0 }, { 0 }, 0, 0
5720 #endif
5721 },
5722 {
5723 AArch64_LDNPQi, ARM64_INS_LDNP,
5724 #ifndef CAPSTONE_DIET
5725 { 0 }, { 0 }, { 0 }, 0, 0
5726 #endif
5727 },
5728 {
5729 AArch64_LDNPSi, ARM64_INS_LDNP,
5730 #ifndef CAPSTONE_DIET
5731 { 0 }, { 0 }, { 0 }, 0, 0
5732 #endif
5733 },
5734 {
5735 AArch64_LDNPWi, ARM64_INS_LDNP,
5736 #ifndef CAPSTONE_DIET
5737 { 0 }, { 0 }, { 0 }, 0, 0
5738 #endif
5739 },
5740 {
5741 AArch64_LDNPXi, ARM64_INS_LDNP,
5742 #ifndef CAPSTONE_DIET
5743 { 0 }, { 0 }, { 0 }, 0, 0
5744 #endif
5745 },
5746 {
5747 AArch64_LDPDi, ARM64_INS_LDP,
5748 #ifndef CAPSTONE_DIET
5749 { 0 }, { 0 }, { 0 }, 0, 0
5750 #endif
5751 },
5752 {
5753 AArch64_LDPDpost, ARM64_INS_LDP,
5754 #ifndef CAPSTONE_DIET
5755 { 0 }, { 0 }, { 0 }, 0, 0
5756 #endif
5757 },
5758 {
5759 AArch64_LDPDpre, ARM64_INS_LDP,
5760 #ifndef CAPSTONE_DIET
5761 { 0 }, { 0 }, { 0 }, 0, 0
5762 #endif
5763 },
5764 {
5765 AArch64_LDPQi, ARM64_INS_LDP,
5766 #ifndef CAPSTONE_DIET
5767 { 0 }, { 0 }, { 0 }, 0, 0
5768 #endif
5769 },
5770 {
5771 AArch64_LDPQpost, ARM64_INS_LDP,
5772 #ifndef CAPSTONE_DIET
5773 { 0 }, { 0 }, { 0 }, 0, 0
5774 #endif
5775 },
5776 {
5777 AArch64_LDPQpre, ARM64_INS_LDP,
5778 #ifndef CAPSTONE_DIET
5779 { 0 }, { 0 }, { 0 }, 0, 0
5780 #endif
5781 },
5782 {
5783 AArch64_LDPSWi, ARM64_INS_LDPSW,
5784 #ifndef CAPSTONE_DIET
5785 { 0 }, { 0 }, { 0 }, 0, 0
5786 #endif
5787 },
5788 {
5789 AArch64_LDPSWpost, ARM64_INS_LDPSW,
5790 #ifndef CAPSTONE_DIET
5791 { 0 }, { 0 }, { 0 }, 0, 0
5792 #endif
5793 },
5794 {
5795 AArch64_LDPSWpre, ARM64_INS_LDPSW,
5796 #ifndef CAPSTONE_DIET
5797 { 0 }, { 0 }, { 0 }, 0, 0
5798 #endif
5799 },
5800 {
5801 AArch64_LDPSi, ARM64_INS_LDP,
5802 #ifndef CAPSTONE_DIET
5803 { 0 }, { 0 }, { 0 }, 0, 0
5804 #endif
5805 },
5806 {
5807 AArch64_LDPSpost, ARM64_INS_LDP,
5808 #ifndef CAPSTONE_DIET
5809 { 0 }, { 0 }, { 0 }, 0, 0
5810 #endif
5811 },
5812 {
5813 AArch64_LDPSpre, ARM64_INS_LDP,
5814 #ifndef CAPSTONE_DIET
5815 { 0 }, { 0 }, { 0 }, 0, 0
5816 #endif
5817 },
5818 {
5819 AArch64_LDPWi, ARM64_INS_LDP,
5820 #ifndef CAPSTONE_DIET
5821 { 0 }, { 0 }, { 0 }, 0, 0
5822 #endif
5823 },
5824 {
5825 AArch64_LDPWpost, ARM64_INS_LDP,
5826 #ifndef CAPSTONE_DIET
5827 { 0 }, { 0 }, { 0 }, 0, 0
5828 #endif
5829 },
5830 {
5831 AArch64_LDPWpre, ARM64_INS_LDP,
5832 #ifndef CAPSTONE_DIET
5833 { 0 }, { 0 }, { 0 }, 0, 0
5834 #endif
5835 },
5836 {
5837 AArch64_LDPXi, ARM64_INS_LDP,
5838 #ifndef CAPSTONE_DIET
5839 { 0 }, { 0 }, { 0 }, 0, 0
5840 #endif
5841 },
5842 {
5843 AArch64_LDPXpost, ARM64_INS_LDP,
5844 #ifndef CAPSTONE_DIET
5845 { 0 }, { 0 }, { 0 }, 0, 0
5846 #endif
5847 },
5848 {
5849 AArch64_LDPXpre, ARM64_INS_LDP,
5850 #ifndef CAPSTONE_DIET
5851 { 0 }, { 0 }, { 0 }, 0, 0
5852 #endif
5853 },
5854 {
5855 AArch64_LDRBBpost, ARM64_INS_LDRB,
5856 #ifndef CAPSTONE_DIET
5857 { 0 }, { 0 }, { 0 }, 0, 0
5858 #endif
5859 },
5860 {
5861 AArch64_LDRBBpre, ARM64_INS_LDRB,
5862 #ifndef CAPSTONE_DIET
5863 { 0 }, { 0 }, { 0 }, 0, 0
5864 #endif
5865 },
5866 {
5867 AArch64_LDRBBroW, ARM64_INS_LDRB,
5868 #ifndef CAPSTONE_DIET
5869 { 0 }, { 0 }, { 0 }, 0, 0
5870 #endif
5871 },
5872 {
5873 AArch64_LDRBBroX, ARM64_INS_LDRB,
5874 #ifndef CAPSTONE_DIET
5875 { 0 }, { 0 }, { 0 }, 0, 0
5876 #endif
5877 },
5878 {
5879 AArch64_LDRBBui, ARM64_INS_LDRB,
5880 #ifndef CAPSTONE_DIET
5881 { 0 }, { 0 }, { 0 }, 0, 0
5882 #endif
5883 },
5884 {
5885 AArch64_LDRBpost, ARM64_INS_LDR,
5886 #ifndef CAPSTONE_DIET
5887 { 0 }, { 0 }, { 0 }, 0, 0
5888 #endif
5889 },
5890 {
5891 AArch64_LDRBpre, ARM64_INS_LDR,
5892 #ifndef CAPSTONE_DIET
5893 { 0 }, { 0 }, { 0 }, 0, 0
5894 #endif
5895 },
5896 {
5897 AArch64_LDRBroW, ARM64_INS_LDR,
5898 #ifndef CAPSTONE_DIET
5899 { 0 }, { 0 }, { 0 }, 0, 0
5900 #endif
5901 },
5902 {
5903 AArch64_LDRBroX, ARM64_INS_LDR,
5904 #ifndef CAPSTONE_DIET
5905 { 0 }, { 0 }, { 0 }, 0, 0
5906 #endif
5907 },
5908 {
5909 AArch64_LDRBui, ARM64_INS_LDR,
5910 #ifndef CAPSTONE_DIET
5911 { 0 }, { 0 }, { 0 }, 0, 0
5912 #endif
5913 },
5914 {
5915 AArch64_LDRDl, ARM64_INS_LDR,
5916 #ifndef CAPSTONE_DIET
5917 { 0 }, { 0 }, { 0 }, 0, 0
5918 #endif
5919 },
5920 {
5921 AArch64_LDRDpost, ARM64_INS_LDR,
5922 #ifndef CAPSTONE_DIET
5923 { 0 }, { 0 }, { 0 }, 0, 0
5924 #endif
5925 },
5926 {
5927 AArch64_LDRDpre, ARM64_INS_LDR,
5928 #ifndef CAPSTONE_DIET
5929 { 0 }, { 0 }, { 0 }, 0, 0
5930 #endif
5931 },
5932 {
5933 AArch64_LDRDroW, ARM64_INS_LDR,
5934 #ifndef CAPSTONE_DIET
5935 { 0 }, { 0 }, { 0 }, 0, 0
5936 #endif
5937 },
5938 {
5939 AArch64_LDRDroX, ARM64_INS_LDR,
5940 #ifndef CAPSTONE_DIET
5941 { 0 }, { 0 }, { 0 }, 0, 0
5942 #endif
5943 },
5944 {
5945 AArch64_LDRDui, ARM64_INS_LDR,
5946 #ifndef CAPSTONE_DIET
5947 { 0 }, { 0 }, { 0 }, 0, 0
5948 #endif
5949 },
5950 {
5951 AArch64_LDRHHpost, ARM64_INS_LDRH,
5952 #ifndef CAPSTONE_DIET
5953 { 0 }, { 0 }, { 0 }, 0, 0
5954 #endif
5955 },
5956 {
5957 AArch64_LDRHHpre, ARM64_INS_LDRH,
5958 #ifndef CAPSTONE_DIET
5959 { 0 }, { 0 }, { 0 }, 0, 0
5960 #endif
5961 },
5962 {
5963 AArch64_LDRHHroW, ARM64_INS_LDRH,
5964 #ifndef CAPSTONE_DIET
5965 { 0 }, { 0 }, { 0 }, 0, 0
5966 #endif
5967 },
5968 {
5969 AArch64_LDRHHroX, ARM64_INS_LDRH,
5970 #ifndef CAPSTONE_DIET
5971 { 0 }, { 0 }, { 0 }, 0, 0
5972 #endif
5973 },
5974 {
5975 AArch64_LDRHHui, ARM64_INS_LDRH,
5976 #ifndef CAPSTONE_DIET
5977 { 0 }, { 0 }, { 0 }, 0, 0
5978 #endif
5979 },
5980 {
5981 AArch64_LDRHpost, ARM64_INS_LDR,
5982 #ifndef CAPSTONE_DIET
5983 { 0 }, { 0 }, { 0 }, 0, 0
5984 #endif
5985 },
5986 {
5987 AArch64_LDRHpre, ARM64_INS_LDR,
5988 #ifndef CAPSTONE_DIET
5989 { 0 }, { 0 }, { 0 }, 0, 0
5990 #endif
5991 },
5992 {
5993 AArch64_LDRHroW, ARM64_INS_LDR,
5994 #ifndef CAPSTONE_DIET
5995 { 0 }, { 0 }, { 0 }, 0, 0
5996 #endif
5997 },
5998 {
5999 AArch64_LDRHroX, ARM64_INS_LDR,
6000 #ifndef CAPSTONE_DIET
6001 { 0 }, { 0 }, { 0 }, 0, 0
6002 #endif
6003 },
6004 {
6005 AArch64_LDRHui, ARM64_INS_LDR,
6006 #ifndef CAPSTONE_DIET
6007 { 0 }, { 0 }, { 0 }, 0, 0
6008 #endif
6009 },
6010 {
6011 AArch64_LDRQl, ARM64_INS_LDR,
6012 #ifndef CAPSTONE_DIET
6013 { 0 }, { 0 }, { 0 }, 0, 0
6014 #endif
6015 },
6016 {
6017 AArch64_LDRQpost, ARM64_INS_LDR,
6018 #ifndef CAPSTONE_DIET
6019 { 0 }, { 0 }, { 0 }, 0, 0
6020 #endif
6021 },
6022 {
6023 AArch64_LDRQpre, ARM64_INS_LDR,
6024 #ifndef CAPSTONE_DIET
6025 { 0 }, { 0 }, { 0 }, 0, 0
6026 #endif
6027 },
6028 {
6029 AArch64_LDRQroW, ARM64_INS_LDR,
6030 #ifndef CAPSTONE_DIET
6031 { 0 }, { 0 }, { 0 }, 0, 0
6032 #endif
6033 },
6034 {
6035 AArch64_LDRQroX, ARM64_INS_LDR,
6036 #ifndef CAPSTONE_DIET
6037 { 0 }, { 0 }, { 0 }, 0, 0
6038 #endif
6039 },
6040 {
6041 AArch64_LDRQui, ARM64_INS_LDR,
6042 #ifndef CAPSTONE_DIET
6043 { 0 }, { 0 }, { 0 }, 0, 0
6044 #endif
6045 },
6046 {
6047 AArch64_LDRSBWpost, ARM64_INS_LDRSB,
6048 #ifndef CAPSTONE_DIET
6049 { 0 }, { 0 }, { 0 }, 0, 0
6050 #endif
6051 },
6052 {
6053 AArch64_LDRSBWpre, ARM64_INS_LDRSB,
6054 #ifndef CAPSTONE_DIET
6055 { 0 }, { 0 }, { 0 }, 0, 0
6056 #endif
6057 },
6058 {
6059 AArch64_LDRSBWroW, ARM64_INS_LDRSB,
6060 #ifndef CAPSTONE_DIET
6061 { 0 }, { 0 }, { 0 }, 0, 0
6062 #endif
6063 },
6064 {
6065 AArch64_LDRSBWroX, ARM64_INS_LDRSB,
6066 #ifndef CAPSTONE_DIET
6067 { 0 }, { 0 }, { 0 }, 0, 0
6068 #endif
6069 },
6070 {
6071 AArch64_LDRSBWui, ARM64_INS_LDRSB,
6072 #ifndef CAPSTONE_DIET
6073 { 0 }, { 0 }, { 0 }, 0, 0
6074 #endif
6075 },
6076 {
6077 AArch64_LDRSBXpost, ARM64_INS_LDRSB,
6078 #ifndef CAPSTONE_DIET
6079 { 0 }, { 0 }, { 0 }, 0, 0
6080 #endif
6081 },
6082 {
6083 AArch64_LDRSBXpre, ARM64_INS_LDRSB,
6084 #ifndef CAPSTONE_DIET
6085 { 0 }, { 0 }, { 0 }, 0, 0
6086 #endif
6087 },
6088 {
6089 AArch64_LDRSBXroW, ARM64_INS_LDRSB,
6090 #ifndef CAPSTONE_DIET
6091 { 0 }, { 0 }, { 0 }, 0, 0
6092 #endif
6093 },
6094 {
6095 AArch64_LDRSBXroX, ARM64_INS_LDRSB,
6096 #ifndef CAPSTONE_DIET
6097 { 0 }, { 0 }, { 0 }, 0, 0
6098 #endif
6099 },
6100 {
6101 AArch64_LDRSBXui, ARM64_INS_LDRSB,
6102 #ifndef CAPSTONE_DIET
6103 { 0 }, { 0 }, { 0 }, 0, 0
6104 #endif
6105 },
6106 {
6107 AArch64_LDRSHWpost, ARM64_INS_LDRSH,
6108 #ifndef CAPSTONE_DIET
6109 { 0 }, { 0 }, { 0 }, 0, 0
6110 #endif
6111 },
6112 {
6113 AArch64_LDRSHWpre, ARM64_INS_LDRSH,
6114 #ifndef CAPSTONE_DIET
6115 { 0 }, { 0 }, { 0 }, 0, 0
6116 #endif
6117 },
6118 {
6119 AArch64_LDRSHWroW, ARM64_INS_LDRSH,
6120 #ifndef CAPSTONE_DIET
6121 { 0 }, { 0 }, { 0 }, 0, 0
6122 #endif
6123 },
6124 {
6125 AArch64_LDRSHWroX, ARM64_INS_LDRSH,
6126 #ifndef CAPSTONE_DIET
6127 { 0 }, { 0 }, { 0 }, 0, 0
6128 #endif
6129 },
6130 {
6131 AArch64_LDRSHWui, ARM64_INS_LDRSH,
6132 #ifndef CAPSTONE_DIET
6133 { 0 }, { 0 }, { 0 }, 0, 0
6134 #endif
6135 },
6136 {
6137 AArch64_LDRSHXpost, ARM64_INS_LDRSH,
6138 #ifndef CAPSTONE_DIET
6139 { 0 }, { 0 }, { 0 }, 0, 0
6140 #endif
6141 },
6142 {
6143 AArch64_LDRSHXpre, ARM64_INS_LDRSH,
6144 #ifndef CAPSTONE_DIET
6145 { 0 }, { 0 }, { 0 }, 0, 0
6146 #endif
6147 },
6148 {
6149 AArch64_LDRSHXroW, ARM64_INS_LDRSH,
6150 #ifndef CAPSTONE_DIET
6151 { 0 }, { 0 }, { 0 }, 0, 0
6152 #endif
6153 },
6154 {
6155 AArch64_LDRSHXroX, ARM64_INS_LDRSH,
6156 #ifndef CAPSTONE_DIET
6157 { 0 }, { 0 }, { 0 }, 0, 0
6158 #endif
6159 },
6160 {
6161 AArch64_LDRSHXui, ARM64_INS_LDRSH,
6162 #ifndef CAPSTONE_DIET
6163 { 0 }, { 0 }, { 0 }, 0, 0
6164 #endif
6165 },
6166 {
6167 AArch64_LDRSWl, ARM64_INS_LDRSW,
6168 #ifndef CAPSTONE_DIET
6169 { 0 }, { 0 }, { 0 }, 0, 0
6170 #endif
6171 },
6172 {
6173 AArch64_LDRSWpost, ARM64_INS_LDRSW,
6174 #ifndef CAPSTONE_DIET
6175 { 0 }, { 0 }, { 0 }, 0, 0
6176 #endif
6177 },
6178 {
6179 AArch64_LDRSWpre, ARM64_INS_LDRSW,
6180 #ifndef CAPSTONE_DIET
6181 { 0 }, { 0 }, { 0 }, 0, 0
6182 #endif
6183 },
6184 {
6185 AArch64_LDRSWroW, ARM64_INS_LDRSW,
6186 #ifndef CAPSTONE_DIET
6187 { 0 }, { 0 }, { 0 }, 0, 0
6188 #endif
6189 },
6190 {
6191 AArch64_LDRSWroX, ARM64_INS_LDRSW,
6192 #ifndef CAPSTONE_DIET
6193 { 0 }, { 0 }, { 0 }, 0, 0
6194 #endif
6195 },
6196 {
6197 AArch64_LDRSWui, ARM64_INS_LDRSW,
6198 #ifndef CAPSTONE_DIET
6199 { 0 }, { 0 }, { 0 }, 0, 0
6200 #endif
6201 },
6202 {
6203 AArch64_LDRSl, ARM64_INS_LDR,
6204 #ifndef CAPSTONE_DIET
6205 { 0 }, { 0 }, { 0 }, 0, 0
6206 #endif
6207 },
6208 {
6209 AArch64_LDRSpost, ARM64_INS_LDR,
6210 #ifndef CAPSTONE_DIET
6211 { 0 }, { 0 }, { 0 }, 0, 0
6212 #endif
6213 },
6214 {
6215 AArch64_LDRSpre, ARM64_INS_LDR,
6216 #ifndef CAPSTONE_DIET
6217 { 0 }, { 0 }, { 0 }, 0, 0
6218 #endif
6219 },
6220 {
6221 AArch64_LDRSroW, ARM64_INS_LDR,
6222 #ifndef CAPSTONE_DIET
6223 { 0 }, { 0 }, { 0 }, 0, 0
6224 #endif
6225 },
6226 {
6227 AArch64_LDRSroX, ARM64_INS_LDR,
6228 #ifndef CAPSTONE_DIET
6229 { 0 }, { 0 }, { 0 }, 0, 0
6230 #endif
6231 },
6232 {
6233 AArch64_LDRSui, ARM64_INS_LDR,
6234 #ifndef CAPSTONE_DIET
6235 { 0 }, { 0 }, { 0 }, 0, 0
6236 #endif
6237 },
6238 {
6239 AArch64_LDRWl, ARM64_INS_LDR,
6240 #ifndef CAPSTONE_DIET
6241 { 0 }, { 0 }, { 0 }, 0, 0
6242 #endif
6243 },
6244 {
6245 AArch64_LDRWpost, ARM64_INS_LDR,
6246 #ifndef CAPSTONE_DIET
6247 { 0 }, { 0 }, { 0 }, 0, 0
6248 #endif
6249 },
6250 {
6251 AArch64_LDRWpre, ARM64_INS_LDR,
6252 #ifndef CAPSTONE_DIET
6253 { 0 }, { 0 }, { 0 }, 0, 0
6254 #endif
6255 },
6256 {
6257 AArch64_LDRWroW, ARM64_INS_LDR,
6258 #ifndef CAPSTONE_DIET
6259 { 0 }, { 0 }, { 0 }, 0, 0
6260 #endif
6261 },
6262 {
6263 AArch64_LDRWroX, ARM64_INS_LDR,
6264 #ifndef CAPSTONE_DIET
6265 { 0 }, { 0 }, { 0 }, 0, 0
6266 #endif
6267 },
6268 {
6269 AArch64_LDRWui, ARM64_INS_LDR,
6270 #ifndef CAPSTONE_DIET
6271 { 0 }, { 0 }, { 0 }, 0, 0
6272 #endif
6273 },
6274 {
6275 AArch64_LDRXl, ARM64_INS_LDR,
6276 #ifndef CAPSTONE_DIET
6277 { 0 }, { 0 }, { 0 }, 0, 0
6278 #endif
6279 },
6280 {
6281 AArch64_LDRXpost, ARM64_INS_LDR,
6282 #ifndef CAPSTONE_DIET
6283 { 0 }, { 0 }, { 0 }, 0, 0
6284 #endif
6285 },
6286 {
6287 AArch64_LDRXpre, ARM64_INS_LDR,
6288 #ifndef CAPSTONE_DIET
6289 { 0 }, { 0 }, { 0 }, 0, 0
6290 #endif
6291 },
6292 {
6293 AArch64_LDRXroW, ARM64_INS_LDR,
6294 #ifndef CAPSTONE_DIET
6295 { 0 }, { 0 }, { 0 }, 0, 0
6296 #endif
6297 },
6298 {
6299 AArch64_LDRXroX, ARM64_INS_LDR,
6300 #ifndef CAPSTONE_DIET
6301 { 0 }, { 0 }, { 0 }, 0, 0
6302 #endif
6303 },
6304 {
6305 AArch64_LDRXui, ARM64_INS_LDR,
6306 #ifndef CAPSTONE_DIET
6307 { 0 }, { 0 }, { 0 }, 0, 0
6308 #endif
6309 },
6310 {
6311 AArch64_LDTRBi, ARM64_INS_LDTRB,
6312 #ifndef CAPSTONE_DIET
6313 { 0 }, { 0 }, { 0 }, 0, 0
6314 #endif
6315 },
6316 {
6317 AArch64_LDTRHi, ARM64_INS_LDTRH,
6318 #ifndef CAPSTONE_DIET
6319 { 0 }, { 0 }, { 0 }, 0, 0
6320 #endif
6321 },
6322 {
6323 AArch64_LDTRSBWi, ARM64_INS_LDTRSB,
6324 #ifndef CAPSTONE_DIET
6325 { 0 }, { 0 }, { 0 }, 0, 0
6326 #endif
6327 },
6328 {
6329 AArch64_LDTRSBXi, ARM64_INS_LDTRSB,
6330 #ifndef CAPSTONE_DIET
6331 { 0 }, { 0 }, { 0 }, 0, 0
6332 #endif
6333 },
6334 {
6335 AArch64_LDTRSHWi, ARM64_INS_LDTRSH,
6336 #ifndef CAPSTONE_DIET
6337 { 0 }, { 0 }, { 0 }, 0, 0
6338 #endif
6339 },
6340 {
6341 AArch64_LDTRSHXi, ARM64_INS_LDTRSH,
6342 #ifndef CAPSTONE_DIET
6343 { 0 }, { 0 }, { 0 }, 0, 0
6344 #endif
6345 },
6346 {
6347 AArch64_LDTRSWi, ARM64_INS_LDTRSW,
6348 #ifndef CAPSTONE_DIET
6349 { 0 }, { 0 }, { 0 }, 0, 0
6350 #endif
6351 },
6352 {
6353 AArch64_LDTRWi, ARM64_INS_LDTR,
6354 #ifndef CAPSTONE_DIET
6355 { 0 }, { 0 }, { 0 }, 0, 0
6356 #endif
6357 },
6358 {
6359 AArch64_LDTRXi, ARM64_INS_LDTR,
6360 #ifndef CAPSTONE_DIET
6361 { 0 }, { 0 }, { 0 }, 0, 0
6362 #endif
6363 },
6364 {
6365 AArch64_LDURBBi, ARM64_INS_LDURB,
6366 #ifndef CAPSTONE_DIET
6367 { 0 }, { 0 }, { 0 }, 0, 0
6368 #endif
6369 },
6370 {
6371 AArch64_LDURBi, ARM64_INS_LDUR,
6372 #ifndef CAPSTONE_DIET
6373 { 0 }, { 0 }, { 0 }, 0, 0
6374 #endif
6375 },
6376 {
6377 AArch64_LDURDi, ARM64_INS_LDUR,
6378 #ifndef CAPSTONE_DIET
6379 { 0 }, { 0 }, { 0 }, 0, 0
6380 #endif
6381 },
6382 {
6383 AArch64_LDURHHi, ARM64_INS_LDURH,
6384 #ifndef CAPSTONE_DIET
6385 { 0 }, { 0 }, { 0 }, 0, 0
6386 #endif
6387 },
6388 {
6389 AArch64_LDURHi, ARM64_INS_LDUR,
6390 #ifndef CAPSTONE_DIET
6391 { 0 }, { 0 }, { 0 }, 0, 0
6392 #endif
6393 },
6394 {
6395 AArch64_LDURQi, ARM64_INS_LDUR,
6396 #ifndef CAPSTONE_DIET
6397 { 0 }, { 0 }, { 0 }, 0, 0
6398 #endif
6399 },
6400 {
6401 AArch64_LDURSBWi, ARM64_INS_LDURSB,
6402 #ifndef CAPSTONE_DIET
6403 { 0 }, { 0 }, { 0 }, 0, 0
6404 #endif
6405 },
6406 {
6407 AArch64_LDURSBXi, ARM64_INS_LDURSB,
6408 #ifndef CAPSTONE_DIET
6409 { 0 }, { 0 }, { 0 }, 0, 0
6410 #endif
6411 },
6412 {
6413 AArch64_LDURSHWi, ARM64_INS_LDURSH,
6414 #ifndef CAPSTONE_DIET
6415 { 0 }, { 0 }, { 0 }, 0, 0
6416 #endif
6417 },
6418 {
6419 AArch64_LDURSHXi, ARM64_INS_LDURSH,
6420 #ifndef CAPSTONE_DIET
6421 { 0 }, { 0 }, { 0 }, 0, 0
6422 #endif
6423 },
6424 {
6425 AArch64_LDURSWi, ARM64_INS_LDURSW,
6426 #ifndef CAPSTONE_DIET
6427 { 0 }, { 0 }, { 0 }, 0, 0
6428 #endif
6429 },
6430 {
6431 AArch64_LDURSi, ARM64_INS_LDUR,
6432 #ifndef CAPSTONE_DIET
6433 { 0 }, { 0 }, { 0 }, 0, 0
6434 #endif
6435 },
6436 {
6437 AArch64_LDURWi, ARM64_INS_LDUR,
6438 #ifndef CAPSTONE_DIET
6439 { 0 }, { 0 }, { 0 }, 0, 0
6440 #endif
6441 },
6442 {
6443 AArch64_LDURXi, ARM64_INS_LDUR,
6444 #ifndef CAPSTONE_DIET
6445 { 0 }, { 0 }, { 0 }, 0, 0
6446 #endif
6447 },
6448 {
6449 AArch64_LDXPW, ARM64_INS_LDXP,
6450 #ifndef CAPSTONE_DIET
6451 { 0 }, { 0 }, { 0 }, 0, 0
6452 #endif
6453 },
6454 {
6455 AArch64_LDXPX, ARM64_INS_LDXP,
6456 #ifndef CAPSTONE_DIET
6457 { 0 }, { 0 }, { 0 }, 0, 0
6458 #endif
6459 },
6460 {
6461 AArch64_LDXRB, ARM64_INS_LDXRB,
6462 #ifndef CAPSTONE_DIET
6463 { 0 }, { 0 }, { 0 }, 0, 0
6464 #endif
6465 },
6466 {
6467 AArch64_LDXRH, ARM64_INS_LDXRH,
6468 #ifndef CAPSTONE_DIET
6469 { 0 }, { 0 }, { 0 }, 0, 0
6470 #endif
6471 },
6472 {
6473 AArch64_LDXRW, ARM64_INS_LDXR,
6474 #ifndef CAPSTONE_DIET
6475 { 0 }, { 0 }, { 0 }, 0, 0
6476 #endif
6477 },
6478 {
6479 AArch64_LDXRX, ARM64_INS_LDXR,
6480 #ifndef CAPSTONE_DIET
6481 { 0 }, { 0 }, { 0 }, 0, 0
6482 #endif
6483 },
6484 {
6485 AArch64_LSLVWr, ARM64_INS_LSL,
6486 #ifndef CAPSTONE_DIET
6487 { 0 }, { 0 }, { 0 }, 0, 0
6488 #endif
6489 },
6490 {
6491 AArch64_LSLVXr, ARM64_INS_LSL,
6492 #ifndef CAPSTONE_DIET
6493 { 0 }, { 0 }, { 0 }, 0, 0
6494 #endif
6495 },
6496 {
6497 AArch64_LSRVWr, ARM64_INS_LSR,
6498 #ifndef CAPSTONE_DIET
6499 { 0 }, { 0 }, { 0 }, 0, 0
6500 #endif
6501 },
6502 {
6503 AArch64_LSRVXr, ARM64_INS_LSR,
6504 #ifndef CAPSTONE_DIET
6505 { 0 }, { 0 }, { 0 }, 0, 0
6506 #endif
6507 },
6508 {
6509 AArch64_MADDWrrr, ARM64_INS_MADD,
6510 #ifndef CAPSTONE_DIET
6511 { 0 }, { 0 }, { 0 }, 0, 0
6512 #endif
6513 },
6514 {
6515 AArch64_MADDXrrr, ARM64_INS_MADD,
6516 #ifndef CAPSTONE_DIET
6517 { 0 }, { 0 }, { 0 }, 0, 0
6518 #endif
6519 },
6520 {
6521 AArch64_MLAv16i8, ARM64_INS_MLA,
6522 #ifndef CAPSTONE_DIET
6523 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6524 #endif
6525 },
6526 {
6527 AArch64_MLAv2i32, ARM64_INS_MLA,
6528 #ifndef CAPSTONE_DIET
6529 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6530 #endif
6531 },
6532 {
6533 AArch64_MLAv2i32_indexed, ARM64_INS_MLA,
6534 #ifndef CAPSTONE_DIET
6535 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6536 #endif
6537 },
6538 {
6539 AArch64_MLAv4i16, ARM64_INS_MLA,
6540 #ifndef CAPSTONE_DIET
6541 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6542 #endif
6543 },
6544 {
6545 AArch64_MLAv4i16_indexed, ARM64_INS_MLA,
6546 #ifndef CAPSTONE_DIET
6547 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6548 #endif
6549 },
6550 {
6551 AArch64_MLAv4i32, ARM64_INS_MLA,
6552 #ifndef CAPSTONE_DIET
6553 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6554 #endif
6555 },
6556 {
6557 AArch64_MLAv4i32_indexed, ARM64_INS_MLA,
6558 #ifndef CAPSTONE_DIET
6559 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6560 #endif
6561 },
6562 {
6563 AArch64_MLAv8i16, ARM64_INS_MLA,
6564 #ifndef CAPSTONE_DIET
6565 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6566 #endif
6567 },
6568 {
6569 AArch64_MLAv8i16_indexed, ARM64_INS_MLA,
6570 #ifndef CAPSTONE_DIET
6571 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6572 #endif
6573 },
6574 {
6575 AArch64_MLAv8i8, ARM64_INS_MLA,
6576 #ifndef CAPSTONE_DIET
6577 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6578 #endif
6579 },
6580 {
6581 AArch64_MLSv16i8, ARM64_INS_MLS,
6582 #ifndef CAPSTONE_DIET
6583 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6584 #endif
6585 },
6586 {
6587 AArch64_MLSv2i32, ARM64_INS_MLS,
6588 #ifndef CAPSTONE_DIET
6589 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6590 #endif
6591 },
6592 {
6593 AArch64_MLSv2i32_indexed, ARM64_INS_MLS,
6594 #ifndef CAPSTONE_DIET
6595 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6596 #endif
6597 },
6598 {
6599 AArch64_MLSv4i16, ARM64_INS_MLS,
6600 #ifndef CAPSTONE_DIET
6601 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6602 #endif
6603 },
6604 {
6605 AArch64_MLSv4i16_indexed, ARM64_INS_MLS,
6606 #ifndef CAPSTONE_DIET
6607 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6608 #endif
6609 },
6610 {
6611 AArch64_MLSv4i32, ARM64_INS_MLS,
6612 #ifndef CAPSTONE_DIET
6613 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6614 #endif
6615 },
6616 {
6617 AArch64_MLSv4i32_indexed, ARM64_INS_MLS,
6618 #ifndef CAPSTONE_DIET
6619 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6620 #endif
6621 },
6622 {
6623 AArch64_MLSv8i16, ARM64_INS_MLS,
6624 #ifndef CAPSTONE_DIET
6625 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6626 #endif
6627 },
6628 {
6629 AArch64_MLSv8i16_indexed, ARM64_INS_MLS,
6630 #ifndef CAPSTONE_DIET
6631 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6632 #endif
6633 },
6634 {
6635 AArch64_MLSv8i8, ARM64_INS_MLS,
6636 #ifndef CAPSTONE_DIET
6637 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6638 #endif
6639 },
6640 {
6641 AArch64_MOVID, ARM64_INS_MOVI,
6642 #ifndef CAPSTONE_DIET
6643 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6644 #endif
6645 },
6646 {
6647 AArch64_MOVIv16b_ns, ARM64_INS_MOVI,
6648 #ifndef CAPSTONE_DIET
6649 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6650 #endif
6651 },
6652 {
6653 AArch64_MOVIv2d_ns, ARM64_INS_MOVI,
6654 #ifndef CAPSTONE_DIET
6655 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6656 #endif
6657 },
6658 {
6659 AArch64_MOVIv2i32, ARM64_INS_MOVI,
6660 #ifndef CAPSTONE_DIET
6661 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6662 #endif
6663 },
6664 {
6665 AArch64_MOVIv2s_msl, ARM64_INS_MOVI,
6666 #ifndef CAPSTONE_DIET
6667 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6668 #endif
6669 },
6670 {
6671 AArch64_MOVIv4i16, ARM64_INS_MOVI,
6672 #ifndef CAPSTONE_DIET
6673 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6674 #endif
6675 },
6676 {
6677 AArch64_MOVIv4i32, ARM64_INS_MOVI,
6678 #ifndef CAPSTONE_DIET
6679 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6680 #endif
6681 },
6682 {
6683 AArch64_MOVIv4s_msl, ARM64_INS_MOVI,
6684 #ifndef CAPSTONE_DIET
6685 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6686 #endif
6687 },
6688 {
6689 AArch64_MOVIv8b_ns, ARM64_INS_MOVI,
6690 #ifndef CAPSTONE_DIET
6691 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6692 #endif
6693 },
6694 {
6695 AArch64_MOVIv8i16, ARM64_INS_MOVI,
6696 #ifndef CAPSTONE_DIET
6697 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6698 #endif
6699 },
6700 {
6701 AArch64_MOVKWi, ARM64_INS_MOVK,
6702 #ifndef CAPSTONE_DIET
6703 { 0 }, { 0 }, { 0 }, 0, 0
6704 #endif
6705 },
6706 {
6707 AArch64_MOVKXi, ARM64_INS_MOVK,
6708 #ifndef CAPSTONE_DIET
6709 { 0 }, { 0 }, { 0 }, 0, 0
6710 #endif
6711 },
6712 {
6713 AArch64_MOVNWi, ARM64_INS_MOVN,
6714 #ifndef CAPSTONE_DIET
6715 { 0 }, { 0 }, { 0 }, 0, 0
6716 #endif
6717 },
6718 {
6719 AArch64_MOVNXi, ARM64_INS_MOVN,
6720 #ifndef CAPSTONE_DIET
6721 { 0 }, { 0 }, { 0 }, 0, 0
6722 #endif
6723 },
6724 {
6725 AArch64_MOVZWi, ARM64_INS_MOVZ,
6726 #ifndef CAPSTONE_DIET
6727 { 0 }, { 0 }, { 0 }, 0, 0
6728 #endif
6729 },
6730 {
6731 AArch64_MOVZXi, ARM64_INS_MOVZ,
6732 #ifndef CAPSTONE_DIET
6733 { 0 }, { 0 }, { 0 }, 0, 0
6734 #endif
6735 },
6736 {
6737 AArch64_MRS, ARM64_INS_MRS,
6738 #ifndef CAPSTONE_DIET
6739 { 0 }, { 0 }, { 0 }, 0, 0
6740 #endif
6741 },
6742 {
6743 AArch64_MSR, ARM64_INS_MSR,
6744 #ifndef CAPSTONE_DIET
6745 { 0 }, { 0 }, { 0 }, 0, 0
6746 #endif
6747 },
6748 {
6749 AArch64_MSRpstate, ARM64_INS_MSR,
6750 #ifndef CAPSTONE_DIET
6751 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
6752 #endif
6753 },
6754 {
6755 AArch64_MSUBWrrr, ARM64_INS_MSUB,
6756 #ifndef CAPSTONE_DIET
6757 { 0 }, { 0 }, { 0 }, 0, 0
6758 #endif
6759 },
6760 {
6761 AArch64_MSUBXrrr, ARM64_INS_MSUB,
6762 #ifndef CAPSTONE_DIET
6763 { 0 }, { 0 }, { 0 }, 0, 0
6764 #endif
6765 },
6766 {
6767 AArch64_MULv16i8, ARM64_INS_MUL,
6768 #ifndef CAPSTONE_DIET
6769 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6770 #endif
6771 },
6772 {
6773 AArch64_MULv2i32, ARM64_INS_MUL,
6774 #ifndef CAPSTONE_DIET
6775 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6776 #endif
6777 },
6778 {
6779 AArch64_MULv2i32_indexed, ARM64_INS_MUL,
6780 #ifndef CAPSTONE_DIET
6781 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6782 #endif
6783 },
6784 {
6785 AArch64_MULv4i16, ARM64_INS_MUL,
6786 #ifndef CAPSTONE_DIET
6787 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6788 #endif
6789 },
6790 {
6791 AArch64_MULv4i16_indexed, ARM64_INS_MUL,
6792 #ifndef CAPSTONE_DIET
6793 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6794 #endif
6795 },
6796 {
6797 AArch64_MULv4i32, ARM64_INS_MUL,
6798 #ifndef CAPSTONE_DIET
6799 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6800 #endif
6801 },
6802 {
6803 AArch64_MULv4i32_indexed, ARM64_INS_MUL,
6804 #ifndef CAPSTONE_DIET
6805 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6806 #endif
6807 },
6808 {
6809 AArch64_MULv8i16, ARM64_INS_MUL,
6810 #ifndef CAPSTONE_DIET
6811 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6812 #endif
6813 },
6814 {
6815 AArch64_MULv8i16_indexed, ARM64_INS_MUL,
6816 #ifndef CAPSTONE_DIET
6817 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6818 #endif
6819 },
6820 {
6821 AArch64_MULv8i8, ARM64_INS_MUL,
6822 #ifndef CAPSTONE_DIET
6823 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6824 #endif
6825 },
6826 {
6827 AArch64_MVNIv2i32, ARM64_INS_MVNI,
6828 #ifndef CAPSTONE_DIET
6829 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6830 #endif
6831 },
6832 {
6833 AArch64_MVNIv2s_msl, ARM64_INS_MVNI,
6834 #ifndef CAPSTONE_DIET
6835 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6836 #endif
6837 },
6838 {
6839 AArch64_MVNIv4i16, ARM64_INS_MVNI,
6840 #ifndef CAPSTONE_DIET
6841 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6842 #endif
6843 },
6844 {
6845 AArch64_MVNIv4i32, ARM64_INS_MVNI,
6846 #ifndef CAPSTONE_DIET
6847 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6848 #endif
6849 },
6850 {
6851 AArch64_MVNIv4s_msl, ARM64_INS_MVNI,
6852 #ifndef CAPSTONE_DIET
6853 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6854 #endif
6855 },
6856 {
6857 AArch64_MVNIv8i16, ARM64_INS_MVNI,
6858 #ifndef CAPSTONE_DIET
6859 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6860 #endif
6861 },
6862 {
6863 AArch64_NEGv16i8, ARM64_INS_NEG,
6864 #ifndef CAPSTONE_DIET
6865 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6866 #endif
6867 },
6868 {
6869 AArch64_NEGv1i64, ARM64_INS_NEG,
6870 #ifndef CAPSTONE_DIET
6871 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6872 #endif
6873 },
6874 {
6875 AArch64_NEGv2i32, ARM64_INS_NEG,
6876 #ifndef CAPSTONE_DIET
6877 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6878 #endif
6879 },
6880 {
6881 AArch64_NEGv2i64, ARM64_INS_NEG,
6882 #ifndef CAPSTONE_DIET
6883 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6884 #endif
6885 },
6886 {
6887 AArch64_NEGv4i16, ARM64_INS_NEG,
6888 #ifndef CAPSTONE_DIET
6889 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6890 #endif
6891 },
6892 {
6893 AArch64_NEGv4i32, ARM64_INS_NEG,
6894 #ifndef CAPSTONE_DIET
6895 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6896 #endif
6897 },
6898 {
6899 AArch64_NEGv8i16, ARM64_INS_NEG,
6900 #ifndef CAPSTONE_DIET
6901 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6902 #endif
6903 },
6904 {
6905 AArch64_NEGv8i8, ARM64_INS_NEG,
6906 #ifndef CAPSTONE_DIET
6907 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6908 #endif
6909 },
6910 {
6911 AArch64_NOTv16i8, ARM64_INS_NOT,
6912 #ifndef CAPSTONE_DIET
6913 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6914 #endif
6915 },
6916 {
6917 AArch64_NOTv8i8, ARM64_INS_NOT,
6918 #ifndef CAPSTONE_DIET
6919 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6920 #endif
6921 },
6922 {
6923 AArch64_ORNWrs, ARM64_INS_ORN,
6924 #ifndef CAPSTONE_DIET
6925 { 0 }, { 0 }, { 0 }, 0, 0
6926 #endif
6927 },
6928 {
6929 AArch64_ORNXrs, ARM64_INS_ORN,
6930 #ifndef CAPSTONE_DIET
6931 { 0 }, { 0 }, { 0 }, 0, 0
6932 #endif
6933 },
6934 {
6935 AArch64_ORNv16i8, ARM64_INS_ORN,
6936 #ifndef CAPSTONE_DIET
6937 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6938 #endif
6939 },
6940 {
6941 AArch64_ORNv8i8, ARM64_INS_ORN,
6942 #ifndef CAPSTONE_DIET
6943 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6944 #endif
6945 },
6946 {
6947 AArch64_ORRWri, ARM64_INS_ORR,
6948 #ifndef CAPSTONE_DIET
6949 { 0 }, { 0 }, { 0 }, 0, 0
6950 #endif
6951 },
6952 {
6953 AArch64_ORRWrs, ARM64_INS_ORR,
6954 #ifndef CAPSTONE_DIET
6955 { 0 }, { 0 }, { 0 }, 0, 0
6956 #endif
6957 },
6958 {
6959 AArch64_ORRXri, ARM64_INS_ORR,
6960 #ifndef CAPSTONE_DIET
6961 { 0 }, { 0 }, { 0 }, 0, 0
6962 #endif
6963 },
6964 {
6965 AArch64_ORRXrs, ARM64_INS_ORR,
6966 #ifndef CAPSTONE_DIET
6967 { 0 }, { 0 }, { 0 }, 0, 0
6968 #endif
6969 },
6970 {
6971 AArch64_ORRv16i8, ARM64_INS_ORR,
6972 #ifndef CAPSTONE_DIET
6973 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6974 #endif
6975 },
6976 {
6977 AArch64_ORRv2i32, ARM64_INS_ORR,
6978 #ifndef CAPSTONE_DIET
6979 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6980 #endif
6981 },
6982 {
6983 AArch64_ORRv4i16, ARM64_INS_ORR,
6984 #ifndef CAPSTONE_DIET
6985 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6986 #endif
6987 },
6988 {
6989 AArch64_ORRv4i32, ARM64_INS_ORR,
6990 #ifndef CAPSTONE_DIET
6991 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6992 #endif
6993 },
6994 {
6995 AArch64_ORRv8i16, ARM64_INS_ORR,
6996 #ifndef CAPSTONE_DIET
6997 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
6998 #endif
6999 },
7000 {
7001 AArch64_ORRv8i8, ARM64_INS_ORR,
7002 #ifndef CAPSTONE_DIET
7003 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7004 #endif
7005 },
7006 {
7007 AArch64_PMULLv16i8, ARM64_INS_PMULL2,
7008 #ifndef CAPSTONE_DIET
7009 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7010 #endif
7011 },
7012 {
7013 AArch64_PMULLv1i64, ARM64_INS_PMULL,
7014 #ifndef CAPSTONE_DIET
7015 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7016 #endif
7017 },
7018 {
7019 AArch64_PMULLv2i64, ARM64_INS_PMULL2,
7020 #ifndef CAPSTONE_DIET
7021 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7022 #endif
7023 },
7024 {
7025 AArch64_PMULLv8i8, ARM64_INS_PMULL,
7026 #ifndef CAPSTONE_DIET
7027 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7028 #endif
7029 },
7030 {
7031 AArch64_PMULv16i8, ARM64_INS_PMUL,
7032 #ifndef CAPSTONE_DIET
7033 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7034 #endif
7035 },
7036 {
7037 AArch64_PMULv8i8, ARM64_INS_PMUL,
7038 #ifndef CAPSTONE_DIET
7039 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7040 #endif
7041 },
7042 {
7043 AArch64_PRFMl, ARM64_INS_PRFM,
7044 #ifndef CAPSTONE_DIET
7045 { 0 }, { 0 }, { 0 }, 0, 0
7046 #endif
7047 },
7048 {
7049 AArch64_PRFMroW, ARM64_INS_PRFM,
7050 #ifndef CAPSTONE_DIET
7051 { 0 }, { 0 }, { 0 }, 0, 0
7052 #endif
7053 },
7054 {
7055 AArch64_PRFMroX, ARM64_INS_PRFM,
7056 #ifndef CAPSTONE_DIET
7057 { 0 }, { 0 }, { 0 }, 0, 0
7058 #endif
7059 },
7060 {
7061 AArch64_PRFMui, ARM64_INS_PRFM,
7062 #ifndef CAPSTONE_DIET
7063 { 0 }, { 0 }, { 0 }, 0, 0
7064 #endif
7065 },
7066 {
7067 AArch64_PRFUMi, ARM64_INS_PRFUM,
7068 #ifndef CAPSTONE_DIET
7069 { 0 }, { 0 }, { 0 }, 0, 0
7070 #endif
7071 },
7072 {
7073 AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN,
7074 #ifndef CAPSTONE_DIET
7075 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7076 #endif
7077 },
7078 {
7079 AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2,
7080 #ifndef CAPSTONE_DIET
7081 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7082 #endif
7083 },
7084 {
7085 AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN,
7086 #ifndef CAPSTONE_DIET
7087 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7088 #endif
7089 },
7090 {
7091 AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2,
7092 #ifndef CAPSTONE_DIET
7093 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7094 #endif
7095 },
7096 {
7097 AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2,
7098 #ifndef CAPSTONE_DIET
7099 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7100 #endif
7101 },
7102 {
7103 AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN,
7104 #ifndef CAPSTONE_DIET
7105 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7106 #endif
7107 },
7108 {
7109 AArch64_RBITWr, ARM64_INS_RBIT,
7110 #ifndef CAPSTONE_DIET
7111 { 0 }, { 0 }, { 0 }, 0, 0
7112 #endif
7113 },
7114 {
7115 AArch64_RBITXr, ARM64_INS_RBIT,
7116 #ifndef CAPSTONE_DIET
7117 { 0 }, { 0 }, { 0 }, 0, 0
7118 #endif
7119 },
7120 {
7121 AArch64_RBITv16i8, ARM64_INS_RBIT,
7122 #ifndef CAPSTONE_DIET
7123 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7124 #endif
7125 },
7126 {
7127 AArch64_RBITv8i8, ARM64_INS_RBIT,
7128 #ifndef CAPSTONE_DIET
7129 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7130 #endif
7131 },
7132 {
7133 AArch64_RET, ARM64_INS_RET,
7134 #ifndef CAPSTONE_DIET
7135 { 0 }, { 0 }, { 0 }, 0, 0
7136 #endif
7137 },
7138 {
7139 AArch64_REV16Wr, ARM64_INS_REV16,
7140 #ifndef CAPSTONE_DIET
7141 { 0 }, { 0 }, { 0 }, 0, 0
7142 #endif
7143 },
7144 {
7145 AArch64_REV16Xr, ARM64_INS_REV16,
7146 #ifndef CAPSTONE_DIET
7147 { 0 }, { 0 }, { 0 }, 0, 0
7148 #endif
7149 },
7150 {
7151 AArch64_REV16v16i8, ARM64_INS_REV16,
7152 #ifndef CAPSTONE_DIET
7153 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7154 #endif
7155 },
7156 {
7157 AArch64_REV16v8i8, ARM64_INS_REV16,
7158 #ifndef CAPSTONE_DIET
7159 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7160 #endif
7161 },
7162 {
7163 AArch64_REV32Xr, ARM64_INS_REV32,
7164 #ifndef CAPSTONE_DIET
7165 { 0 }, { 0 }, { 0 }, 0, 0
7166 #endif
7167 },
7168 {
7169 AArch64_REV32v16i8, ARM64_INS_REV32,
7170 #ifndef CAPSTONE_DIET
7171 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7172 #endif
7173 },
7174 {
7175 AArch64_REV32v4i16, ARM64_INS_REV32,
7176 #ifndef CAPSTONE_DIET
7177 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7178 #endif
7179 },
7180 {
7181 AArch64_REV32v8i16, ARM64_INS_REV32,
7182 #ifndef CAPSTONE_DIET
7183 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7184 #endif
7185 },
7186 {
7187 AArch64_REV32v8i8, ARM64_INS_REV32,
7188 #ifndef CAPSTONE_DIET
7189 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7190 #endif
7191 },
7192 {
7193 AArch64_REV64v16i8, ARM64_INS_REV64,
7194 #ifndef CAPSTONE_DIET
7195 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7196 #endif
7197 },
7198 {
7199 AArch64_REV64v2i32, ARM64_INS_REV64,
7200 #ifndef CAPSTONE_DIET
7201 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7202 #endif
7203 },
7204 {
7205 AArch64_REV64v4i16, ARM64_INS_REV64,
7206 #ifndef CAPSTONE_DIET
7207 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7208 #endif
7209 },
7210 {
7211 AArch64_REV64v4i32, ARM64_INS_REV64,
7212 #ifndef CAPSTONE_DIET
7213 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7214 #endif
7215 },
7216 {
7217 AArch64_REV64v8i16, ARM64_INS_REV64,
7218 #ifndef CAPSTONE_DIET
7219 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7220 #endif
7221 },
7222 {
7223 AArch64_REV64v8i8, ARM64_INS_REV64,
7224 #ifndef CAPSTONE_DIET
7225 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7226 #endif
7227 },
7228 {
7229 AArch64_REVWr, ARM64_INS_REV,
7230 #ifndef CAPSTONE_DIET
7231 { 0 }, { 0 }, { 0 }, 0, 0
7232 #endif
7233 },
7234 {
7235 AArch64_REVXr, ARM64_INS_REV,
7236 #ifndef CAPSTONE_DIET
7237 { 0 }, { 0 }, { 0 }, 0, 0
7238 #endif
7239 },
7240 {
7241 AArch64_RORVWr, ARM64_INS_ROR,
7242 #ifndef CAPSTONE_DIET
7243 { 0 }, { 0 }, { 0 }, 0, 0
7244 #endif
7245 },
7246 {
7247 AArch64_RORVXr, ARM64_INS_ROR,
7248 #ifndef CAPSTONE_DIET
7249 { 0 }, { 0 }, { 0 }, 0, 0
7250 #endif
7251 },
7252 {
7253 AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2,
7254 #ifndef CAPSTONE_DIET
7255 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7256 #endif
7257 },
7258 {
7259 AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN,
7260 #ifndef CAPSTONE_DIET
7261 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7262 #endif
7263 },
7264 {
7265 AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN,
7266 #ifndef CAPSTONE_DIET
7267 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7268 #endif
7269 },
7270 {
7271 AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2,
7272 #ifndef CAPSTONE_DIET
7273 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7274 #endif
7275 },
7276 {
7277 AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2,
7278 #ifndef CAPSTONE_DIET
7279 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7280 #endif
7281 },
7282 {
7283 AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN,
7284 #ifndef CAPSTONE_DIET
7285 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7286 #endif
7287 },
7288 {
7289 AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN,
7290 #ifndef CAPSTONE_DIET
7291 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7292 #endif
7293 },
7294 {
7295 AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2,
7296 #ifndef CAPSTONE_DIET
7297 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7298 #endif
7299 },
7300 {
7301 AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN,
7302 #ifndef CAPSTONE_DIET
7303 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7304 #endif
7305 },
7306 {
7307 AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2,
7308 #ifndef CAPSTONE_DIET
7309 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7310 #endif
7311 },
7312 {
7313 AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2,
7314 #ifndef CAPSTONE_DIET
7315 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7316 #endif
7317 },
7318 {
7319 AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN,
7320 #ifndef CAPSTONE_DIET
7321 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7322 #endif
7323 },
7324 {
7325 AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2,
7326 #ifndef CAPSTONE_DIET
7327 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7328 #endif
7329 },
7330 {
7331 AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL,
7332 #ifndef CAPSTONE_DIET
7333 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7334 #endif
7335 },
7336 {
7337 AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL,
7338 #ifndef CAPSTONE_DIET
7339 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7340 #endif
7341 },
7342 {
7343 AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2,
7344 #ifndef CAPSTONE_DIET
7345 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7346 #endif
7347 },
7348 {
7349 AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2,
7350 #ifndef CAPSTONE_DIET
7351 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7352 #endif
7353 },
7354 {
7355 AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL,
7356 #ifndef CAPSTONE_DIET
7357 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7358 #endif
7359 },
7360 {
7361 AArch64_SABAv16i8, ARM64_INS_SABA,
7362 #ifndef CAPSTONE_DIET
7363 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7364 #endif
7365 },
7366 {
7367 AArch64_SABAv2i32, ARM64_INS_SABA,
7368 #ifndef CAPSTONE_DIET
7369 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7370 #endif
7371 },
7372 {
7373 AArch64_SABAv4i16, ARM64_INS_SABA,
7374 #ifndef CAPSTONE_DIET
7375 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7376 #endif
7377 },
7378 {
7379 AArch64_SABAv4i32, ARM64_INS_SABA,
7380 #ifndef CAPSTONE_DIET
7381 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7382 #endif
7383 },
7384 {
7385 AArch64_SABAv8i16, ARM64_INS_SABA,
7386 #ifndef CAPSTONE_DIET
7387 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7388 #endif
7389 },
7390 {
7391 AArch64_SABAv8i8, ARM64_INS_SABA,
7392 #ifndef CAPSTONE_DIET
7393 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7394 #endif
7395 },
7396 {
7397 AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2,
7398 #ifndef CAPSTONE_DIET
7399 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7400 #endif
7401 },
7402 {
7403 AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL,
7404 #ifndef CAPSTONE_DIET
7405 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7406 #endif
7407 },
7408 {
7409 AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL,
7410 #ifndef CAPSTONE_DIET
7411 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7412 #endif
7413 },
7414 {
7415 AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2,
7416 #ifndef CAPSTONE_DIET
7417 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7418 #endif
7419 },
7420 {
7421 AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2,
7422 #ifndef CAPSTONE_DIET
7423 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7424 #endif
7425 },
7426 {
7427 AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL,
7428 #ifndef CAPSTONE_DIET
7429 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7430 #endif
7431 },
7432 {
7433 AArch64_SABDv16i8, ARM64_INS_SABD,
7434 #ifndef CAPSTONE_DIET
7435 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7436 #endif
7437 },
7438 {
7439 AArch64_SABDv2i32, ARM64_INS_SABD,
7440 #ifndef CAPSTONE_DIET
7441 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7442 #endif
7443 },
7444 {
7445 AArch64_SABDv4i16, ARM64_INS_SABD,
7446 #ifndef CAPSTONE_DIET
7447 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7448 #endif
7449 },
7450 {
7451 AArch64_SABDv4i32, ARM64_INS_SABD,
7452 #ifndef CAPSTONE_DIET
7453 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7454 #endif
7455 },
7456 {
7457 AArch64_SABDv8i16, ARM64_INS_SABD,
7458 #ifndef CAPSTONE_DIET
7459 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7460 #endif
7461 },
7462 {
7463 AArch64_SABDv8i8, ARM64_INS_SABD,
7464 #ifndef CAPSTONE_DIET
7465 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7466 #endif
7467 },
7468 {
7469 AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP,
7470 #ifndef CAPSTONE_DIET
7471 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7472 #endif
7473 },
7474 {
7475 AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP,
7476 #ifndef CAPSTONE_DIET
7477 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7478 #endif
7479 },
7480 {
7481 AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP,
7482 #ifndef CAPSTONE_DIET
7483 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7484 #endif
7485 },
7486 {
7487 AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP,
7488 #ifndef CAPSTONE_DIET
7489 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7490 #endif
7491 },
7492 {
7493 AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP,
7494 #ifndef CAPSTONE_DIET
7495 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7496 #endif
7497 },
7498 {
7499 AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP,
7500 #ifndef CAPSTONE_DIET
7501 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7502 #endif
7503 },
7504 {
7505 AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP,
7506 #ifndef CAPSTONE_DIET
7507 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7508 #endif
7509 },
7510 {
7511 AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP,
7512 #ifndef CAPSTONE_DIET
7513 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7514 #endif
7515 },
7516 {
7517 AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP,
7518 #ifndef CAPSTONE_DIET
7519 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7520 #endif
7521 },
7522 {
7523 AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP,
7524 #ifndef CAPSTONE_DIET
7525 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7526 #endif
7527 },
7528 {
7529 AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP,
7530 #ifndef CAPSTONE_DIET
7531 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7532 #endif
7533 },
7534 {
7535 AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP,
7536 #ifndef CAPSTONE_DIET
7537 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7538 #endif
7539 },
7540 {
7541 AArch64_SADDLVv16i8v, ARM64_INS_SADDLV,
7542 #ifndef CAPSTONE_DIET
7543 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7544 #endif
7545 },
7546 {
7547 AArch64_SADDLVv4i16v, ARM64_INS_SADDLV,
7548 #ifndef CAPSTONE_DIET
7549 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7550 #endif
7551 },
7552 {
7553 AArch64_SADDLVv4i32v, ARM64_INS_SADDLV,
7554 #ifndef CAPSTONE_DIET
7555 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7556 #endif
7557 },
7558 {
7559 AArch64_SADDLVv8i16v, ARM64_INS_SADDLV,
7560 #ifndef CAPSTONE_DIET
7561 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7562 #endif
7563 },
7564 {
7565 AArch64_SADDLVv8i8v, ARM64_INS_SADDLV,
7566 #ifndef CAPSTONE_DIET
7567 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7568 #endif
7569 },
7570 {
7571 AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2,
7572 #ifndef CAPSTONE_DIET
7573 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7574 #endif
7575 },
7576 {
7577 AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL,
7578 #ifndef CAPSTONE_DIET
7579 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7580 #endif
7581 },
7582 {
7583 AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL,
7584 #ifndef CAPSTONE_DIET
7585 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7586 #endif
7587 },
7588 {
7589 AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2,
7590 #ifndef CAPSTONE_DIET
7591 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7592 #endif
7593 },
7594 {
7595 AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2,
7596 #ifndef CAPSTONE_DIET
7597 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7598 #endif
7599 },
7600 {
7601 AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL,
7602 #ifndef CAPSTONE_DIET
7603 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7604 #endif
7605 },
7606 {
7607 AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2,
7608 #ifndef CAPSTONE_DIET
7609 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7610 #endif
7611 },
7612 {
7613 AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW,
7614 #ifndef CAPSTONE_DIET
7615 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7616 #endif
7617 },
7618 {
7619 AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW,
7620 #ifndef CAPSTONE_DIET
7621 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7622 #endif
7623 },
7624 {
7625 AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2,
7626 #ifndef CAPSTONE_DIET
7627 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7628 #endif
7629 },
7630 {
7631 AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2,
7632 #ifndef CAPSTONE_DIET
7633 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7634 #endif
7635 },
7636 {
7637 AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW,
7638 #ifndef CAPSTONE_DIET
7639 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7640 #endif
7641 },
7642 {
7643 AArch64_SBCSWr, ARM64_INS_SBC,
7644 #ifndef CAPSTONE_DIET
7645 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
7646 #endif
7647 },
7648 {
7649 AArch64_SBCSXr, ARM64_INS_SBC,
7650 #ifndef CAPSTONE_DIET
7651 { ARM64_REG_NZCV, 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
7652 #endif
7653 },
7654 {
7655 AArch64_SBCWr, ARM64_INS_SBC,
7656 #ifndef CAPSTONE_DIET
7657 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
7658 #endif
7659 },
7660 {
7661 AArch64_SBCXr, ARM64_INS_SBC,
7662 #ifndef CAPSTONE_DIET
7663 { ARM64_REG_NZCV, 0 }, { 0 }, { 0 }, 0, 0
7664 #endif
7665 },
7666 {
7667 AArch64_SBFMWri, ARM64_INS_SBFM,
7668 #ifndef CAPSTONE_DIET
7669 { 0 }, { 0 }, { 0 }, 0, 0
7670 #endif
7671 },
7672 {
7673 AArch64_SBFMXri, ARM64_INS_SBFM,
7674 #ifndef CAPSTONE_DIET
7675 { 0 }, { 0 }, { 0 }, 0, 0
7676 #endif
7677 },
7678 {
7679 AArch64_SCVTFSWDri, ARM64_INS_SCVTF,
7680 #ifndef CAPSTONE_DIET
7681 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7682 #endif
7683 },
7684 {
7685 AArch64_SCVTFSWSri, ARM64_INS_SCVTF,
7686 #ifndef CAPSTONE_DIET
7687 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7688 #endif
7689 },
7690 {
7691 AArch64_SCVTFSXDri, ARM64_INS_SCVTF,
7692 #ifndef CAPSTONE_DIET
7693 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7694 #endif
7695 },
7696 {
7697 AArch64_SCVTFSXSri, ARM64_INS_SCVTF,
7698 #ifndef CAPSTONE_DIET
7699 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7700 #endif
7701 },
7702 {
7703 AArch64_SCVTFUWDri, ARM64_INS_SCVTF,
7704 #ifndef CAPSTONE_DIET
7705 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7706 #endif
7707 },
7708 {
7709 AArch64_SCVTFUWSri, ARM64_INS_SCVTF,
7710 #ifndef CAPSTONE_DIET
7711 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7712 #endif
7713 },
7714 {
7715 AArch64_SCVTFUXDri, ARM64_INS_SCVTF,
7716 #ifndef CAPSTONE_DIET
7717 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7718 #endif
7719 },
7720 {
7721 AArch64_SCVTFUXSri, ARM64_INS_SCVTF,
7722 #ifndef CAPSTONE_DIET
7723 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
7724 #endif
7725 },
7726 {
7727 AArch64_SCVTFd, ARM64_INS_SCVTF,
7728 #ifndef CAPSTONE_DIET
7729 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7730 #endif
7731 },
7732 {
7733 AArch64_SCVTFs, ARM64_INS_SCVTF,
7734 #ifndef CAPSTONE_DIET
7735 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7736 #endif
7737 },
7738 {
7739 AArch64_SCVTFv1i32, ARM64_INS_SCVTF,
7740 #ifndef CAPSTONE_DIET
7741 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7742 #endif
7743 },
7744 {
7745 AArch64_SCVTFv1i64, ARM64_INS_SCVTF,
7746 #ifndef CAPSTONE_DIET
7747 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7748 #endif
7749 },
7750 {
7751 AArch64_SCVTFv2f32, ARM64_INS_SCVTF,
7752 #ifndef CAPSTONE_DIET
7753 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7754 #endif
7755 },
7756 {
7757 AArch64_SCVTFv2f64, ARM64_INS_SCVTF,
7758 #ifndef CAPSTONE_DIET
7759 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7760 #endif
7761 },
7762 {
7763 AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF,
7764 #ifndef CAPSTONE_DIET
7765 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7766 #endif
7767 },
7768 {
7769 AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF,
7770 #ifndef CAPSTONE_DIET
7771 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7772 #endif
7773 },
7774 {
7775 AArch64_SCVTFv4f32, ARM64_INS_SCVTF,
7776 #ifndef CAPSTONE_DIET
7777 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7778 #endif
7779 },
7780 {
7781 AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF,
7782 #ifndef CAPSTONE_DIET
7783 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7784 #endif
7785 },
7786 {
7787 AArch64_SDIVWr, ARM64_INS_SDIV,
7788 #ifndef CAPSTONE_DIET
7789 { 0 }, { 0 }, { 0 }, 0, 0
7790 #endif
7791 },
7792 {
7793 AArch64_SDIVXr, ARM64_INS_SDIV,
7794 #ifndef CAPSTONE_DIET
7795 { 0 }, { 0 }, { 0 }, 0, 0
7796 #endif
7797 },
7798 {
7799 AArch64_SDIV_IntWr, ARM64_INS_SDIV,
7800 #ifndef CAPSTONE_DIET
7801 { 0 }, { 0 }, { 0 }, 0, 0
7802 #endif
7803 },
7804 {
7805 AArch64_SDIV_IntXr, ARM64_INS_SDIV,
7806 #ifndef CAPSTONE_DIET
7807 { 0 }, { 0 }, { 0 }, 0, 0
7808 #endif
7809 },
7810 {
7811 AArch64_SHA1Crrr, ARM64_INS_SHA1C,
7812 #ifndef CAPSTONE_DIET
7813 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7814 #endif
7815 },
7816 {
7817 AArch64_SHA1Hrr, ARM64_INS_SHA1H,
7818 #ifndef CAPSTONE_DIET
7819 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7820 #endif
7821 },
7822 {
7823 AArch64_SHA1Mrrr, ARM64_INS_SHA1M,
7824 #ifndef CAPSTONE_DIET
7825 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7826 #endif
7827 },
7828 {
7829 AArch64_SHA1Prrr, ARM64_INS_SHA1P,
7830 #ifndef CAPSTONE_DIET
7831 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7832 #endif
7833 },
7834 {
7835 AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0,
7836 #ifndef CAPSTONE_DIET
7837 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7838 #endif
7839 },
7840 {
7841 AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1,
7842 #ifndef CAPSTONE_DIET
7843 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7844 #endif
7845 },
7846 {
7847 AArch64_SHA256H2rrr, ARM64_INS_SHA256H2,
7848 #ifndef CAPSTONE_DIET
7849 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7850 #endif
7851 },
7852 {
7853 AArch64_SHA256Hrrr, ARM64_INS_SHA256H,
7854 #ifndef CAPSTONE_DIET
7855 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7856 #endif
7857 },
7858 {
7859 AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0,
7860 #ifndef CAPSTONE_DIET
7861 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7862 #endif
7863 },
7864 {
7865 AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1,
7866 #ifndef CAPSTONE_DIET
7867 { 0 }, { 0 }, { ARM64_GRP_CRYPTO, 0 }, 0, 0
7868 #endif
7869 },
7870 {
7871 AArch64_SHADDv16i8, ARM64_INS_SHADD,
7872 #ifndef CAPSTONE_DIET
7873 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7874 #endif
7875 },
7876 {
7877 AArch64_SHADDv2i32, ARM64_INS_SHADD,
7878 #ifndef CAPSTONE_DIET
7879 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7880 #endif
7881 },
7882 {
7883 AArch64_SHADDv4i16, ARM64_INS_SHADD,
7884 #ifndef CAPSTONE_DIET
7885 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7886 #endif
7887 },
7888 {
7889 AArch64_SHADDv4i32, ARM64_INS_SHADD,
7890 #ifndef CAPSTONE_DIET
7891 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7892 #endif
7893 },
7894 {
7895 AArch64_SHADDv8i16, ARM64_INS_SHADD,
7896 #ifndef CAPSTONE_DIET
7897 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7898 #endif
7899 },
7900 {
7901 AArch64_SHADDv8i8, ARM64_INS_SHADD,
7902 #ifndef CAPSTONE_DIET
7903 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7904 #endif
7905 },
7906 {
7907 AArch64_SHLLv16i8, ARM64_INS_SHLL2,
7908 #ifndef CAPSTONE_DIET
7909 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7910 #endif
7911 },
7912 {
7913 AArch64_SHLLv2i32, ARM64_INS_SHLL,
7914 #ifndef CAPSTONE_DIET
7915 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7916 #endif
7917 },
7918 {
7919 AArch64_SHLLv4i16, ARM64_INS_SHLL,
7920 #ifndef CAPSTONE_DIET
7921 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7922 #endif
7923 },
7924 {
7925 AArch64_SHLLv4i32, ARM64_INS_SHLL2,
7926 #ifndef CAPSTONE_DIET
7927 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7928 #endif
7929 },
7930 {
7931 AArch64_SHLLv8i16, ARM64_INS_SHLL2,
7932 #ifndef CAPSTONE_DIET
7933 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7934 #endif
7935 },
7936 {
7937 AArch64_SHLLv8i8, ARM64_INS_SHLL,
7938 #ifndef CAPSTONE_DIET
7939 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7940 #endif
7941 },
7942 {
7943 AArch64_SHLd, ARM64_INS_SHL,
7944 #ifndef CAPSTONE_DIET
7945 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7946 #endif
7947 },
7948 {
7949 AArch64_SHLv16i8_shift, ARM64_INS_SHL,
7950 #ifndef CAPSTONE_DIET
7951 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7952 #endif
7953 },
7954 {
7955 AArch64_SHLv2i32_shift, ARM64_INS_SHL,
7956 #ifndef CAPSTONE_DIET
7957 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7958 #endif
7959 },
7960 {
7961 AArch64_SHLv2i64_shift, ARM64_INS_SHL,
7962 #ifndef CAPSTONE_DIET
7963 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7964 #endif
7965 },
7966 {
7967 AArch64_SHLv4i16_shift, ARM64_INS_SHL,
7968 #ifndef CAPSTONE_DIET
7969 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7970 #endif
7971 },
7972 {
7973 AArch64_SHLv4i32_shift, ARM64_INS_SHL,
7974 #ifndef CAPSTONE_DIET
7975 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7976 #endif
7977 },
7978 {
7979 AArch64_SHLv8i16_shift, ARM64_INS_SHL,
7980 #ifndef CAPSTONE_DIET
7981 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7982 #endif
7983 },
7984 {
7985 AArch64_SHLv8i8_shift, ARM64_INS_SHL,
7986 #ifndef CAPSTONE_DIET
7987 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7988 #endif
7989 },
7990 {
7991 AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2,
7992 #ifndef CAPSTONE_DIET
7993 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
7994 #endif
7995 },
7996 {
7997 AArch64_SHRNv2i32_shift, ARM64_INS_SHRN,
7998 #ifndef CAPSTONE_DIET
7999 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8000 #endif
8001 },
8002 {
8003 AArch64_SHRNv4i16_shift, ARM64_INS_SHRN,
8004 #ifndef CAPSTONE_DIET
8005 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8006 #endif
8007 },
8008 {
8009 AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2,
8010 #ifndef CAPSTONE_DIET
8011 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8012 #endif
8013 },
8014 {
8015 AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2,
8016 #ifndef CAPSTONE_DIET
8017 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8018 #endif
8019 },
8020 {
8021 AArch64_SHRNv8i8_shift, ARM64_INS_SHRN,
8022 #ifndef CAPSTONE_DIET
8023 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8024 #endif
8025 },
8026 {
8027 AArch64_SHSUBv16i8, ARM64_INS_SHSUB,
8028 #ifndef CAPSTONE_DIET
8029 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8030 #endif
8031 },
8032 {
8033 AArch64_SHSUBv2i32, ARM64_INS_SHSUB,
8034 #ifndef CAPSTONE_DIET
8035 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8036 #endif
8037 },
8038 {
8039 AArch64_SHSUBv4i16, ARM64_INS_SHSUB,
8040 #ifndef CAPSTONE_DIET
8041 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8042 #endif
8043 },
8044 {
8045 AArch64_SHSUBv4i32, ARM64_INS_SHSUB,
8046 #ifndef CAPSTONE_DIET
8047 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8048 #endif
8049 },
8050 {
8051 AArch64_SHSUBv8i16, ARM64_INS_SHSUB,
8052 #ifndef CAPSTONE_DIET
8053 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8054 #endif
8055 },
8056 {
8057 AArch64_SHSUBv8i8, ARM64_INS_SHSUB,
8058 #ifndef CAPSTONE_DIET
8059 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8060 #endif
8061 },
8062 {
8063 AArch64_SLId, ARM64_INS_SLI,
8064 #ifndef CAPSTONE_DIET
8065 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8066 #endif
8067 },
8068 {
8069 AArch64_SLIv16i8_shift, ARM64_INS_SLI,
8070 #ifndef CAPSTONE_DIET
8071 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8072 #endif
8073 },
8074 {
8075 AArch64_SLIv2i32_shift, ARM64_INS_SLI,
8076 #ifndef CAPSTONE_DIET
8077 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8078 #endif
8079 },
8080 {
8081 AArch64_SLIv2i64_shift, ARM64_INS_SLI,
8082 #ifndef CAPSTONE_DIET
8083 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8084 #endif
8085 },
8086 {
8087 AArch64_SLIv4i16_shift, ARM64_INS_SLI,
8088 #ifndef CAPSTONE_DIET
8089 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8090 #endif
8091 },
8092 {
8093 AArch64_SLIv4i32_shift, ARM64_INS_SLI,
8094 #ifndef CAPSTONE_DIET
8095 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8096 #endif
8097 },
8098 {
8099 AArch64_SLIv8i16_shift, ARM64_INS_SLI,
8100 #ifndef CAPSTONE_DIET
8101 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8102 #endif
8103 },
8104 {
8105 AArch64_SLIv8i8_shift, ARM64_INS_SLI,
8106 #ifndef CAPSTONE_DIET
8107 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8108 #endif
8109 },
8110 {
8111 AArch64_SMADDLrrr, ARM64_INS_SMADDL,
8112 #ifndef CAPSTONE_DIET
8113 { 0 }, { 0 }, { 0 }, 0, 0
8114 #endif
8115 },
8116 {
8117 AArch64_SMAXPv16i8, ARM64_INS_SMAXP,
8118 #ifndef CAPSTONE_DIET
8119 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8120 #endif
8121 },
8122 {
8123 AArch64_SMAXPv2i32, ARM64_INS_SMAXP,
8124 #ifndef CAPSTONE_DIET
8125 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8126 #endif
8127 },
8128 {
8129 AArch64_SMAXPv4i16, ARM64_INS_SMAXP,
8130 #ifndef CAPSTONE_DIET
8131 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8132 #endif
8133 },
8134 {
8135 AArch64_SMAXPv4i32, ARM64_INS_SMAXP,
8136 #ifndef CAPSTONE_DIET
8137 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8138 #endif
8139 },
8140 {
8141 AArch64_SMAXPv8i16, ARM64_INS_SMAXP,
8142 #ifndef CAPSTONE_DIET
8143 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8144 #endif
8145 },
8146 {
8147 AArch64_SMAXPv8i8, ARM64_INS_SMAXP,
8148 #ifndef CAPSTONE_DIET
8149 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8150 #endif
8151 },
8152 {
8153 AArch64_SMAXVv16i8v, ARM64_INS_SMAXV,
8154 #ifndef CAPSTONE_DIET
8155 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8156 #endif
8157 },
8158 {
8159 AArch64_SMAXVv4i16v, ARM64_INS_SMAXV,
8160 #ifndef CAPSTONE_DIET
8161 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8162 #endif
8163 },
8164 {
8165 AArch64_SMAXVv4i32v, ARM64_INS_SMAXV,
8166 #ifndef CAPSTONE_DIET
8167 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8168 #endif
8169 },
8170 {
8171 AArch64_SMAXVv8i16v, ARM64_INS_SMAXV,
8172 #ifndef CAPSTONE_DIET
8173 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8174 #endif
8175 },
8176 {
8177 AArch64_SMAXVv8i8v, ARM64_INS_SMAXV,
8178 #ifndef CAPSTONE_DIET
8179 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8180 #endif
8181 },
8182 {
8183 AArch64_SMAXv16i8, ARM64_INS_SMAX,
8184 #ifndef CAPSTONE_DIET
8185 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8186 #endif
8187 },
8188 {
8189 AArch64_SMAXv2i32, ARM64_INS_SMAX,
8190 #ifndef CAPSTONE_DIET
8191 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8192 #endif
8193 },
8194 {
8195 AArch64_SMAXv4i16, ARM64_INS_SMAX,
8196 #ifndef CAPSTONE_DIET
8197 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8198 #endif
8199 },
8200 {
8201 AArch64_SMAXv4i32, ARM64_INS_SMAX,
8202 #ifndef CAPSTONE_DIET
8203 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8204 #endif
8205 },
8206 {
8207 AArch64_SMAXv8i16, ARM64_INS_SMAX,
8208 #ifndef CAPSTONE_DIET
8209 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8210 #endif
8211 },
8212 {
8213 AArch64_SMAXv8i8, ARM64_INS_SMAX,
8214 #ifndef CAPSTONE_DIET
8215 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8216 #endif
8217 },
8218 {
8219 AArch64_SMC, ARM64_INS_SMC,
8220 #ifndef CAPSTONE_DIET
8221 { 0 }, { 0 }, { 0 }, 0, 0
8222 #endif
8223 },
8224 {
8225 AArch64_SMINPv16i8, ARM64_INS_SMINP,
8226 #ifndef CAPSTONE_DIET
8227 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8228 #endif
8229 },
8230 {
8231 AArch64_SMINPv2i32, ARM64_INS_SMINP,
8232 #ifndef CAPSTONE_DIET
8233 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8234 #endif
8235 },
8236 {
8237 AArch64_SMINPv4i16, ARM64_INS_SMINP,
8238 #ifndef CAPSTONE_DIET
8239 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8240 #endif
8241 },
8242 {
8243 AArch64_SMINPv4i32, ARM64_INS_SMINP,
8244 #ifndef CAPSTONE_DIET
8245 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8246 #endif
8247 },
8248 {
8249 AArch64_SMINPv8i16, ARM64_INS_SMINP,
8250 #ifndef CAPSTONE_DIET
8251 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8252 #endif
8253 },
8254 {
8255 AArch64_SMINPv8i8, ARM64_INS_SMINP,
8256 #ifndef CAPSTONE_DIET
8257 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8258 #endif
8259 },
8260 {
8261 AArch64_SMINVv16i8v, ARM64_INS_SMINV,
8262 #ifndef CAPSTONE_DIET
8263 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8264 #endif
8265 },
8266 {
8267 AArch64_SMINVv4i16v, ARM64_INS_SMINV,
8268 #ifndef CAPSTONE_DIET
8269 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8270 #endif
8271 },
8272 {
8273 AArch64_SMINVv4i32v, ARM64_INS_SMINV,
8274 #ifndef CAPSTONE_DIET
8275 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8276 #endif
8277 },
8278 {
8279 AArch64_SMINVv8i16v, ARM64_INS_SMINV,
8280 #ifndef CAPSTONE_DIET
8281 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8282 #endif
8283 },
8284 {
8285 AArch64_SMINVv8i8v, ARM64_INS_SMINV,
8286 #ifndef CAPSTONE_DIET
8287 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8288 #endif
8289 },
8290 {
8291 AArch64_SMINv16i8, ARM64_INS_SMIN,
8292 #ifndef CAPSTONE_DIET
8293 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8294 #endif
8295 },
8296 {
8297 AArch64_SMINv2i32, ARM64_INS_SMIN,
8298 #ifndef CAPSTONE_DIET
8299 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8300 #endif
8301 },
8302 {
8303 AArch64_SMINv4i16, ARM64_INS_SMIN,
8304 #ifndef CAPSTONE_DIET
8305 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8306 #endif
8307 },
8308 {
8309 AArch64_SMINv4i32, ARM64_INS_SMIN,
8310 #ifndef CAPSTONE_DIET
8311 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8312 #endif
8313 },
8314 {
8315 AArch64_SMINv8i16, ARM64_INS_SMIN,
8316 #ifndef CAPSTONE_DIET
8317 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8318 #endif
8319 },
8320 {
8321 AArch64_SMINv8i8, ARM64_INS_SMIN,
8322 #ifndef CAPSTONE_DIET
8323 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8324 #endif
8325 },
8326 {
8327 AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2,
8328 #ifndef CAPSTONE_DIET
8329 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8330 #endif
8331 },
8332 {
8333 AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL,
8334 #ifndef CAPSTONE_DIET
8335 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8336 #endif
8337 },
8338 {
8339 AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL,
8340 #ifndef CAPSTONE_DIET
8341 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8342 #endif
8343 },
8344 {
8345 AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL,
8346 #ifndef CAPSTONE_DIET
8347 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8348 #endif
8349 },
8350 {
8351 AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL,
8352 #ifndef CAPSTONE_DIET
8353 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8354 #endif
8355 },
8356 {
8357 AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2,
8358 #ifndef CAPSTONE_DIET
8359 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8360 #endif
8361 },
8362 {
8363 AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2,
8364 #ifndef CAPSTONE_DIET
8365 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8366 #endif
8367 },
8368 {
8369 AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2,
8370 #ifndef CAPSTONE_DIET
8371 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8372 #endif
8373 },
8374 {
8375 AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2,
8376 #ifndef CAPSTONE_DIET
8377 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8378 #endif
8379 },
8380 {
8381 AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL,
8382 #ifndef CAPSTONE_DIET
8383 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8384 #endif
8385 },
8386 {
8387 AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2,
8388 #ifndef CAPSTONE_DIET
8389 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8390 #endif
8391 },
8392 {
8393 AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL,
8394 #ifndef CAPSTONE_DIET
8395 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8396 #endif
8397 },
8398 {
8399 AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL,
8400 #ifndef CAPSTONE_DIET
8401 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8402 #endif
8403 },
8404 {
8405 AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL,
8406 #ifndef CAPSTONE_DIET
8407 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8408 #endif
8409 },
8410 {
8411 AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL,
8412 #ifndef CAPSTONE_DIET
8413 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8414 #endif
8415 },
8416 {
8417 AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2,
8418 #ifndef CAPSTONE_DIET
8419 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8420 #endif
8421 },
8422 {
8423 AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2,
8424 #ifndef CAPSTONE_DIET
8425 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8426 #endif
8427 },
8428 {
8429 AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2,
8430 #ifndef CAPSTONE_DIET
8431 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8432 #endif
8433 },
8434 {
8435 AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2,
8436 #ifndef CAPSTONE_DIET
8437 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8438 #endif
8439 },
8440 {
8441 AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL,
8442 #ifndef CAPSTONE_DIET
8443 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8444 #endif
8445 },
8446 {
8447 AArch64_SMOVvi16to32, ARM64_INS_SMOV,
8448 #ifndef CAPSTONE_DIET
8449 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8450 #endif
8451 },
8452 {
8453 AArch64_SMOVvi16to64, ARM64_INS_SMOV,
8454 #ifndef CAPSTONE_DIET
8455 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8456 #endif
8457 },
8458 {
8459 AArch64_SMOVvi32to64, ARM64_INS_SMOV,
8460 #ifndef CAPSTONE_DIET
8461 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8462 #endif
8463 },
8464 {
8465 AArch64_SMOVvi8to32, ARM64_INS_SMOV,
8466 #ifndef CAPSTONE_DIET
8467 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8468 #endif
8469 },
8470 {
8471 AArch64_SMOVvi8to64, ARM64_INS_SMOV,
8472 #ifndef CAPSTONE_DIET
8473 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8474 #endif
8475 },
8476 {
8477 AArch64_SMSUBLrrr, ARM64_INS_SMSUBL,
8478 #ifndef CAPSTONE_DIET
8479 { 0 }, { 0 }, { 0 }, 0, 0
8480 #endif
8481 },
8482 {
8483 AArch64_SMULHrr, ARM64_INS_SMULH,
8484 #ifndef CAPSTONE_DIET
8485 { 0 }, { 0 }, { 0 }, 0, 0
8486 #endif
8487 },
8488 {
8489 AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2,
8490 #ifndef CAPSTONE_DIET
8491 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8492 #endif
8493 },
8494 {
8495 AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL,
8496 #ifndef CAPSTONE_DIET
8497 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8498 #endif
8499 },
8500 {
8501 AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL,
8502 #ifndef CAPSTONE_DIET
8503 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8504 #endif
8505 },
8506 {
8507 AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL,
8508 #ifndef CAPSTONE_DIET
8509 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8510 #endif
8511 },
8512 {
8513 AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL,
8514 #ifndef CAPSTONE_DIET
8515 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8516 #endif
8517 },
8518 {
8519 AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2,
8520 #ifndef CAPSTONE_DIET
8521 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8522 #endif
8523 },
8524 {
8525 AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2,
8526 #ifndef CAPSTONE_DIET
8527 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8528 #endif
8529 },
8530 {
8531 AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2,
8532 #ifndef CAPSTONE_DIET
8533 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8534 #endif
8535 },
8536 {
8537 AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2,
8538 #ifndef CAPSTONE_DIET
8539 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8540 #endif
8541 },
8542 {
8543 AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL,
8544 #ifndef CAPSTONE_DIET
8545 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8546 #endif
8547 },
8548 {
8549 AArch64_SQABSv16i8, ARM64_INS_SQABS,
8550 #ifndef CAPSTONE_DIET
8551 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8552 #endif
8553 },
8554 {
8555 AArch64_SQABSv1i16, ARM64_INS_SQABS,
8556 #ifndef CAPSTONE_DIET
8557 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8558 #endif
8559 },
8560 {
8561 AArch64_SQABSv1i32, ARM64_INS_SQABS,
8562 #ifndef CAPSTONE_DIET
8563 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8564 #endif
8565 },
8566 {
8567 AArch64_SQABSv1i64, ARM64_INS_SQABS,
8568 #ifndef CAPSTONE_DIET
8569 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8570 #endif
8571 },
8572 {
8573 AArch64_SQABSv1i8, ARM64_INS_SQABS,
8574 #ifndef CAPSTONE_DIET
8575 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8576 #endif
8577 },
8578 {
8579 AArch64_SQABSv2i32, ARM64_INS_SQABS,
8580 #ifndef CAPSTONE_DIET
8581 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8582 #endif
8583 },
8584 {
8585 AArch64_SQABSv2i64, ARM64_INS_SQABS,
8586 #ifndef CAPSTONE_DIET
8587 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8588 #endif
8589 },
8590 {
8591 AArch64_SQABSv4i16, ARM64_INS_SQABS,
8592 #ifndef CAPSTONE_DIET
8593 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8594 #endif
8595 },
8596 {
8597 AArch64_SQABSv4i32, ARM64_INS_SQABS,
8598 #ifndef CAPSTONE_DIET
8599 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8600 #endif
8601 },
8602 {
8603 AArch64_SQABSv8i16, ARM64_INS_SQABS,
8604 #ifndef CAPSTONE_DIET
8605 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8606 #endif
8607 },
8608 {
8609 AArch64_SQABSv8i8, ARM64_INS_SQABS,
8610 #ifndef CAPSTONE_DIET
8611 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8612 #endif
8613 },
8614 {
8615 AArch64_SQADDv16i8, ARM64_INS_SQADD,
8616 #ifndef CAPSTONE_DIET
8617 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8618 #endif
8619 },
8620 {
8621 AArch64_SQADDv1i16, ARM64_INS_SQADD,
8622 #ifndef CAPSTONE_DIET
8623 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8624 #endif
8625 },
8626 {
8627 AArch64_SQADDv1i32, ARM64_INS_SQADD,
8628 #ifndef CAPSTONE_DIET
8629 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8630 #endif
8631 },
8632 {
8633 AArch64_SQADDv1i64, ARM64_INS_SQADD,
8634 #ifndef CAPSTONE_DIET
8635 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8636 #endif
8637 },
8638 {
8639 AArch64_SQADDv1i8, ARM64_INS_SQADD,
8640 #ifndef CAPSTONE_DIET
8641 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8642 #endif
8643 },
8644 {
8645 AArch64_SQADDv2i32, ARM64_INS_SQADD,
8646 #ifndef CAPSTONE_DIET
8647 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8648 #endif
8649 },
8650 {
8651 AArch64_SQADDv2i64, ARM64_INS_SQADD,
8652 #ifndef CAPSTONE_DIET
8653 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8654 #endif
8655 },
8656 {
8657 AArch64_SQADDv4i16, ARM64_INS_SQADD,
8658 #ifndef CAPSTONE_DIET
8659 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8660 #endif
8661 },
8662 {
8663 AArch64_SQADDv4i32, ARM64_INS_SQADD,
8664 #ifndef CAPSTONE_DIET
8665 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8666 #endif
8667 },
8668 {
8669 AArch64_SQADDv8i16, ARM64_INS_SQADD,
8670 #ifndef CAPSTONE_DIET
8671 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8672 #endif
8673 },
8674 {
8675 AArch64_SQADDv8i8, ARM64_INS_SQADD,
8676 #ifndef CAPSTONE_DIET
8677 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8678 #endif
8679 },
8680 {
8681 AArch64_SQDMLALi16, ARM64_INS_SQDMLAL,
8682 #ifndef CAPSTONE_DIET
8683 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8684 #endif
8685 },
8686 {
8687 AArch64_SQDMLALi32, ARM64_INS_SQDMLAL,
8688 #ifndef CAPSTONE_DIET
8689 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8690 #endif
8691 },
8692 {
8693 AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL,
8694 #ifndef CAPSTONE_DIET
8695 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8696 #endif
8697 },
8698 {
8699 AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL,
8700 #ifndef CAPSTONE_DIET
8701 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8702 #endif
8703 },
8704 {
8705 AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL,
8706 #ifndef CAPSTONE_DIET
8707 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8708 #endif
8709 },
8710 {
8711 AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL,
8712 #ifndef CAPSTONE_DIET
8713 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8714 #endif
8715 },
8716 {
8717 AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL,
8718 #ifndef CAPSTONE_DIET
8719 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8720 #endif
8721 },
8722 {
8723 AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL,
8724 #ifndef CAPSTONE_DIET
8725 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8726 #endif
8727 },
8728 {
8729 AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2,
8730 #ifndef CAPSTONE_DIET
8731 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8732 #endif
8733 },
8734 {
8735 AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2,
8736 #ifndef CAPSTONE_DIET
8737 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8738 #endif
8739 },
8740 {
8741 AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2,
8742 #ifndef CAPSTONE_DIET
8743 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8744 #endif
8745 },
8746 {
8747 AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2,
8748 #ifndef CAPSTONE_DIET
8749 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8750 #endif
8751 },
8752 {
8753 AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL,
8754 #ifndef CAPSTONE_DIET
8755 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8756 #endif
8757 },
8758 {
8759 AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL,
8760 #ifndef CAPSTONE_DIET
8761 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8762 #endif
8763 },
8764 {
8765 AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL,
8766 #ifndef CAPSTONE_DIET
8767 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8768 #endif
8769 },
8770 {
8771 AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL,
8772 #ifndef CAPSTONE_DIET
8773 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8774 #endif
8775 },
8776 {
8777 AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL,
8778 #ifndef CAPSTONE_DIET
8779 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8780 #endif
8781 },
8782 {
8783 AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL,
8784 #ifndef CAPSTONE_DIET
8785 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8786 #endif
8787 },
8788 {
8789 AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL,
8790 #ifndef CAPSTONE_DIET
8791 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8792 #endif
8793 },
8794 {
8795 AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL,
8796 #ifndef CAPSTONE_DIET
8797 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8798 #endif
8799 },
8800 {
8801 AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2,
8802 #ifndef CAPSTONE_DIET
8803 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8804 #endif
8805 },
8806 {
8807 AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2,
8808 #ifndef CAPSTONE_DIET
8809 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8810 #endif
8811 },
8812 {
8813 AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2,
8814 #ifndef CAPSTONE_DIET
8815 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8816 #endif
8817 },
8818 {
8819 AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2,
8820 #ifndef CAPSTONE_DIET
8821 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8822 #endif
8823 },
8824 {
8825 AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH,
8826 #ifndef CAPSTONE_DIET
8827 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8828 #endif
8829 },
8830 {
8831 AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH,
8832 #ifndef CAPSTONE_DIET
8833 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8834 #endif
8835 },
8836 {
8837 AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH,
8838 #ifndef CAPSTONE_DIET
8839 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8840 #endif
8841 },
8842 {
8843 AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH,
8844 #ifndef CAPSTONE_DIET
8845 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8846 #endif
8847 },
8848 {
8849 AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH,
8850 #ifndef CAPSTONE_DIET
8851 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8852 #endif
8853 },
8854 {
8855 AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH,
8856 #ifndef CAPSTONE_DIET
8857 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8858 #endif
8859 },
8860 {
8861 AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH,
8862 #ifndef CAPSTONE_DIET
8863 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8864 #endif
8865 },
8866 {
8867 AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH,
8868 #ifndef CAPSTONE_DIET
8869 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8870 #endif
8871 },
8872 {
8873 AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH,
8874 #ifndef CAPSTONE_DIET
8875 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8876 #endif
8877 },
8878 {
8879 AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH,
8880 #ifndef CAPSTONE_DIET
8881 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8882 #endif
8883 },
8884 {
8885 AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH,
8886 #ifndef CAPSTONE_DIET
8887 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8888 #endif
8889 },
8890 {
8891 AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH,
8892 #ifndef CAPSTONE_DIET
8893 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8894 #endif
8895 },
8896 {
8897 AArch64_SQDMULLi16, ARM64_INS_SQDMULL,
8898 #ifndef CAPSTONE_DIET
8899 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8900 #endif
8901 },
8902 {
8903 AArch64_SQDMULLi32, ARM64_INS_SQDMULL,
8904 #ifndef CAPSTONE_DIET
8905 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8906 #endif
8907 },
8908 {
8909 AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL,
8910 #ifndef CAPSTONE_DIET
8911 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8912 #endif
8913 },
8914 {
8915 AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL,
8916 #ifndef CAPSTONE_DIET
8917 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8918 #endif
8919 },
8920 {
8921 AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL,
8922 #ifndef CAPSTONE_DIET
8923 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8924 #endif
8925 },
8926 {
8927 AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL,
8928 #ifndef CAPSTONE_DIET
8929 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8930 #endif
8931 },
8932 {
8933 AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL,
8934 #ifndef CAPSTONE_DIET
8935 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8936 #endif
8937 },
8938 {
8939 AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL,
8940 #ifndef CAPSTONE_DIET
8941 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8942 #endif
8943 },
8944 {
8945 AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2,
8946 #ifndef CAPSTONE_DIET
8947 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8948 #endif
8949 },
8950 {
8951 AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2,
8952 #ifndef CAPSTONE_DIET
8953 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8954 #endif
8955 },
8956 {
8957 AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2,
8958 #ifndef CAPSTONE_DIET
8959 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8960 #endif
8961 },
8962 {
8963 AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2,
8964 #ifndef CAPSTONE_DIET
8965 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8966 #endif
8967 },
8968 {
8969 AArch64_SQNEGv16i8, ARM64_INS_SQNEG,
8970 #ifndef CAPSTONE_DIET
8971 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8972 #endif
8973 },
8974 {
8975 AArch64_SQNEGv1i16, ARM64_INS_SQNEG,
8976 #ifndef CAPSTONE_DIET
8977 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8978 #endif
8979 },
8980 {
8981 AArch64_SQNEGv1i32, ARM64_INS_SQNEG,
8982 #ifndef CAPSTONE_DIET
8983 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8984 #endif
8985 },
8986 {
8987 AArch64_SQNEGv1i64, ARM64_INS_SQNEG,
8988 #ifndef CAPSTONE_DIET
8989 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8990 #endif
8991 },
8992 {
8993 AArch64_SQNEGv1i8, ARM64_INS_SQNEG,
8994 #ifndef CAPSTONE_DIET
8995 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
8996 #endif
8997 },
8998 {
8999 AArch64_SQNEGv2i32, ARM64_INS_SQNEG,
9000 #ifndef CAPSTONE_DIET
9001 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9002 #endif
9003 },
9004 {
9005 AArch64_SQNEGv2i64, ARM64_INS_SQNEG,
9006 #ifndef CAPSTONE_DIET
9007 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9008 #endif
9009 },
9010 {
9011 AArch64_SQNEGv4i16, ARM64_INS_SQNEG,
9012 #ifndef CAPSTONE_DIET
9013 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9014 #endif
9015 },
9016 {
9017 AArch64_SQNEGv4i32, ARM64_INS_SQNEG,
9018 #ifndef CAPSTONE_DIET
9019 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9020 #endif
9021 },
9022 {
9023 AArch64_SQNEGv8i16, ARM64_INS_SQNEG,
9024 #ifndef CAPSTONE_DIET
9025 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9026 #endif
9027 },
9028 {
9029 AArch64_SQNEGv8i8, ARM64_INS_SQNEG,
9030 #ifndef CAPSTONE_DIET
9031 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9032 #endif
9033 },
9034 {
9035 AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH,
9036 #ifndef CAPSTONE_DIET
9037 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9038 #endif
9039 },
9040 {
9041 AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH,
9042 #ifndef CAPSTONE_DIET
9043 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9044 #endif
9045 },
9046 {
9047 AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH,
9048 #ifndef CAPSTONE_DIET
9049 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9050 #endif
9051 },
9052 {
9053 AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH,
9054 #ifndef CAPSTONE_DIET
9055 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9056 #endif
9057 },
9058 {
9059 AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH,
9060 #ifndef CAPSTONE_DIET
9061 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9062 #endif
9063 },
9064 {
9065 AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH,
9066 #ifndef CAPSTONE_DIET
9067 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9068 #endif
9069 },
9070 {
9071 AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH,
9072 #ifndef CAPSTONE_DIET
9073 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9074 #endif
9075 },
9076 {
9077 AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH,
9078 #ifndef CAPSTONE_DIET
9079 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9080 #endif
9081 },
9082 {
9083 AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH,
9084 #ifndef CAPSTONE_DIET
9085 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9086 #endif
9087 },
9088 {
9089 AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH,
9090 #ifndef CAPSTONE_DIET
9091 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9092 #endif
9093 },
9094 {
9095 AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH,
9096 #ifndef CAPSTONE_DIET
9097 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9098 #endif
9099 },
9100 {
9101 AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH,
9102 #ifndef CAPSTONE_DIET
9103 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9104 #endif
9105 },
9106 {
9107 AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL,
9108 #ifndef CAPSTONE_DIET
9109 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9110 #endif
9111 },
9112 {
9113 AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL,
9114 #ifndef CAPSTONE_DIET
9115 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9116 #endif
9117 },
9118 {
9119 AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL,
9120 #ifndef CAPSTONE_DIET
9121 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9122 #endif
9123 },
9124 {
9125 AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL,
9126 #ifndef CAPSTONE_DIET
9127 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9128 #endif
9129 },
9130 {
9131 AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL,
9132 #ifndef CAPSTONE_DIET
9133 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9134 #endif
9135 },
9136 {
9137 AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL,
9138 #ifndef CAPSTONE_DIET
9139 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9140 #endif
9141 },
9142 {
9143 AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL,
9144 #ifndef CAPSTONE_DIET
9145 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9146 #endif
9147 },
9148 {
9149 AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL,
9150 #ifndef CAPSTONE_DIET
9151 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9152 #endif
9153 },
9154 {
9155 AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL,
9156 #ifndef CAPSTONE_DIET
9157 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9158 #endif
9159 },
9160 {
9161 AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL,
9162 #ifndef CAPSTONE_DIET
9163 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9164 #endif
9165 },
9166 {
9167 AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL,
9168 #ifndef CAPSTONE_DIET
9169 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9170 #endif
9171 },
9172 {
9173 AArch64_SQRSHRNb, ARM64_INS_SQRSHRN,
9174 #ifndef CAPSTONE_DIET
9175 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9176 #endif
9177 },
9178 {
9179 AArch64_SQRSHRNh, ARM64_INS_SQRSHRN,
9180 #ifndef CAPSTONE_DIET
9181 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9182 #endif
9183 },
9184 {
9185 AArch64_SQRSHRNs, ARM64_INS_SQRSHRN,
9186 #ifndef CAPSTONE_DIET
9187 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9188 #endif
9189 },
9190 {
9191 AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2,
9192 #ifndef CAPSTONE_DIET
9193 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9194 #endif
9195 },
9196 {
9197 AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN,
9198 #ifndef CAPSTONE_DIET
9199 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9200 #endif
9201 },
9202 {
9203 AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN,
9204 #ifndef CAPSTONE_DIET
9205 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9206 #endif
9207 },
9208 {
9209 AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2,
9210 #ifndef CAPSTONE_DIET
9211 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9212 #endif
9213 },
9214 {
9215 AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2,
9216 #ifndef CAPSTONE_DIET
9217 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9218 #endif
9219 },
9220 {
9221 AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN,
9222 #ifndef CAPSTONE_DIET
9223 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9224 #endif
9225 },
9226 {
9227 AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN,
9228 #ifndef CAPSTONE_DIET
9229 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9230 #endif
9231 },
9232 {
9233 AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN,
9234 #ifndef CAPSTONE_DIET
9235 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9236 #endif
9237 },
9238 {
9239 AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN,
9240 #ifndef CAPSTONE_DIET
9241 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9242 #endif
9243 },
9244 {
9245 AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2,
9246 #ifndef CAPSTONE_DIET
9247 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9248 #endif
9249 },
9250 {
9251 AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN,
9252 #ifndef CAPSTONE_DIET
9253 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9254 #endif
9255 },
9256 {
9257 AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN,
9258 #ifndef CAPSTONE_DIET
9259 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9260 #endif
9261 },
9262 {
9263 AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2,
9264 #ifndef CAPSTONE_DIET
9265 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9266 #endif
9267 },
9268 {
9269 AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2,
9270 #ifndef CAPSTONE_DIET
9271 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9272 #endif
9273 },
9274 {
9275 AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN,
9276 #ifndef CAPSTONE_DIET
9277 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9278 #endif
9279 },
9280 {
9281 AArch64_SQSHLUb, ARM64_INS_SQSHLU,
9282 #ifndef CAPSTONE_DIET
9283 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9284 #endif
9285 },
9286 {
9287 AArch64_SQSHLUd, ARM64_INS_SQSHLU,
9288 #ifndef CAPSTONE_DIET
9289 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9290 #endif
9291 },
9292 {
9293 AArch64_SQSHLUh, ARM64_INS_SQSHLU,
9294 #ifndef CAPSTONE_DIET
9295 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9296 #endif
9297 },
9298 {
9299 AArch64_SQSHLUs, ARM64_INS_SQSHLU,
9300 #ifndef CAPSTONE_DIET
9301 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9302 #endif
9303 },
9304 {
9305 AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU,
9306 #ifndef CAPSTONE_DIET
9307 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9308 #endif
9309 },
9310 {
9311 AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU,
9312 #ifndef CAPSTONE_DIET
9313 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9314 #endif
9315 },
9316 {
9317 AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU,
9318 #ifndef CAPSTONE_DIET
9319 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9320 #endif
9321 },
9322 {
9323 AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU,
9324 #ifndef CAPSTONE_DIET
9325 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9326 #endif
9327 },
9328 {
9329 AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU,
9330 #ifndef CAPSTONE_DIET
9331 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9332 #endif
9333 },
9334 {
9335 AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU,
9336 #ifndef CAPSTONE_DIET
9337 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9338 #endif
9339 },
9340 {
9341 AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU,
9342 #ifndef CAPSTONE_DIET
9343 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9344 #endif
9345 },
9346 {
9347 AArch64_SQSHLb, ARM64_INS_SQSHL,
9348 #ifndef CAPSTONE_DIET
9349 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9350 #endif
9351 },
9352 {
9353 AArch64_SQSHLd, ARM64_INS_SQSHL,
9354 #ifndef CAPSTONE_DIET
9355 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9356 #endif
9357 },
9358 {
9359 AArch64_SQSHLh, ARM64_INS_SQSHL,
9360 #ifndef CAPSTONE_DIET
9361 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9362 #endif
9363 },
9364 {
9365 AArch64_SQSHLs, ARM64_INS_SQSHL,
9366 #ifndef CAPSTONE_DIET
9367 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9368 #endif
9369 },
9370 {
9371 AArch64_SQSHLv16i8, ARM64_INS_SQSHL,
9372 #ifndef CAPSTONE_DIET
9373 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9374 #endif
9375 },
9376 {
9377 AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL,
9378 #ifndef CAPSTONE_DIET
9379 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9380 #endif
9381 },
9382 {
9383 AArch64_SQSHLv1i16, ARM64_INS_SQSHL,
9384 #ifndef CAPSTONE_DIET
9385 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9386 #endif
9387 },
9388 {
9389 AArch64_SQSHLv1i32, ARM64_INS_SQSHL,
9390 #ifndef CAPSTONE_DIET
9391 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9392 #endif
9393 },
9394 {
9395 AArch64_SQSHLv1i64, ARM64_INS_SQSHL,
9396 #ifndef CAPSTONE_DIET
9397 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9398 #endif
9399 },
9400 {
9401 AArch64_SQSHLv1i8, ARM64_INS_SQSHL,
9402 #ifndef CAPSTONE_DIET
9403 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9404 #endif
9405 },
9406 {
9407 AArch64_SQSHLv2i32, ARM64_INS_SQSHL,
9408 #ifndef CAPSTONE_DIET
9409 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9410 #endif
9411 },
9412 {
9413 AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL,
9414 #ifndef CAPSTONE_DIET
9415 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9416 #endif
9417 },
9418 {
9419 AArch64_SQSHLv2i64, ARM64_INS_SQSHL,
9420 #ifndef CAPSTONE_DIET
9421 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9422 #endif
9423 },
9424 {
9425 AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL,
9426 #ifndef CAPSTONE_DIET
9427 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9428 #endif
9429 },
9430 {
9431 AArch64_SQSHLv4i16, ARM64_INS_SQSHL,
9432 #ifndef CAPSTONE_DIET
9433 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9434 #endif
9435 },
9436 {
9437 AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL,
9438 #ifndef CAPSTONE_DIET
9439 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9440 #endif
9441 },
9442 {
9443 AArch64_SQSHLv4i32, ARM64_INS_SQSHL,
9444 #ifndef CAPSTONE_DIET
9445 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9446 #endif
9447 },
9448 {
9449 AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL,
9450 #ifndef CAPSTONE_DIET
9451 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9452 #endif
9453 },
9454 {
9455 AArch64_SQSHLv8i16, ARM64_INS_SQSHL,
9456 #ifndef CAPSTONE_DIET
9457 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9458 #endif
9459 },
9460 {
9461 AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL,
9462 #ifndef CAPSTONE_DIET
9463 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9464 #endif
9465 },
9466 {
9467 AArch64_SQSHLv8i8, ARM64_INS_SQSHL,
9468 #ifndef CAPSTONE_DIET
9469 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9470 #endif
9471 },
9472 {
9473 AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL,
9474 #ifndef CAPSTONE_DIET
9475 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9476 #endif
9477 },
9478 {
9479 AArch64_SQSHRNb, ARM64_INS_SQSHRN,
9480 #ifndef CAPSTONE_DIET
9481 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9482 #endif
9483 },
9484 {
9485 AArch64_SQSHRNh, ARM64_INS_SQSHRN,
9486 #ifndef CAPSTONE_DIET
9487 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9488 #endif
9489 },
9490 {
9491 AArch64_SQSHRNs, ARM64_INS_SQSHRN,
9492 #ifndef CAPSTONE_DIET
9493 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9494 #endif
9495 },
9496 {
9497 AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2,
9498 #ifndef CAPSTONE_DIET
9499 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9500 #endif
9501 },
9502 {
9503 AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN,
9504 #ifndef CAPSTONE_DIET
9505 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9506 #endif
9507 },
9508 {
9509 AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN,
9510 #ifndef CAPSTONE_DIET
9511 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9512 #endif
9513 },
9514 {
9515 AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2,
9516 #ifndef CAPSTONE_DIET
9517 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9518 #endif
9519 },
9520 {
9521 AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2,
9522 #ifndef CAPSTONE_DIET
9523 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9524 #endif
9525 },
9526 {
9527 AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN,
9528 #ifndef CAPSTONE_DIET
9529 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9530 #endif
9531 },
9532 {
9533 AArch64_SQSHRUNb, ARM64_INS_SQSHRUN,
9534 #ifndef CAPSTONE_DIET
9535 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9536 #endif
9537 },
9538 {
9539 AArch64_SQSHRUNh, ARM64_INS_SQSHRUN,
9540 #ifndef CAPSTONE_DIET
9541 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9542 #endif
9543 },
9544 {
9545 AArch64_SQSHRUNs, ARM64_INS_SQSHRUN,
9546 #ifndef CAPSTONE_DIET
9547 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9548 #endif
9549 },
9550 {
9551 AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2,
9552 #ifndef CAPSTONE_DIET
9553 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9554 #endif
9555 },
9556 {
9557 AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN,
9558 #ifndef CAPSTONE_DIET
9559 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9560 #endif
9561 },
9562 {
9563 AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN,
9564 #ifndef CAPSTONE_DIET
9565 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9566 #endif
9567 },
9568 {
9569 AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2,
9570 #ifndef CAPSTONE_DIET
9571 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9572 #endif
9573 },
9574 {
9575 AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2,
9576 #ifndef CAPSTONE_DIET
9577 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9578 #endif
9579 },
9580 {
9581 AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN,
9582 #ifndef CAPSTONE_DIET
9583 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9584 #endif
9585 },
9586 {
9587 AArch64_SQSUBv16i8, ARM64_INS_SQSUB,
9588 #ifndef CAPSTONE_DIET
9589 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9590 #endif
9591 },
9592 {
9593 AArch64_SQSUBv1i16, ARM64_INS_SQSUB,
9594 #ifndef CAPSTONE_DIET
9595 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9596 #endif
9597 },
9598 {
9599 AArch64_SQSUBv1i32, ARM64_INS_SQSUB,
9600 #ifndef CAPSTONE_DIET
9601 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9602 #endif
9603 },
9604 {
9605 AArch64_SQSUBv1i64, ARM64_INS_SQSUB,
9606 #ifndef CAPSTONE_DIET
9607 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9608 #endif
9609 },
9610 {
9611 AArch64_SQSUBv1i8, ARM64_INS_SQSUB,
9612 #ifndef CAPSTONE_DIET
9613 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9614 #endif
9615 },
9616 {
9617 AArch64_SQSUBv2i32, ARM64_INS_SQSUB,
9618 #ifndef CAPSTONE_DIET
9619 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9620 #endif
9621 },
9622 {
9623 AArch64_SQSUBv2i64, ARM64_INS_SQSUB,
9624 #ifndef CAPSTONE_DIET
9625 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9626 #endif
9627 },
9628 {
9629 AArch64_SQSUBv4i16, ARM64_INS_SQSUB,
9630 #ifndef CAPSTONE_DIET
9631 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9632 #endif
9633 },
9634 {
9635 AArch64_SQSUBv4i32, ARM64_INS_SQSUB,
9636 #ifndef CAPSTONE_DIET
9637 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9638 #endif
9639 },
9640 {
9641 AArch64_SQSUBv8i16, ARM64_INS_SQSUB,
9642 #ifndef CAPSTONE_DIET
9643 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9644 #endif
9645 },
9646 {
9647 AArch64_SQSUBv8i8, ARM64_INS_SQSUB,
9648 #ifndef CAPSTONE_DIET
9649 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9650 #endif
9651 },
9652 {
9653 AArch64_SQXTNv16i8, ARM64_INS_SQXTN2,
9654 #ifndef CAPSTONE_DIET
9655 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9656 #endif
9657 },
9658 {
9659 AArch64_SQXTNv1i16, ARM64_INS_SQXTN,
9660 #ifndef CAPSTONE_DIET
9661 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9662 #endif
9663 },
9664 {
9665 AArch64_SQXTNv1i32, ARM64_INS_SQXTN,
9666 #ifndef CAPSTONE_DIET
9667 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9668 #endif
9669 },
9670 {
9671 AArch64_SQXTNv1i8, ARM64_INS_SQXTN,
9672 #ifndef CAPSTONE_DIET
9673 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9674 #endif
9675 },
9676 {
9677 AArch64_SQXTNv2i32, ARM64_INS_SQXTN,
9678 #ifndef CAPSTONE_DIET
9679 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9680 #endif
9681 },
9682 {
9683 AArch64_SQXTNv4i16, ARM64_INS_SQXTN,
9684 #ifndef CAPSTONE_DIET
9685 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9686 #endif
9687 },
9688 {
9689 AArch64_SQXTNv4i32, ARM64_INS_SQXTN2,
9690 #ifndef CAPSTONE_DIET
9691 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9692 #endif
9693 },
9694 {
9695 AArch64_SQXTNv8i16, ARM64_INS_SQXTN2,
9696 #ifndef CAPSTONE_DIET
9697 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9698 #endif
9699 },
9700 {
9701 AArch64_SQXTNv8i8, ARM64_INS_SQXTN,
9702 #ifndef CAPSTONE_DIET
9703 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9704 #endif
9705 },
9706 {
9707 AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2,
9708 #ifndef CAPSTONE_DIET
9709 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9710 #endif
9711 },
9712 {
9713 AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN,
9714 #ifndef CAPSTONE_DIET
9715 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9716 #endif
9717 },
9718 {
9719 AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN,
9720 #ifndef CAPSTONE_DIET
9721 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9722 #endif
9723 },
9724 {
9725 AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN,
9726 #ifndef CAPSTONE_DIET
9727 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9728 #endif
9729 },
9730 {
9731 AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN,
9732 #ifndef CAPSTONE_DIET
9733 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9734 #endif
9735 },
9736 {
9737 AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN,
9738 #ifndef CAPSTONE_DIET
9739 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9740 #endif
9741 },
9742 {
9743 AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2,
9744 #ifndef CAPSTONE_DIET
9745 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9746 #endif
9747 },
9748 {
9749 AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2,
9750 #ifndef CAPSTONE_DIET
9751 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9752 #endif
9753 },
9754 {
9755 AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN,
9756 #ifndef CAPSTONE_DIET
9757 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9758 #endif
9759 },
9760 {
9761 AArch64_SRHADDv16i8, ARM64_INS_SRHADD,
9762 #ifndef CAPSTONE_DIET
9763 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9764 #endif
9765 },
9766 {
9767 AArch64_SRHADDv2i32, ARM64_INS_SRHADD,
9768 #ifndef CAPSTONE_DIET
9769 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9770 #endif
9771 },
9772 {
9773 AArch64_SRHADDv4i16, ARM64_INS_SRHADD,
9774 #ifndef CAPSTONE_DIET
9775 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9776 #endif
9777 },
9778 {
9779 AArch64_SRHADDv4i32, ARM64_INS_SRHADD,
9780 #ifndef CAPSTONE_DIET
9781 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9782 #endif
9783 },
9784 {
9785 AArch64_SRHADDv8i16, ARM64_INS_SRHADD,
9786 #ifndef CAPSTONE_DIET
9787 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9788 #endif
9789 },
9790 {
9791 AArch64_SRHADDv8i8, ARM64_INS_SRHADD,
9792 #ifndef CAPSTONE_DIET
9793 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9794 #endif
9795 },
9796 {
9797 AArch64_SRId, ARM64_INS_SRI,
9798 #ifndef CAPSTONE_DIET
9799 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9800 #endif
9801 },
9802 {
9803 AArch64_SRIv16i8_shift, ARM64_INS_SRI,
9804 #ifndef CAPSTONE_DIET
9805 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9806 #endif
9807 },
9808 {
9809 AArch64_SRIv2i32_shift, ARM64_INS_SRI,
9810 #ifndef CAPSTONE_DIET
9811 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9812 #endif
9813 },
9814 {
9815 AArch64_SRIv2i64_shift, ARM64_INS_SRI,
9816 #ifndef CAPSTONE_DIET
9817 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9818 #endif
9819 },
9820 {
9821 AArch64_SRIv4i16_shift, ARM64_INS_SRI,
9822 #ifndef CAPSTONE_DIET
9823 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9824 #endif
9825 },
9826 {
9827 AArch64_SRIv4i32_shift, ARM64_INS_SRI,
9828 #ifndef CAPSTONE_DIET
9829 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9830 #endif
9831 },
9832 {
9833 AArch64_SRIv8i16_shift, ARM64_INS_SRI,
9834 #ifndef CAPSTONE_DIET
9835 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9836 #endif
9837 },
9838 {
9839 AArch64_SRIv8i8_shift, ARM64_INS_SRI,
9840 #ifndef CAPSTONE_DIET
9841 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9842 #endif
9843 },
9844 {
9845 AArch64_SRSHLv16i8, ARM64_INS_SRSHL,
9846 #ifndef CAPSTONE_DIET
9847 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9848 #endif
9849 },
9850 {
9851 AArch64_SRSHLv1i64, ARM64_INS_SRSHL,
9852 #ifndef CAPSTONE_DIET
9853 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9854 #endif
9855 },
9856 {
9857 AArch64_SRSHLv2i32, ARM64_INS_SRSHL,
9858 #ifndef CAPSTONE_DIET
9859 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9860 #endif
9861 },
9862 {
9863 AArch64_SRSHLv2i64, ARM64_INS_SRSHL,
9864 #ifndef CAPSTONE_DIET
9865 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9866 #endif
9867 },
9868 {
9869 AArch64_SRSHLv4i16, ARM64_INS_SRSHL,
9870 #ifndef CAPSTONE_DIET
9871 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9872 #endif
9873 },
9874 {
9875 AArch64_SRSHLv4i32, ARM64_INS_SRSHL,
9876 #ifndef CAPSTONE_DIET
9877 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9878 #endif
9879 },
9880 {
9881 AArch64_SRSHLv8i16, ARM64_INS_SRSHL,
9882 #ifndef CAPSTONE_DIET
9883 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9884 #endif
9885 },
9886 {
9887 AArch64_SRSHLv8i8, ARM64_INS_SRSHL,
9888 #ifndef CAPSTONE_DIET
9889 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9890 #endif
9891 },
9892 {
9893 AArch64_SRSHRd, ARM64_INS_SRSHR,
9894 #ifndef CAPSTONE_DIET
9895 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9896 #endif
9897 },
9898 {
9899 AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR,
9900 #ifndef CAPSTONE_DIET
9901 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9902 #endif
9903 },
9904 {
9905 AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR,
9906 #ifndef CAPSTONE_DIET
9907 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9908 #endif
9909 },
9910 {
9911 AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR,
9912 #ifndef CAPSTONE_DIET
9913 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9914 #endif
9915 },
9916 {
9917 AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR,
9918 #ifndef CAPSTONE_DIET
9919 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9920 #endif
9921 },
9922 {
9923 AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR,
9924 #ifndef CAPSTONE_DIET
9925 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9926 #endif
9927 },
9928 {
9929 AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR,
9930 #ifndef CAPSTONE_DIET
9931 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9932 #endif
9933 },
9934 {
9935 AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR,
9936 #ifndef CAPSTONE_DIET
9937 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9938 #endif
9939 },
9940 {
9941 AArch64_SRSRAd, ARM64_INS_SRSRA,
9942 #ifndef CAPSTONE_DIET
9943 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9944 #endif
9945 },
9946 {
9947 AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA,
9948 #ifndef CAPSTONE_DIET
9949 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9950 #endif
9951 },
9952 {
9953 AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA,
9954 #ifndef CAPSTONE_DIET
9955 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9956 #endif
9957 },
9958 {
9959 AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA,
9960 #ifndef CAPSTONE_DIET
9961 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9962 #endif
9963 },
9964 {
9965 AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA,
9966 #ifndef CAPSTONE_DIET
9967 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9968 #endif
9969 },
9970 {
9971 AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA,
9972 #ifndef CAPSTONE_DIET
9973 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9974 #endif
9975 },
9976 {
9977 AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA,
9978 #ifndef CAPSTONE_DIET
9979 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9980 #endif
9981 },
9982 {
9983 AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA,
9984 #ifndef CAPSTONE_DIET
9985 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9986 #endif
9987 },
9988 {
9989 AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2,
9990 #ifndef CAPSTONE_DIET
9991 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9992 #endif
9993 },
9994 {
9995 AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL,
9996 #ifndef CAPSTONE_DIET
9997 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
9998 #endif
9999 },
10000 {
10001 AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL,
10002 #ifndef CAPSTONE_DIET
10003 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10004 #endif
10005 },
10006 {
10007 AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2,
10008 #ifndef CAPSTONE_DIET
10009 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10010 #endif
10011 },
10012 {
10013 AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2,
10014 #ifndef CAPSTONE_DIET
10015 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10016 #endif
10017 },
10018 {
10019 AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL,
10020 #ifndef CAPSTONE_DIET
10021 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10022 #endif
10023 },
10024 {
10025 AArch64_SSHLv16i8, ARM64_INS_SSHL,
10026 #ifndef CAPSTONE_DIET
10027 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10028 #endif
10029 },
10030 {
10031 AArch64_SSHLv1i64, ARM64_INS_SSHL,
10032 #ifndef CAPSTONE_DIET
10033 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10034 #endif
10035 },
10036 {
10037 AArch64_SSHLv2i32, ARM64_INS_SSHL,
10038 #ifndef CAPSTONE_DIET
10039 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10040 #endif
10041 },
10042 {
10043 AArch64_SSHLv2i64, ARM64_INS_SSHL,
10044 #ifndef CAPSTONE_DIET
10045 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10046 #endif
10047 },
10048 {
10049 AArch64_SSHLv4i16, ARM64_INS_SSHL,
10050 #ifndef CAPSTONE_DIET
10051 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10052 #endif
10053 },
10054 {
10055 AArch64_SSHLv4i32, ARM64_INS_SSHL,
10056 #ifndef CAPSTONE_DIET
10057 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10058 #endif
10059 },
10060 {
10061 AArch64_SSHLv8i16, ARM64_INS_SSHL,
10062 #ifndef CAPSTONE_DIET
10063 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10064 #endif
10065 },
10066 {
10067 AArch64_SSHLv8i8, ARM64_INS_SSHL,
10068 #ifndef CAPSTONE_DIET
10069 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10070 #endif
10071 },
10072 {
10073 AArch64_SSHRd, ARM64_INS_SSHR,
10074 #ifndef CAPSTONE_DIET
10075 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10076 #endif
10077 },
10078 {
10079 AArch64_SSHRv16i8_shift, ARM64_INS_SSHR,
10080 #ifndef CAPSTONE_DIET
10081 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10082 #endif
10083 },
10084 {
10085 AArch64_SSHRv2i32_shift, ARM64_INS_SSHR,
10086 #ifndef CAPSTONE_DIET
10087 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10088 #endif
10089 },
10090 {
10091 AArch64_SSHRv2i64_shift, ARM64_INS_SSHR,
10092 #ifndef CAPSTONE_DIET
10093 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10094 #endif
10095 },
10096 {
10097 AArch64_SSHRv4i16_shift, ARM64_INS_SSHR,
10098 #ifndef CAPSTONE_DIET
10099 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10100 #endif
10101 },
10102 {
10103 AArch64_SSHRv4i32_shift, ARM64_INS_SSHR,
10104 #ifndef CAPSTONE_DIET
10105 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10106 #endif
10107 },
10108 {
10109 AArch64_SSHRv8i16_shift, ARM64_INS_SSHR,
10110 #ifndef CAPSTONE_DIET
10111 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10112 #endif
10113 },
10114 {
10115 AArch64_SSHRv8i8_shift, ARM64_INS_SSHR,
10116 #ifndef CAPSTONE_DIET
10117 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10118 #endif
10119 },
10120 {
10121 AArch64_SSRAd, ARM64_INS_SSRA,
10122 #ifndef CAPSTONE_DIET
10123 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10124 #endif
10125 },
10126 {
10127 AArch64_SSRAv16i8_shift, ARM64_INS_SSRA,
10128 #ifndef CAPSTONE_DIET
10129 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10130 #endif
10131 },
10132 {
10133 AArch64_SSRAv2i32_shift, ARM64_INS_SSRA,
10134 #ifndef CAPSTONE_DIET
10135 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10136 #endif
10137 },
10138 {
10139 AArch64_SSRAv2i64_shift, ARM64_INS_SSRA,
10140 #ifndef CAPSTONE_DIET
10141 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10142 #endif
10143 },
10144 {
10145 AArch64_SSRAv4i16_shift, ARM64_INS_SSRA,
10146 #ifndef CAPSTONE_DIET
10147 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10148 #endif
10149 },
10150 {
10151 AArch64_SSRAv4i32_shift, ARM64_INS_SSRA,
10152 #ifndef CAPSTONE_DIET
10153 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10154 #endif
10155 },
10156 {
10157 AArch64_SSRAv8i16_shift, ARM64_INS_SSRA,
10158 #ifndef CAPSTONE_DIET
10159 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10160 #endif
10161 },
10162 {
10163 AArch64_SSRAv8i8_shift, ARM64_INS_SSRA,
10164 #ifndef CAPSTONE_DIET
10165 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10166 #endif
10167 },
10168 {
10169 AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2,
10170 #ifndef CAPSTONE_DIET
10171 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10172 #endif
10173 },
10174 {
10175 AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL,
10176 #ifndef CAPSTONE_DIET
10177 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10178 #endif
10179 },
10180 {
10181 AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL,
10182 #ifndef CAPSTONE_DIET
10183 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10184 #endif
10185 },
10186 {
10187 AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2,
10188 #ifndef CAPSTONE_DIET
10189 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10190 #endif
10191 },
10192 {
10193 AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2,
10194 #ifndef CAPSTONE_DIET
10195 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10196 #endif
10197 },
10198 {
10199 AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL,
10200 #ifndef CAPSTONE_DIET
10201 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10202 #endif
10203 },
10204 {
10205 AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2,
10206 #ifndef CAPSTONE_DIET
10207 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10208 #endif
10209 },
10210 {
10211 AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW,
10212 #ifndef CAPSTONE_DIET
10213 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10214 #endif
10215 },
10216 {
10217 AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW,
10218 #ifndef CAPSTONE_DIET
10219 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10220 #endif
10221 },
10222 {
10223 AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2,
10224 #ifndef CAPSTONE_DIET
10225 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10226 #endif
10227 },
10228 {
10229 AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2,
10230 #ifndef CAPSTONE_DIET
10231 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10232 #endif
10233 },
10234 {
10235 AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW,
10236 #ifndef CAPSTONE_DIET
10237 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10238 #endif
10239 },
10240 {
10241 AArch64_ST1Fourv16b, ARM64_INS_ST1,
10242 #ifndef CAPSTONE_DIET
10243 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10244 #endif
10245 },
10246 {
10247 AArch64_ST1Fourv16b_POST, ARM64_INS_ST1,
10248 #ifndef CAPSTONE_DIET
10249 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10250 #endif
10251 },
10252 {
10253 AArch64_ST1Fourv1d, ARM64_INS_ST1,
10254 #ifndef CAPSTONE_DIET
10255 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10256 #endif
10257 },
10258 {
10259 AArch64_ST1Fourv1d_POST, ARM64_INS_ST1,
10260 #ifndef CAPSTONE_DIET
10261 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10262 #endif
10263 },
10264 {
10265 AArch64_ST1Fourv2d, ARM64_INS_ST1,
10266 #ifndef CAPSTONE_DIET
10267 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10268 #endif
10269 },
10270 {
10271 AArch64_ST1Fourv2d_POST, ARM64_INS_ST1,
10272 #ifndef CAPSTONE_DIET
10273 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10274 #endif
10275 },
10276 {
10277 AArch64_ST1Fourv2s, ARM64_INS_ST1,
10278 #ifndef CAPSTONE_DIET
10279 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10280 #endif
10281 },
10282 {
10283 AArch64_ST1Fourv2s_POST, ARM64_INS_ST1,
10284 #ifndef CAPSTONE_DIET
10285 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10286 #endif
10287 },
10288 {
10289 AArch64_ST1Fourv4h, ARM64_INS_ST1,
10290 #ifndef CAPSTONE_DIET
10291 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10292 #endif
10293 },
10294 {
10295 AArch64_ST1Fourv4h_POST, ARM64_INS_ST1,
10296 #ifndef CAPSTONE_DIET
10297 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10298 #endif
10299 },
10300 {
10301 AArch64_ST1Fourv4s, ARM64_INS_ST1,
10302 #ifndef CAPSTONE_DIET
10303 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10304 #endif
10305 },
10306 {
10307 AArch64_ST1Fourv4s_POST, ARM64_INS_ST1,
10308 #ifndef CAPSTONE_DIET
10309 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10310 #endif
10311 },
10312 {
10313 AArch64_ST1Fourv8b, ARM64_INS_ST1,
10314 #ifndef CAPSTONE_DIET
10315 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10316 #endif
10317 },
10318 {
10319 AArch64_ST1Fourv8b_POST, ARM64_INS_ST1,
10320 #ifndef CAPSTONE_DIET
10321 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10322 #endif
10323 },
10324 {
10325 AArch64_ST1Fourv8h, ARM64_INS_ST1,
10326 #ifndef CAPSTONE_DIET
10327 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10328 #endif
10329 },
10330 {
10331 AArch64_ST1Fourv8h_POST, ARM64_INS_ST1,
10332 #ifndef CAPSTONE_DIET
10333 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10334 #endif
10335 },
10336 {
10337 AArch64_ST1Onev16b, ARM64_INS_ST1,
10338 #ifndef CAPSTONE_DIET
10339 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10340 #endif
10341 },
10342 {
10343 AArch64_ST1Onev16b_POST, ARM64_INS_ST1,
10344 #ifndef CAPSTONE_DIET
10345 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10346 #endif
10347 },
10348 {
10349 AArch64_ST1Onev1d, ARM64_INS_ST1,
10350 #ifndef CAPSTONE_DIET
10351 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10352 #endif
10353 },
10354 {
10355 AArch64_ST1Onev1d_POST, ARM64_INS_ST1,
10356 #ifndef CAPSTONE_DIET
10357 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10358 #endif
10359 },
10360 {
10361 AArch64_ST1Onev2d, ARM64_INS_ST1,
10362 #ifndef CAPSTONE_DIET
10363 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10364 #endif
10365 },
10366 {
10367 AArch64_ST1Onev2d_POST, ARM64_INS_ST1,
10368 #ifndef CAPSTONE_DIET
10369 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10370 #endif
10371 },
10372 {
10373 AArch64_ST1Onev2s, ARM64_INS_ST1,
10374 #ifndef CAPSTONE_DIET
10375 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10376 #endif
10377 },
10378 {
10379 AArch64_ST1Onev2s_POST, ARM64_INS_ST1,
10380 #ifndef CAPSTONE_DIET
10381 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10382 #endif
10383 },
10384 {
10385 AArch64_ST1Onev4h, ARM64_INS_ST1,
10386 #ifndef CAPSTONE_DIET
10387 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10388 #endif
10389 },
10390 {
10391 AArch64_ST1Onev4h_POST, ARM64_INS_ST1,
10392 #ifndef CAPSTONE_DIET
10393 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10394 #endif
10395 },
10396 {
10397 AArch64_ST1Onev4s, ARM64_INS_ST1,
10398 #ifndef CAPSTONE_DIET
10399 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10400 #endif
10401 },
10402 {
10403 AArch64_ST1Onev4s_POST, ARM64_INS_ST1,
10404 #ifndef CAPSTONE_DIET
10405 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10406 #endif
10407 },
10408 {
10409 AArch64_ST1Onev8b, ARM64_INS_ST1,
10410 #ifndef CAPSTONE_DIET
10411 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10412 #endif
10413 },
10414 {
10415 AArch64_ST1Onev8b_POST, ARM64_INS_ST1,
10416 #ifndef CAPSTONE_DIET
10417 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10418 #endif
10419 },
10420 {
10421 AArch64_ST1Onev8h, ARM64_INS_ST1,
10422 #ifndef CAPSTONE_DIET
10423 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10424 #endif
10425 },
10426 {
10427 AArch64_ST1Onev8h_POST, ARM64_INS_ST1,
10428 #ifndef CAPSTONE_DIET
10429 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10430 #endif
10431 },
10432 {
10433 AArch64_ST1Threev16b, ARM64_INS_ST1,
10434 #ifndef CAPSTONE_DIET
10435 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10436 #endif
10437 },
10438 {
10439 AArch64_ST1Threev16b_POST, ARM64_INS_ST1,
10440 #ifndef CAPSTONE_DIET
10441 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10442 #endif
10443 },
10444 {
10445 AArch64_ST1Threev1d, ARM64_INS_ST1,
10446 #ifndef CAPSTONE_DIET
10447 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10448 #endif
10449 },
10450 {
10451 AArch64_ST1Threev1d_POST, ARM64_INS_ST1,
10452 #ifndef CAPSTONE_DIET
10453 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10454 #endif
10455 },
10456 {
10457 AArch64_ST1Threev2d, ARM64_INS_ST1,
10458 #ifndef CAPSTONE_DIET
10459 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10460 #endif
10461 },
10462 {
10463 AArch64_ST1Threev2d_POST, ARM64_INS_ST1,
10464 #ifndef CAPSTONE_DIET
10465 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10466 #endif
10467 },
10468 {
10469 AArch64_ST1Threev2s, ARM64_INS_ST1,
10470 #ifndef CAPSTONE_DIET
10471 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10472 #endif
10473 },
10474 {
10475 AArch64_ST1Threev2s_POST, ARM64_INS_ST1,
10476 #ifndef CAPSTONE_DIET
10477 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10478 #endif
10479 },
10480 {
10481 AArch64_ST1Threev4h, ARM64_INS_ST1,
10482 #ifndef CAPSTONE_DIET
10483 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10484 #endif
10485 },
10486 {
10487 AArch64_ST1Threev4h_POST, ARM64_INS_ST1,
10488 #ifndef CAPSTONE_DIET
10489 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10490 #endif
10491 },
10492 {
10493 AArch64_ST1Threev4s, ARM64_INS_ST1,
10494 #ifndef CAPSTONE_DIET
10495 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10496 #endif
10497 },
10498 {
10499 AArch64_ST1Threev4s_POST, ARM64_INS_ST1,
10500 #ifndef CAPSTONE_DIET
10501 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10502 #endif
10503 },
10504 {
10505 AArch64_ST1Threev8b, ARM64_INS_ST1,
10506 #ifndef CAPSTONE_DIET
10507 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10508 #endif
10509 },
10510 {
10511 AArch64_ST1Threev8b_POST, ARM64_INS_ST1,
10512 #ifndef CAPSTONE_DIET
10513 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10514 #endif
10515 },
10516 {
10517 AArch64_ST1Threev8h, ARM64_INS_ST1,
10518 #ifndef CAPSTONE_DIET
10519 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10520 #endif
10521 },
10522 {
10523 AArch64_ST1Threev8h_POST, ARM64_INS_ST1,
10524 #ifndef CAPSTONE_DIET
10525 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10526 #endif
10527 },
10528 {
10529 AArch64_ST1Twov16b, ARM64_INS_ST1,
10530 #ifndef CAPSTONE_DIET
10531 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10532 #endif
10533 },
10534 {
10535 AArch64_ST1Twov16b_POST, ARM64_INS_ST1,
10536 #ifndef CAPSTONE_DIET
10537 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10538 #endif
10539 },
10540 {
10541 AArch64_ST1Twov1d, ARM64_INS_ST1,
10542 #ifndef CAPSTONE_DIET
10543 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10544 #endif
10545 },
10546 {
10547 AArch64_ST1Twov1d_POST, ARM64_INS_ST1,
10548 #ifndef CAPSTONE_DIET
10549 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10550 #endif
10551 },
10552 {
10553 AArch64_ST1Twov2d, ARM64_INS_ST1,
10554 #ifndef CAPSTONE_DIET
10555 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10556 #endif
10557 },
10558 {
10559 AArch64_ST1Twov2d_POST, ARM64_INS_ST1,
10560 #ifndef CAPSTONE_DIET
10561 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10562 #endif
10563 },
10564 {
10565 AArch64_ST1Twov2s, ARM64_INS_ST1,
10566 #ifndef CAPSTONE_DIET
10567 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10568 #endif
10569 },
10570 {
10571 AArch64_ST1Twov2s_POST, ARM64_INS_ST1,
10572 #ifndef CAPSTONE_DIET
10573 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10574 #endif
10575 },
10576 {
10577 AArch64_ST1Twov4h, ARM64_INS_ST1,
10578 #ifndef CAPSTONE_DIET
10579 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10580 #endif
10581 },
10582 {
10583 AArch64_ST1Twov4h_POST, ARM64_INS_ST1,
10584 #ifndef CAPSTONE_DIET
10585 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10586 #endif
10587 },
10588 {
10589 AArch64_ST1Twov4s, ARM64_INS_ST1,
10590 #ifndef CAPSTONE_DIET
10591 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10592 #endif
10593 },
10594 {
10595 AArch64_ST1Twov4s_POST, ARM64_INS_ST1,
10596 #ifndef CAPSTONE_DIET
10597 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10598 #endif
10599 },
10600 {
10601 AArch64_ST1Twov8b, ARM64_INS_ST1,
10602 #ifndef CAPSTONE_DIET
10603 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10604 #endif
10605 },
10606 {
10607 AArch64_ST1Twov8b_POST, ARM64_INS_ST1,
10608 #ifndef CAPSTONE_DIET
10609 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10610 #endif
10611 },
10612 {
10613 AArch64_ST1Twov8h, ARM64_INS_ST1,
10614 #ifndef CAPSTONE_DIET
10615 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10616 #endif
10617 },
10618 {
10619 AArch64_ST1Twov8h_POST, ARM64_INS_ST1,
10620 #ifndef CAPSTONE_DIET
10621 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10622 #endif
10623 },
10624 {
10625 AArch64_ST1i16, ARM64_INS_ST1,
10626 #ifndef CAPSTONE_DIET
10627 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10628 #endif
10629 },
10630 {
10631 AArch64_ST1i16_POST, ARM64_INS_ST1,
10632 #ifndef CAPSTONE_DIET
10633 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10634 #endif
10635 },
10636 {
10637 AArch64_ST1i32, ARM64_INS_ST1,
10638 #ifndef CAPSTONE_DIET
10639 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10640 #endif
10641 },
10642 {
10643 AArch64_ST1i32_POST, ARM64_INS_ST1,
10644 #ifndef CAPSTONE_DIET
10645 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10646 #endif
10647 },
10648 {
10649 AArch64_ST1i64, ARM64_INS_ST1,
10650 #ifndef CAPSTONE_DIET
10651 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10652 #endif
10653 },
10654 {
10655 AArch64_ST1i64_POST, ARM64_INS_ST1,
10656 #ifndef CAPSTONE_DIET
10657 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10658 #endif
10659 },
10660 {
10661 AArch64_ST1i8, ARM64_INS_ST1,
10662 #ifndef CAPSTONE_DIET
10663 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10664 #endif
10665 },
10666 {
10667 AArch64_ST1i8_POST, ARM64_INS_ST1,
10668 #ifndef CAPSTONE_DIET
10669 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10670 #endif
10671 },
10672 {
10673 AArch64_ST2Twov16b, ARM64_INS_ST2,
10674 #ifndef CAPSTONE_DIET
10675 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10676 #endif
10677 },
10678 {
10679 AArch64_ST2Twov16b_POST, ARM64_INS_ST2,
10680 #ifndef CAPSTONE_DIET
10681 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10682 #endif
10683 },
10684 {
10685 AArch64_ST2Twov2d, ARM64_INS_ST2,
10686 #ifndef CAPSTONE_DIET
10687 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10688 #endif
10689 },
10690 {
10691 AArch64_ST2Twov2d_POST, ARM64_INS_ST2,
10692 #ifndef CAPSTONE_DIET
10693 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10694 #endif
10695 },
10696 {
10697 AArch64_ST2Twov2s, ARM64_INS_ST2,
10698 #ifndef CAPSTONE_DIET
10699 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10700 #endif
10701 },
10702 {
10703 AArch64_ST2Twov2s_POST, ARM64_INS_ST2,
10704 #ifndef CAPSTONE_DIET
10705 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10706 #endif
10707 },
10708 {
10709 AArch64_ST2Twov4h, ARM64_INS_ST2,
10710 #ifndef CAPSTONE_DIET
10711 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10712 #endif
10713 },
10714 {
10715 AArch64_ST2Twov4h_POST, ARM64_INS_ST2,
10716 #ifndef CAPSTONE_DIET
10717 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10718 #endif
10719 },
10720 {
10721 AArch64_ST2Twov4s, ARM64_INS_ST2,
10722 #ifndef CAPSTONE_DIET
10723 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10724 #endif
10725 },
10726 {
10727 AArch64_ST2Twov4s_POST, ARM64_INS_ST2,
10728 #ifndef CAPSTONE_DIET
10729 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10730 #endif
10731 },
10732 {
10733 AArch64_ST2Twov8b, ARM64_INS_ST2,
10734 #ifndef CAPSTONE_DIET
10735 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10736 #endif
10737 },
10738 {
10739 AArch64_ST2Twov8b_POST, ARM64_INS_ST2,
10740 #ifndef CAPSTONE_DIET
10741 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10742 #endif
10743 },
10744 {
10745 AArch64_ST2Twov8h, ARM64_INS_ST2,
10746 #ifndef CAPSTONE_DIET
10747 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10748 #endif
10749 },
10750 {
10751 AArch64_ST2Twov8h_POST, ARM64_INS_ST2,
10752 #ifndef CAPSTONE_DIET
10753 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10754 #endif
10755 },
10756 {
10757 AArch64_ST2i16, ARM64_INS_ST2,
10758 #ifndef CAPSTONE_DIET
10759 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10760 #endif
10761 },
10762 {
10763 AArch64_ST2i16_POST, ARM64_INS_ST2,
10764 #ifndef CAPSTONE_DIET
10765 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10766 #endif
10767 },
10768 {
10769 AArch64_ST2i32, ARM64_INS_ST2,
10770 #ifndef CAPSTONE_DIET
10771 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10772 #endif
10773 },
10774 {
10775 AArch64_ST2i32_POST, ARM64_INS_ST2,
10776 #ifndef CAPSTONE_DIET
10777 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10778 #endif
10779 },
10780 {
10781 AArch64_ST2i64, ARM64_INS_ST2,
10782 #ifndef CAPSTONE_DIET
10783 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10784 #endif
10785 },
10786 {
10787 AArch64_ST2i64_POST, ARM64_INS_ST2,
10788 #ifndef CAPSTONE_DIET
10789 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10790 #endif
10791 },
10792 {
10793 AArch64_ST2i8, ARM64_INS_ST2,
10794 #ifndef CAPSTONE_DIET
10795 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10796 #endif
10797 },
10798 {
10799 AArch64_ST2i8_POST, ARM64_INS_ST2,
10800 #ifndef CAPSTONE_DIET
10801 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10802 #endif
10803 },
10804 {
10805 AArch64_ST3Threev16b, ARM64_INS_ST3,
10806 #ifndef CAPSTONE_DIET
10807 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10808 #endif
10809 },
10810 {
10811 AArch64_ST3Threev16b_POST, ARM64_INS_ST3,
10812 #ifndef CAPSTONE_DIET
10813 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10814 #endif
10815 },
10816 {
10817 AArch64_ST3Threev2d, ARM64_INS_ST3,
10818 #ifndef CAPSTONE_DIET
10819 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10820 #endif
10821 },
10822 {
10823 AArch64_ST3Threev2d_POST, ARM64_INS_ST3,
10824 #ifndef CAPSTONE_DIET
10825 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10826 #endif
10827 },
10828 {
10829 AArch64_ST3Threev2s, ARM64_INS_ST3,
10830 #ifndef CAPSTONE_DIET
10831 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10832 #endif
10833 },
10834 {
10835 AArch64_ST3Threev2s_POST, ARM64_INS_ST3,
10836 #ifndef CAPSTONE_DIET
10837 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10838 #endif
10839 },
10840 {
10841 AArch64_ST3Threev4h, ARM64_INS_ST3,
10842 #ifndef CAPSTONE_DIET
10843 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10844 #endif
10845 },
10846 {
10847 AArch64_ST3Threev4h_POST, ARM64_INS_ST3,
10848 #ifndef CAPSTONE_DIET
10849 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10850 #endif
10851 },
10852 {
10853 AArch64_ST3Threev4s, ARM64_INS_ST3,
10854 #ifndef CAPSTONE_DIET
10855 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10856 #endif
10857 },
10858 {
10859 AArch64_ST3Threev4s_POST, ARM64_INS_ST3,
10860 #ifndef CAPSTONE_DIET
10861 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10862 #endif
10863 },
10864 {
10865 AArch64_ST3Threev8b, ARM64_INS_ST3,
10866 #ifndef CAPSTONE_DIET
10867 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10868 #endif
10869 },
10870 {
10871 AArch64_ST3Threev8b_POST, ARM64_INS_ST3,
10872 #ifndef CAPSTONE_DIET
10873 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10874 #endif
10875 },
10876 {
10877 AArch64_ST3Threev8h, ARM64_INS_ST3,
10878 #ifndef CAPSTONE_DIET
10879 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10880 #endif
10881 },
10882 {
10883 AArch64_ST3Threev8h_POST, ARM64_INS_ST3,
10884 #ifndef CAPSTONE_DIET
10885 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10886 #endif
10887 },
10888 {
10889 AArch64_ST3i16, ARM64_INS_ST3,
10890 #ifndef CAPSTONE_DIET
10891 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10892 #endif
10893 },
10894 {
10895 AArch64_ST3i16_POST, ARM64_INS_ST3,
10896 #ifndef CAPSTONE_DIET
10897 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10898 #endif
10899 },
10900 {
10901 AArch64_ST3i32, ARM64_INS_ST3,
10902 #ifndef CAPSTONE_DIET
10903 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10904 #endif
10905 },
10906 {
10907 AArch64_ST3i32_POST, ARM64_INS_ST3,
10908 #ifndef CAPSTONE_DIET
10909 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10910 #endif
10911 },
10912 {
10913 AArch64_ST3i64, ARM64_INS_ST3,
10914 #ifndef CAPSTONE_DIET
10915 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10916 #endif
10917 },
10918 {
10919 AArch64_ST3i64_POST, ARM64_INS_ST3,
10920 #ifndef CAPSTONE_DIET
10921 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10922 #endif
10923 },
10924 {
10925 AArch64_ST3i8, ARM64_INS_ST3,
10926 #ifndef CAPSTONE_DIET
10927 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10928 #endif
10929 },
10930 {
10931 AArch64_ST3i8_POST, ARM64_INS_ST3,
10932 #ifndef CAPSTONE_DIET
10933 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10934 #endif
10935 },
10936 {
10937 AArch64_ST4Fourv16b, ARM64_INS_ST4,
10938 #ifndef CAPSTONE_DIET
10939 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10940 #endif
10941 },
10942 {
10943 AArch64_ST4Fourv16b_POST, ARM64_INS_ST4,
10944 #ifndef CAPSTONE_DIET
10945 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10946 #endif
10947 },
10948 {
10949 AArch64_ST4Fourv2d, ARM64_INS_ST4,
10950 #ifndef CAPSTONE_DIET
10951 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10952 #endif
10953 },
10954 {
10955 AArch64_ST4Fourv2d_POST, ARM64_INS_ST4,
10956 #ifndef CAPSTONE_DIET
10957 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10958 #endif
10959 },
10960 {
10961 AArch64_ST4Fourv2s, ARM64_INS_ST4,
10962 #ifndef CAPSTONE_DIET
10963 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10964 #endif
10965 },
10966 {
10967 AArch64_ST4Fourv2s_POST, ARM64_INS_ST4,
10968 #ifndef CAPSTONE_DIET
10969 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10970 #endif
10971 },
10972 {
10973 AArch64_ST4Fourv4h, ARM64_INS_ST4,
10974 #ifndef CAPSTONE_DIET
10975 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10976 #endif
10977 },
10978 {
10979 AArch64_ST4Fourv4h_POST, ARM64_INS_ST4,
10980 #ifndef CAPSTONE_DIET
10981 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10982 #endif
10983 },
10984 {
10985 AArch64_ST4Fourv4s, ARM64_INS_ST4,
10986 #ifndef CAPSTONE_DIET
10987 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10988 #endif
10989 },
10990 {
10991 AArch64_ST4Fourv4s_POST, ARM64_INS_ST4,
10992 #ifndef CAPSTONE_DIET
10993 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
10994 #endif
10995 },
10996 {
10997 AArch64_ST4Fourv8b, ARM64_INS_ST4,
10998 #ifndef CAPSTONE_DIET
10999 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11000 #endif
11001 },
11002 {
11003 AArch64_ST4Fourv8b_POST, ARM64_INS_ST4,
11004 #ifndef CAPSTONE_DIET
11005 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11006 #endif
11007 },
11008 {
11009 AArch64_ST4Fourv8h, ARM64_INS_ST4,
11010 #ifndef CAPSTONE_DIET
11011 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11012 #endif
11013 },
11014 {
11015 AArch64_ST4Fourv8h_POST, ARM64_INS_ST4,
11016 #ifndef CAPSTONE_DIET
11017 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11018 #endif
11019 },
11020 {
11021 AArch64_ST4i16, ARM64_INS_ST4,
11022 #ifndef CAPSTONE_DIET
11023 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11024 #endif
11025 },
11026 {
11027 AArch64_ST4i16_POST, ARM64_INS_ST4,
11028 #ifndef CAPSTONE_DIET
11029 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11030 #endif
11031 },
11032 {
11033 AArch64_ST4i32, ARM64_INS_ST4,
11034 #ifndef CAPSTONE_DIET
11035 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11036 #endif
11037 },
11038 {
11039 AArch64_ST4i32_POST, ARM64_INS_ST4,
11040 #ifndef CAPSTONE_DIET
11041 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11042 #endif
11043 },
11044 {
11045 AArch64_ST4i64, ARM64_INS_ST4,
11046 #ifndef CAPSTONE_DIET
11047 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11048 #endif
11049 },
11050 {
11051 AArch64_ST4i64_POST, ARM64_INS_ST4,
11052 #ifndef CAPSTONE_DIET
11053 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11054 #endif
11055 },
11056 {
11057 AArch64_ST4i8, ARM64_INS_ST4,
11058 #ifndef CAPSTONE_DIET
11059 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11060 #endif
11061 },
11062 {
11063 AArch64_ST4i8_POST, ARM64_INS_ST4,
11064 #ifndef CAPSTONE_DIET
11065 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11066 #endif
11067 },
11068 {
11069 AArch64_STLRB, ARM64_INS_STLRB,
11070 #ifndef CAPSTONE_DIET
11071 { 0 }, { 0 }, { 0 }, 0, 0
11072 #endif
11073 },
11074 {
11075 AArch64_STLRH, ARM64_INS_STLRH,
11076 #ifndef CAPSTONE_DIET
11077 { 0 }, { 0 }, { 0 }, 0, 0
11078 #endif
11079 },
11080 {
11081 AArch64_STLRW, ARM64_INS_STLR,
11082 #ifndef CAPSTONE_DIET
11083 { 0 }, { 0 }, { 0 }, 0, 0
11084 #endif
11085 },
11086 {
11087 AArch64_STLRX, ARM64_INS_STLR,
11088 #ifndef CAPSTONE_DIET
11089 { 0 }, { 0 }, { 0 }, 0, 0
11090 #endif
11091 },
11092 {
11093 AArch64_STLXPW, ARM64_INS_STLXP,
11094 #ifndef CAPSTONE_DIET
11095 { 0 }, { 0 }, { 0 }, 0, 0
11096 #endif
11097 },
11098 {
11099 AArch64_STLXPX, ARM64_INS_STLXP,
11100 #ifndef CAPSTONE_DIET
11101 { 0 }, { 0 }, { 0 }, 0, 0
11102 #endif
11103 },
11104 {
11105 AArch64_STLXRB, ARM64_INS_STLXRB,
11106 #ifndef CAPSTONE_DIET
11107 { 0 }, { 0 }, { 0 }, 0, 0
11108 #endif
11109 },
11110 {
11111 AArch64_STLXRH, ARM64_INS_STLXRH,
11112 #ifndef CAPSTONE_DIET
11113 { 0 }, { 0 }, { 0 }, 0, 0
11114 #endif
11115 },
11116 {
11117 AArch64_STLXRW, ARM64_INS_STLXR,
11118 #ifndef CAPSTONE_DIET
11119 { 0 }, { 0 }, { 0 }, 0, 0
11120 #endif
11121 },
11122 {
11123 AArch64_STLXRX, ARM64_INS_STLXR,
11124 #ifndef CAPSTONE_DIET
11125 { 0 }, { 0 }, { 0 }, 0, 0
11126 #endif
11127 },
11128 {
11129 AArch64_STNPDi, ARM64_INS_STNP,
11130 #ifndef CAPSTONE_DIET
11131 { 0 }, { 0 }, { 0 }, 0, 0
11132 #endif
11133 },
11134 {
11135 AArch64_STNPQi, ARM64_INS_STNP,
11136 #ifndef CAPSTONE_DIET
11137 { 0 }, { 0 }, { 0 }, 0, 0
11138 #endif
11139 },
11140 {
11141 AArch64_STNPSi, ARM64_INS_STNP,
11142 #ifndef CAPSTONE_DIET
11143 { 0 }, { 0 }, { 0 }, 0, 0
11144 #endif
11145 },
11146 {
11147 AArch64_STNPWi, ARM64_INS_STNP,
11148 #ifndef CAPSTONE_DIET
11149 { 0 }, { 0 }, { 0 }, 0, 0
11150 #endif
11151 },
11152 {
11153 AArch64_STNPXi, ARM64_INS_STNP,
11154 #ifndef CAPSTONE_DIET
11155 { 0 }, { 0 }, { 0 }, 0, 0
11156 #endif
11157 },
11158 {
11159 AArch64_STPDi, ARM64_INS_STP,
11160 #ifndef CAPSTONE_DIET
11161 { 0 }, { 0 }, { 0 }, 0, 0
11162 #endif
11163 },
11164 {
11165 AArch64_STPDpost, ARM64_INS_STP,
11166 #ifndef CAPSTONE_DIET
11167 { 0 }, { 0 }, { 0 }, 0, 0
11168 #endif
11169 },
11170 {
11171 AArch64_STPDpre, ARM64_INS_STP,
11172 #ifndef CAPSTONE_DIET
11173 { 0 }, { 0 }, { 0 }, 0, 0
11174 #endif
11175 },
11176 {
11177 AArch64_STPQi, ARM64_INS_STP,
11178 #ifndef CAPSTONE_DIET
11179 { 0 }, { 0 }, { 0 }, 0, 0
11180 #endif
11181 },
11182 {
11183 AArch64_STPQpost, ARM64_INS_STP,
11184 #ifndef CAPSTONE_DIET
11185 { 0 }, { 0 }, { 0 }, 0, 0
11186 #endif
11187 },
11188 {
11189 AArch64_STPQpre, ARM64_INS_STP,
11190 #ifndef CAPSTONE_DIET
11191 { 0 }, { 0 }, { 0 }, 0, 0
11192 #endif
11193 },
11194 {
11195 AArch64_STPSi, ARM64_INS_STP,
11196 #ifndef CAPSTONE_DIET
11197 { 0 }, { 0 }, { 0 }, 0, 0
11198 #endif
11199 },
11200 {
11201 AArch64_STPSpost, ARM64_INS_STP,
11202 #ifndef CAPSTONE_DIET
11203 { 0 }, { 0 }, { 0 }, 0, 0
11204 #endif
11205 },
11206 {
11207 AArch64_STPSpre, ARM64_INS_STP,
11208 #ifndef CAPSTONE_DIET
11209 { 0 }, { 0 }, { 0 }, 0, 0
11210 #endif
11211 },
11212 {
11213 AArch64_STPWi, ARM64_INS_STP,
11214 #ifndef CAPSTONE_DIET
11215 { 0 }, { 0 }, { 0 }, 0, 0
11216 #endif
11217 },
11218 {
11219 AArch64_STPWpost, ARM64_INS_STP,
11220 #ifndef CAPSTONE_DIET
11221 { 0 }, { 0 }, { 0 }, 0, 0
11222 #endif
11223 },
11224 {
11225 AArch64_STPWpre, ARM64_INS_STP,
11226 #ifndef CAPSTONE_DIET
11227 { 0 }, { 0 }, { 0 }, 0, 0
11228 #endif
11229 },
11230 {
11231 AArch64_STPXi, ARM64_INS_STP,
11232 #ifndef CAPSTONE_DIET
11233 { 0 }, { 0 }, { 0 }, 0, 0
11234 #endif
11235 },
11236 {
11237 AArch64_STPXpost, ARM64_INS_STP,
11238 #ifndef CAPSTONE_DIET
11239 { 0 }, { 0 }, { 0 }, 0, 0
11240 #endif
11241 },
11242 {
11243 AArch64_STPXpre, ARM64_INS_STP,
11244 #ifndef CAPSTONE_DIET
11245 { 0 }, { 0 }, { 0 }, 0, 0
11246 #endif
11247 },
11248 {
11249 AArch64_STRBBpost, ARM64_INS_STRB,
11250 #ifndef CAPSTONE_DIET
11251 { 0 }, { 0 }, { 0 }, 0, 0
11252 #endif
11253 },
11254 {
11255 AArch64_STRBBpre, ARM64_INS_STRB,
11256 #ifndef CAPSTONE_DIET
11257 { 0 }, { 0 }, { 0 }, 0, 0
11258 #endif
11259 },
11260 {
11261 AArch64_STRBBroW, ARM64_INS_STRB,
11262 #ifndef CAPSTONE_DIET
11263 { 0 }, { 0 }, { 0 }, 0, 0
11264 #endif
11265 },
11266 {
11267 AArch64_STRBBroX, ARM64_INS_STRB,
11268 #ifndef CAPSTONE_DIET
11269 { 0 }, { 0 }, { 0 }, 0, 0
11270 #endif
11271 },
11272 {
11273 AArch64_STRBBui, ARM64_INS_STRB,
11274 #ifndef CAPSTONE_DIET
11275 { 0 }, { 0 }, { 0 }, 0, 0
11276 #endif
11277 },
11278 {
11279 AArch64_STRBpost, ARM64_INS_STR,
11280 #ifndef CAPSTONE_DIET
11281 { 0 }, { 0 }, { 0 }, 0, 0
11282 #endif
11283 },
11284 {
11285 AArch64_STRBpre, ARM64_INS_STR,
11286 #ifndef CAPSTONE_DIET
11287 { 0 }, { 0 }, { 0 }, 0, 0
11288 #endif
11289 },
11290 {
11291 AArch64_STRBroW, ARM64_INS_STR,
11292 #ifndef CAPSTONE_DIET
11293 { 0 }, { 0 }, { 0 }, 0, 0
11294 #endif
11295 },
11296 {
11297 AArch64_STRBroX, ARM64_INS_STR,
11298 #ifndef CAPSTONE_DIET
11299 { 0 }, { 0 }, { 0 }, 0, 0
11300 #endif
11301 },
11302 {
11303 AArch64_STRBui, ARM64_INS_STR,
11304 #ifndef CAPSTONE_DIET
11305 { 0 }, { 0 }, { 0 }, 0, 0
11306 #endif
11307 },
11308 {
11309 AArch64_STRDpost, ARM64_INS_STR,
11310 #ifndef CAPSTONE_DIET
11311 { 0 }, { 0 }, { 0 }, 0, 0
11312 #endif
11313 },
11314 {
11315 AArch64_STRDpre, ARM64_INS_STR,
11316 #ifndef CAPSTONE_DIET
11317 { 0 }, { 0 }, { 0 }, 0, 0
11318 #endif
11319 },
11320 {
11321 AArch64_STRDroW, ARM64_INS_STR,
11322 #ifndef CAPSTONE_DIET
11323 { 0 }, { 0 }, { 0 }, 0, 0
11324 #endif
11325 },
11326 {
11327 AArch64_STRDroX, ARM64_INS_STR,
11328 #ifndef CAPSTONE_DIET
11329 { 0 }, { 0 }, { 0 }, 0, 0
11330 #endif
11331 },
11332 {
11333 AArch64_STRDui, ARM64_INS_STR,
11334 #ifndef CAPSTONE_DIET
11335 { 0 }, { 0 }, { 0 }, 0, 0
11336 #endif
11337 },
11338 {
11339 AArch64_STRHHpost, ARM64_INS_STRH,
11340 #ifndef CAPSTONE_DIET
11341 { 0 }, { 0 }, { 0 }, 0, 0
11342 #endif
11343 },
11344 {
11345 AArch64_STRHHpre, ARM64_INS_STRH,
11346 #ifndef CAPSTONE_DIET
11347 { 0 }, { 0 }, { 0 }, 0, 0
11348 #endif
11349 },
11350 {
11351 AArch64_STRHHroW, ARM64_INS_STRH,
11352 #ifndef CAPSTONE_DIET
11353 { 0 }, { 0 }, { 0 }, 0, 0
11354 #endif
11355 },
11356 {
11357 AArch64_STRHHroX, ARM64_INS_STRH,
11358 #ifndef CAPSTONE_DIET
11359 { 0 }, { 0 }, { 0 }, 0, 0
11360 #endif
11361 },
11362 {
11363 AArch64_STRHHui, ARM64_INS_STRH,
11364 #ifndef CAPSTONE_DIET
11365 { 0 }, { 0 }, { 0 }, 0, 0
11366 #endif
11367 },
11368 {
11369 AArch64_STRHpost, ARM64_INS_STR,
11370 #ifndef CAPSTONE_DIET
11371 { 0 }, { 0 }, { 0 }, 0, 0
11372 #endif
11373 },
11374 {
11375 AArch64_STRHpre, ARM64_INS_STR,
11376 #ifndef CAPSTONE_DIET
11377 { 0 }, { 0 }, { 0 }, 0, 0
11378 #endif
11379 },
11380 {
11381 AArch64_STRHroW, ARM64_INS_STR,
11382 #ifndef CAPSTONE_DIET
11383 { 0 }, { 0 }, { 0 }, 0, 0
11384 #endif
11385 },
11386 {
11387 AArch64_STRHroX, ARM64_INS_STR,
11388 #ifndef CAPSTONE_DIET
11389 { 0 }, { 0 }, { 0 }, 0, 0
11390 #endif
11391 },
11392 {
11393 AArch64_STRHui, ARM64_INS_STR,
11394 #ifndef CAPSTONE_DIET
11395 { 0 }, { 0 }, { 0 }, 0, 0
11396 #endif
11397 },
11398 {
11399 AArch64_STRQpost, ARM64_INS_STR,
11400 #ifndef CAPSTONE_DIET
11401 { 0 }, { 0 }, { 0 }, 0, 0
11402 #endif
11403 },
11404 {
11405 AArch64_STRQpre, ARM64_INS_STR,
11406 #ifndef CAPSTONE_DIET
11407 { 0 }, { 0 }, { 0 }, 0, 0
11408 #endif
11409 },
11410 {
11411 AArch64_STRQroW, ARM64_INS_STR,
11412 #ifndef CAPSTONE_DIET
11413 { 0 }, { 0 }, { 0 }, 0, 0
11414 #endif
11415 },
11416 {
11417 AArch64_STRQroX, ARM64_INS_STR,
11418 #ifndef CAPSTONE_DIET
11419 { 0 }, { 0 }, { 0 }, 0, 0
11420 #endif
11421 },
11422 {
11423 AArch64_STRQui, ARM64_INS_STR,
11424 #ifndef CAPSTONE_DIET
11425 { 0 }, { 0 }, { 0 }, 0, 0
11426 #endif
11427 },
11428 {
11429 AArch64_STRSpost, ARM64_INS_STR,
11430 #ifndef CAPSTONE_DIET
11431 { 0 }, { 0 }, { 0 }, 0, 0
11432 #endif
11433 },
11434 {
11435 AArch64_STRSpre, ARM64_INS_STR,
11436 #ifndef CAPSTONE_DIET
11437 { 0 }, { 0 }, { 0 }, 0, 0
11438 #endif
11439 },
11440 {
11441 AArch64_STRSroW, ARM64_INS_STR,
11442 #ifndef CAPSTONE_DIET
11443 { 0 }, { 0 }, { 0 }, 0, 0
11444 #endif
11445 },
11446 {
11447 AArch64_STRSroX, ARM64_INS_STR,
11448 #ifndef CAPSTONE_DIET
11449 { 0 }, { 0 }, { 0 }, 0, 0
11450 #endif
11451 },
11452 {
11453 AArch64_STRSui, ARM64_INS_STR,
11454 #ifndef CAPSTONE_DIET
11455 { 0 }, { 0 }, { 0 }, 0, 0
11456 #endif
11457 },
11458 {
11459 AArch64_STRWpost, ARM64_INS_STR,
11460 #ifndef CAPSTONE_DIET
11461 { 0 }, { 0 }, { 0 }, 0, 0
11462 #endif
11463 },
11464 {
11465 AArch64_STRWpre, ARM64_INS_STR,
11466 #ifndef CAPSTONE_DIET
11467 { 0 }, { 0 }, { 0 }, 0, 0
11468 #endif
11469 },
11470 {
11471 AArch64_STRWroW, ARM64_INS_STR,
11472 #ifndef CAPSTONE_DIET
11473 { 0 }, { 0 }, { 0 }, 0, 0
11474 #endif
11475 },
11476 {
11477 AArch64_STRWroX, ARM64_INS_STR,
11478 #ifndef CAPSTONE_DIET
11479 { 0 }, { 0 }, { 0 }, 0, 0
11480 #endif
11481 },
11482 {
11483 AArch64_STRWui, ARM64_INS_STR,
11484 #ifndef CAPSTONE_DIET
11485 { 0 }, { 0 }, { 0 }, 0, 0
11486 #endif
11487 },
11488 {
11489 AArch64_STRXpost, ARM64_INS_STR,
11490 #ifndef CAPSTONE_DIET
11491 { 0 }, { 0 }, { 0 }, 0, 0
11492 #endif
11493 },
11494 {
11495 AArch64_STRXpre, ARM64_INS_STR,
11496 #ifndef CAPSTONE_DIET
11497 { 0 }, { 0 }, { 0 }, 0, 0
11498 #endif
11499 },
11500 {
11501 AArch64_STRXroW, ARM64_INS_STR,
11502 #ifndef CAPSTONE_DIET
11503 { 0 }, { 0 }, { 0 }, 0, 0
11504 #endif
11505 },
11506 {
11507 AArch64_STRXroX, ARM64_INS_STR,
11508 #ifndef CAPSTONE_DIET
11509 { 0 }, { 0 }, { 0 }, 0, 0
11510 #endif
11511 },
11512 {
11513 AArch64_STRXui, ARM64_INS_STR,
11514 #ifndef CAPSTONE_DIET
11515 { 0 }, { 0 }, { 0 }, 0, 0
11516 #endif
11517 },
11518 {
11519 AArch64_STTRBi, ARM64_INS_STTRB,
11520 #ifndef CAPSTONE_DIET
11521 { 0 }, { 0 }, { 0 }, 0, 0
11522 #endif
11523 },
11524 {
11525 AArch64_STTRHi, ARM64_INS_STTRH,
11526 #ifndef CAPSTONE_DIET
11527 { 0 }, { 0 }, { 0 }, 0, 0
11528 #endif
11529 },
11530 {
11531 AArch64_STTRWi, ARM64_INS_STTR,
11532 #ifndef CAPSTONE_DIET
11533 { 0 }, { 0 }, { 0 }, 0, 0
11534 #endif
11535 },
11536 {
11537 AArch64_STTRXi, ARM64_INS_STTR,
11538 #ifndef CAPSTONE_DIET
11539 { 0 }, { 0 }, { 0 }, 0, 0
11540 #endif
11541 },
11542 {
11543 AArch64_STURBBi, ARM64_INS_STURB,
11544 #ifndef CAPSTONE_DIET
11545 { 0 }, { 0 }, { 0 }, 0, 0
11546 #endif
11547 },
11548 {
11549 AArch64_STURBi, ARM64_INS_STUR,
11550 #ifndef CAPSTONE_DIET
11551 { 0 }, { 0 }, { 0 }, 0, 0
11552 #endif
11553 },
11554 {
11555 AArch64_STURDi, ARM64_INS_STUR,
11556 #ifndef CAPSTONE_DIET
11557 { 0 }, { 0 }, { 0 }, 0, 0
11558 #endif
11559 },
11560 {
11561 AArch64_STURHHi, ARM64_INS_STURH,
11562 #ifndef CAPSTONE_DIET
11563 { 0 }, { 0 }, { 0 }, 0, 0
11564 #endif
11565 },
11566 {
11567 AArch64_STURHi, ARM64_INS_STUR,
11568 #ifndef CAPSTONE_DIET
11569 { 0 }, { 0 }, { 0 }, 0, 0
11570 #endif
11571 },
11572 {
11573 AArch64_STURQi, ARM64_INS_STUR,
11574 #ifndef CAPSTONE_DIET
11575 { 0 }, { 0 }, { 0 }, 0, 0
11576 #endif
11577 },
11578 {
11579 AArch64_STURSi, ARM64_INS_STUR,
11580 #ifndef CAPSTONE_DIET
11581 { 0 }, { 0 }, { 0 }, 0, 0
11582 #endif
11583 },
11584 {
11585 AArch64_STURWi, ARM64_INS_STUR,
11586 #ifndef CAPSTONE_DIET
11587 { 0 }, { 0 }, { 0 }, 0, 0
11588 #endif
11589 },
11590 {
11591 AArch64_STURXi, ARM64_INS_STUR,
11592 #ifndef CAPSTONE_DIET
11593 { 0 }, { 0 }, { 0 }, 0, 0
11594 #endif
11595 },
11596 {
11597 AArch64_STXPW, ARM64_INS_STXP,
11598 #ifndef CAPSTONE_DIET
11599 { 0 }, { 0 }, { 0 }, 0, 0
11600 #endif
11601 },
11602 {
11603 AArch64_STXPX, ARM64_INS_STXP,
11604 #ifndef CAPSTONE_DIET
11605 { 0 }, { 0 }, { 0 }, 0, 0
11606 #endif
11607 },
11608 {
11609 AArch64_STXRB, ARM64_INS_STXRB,
11610 #ifndef CAPSTONE_DIET
11611 { 0 }, { 0 }, { 0 }, 0, 0
11612 #endif
11613 },
11614 {
11615 AArch64_STXRH, ARM64_INS_STXRH,
11616 #ifndef CAPSTONE_DIET
11617 { 0 }, { 0 }, { 0 }, 0, 0
11618 #endif
11619 },
11620 {
11621 AArch64_STXRW, ARM64_INS_STXR,
11622 #ifndef CAPSTONE_DIET
11623 { 0 }, { 0 }, { 0 }, 0, 0
11624 #endif
11625 },
11626 {
11627 AArch64_STXRX, ARM64_INS_STXR,
11628 #ifndef CAPSTONE_DIET
11629 { 0 }, { 0 }, { 0 }, 0, 0
11630 #endif
11631 },
11632 {
11633 AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN,
11634 #ifndef CAPSTONE_DIET
11635 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11636 #endif
11637 },
11638 {
11639 AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2,
11640 #ifndef CAPSTONE_DIET
11641 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11642 #endif
11643 },
11644 {
11645 AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN,
11646 #ifndef CAPSTONE_DIET
11647 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11648 #endif
11649 },
11650 {
11651 AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2,
11652 #ifndef CAPSTONE_DIET
11653 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11654 #endif
11655 },
11656 {
11657 AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2,
11658 #ifndef CAPSTONE_DIET
11659 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11660 #endif
11661 },
11662 {
11663 AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN,
11664 #ifndef CAPSTONE_DIET
11665 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11666 #endif
11667 },
11668 {
11669 AArch64_SUBSWri, ARM64_INS_SUB,
11670 #ifndef CAPSTONE_DIET
11671 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11672 #endif
11673 },
11674 {
11675 AArch64_SUBSWrs, ARM64_INS_SUB,
11676 #ifndef CAPSTONE_DIET
11677 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11678 #endif
11679 },
11680 {
11681 AArch64_SUBSWrx, ARM64_INS_SUB,
11682 #ifndef CAPSTONE_DIET
11683 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11684 #endif
11685 },
11686 {
11687 AArch64_SUBSXri, ARM64_INS_SUB,
11688 #ifndef CAPSTONE_DIET
11689 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11690 #endif
11691 },
11692 {
11693 AArch64_SUBSXrs, ARM64_INS_SUB,
11694 #ifndef CAPSTONE_DIET
11695 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11696 #endif
11697 },
11698 {
11699 AArch64_SUBSXrx, ARM64_INS_SUB,
11700 #ifndef CAPSTONE_DIET
11701 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11702 #endif
11703 },
11704 {
11705 AArch64_SUBSXrx64, ARM64_INS_SUB,
11706 #ifndef CAPSTONE_DIET
11707 { 0 }, { ARM64_REG_NZCV, 0 }, { 0 }, 0, 0
11708 #endif
11709 },
11710 {
11711 AArch64_SUBWri, ARM64_INS_SUB,
11712 #ifndef CAPSTONE_DIET
11713 { 0 }, { 0 }, { 0 }, 0, 0
11714 #endif
11715 },
11716 {
11717 AArch64_SUBWrs, ARM64_INS_SUB,
11718 #ifndef CAPSTONE_DIET
11719 { 0 }, { 0 }, { 0 }, 0, 0
11720 #endif
11721 },
11722 {
11723 AArch64_SUBWrx, ARM64_INS_SUB,
11724 #ifndef CAPSTONE_DIET
11725 { 0 }, { 0 }, { 0 }, 0, 0
11726 #endif
11727 },
11728 {
11729 AArch64_SUBXri, ARM64_INS_SUB,
11730 #ifndef CAPSTONE_DIET
11731 { 0 }, { 0 }, { 0 }, 0, 0
11732 #endif
11733 },
11734 {
11735 AArch64_SUBXrs, ARM64_INS_SUB,
11736 #ifndef CAPSTONE_DIET
11737 { 0 }, { 0 }, { 0 }, 0, 0
11738 #endif
11739 },
11740 {
11741 AArch64_SUBXrx, ARM64_INS_SUB,
11742 #ifndef CAPSTONE_DIET
11743 { 0 }, { 0 }, { 0 }, 0, 0
11744 #endif
11745 },
11746 {
11747 AArch64_SUBXrx64, ARM64_INS_SUB,
11748 #ifndef CAPSTONE_DIET
11749 { 0 }, { 0 }, { 0 }, 0, 0
11750 #endif
11751 },
11752 {
11753 AArch64_SUBv16i8, ARM64_INS_SUB,
11754 #ifndef CAPSTONE_DIET
11755 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11756 #endif
11757 },
11758 {
11759 AArch64_SUBv1i64, ARM64_INS_SUB,
11760 #ifndef CAPSTONE_DIET
11761 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11762 #endif
11763 },
11764 {
11765 AArch64_SUBv2i32, ARM64_INS_SUB,
11766 #ifndef CAPSTONE_DIET
11767 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11768 #endif
11769 },
11770 {
11771 AArch64_SUBv2i64, ARM64_INS_SUB,
11772 #ifndef CAPSTONE_DIET
11773 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11774 #endif
11775 },
11776 {
11777 AArch64_SUBv4i16, ARM64_INS_SUB,
11778 #ifndef CAPSTONE_DIET
11779 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11780 #endif
11781 },
11782 {
11783 AArch64_SUBv4i32, ARM64_INS_SUB,
11784 #ifndef CAPSTONE_DIET
11785 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11786 #endif
11787 },
11788 {
11789 AArch64_SUBv8i16, ARM64_INS_SUB,
11790 #ifndef CAPSTONE_DIET
11791 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11792 #endif
11793 },
11794 {
11795 AArch64_SUBv8i8, ARM64_INS_SUB,
11796 #ifndef CAPSTONE_DIET
11797 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11798 #endif
11799 },
11800 {
11801 AArch64_SUQADDv16i8, ARM64_INS_SUQADD,
11802 #ifndef CAPSTONE_DIET
11803 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11804 #endif
11805 },
11806 {
11807 AArch64_SUQADDv1i16, ARM64_INS_SUQADD,
11808 #ifndef CAPSTONE_DIET
11809 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11810 #endif
11811 },
11812 {
11813 AArch64_SUQADDv1i32, ARM64_INS_SUQADD,
11814 #ifndef CAPSTONE_DIET
11815 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11816 #endif
11817 },
11818 {
11819 AArch64_SUQADDv1i64, ARM64_INS_SUQADD,
11820 #ifndef CAPSTONE_DIET
11821 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11822 #endif
11823 },
11824 {
11825 AArch64_SUQADDv1i8, ARM64_INS_SUQADD,
11826 #ifndef CAPSTONE_DIET
11827 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11828 #endif
11829 },
11830 {
11831 AArch64_SUQADDv2i32, ARM64_INS_SUQADD,
11832 #ifndef CAPSTONE_DIET
11833 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11834 #endif
11835 },
11836 {
11837 AArch64_SUQADDv2i64, ARM64_INS_SUQADD,
11838 #ifndef CAPSTONE_DIET
11839 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11840 #endif
11841 },
11842 {
11843 AArch64_SUQADDv4i16, ARM64_INS_SUQADD,
11844 #ifndef CAPSTONE_DIET
11845 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11846 #endif
11847 },
11848 {
11849 AArch64_SUQADDv4i32, ARM64_INS_SUQADD,
11850 #ifndef CAPSTONE_DIET
11851 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11852 #endif
11853 },
11854 {
11855 AArch64_SUQADDv8i16, ARM64_INS_SUQADD,
11856 #ifndef CAPSTONE_DIET
11857 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11858 #endif
11859 },
11860 {
11861 AArch64_SUQADDv8i8, ARM64_INS_SUQADD,
11862 #ifndef CAPSTONE_DIET
11863 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11864 #endif
11865 },
11866 {
11867 AArch64_SVC, ARM64_INS_SVC,
11868 #ifndef CAPSTONE_DIET
11869 { 0 }, { 0 }, { 0 }, 0, 0
11870 #endif
11871 },
11872 {
11873 AArch64_SYSLxt, ARM64_INS_SYSL,
11874 #ifndef CAPSTONE_DIET
11875 { 0 }, { 0 }, { 0 }, 0, 0
11876 #endif
11877 },
11878 {
11879 AArch64_SYSxt, ARM64_INS_SYS,
11880 #ifndef CAPSTONE_DIET
11881 { 0 }, { 0 }, { 0 }, 0, 0
11882 #endif
11883 },
11884 {
11885 AArch64_TBLv16i8Four, ARM64_INS_TBL,
11886 #ifndef CAPSTONE_DIET
11887 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11888 #endif
11889 },
11890 {
11891 AArch64_TBLv16i8One, ARM64_INS_TBL,
11892 #ifndef CAPSTONE_DIET
11893 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11894 #endif
11895 },
11896 {
11897 AArch64_TBLv16i8Three, ARM64_INS_TBL,
11898 #ifndef CAPSTONE_DIET
11899 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11900 #endif
11901 },
11902 {
11903 AArch64_TBLv16i8Two, ARM64_INS_TBL,
11904 #ifndef CAPSTONE_DIET
11905 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11906 #endif
11907 },
11908 {
11909 AArch64_TBLv8i8Four, ARM64_INS_TBL,
11910 #ifndef CAPSTONE_DIET
11911 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11912 #endif
11913 },
11914 {
11915 AArch64_TBLv8i8One, ARM64_INS_TBL,
11916 #ifndef CAPSTONE_DIET
11917 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11918 #endif
11919 },
11920 {
11921 AArch64_TBLv8i8Three, ARM64_INS_TBL,
11922 #ifndef CAPSTONE_DIET
11923 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11924 #endif
11925 },
11926 {
11927 AArch64_TBLv8i8Two, ARM64_INS_TBL,
11928 #ifndef CAPSTONE_DIET
11929 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11930 #endif
11931 },
11932 {
11933 AArch64_TBNZW, ARM64_INS_TBNZ,
11934 #ifndef CAPSTONE_DIET
11935 { 0 }, { 0 }, { 0 }, 1, 0
11936 #endif
11937 },
11938 {
11939 AArch64_TBNZX, ARM64_INS_TBNZ,
11940 #ifndef CAPSTONE_DIET
11941 { 0 }, { 0 }, { 0 }, 1, 0
11942 #endif
11943 },
11944 {
11945 AArch64_TBXv16i8Four, ARM64_INS_TBX,
11946 #ifndef CAPSTONE_DIET
11947 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11948 #endif
11949 },
11950 {
11951 AArch64_TBXv16i8One, ARM64_INS_TBX,
11952 #ifndef CAPSTONE_DIET
11953 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11954 #endif
11955 },
11956 {
11957 AArch64_TBXv16i8Three, ARM64_INS_TBX,
11958 #ifndef CAPSTONE_DIET
11959 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11960 #endif
11961 },
11962 {
11963 AArch64_TBXv16i8Two, ARM64_INS_TBX,
11964 #ifndef CAPSTONE_DIET
11965 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11966 #endif
11967 },
11968 {
11969 AArch64_TBXv8i8Four, ARM64_INS_TBX,
11970 #ifndef CAPSTONE_DIET
11971 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11972 #endif
11973 },
11974 {
11975 AArch64_TBXv8i8One, ARM64_INS_TBX,
11976 #ifndef CAPSTONE_DIET
11977 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11978 #endif
11979 },
11980 {
11981 AArch64_TBXv8i8Three, ARM64_INS_TBX,
11982 #ifndef CAPSTONE_DIET
11983 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11984 #endif
11985 },
11986 {
11987 AArch64_TBXv8i8Two, ARM64_INS_TBX,
11988 #ifndef CAPSTONE_DIET
11989 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
11990 #endif
11991 },
11992 {
11993 AArch64_TBZW, ARM64_INS_TBZ,
11994 #ifndef CAPSTONE_DIET
11995 { 0 }, { 0 }, { 0 }, 1, 0
11996 #endif
11997 },
11998 {
11999 AArch64_TBZX, ARM64_INS_TBZ,
12000 #ifndef CAPSTONE_DIET
12001 { 0 }, { 0 }, { 0 }, 1, 0
12002 #endif
12003 },
12004 {
12005 AArch64_TRN1v16i8, ARM64_INS_TRN1,
12006 #ifndef CAPSTONE_DIET
12007 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12008 #endif
12009 },
12010 {
12011 AArch64_TRN1v2i32, ARM64_INS_TRN1,
12012 #ifndef CAPSTONE_DIET
12013 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12014 #endif
12015 },
12016 {
12017 AArch64_TRN1v2i64, ARM64_INS_TRN1,
12018 #ifndef CAPSTONE_DIET
12019 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12020 #endif
12021 },
12022 {
12023 AArch64_TRN1v4i16, ARM64_INS_TRN1,
12024 #ifndef CAPSTONE_DIET
12025 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12026 #endif
12027 },
12028 {
12029 AArch64_TRN1v4i32, ARM64_INS_TRN1,
12030 #ifndef CAPSTONE_DIET
12031 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12032 #endif
12033 },
12034 {
12035 AArch64_TRN1v8i16, ARM64_INS_TRN1,
12036 #ifndef CAPSTONE_DIET
12037 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12038 #endif
12039 },
12040 {
12041 AArch64_TRN1v8i8, ARM64_INS_TRN1,
12042 #ifndef CAPSTONE_DIET
12043 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12044 #endif
12045 },
12046 {
12047 AArch64_TRN2v16i8, ARM64_INS_TRN2,
12048 #ifndef CAPSTONE_DIET
12049 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12050 #endif
12051 },
12052 {
12053 AArch64_TRN2v2i32, ARM64_INS_TRN2,
12054 #ifndef CAPSTONE_DIET
12055 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12056 #endif
12057 },
12058 {
12059 AArch64_TRN2v2i64, ARM64_INS_TRN2,
12060 #ifndef CAPSTONE_DIET
12061 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12062 #endif
12063 },
12064 {
12065 AArch64_TRN2v4i16, ARM64_INS_TRN2,
12066 #ifndef CAPSTONE_DIET
12067 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12068 #endif
12069 },
12070 {
12071 AArch64_TRN2v4i32, ARM64_INS_TRN2,
12072 #ifndef CAPSTONE_DIET
12073 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12074 #endif
12075 },
12076 {
12077 AArch64_TRN2v8i16, ARM64_INS_TRN2,
12078 #ifndef CAPSTONE_DIET
12079 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12080 #endif
12081 },
12082 {
12083 AArch64_TRN2v8i8, ARM64_INS_TRN2,
12084 #ifndef CAPSTONE_DIET
12085 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12086 #endif
12087 },
12088 {
12089 AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2,
12090 #ifndef CAPSTONE_DIET
12091 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12092 #endif
12093 },
12094 {
12095 AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL,
12096 #ifndef CAPSTONE_DIET
12097 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12098 #endif
12099 },
12100 {
12101 AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL,
12102 #ifndef CAPSTONE_DIET
12103 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12104 #endif
12105 },
12106 {
12107 AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2,
12108 #ifndef CAPSTONE_DIET
12109 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12110 #endif
12111 },
12112 {
12113 AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2,
12114 #ifndef CAPSTONE_DIET
12115 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12116 #endif
12117 },
12118 {
12119 AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL,
12120 #ifndef CAPSTONE_DIET
12121 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12122 #endif
12123 },
12124 {
12125 AArch64_UABAv16i8, ARM64_INS_UABA,
12126 #ifndef CAPSTONE_DIET
12127 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12128 #endif
12129 },
12130 {
12131 AArch64_UABAv2i32, ARM64_INS_UABA,
12132 #ifndef CAPSTONE_DIET
12133 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12134 #endif
12135 },
12136 {
12137 AArch64_UABAv4i16, ARM64_INS_UABA,
12138 #ifndef CAPSTONE_DIET
12139 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12140 #endif
12141 },
12142 {
12143 AArch64_UABAv4i32, ARM64_INS_UABA,
12144 #ifndef CAPSTONE_DIET
12145 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12146 #endif
12147 },
12148 {
12149 AArch64_UABAv8i16, ARM64_INS_UABA,
12150 #ifndef CAPSTONE_DIET
12151 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12152 #endif
12153 },
12154 {
12155 AArch64_UABAv8i8, ARM64_INS_UABA,
12156 #ifndef CAPSTONE_DIET
12157 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12158 #endif
12159 },
12160 {
12161 AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2,
12162 #ifndef CAPSTONE_DIET
12163 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12164 #endif
12165 },
12166 {
12167 AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL,
12168 #ifndef CAPSTONE_DIET
12169 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12170 #endif
12171 },
12172 {
12173 AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL,
12174 #ifndef CAPSTONE_DIET
12175 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12176 #endif
12177 },
12178 {
12179 AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2,
12180 #ifndef CAPSTONE_DIET
12181 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12182 #endif
12183 },
12184 {
12185 AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2,
12186 #ifndef CAPSTONE_DIET
12187 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12188 #endif
12189 },
12190 {
12191 AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL,
12192 #ifndef CAPSTONE_DIET
12193 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12194 #endif
12195 },
12196 {
12197 AArch64_UABDv16i8, ARM64_INS_UABD,
12198 #ifndef CAPSTONE_DIET
12199 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12200 #endif
12201 },
12202 {
12203 AArch64_UABDv2i32, ARM64_INS_UABD,
12204 #ifndef CAPSTONE_DIET
12205 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12206 #endif
12207 },
12208 {
12209 AArch64_UABDv4i16, ARM64_INS_UABD,
12210 #ifndef CAPSTONE_DIET
12211 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12212 #endif
12213 },
12214 {
12215 AArch64_UABDv4i32, ARM64_INS_UABD,
12216 #ifndef CAPSTONE_DIET
12217 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12218 #endif
12219 },
12220 {
12221 AArch64_UABDv8i16, ARM64_INS_UABD,
12222 #ifndef CAPSTONE_DIET
12223 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12224 #endif
12225 },
12226 {
12227 AArch64_UABDv8i8, ARM64_INS_UABD,
12228 #ifndef CAPSTONE_DIET
12229 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12230 #endif
12231 },
12232 {
12233 AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP,
12234 #ifndef CAPSTONE_DIET
12235 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12236 #endif
12237 },
12238 {
12239 AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP,
12240 #ifndef CAPSTONE_DIET
12241 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12242 #endif
12243 },
12244 {
12245 AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP,
12246 #ifndef CAPSTONE_DIET
12247 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12248 #endif
12249 },
12250 {
12251 AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP,
12252 #ifndef CAPSTONE_DIET
12253 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12254 #endif
12255 },
12256 {
12257 AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP,
12258 #ifndef CAPSTONE_DIET
12259 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12260 #endif
12261 },
12262 {
12263 AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP,
12264 #ifndef CAPSTONE_DIET
12265 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12266 #endif
12267 },
12268 {
12269 AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP,
12270 #ifndef CAPSTONE_DIET
12271 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12272 #endif
12273 },
12274 {
12275 AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP,
12276 #ifndef CAPSTONE_DIET
12277 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12278 #endif
12279 },
12280 {
12281 AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP,
12282 #ifndef CAPSTONE_DIET
12283 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12284 #endif
12285 },
12286 {
12287 AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP,
12288 #ifndef CAPSTONE_DIET
12289 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12290 #endif
12291 },
12292 {
12293 AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP,
12294 #ifndef CAPSTONE_DIET
12295 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12296 #endif
12297 },
12298 {
12299 AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP,
12300 #ifndef CAPSTONE_DIET
12301 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12302 #endif
12303 },
12304 {
12305 AArch64_UADDLVv16i8v, ARM64_INS_UADDLV,
12306 #ifndef CAPSTONE_DIET
12307 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12308 #endif
12309 },
12310 {
12311 AArch64_UADDLVv4i16v, ARM64_INS_UADDLV,
12312 #ifndef CAPSTONE_DIET
12313 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12314 #endif
12315 },
12316 {
12317 AArch64_UADDLVv4i32v, ARM64_INS_UADDLV,
12318 #ifndef CAPSTONE_DIET
12319 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12320 #endif
12321 },
12322 {
12323 AArch64_UADDLVv8i16v, ARM64_INS_UADDLV,
12324 #ifndef CAPSTONE_DIET
12325 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12326 #endif
12327 },
12328 {
12329 AArch64_UADDLVv8i8v, ARM64_INS_UADDLV,
12330 #ifndef CAPSTONE_DIET
12331 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12332 #endif
12333 },
12334 {
12335 AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2,
12336 #ifndef CAPSTONE_DIET
12337 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12338 #endif
12339 },
12340 {
12341 AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL,
12342 #ifndef CAPSTONE_DIET
12343 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12344 #endif
12345 },
12346 {
12347 AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL,
12348 #ifndef CAPSTONE_DIET
12349 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12350 #endif
12351 },
12352 {
12353 AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2,
12354 #ifndef CAPSTONE_DIET
12355 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12356 #endif
12357 },
12358 {
12359 AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2,
12360 #ifndef CAPSTONE_DIET
12361 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12362 #endif
12363 },
12364 {
12365 AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL,
12366 #ifndef CAPSTONE_DIET
12367 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12368 #endif
12369 },
12370 {
12371 AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2,
12372 #ifndef CAPSTONE_DIET
12373 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12374 #endif
12375 },
12376 {
12377 AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW,
12378 #ifndef CAPSTONE_DIET
12379 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12380 #endif
12381 },
12382 {
12383 AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW,
12384 #ifndef CAPSTONE_DIET
12385 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12386 #endif
12387 },
12388 {
12389 AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2,
12390 #ifndef CAPSTONE_DIET
12391 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12392 #endif
12393 },
12394 {
12395 AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2,
12396 #ifndef CAPSTONE_DIET
12397 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12398 #endif
12399 },
12400 {
12401 AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW,
12402 #ifndef CAPSTONE_DIET
12403 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12404 #endif
12405 },
12406 {
12407 AArch64_UBFMWri, ARM64_INS_UBFM,
12408 #ifndef CAPSTONE_DIET
12409 { 0 }, { 0 }, { 0 }, 0, 0
12410 #endif
12411 },
12412 {
12413 AArch64_UBFMXri, ARM64_INS_UBFM,
12414 #ifndef CAPSTONE_DIET
12415 { 0 }, { 0 }, { 0 }, 0, 0
12416 #endif
12417 },
12418 {
12419 AArch64_UCVTFSWDri, ARM64_INS_UCVTF,
12420 #ifndef CAPSTONE_DIET
12421 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12422 #endif
12423 },
12424 {
12425 AArch64_UCVTFSWSri, ARM64_INS_UCVTF,
12426 #ifndef CAPSTONE_DIET
12427 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12428 #endif
12429 },
12430 {
12431 AArch64_UCVTFSXDri, ARM64_INS_UCVTF,
12432 #ifndef CAPSTONE_DIET
12433 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12434 #endif
12435 },
12436 {
12437 AArch64_UCVTFSXSri, ARM64_INS_UCVTF,
12438 #ifndef CAPSTONE_DIET
12439 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12440 #endif
12441 },
12442 {
12443 AArch64_UCVTFUWDri, ARM64_INS_UCVTF,
12444 #ifndef CAPSTONE_DIET
12445 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12446 #endif
12447 },
12448 {
12449 AArch64_UCVTFUWSri, ARM64_INS_UCVTF,
12450 #ifndef CAPSTONE_DIET
12451 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12452 #endif
12453 },
12454 {
12455 AArch64_UCVTFUXDri, ARM64_INS_UCVTF,
12456 #ifndef CAPSTONE_DIET
12457 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12458 #endif
12459 },
12460 {
12461 AArch64_UCVTFUXSri, ARM64_INS_UCVTF,
12462 #ifndef CAPSTONE_DIET
12463 { 0 }, { 0 }, { ARM64_GRP_FPARMV8, 0 }, 0, 0
12464 #endif
12465 },
12466 {
12467 AArch64_UCVTFd, ARM64_INS_UCVTF,
12468 #ifndef CAPSTONE_DIET
12469 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12470 #endif
12471 },
12472 {
12473 AArch64_UCVTFs, ARM64_INS_UCVTF,
12474 #ifndef CAPSTONE_DIET
12475 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12476 #endif
12477 },
12478 {
12479 AArch64_UCVTFv1i32, ARM64_INS_UCVTF,
12480 #ifndef CAPSTONE_DIET
12481 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12482 #endif
12483 },
12484 {
12485 AArch64_UCVTFv1i64, ARM64_INS_UCVTF,
12486 #ifndef CAPSTONE_DIET
12487 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12488 #endif
12489 },
12490 {
12491 AArch64_UCVTFv2f32, ARM64_INS_UCVTF,
12492 #ifndef CAPSTONE_DIET
12493 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12494 #endif
12495 },
12496 {
12497 AArch64_UCVTFv2f64, ARM64_INS_UCVTF,
12498 #ifndef CAPSTONE_DIET
12499 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12500 #endif
12501 },
12502 {
12503 AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF,
12504 #ifndef CAPSTONE_DIET
12505 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12506 #endif
12507 },
12508 {
12509 AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF,
12510 #ifndef CAPSTONE_DIET
12511 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12512 #endif
12513 },
12514 {
12515 AArch64_UCVTFv4f32, ARM64_INS_UCVTF,
12516 #ifndef CAPSTONE_DIET
12517 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12518 #endif
12519 },
12520 {
12521 AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF,
12522 #ifndef CAPSTONE_DIET
12523 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12524 #endif
12525 },
12526 {
12527 AArch64_UDIVWr, ARM64_INS_UDIV,
12528 #ifndef CAPSTONE_DIET
12529 { 0 }, { 0 }, { 0 }, 0, 0
12530 #endif
12531 },
12532 {
12533 AArch64_UDIVXr, ARM64_INS_UDIV,
12534 #ifndef CAPSTONE_DIET
12535 { 0 }, { 0 }, { 0 }, 0, 0
12536 #endif
12537 },
12538 {
12539 AArch64_UDIV_IntWr, ARM64_INS_UDIV,
12540 #ifndef CAPSTONE_DIET
12541 { 0 }, { 0 }, { 0 }, 0, 0
12542 #endif
12543 },
12544 {
12545 AArch64_UDIV_IntXr, ARM64_INS_UDIV,
12546 #ifndef CAPSTONE_DIET
12547 { 0 }, { 0 }, { 0 }, 0, 0
12548 #endif
12549 },
12550 {
12551 AArch64_UHADDv16i8, ARM64_INS_UHADD,
12552 #ifndef CAPSTONE_DIET
12553 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12554 #endif
12555 },
12556 {
12557 AArch64_UHADDv2i32, ARM64_INS_UHADD,
12558 #ifndef CAPSTONE_DIET
12559 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12560 #endif
12561 },
12562 {
12563 AArch64_UHADDv4i16, ARM64_INS_UHADD,
12564 #ifndef CAPSTONE_DIET
12565 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12566 #endif
12567 },
12568 {
12569 AArch64_UHADDv4i32, ARM64_INS_UHADD,
12570 #ifndef CAPSTONE_DIET
12571 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12572 #endif
12573 },
12574 {
12575 AArch64_UHADDv8i16, ARM64_INS_UHADD,
12576 #ifndef CAPSTONE_DIET
12577 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12578 #endif
12579 },
12580 {
12581 AArch64_UHADDv8i8, ARM64_INS_UHADD,
12582 #ifndef CAPSTONE_DIET
12583 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12584 #endif
12585 },
12586 {
12587 AArch64_UHSUBv16i8, ARM64_INS_UHSUB,
12588 #ifndef CAPSTONE_DIET
12589 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12590 #endif
12591 },
12592 {
12593 AArch64_UHSUBv2i32, ARM64_INS_UHSUB,
12594 #ifndef CAPSTONE_DIET
12595 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12596 #endif
12597 },
12598 {
12599 AArch64_UHSUBv4i16, ARM64_INS_UHSUB,
12600 #ifndef CAPSTONE_DIET
12601 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12602 #endif
12603 },
12604 {
12605 AArch64_UHSUBv4i32, ARM64_INS_UHSUB,
12606 #ifndef CAPSTONE_DIET
12607 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12608 #endif
12609 },
12610 {
12611 AArch64_UHSUBv8i16, ARM64_INS_UHSUB,
12612 #ifndef CAPSTONE_DIET
12613 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12614 #endif
12615 },
12616 {
12617 AArch64_UHSUBv8i8, ARM64_INS_UHSUB,
12618 #ifndef CAPSTONE_DIET
12619 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12620 #endif
12621 },
12622 {
12623 AArch64_UMADDLrrr, ARM64_INS_UMADDL,
12624 #ifndef CAPSTONE_DIET
12625 { 0 }, { 0 }, { 0 }, 0, 0
12626 #endif
12627 },
12628 {
12629 AArch64_UMAXPv16i8, ARM64_INS_UMAXP,
12630 #ifndef CAPSTONE_DIET
12631 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12632 #endif
12633 },
12634 {
12635 AArch64_UMAXPv2i32, ARM64_INS_UMAXP,
12636 #ifndef CAPSTONE_DIET
12637 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12638 #endif
12639 },
12640 {
12641 AArch64_UMAXPv4i16, ARM64_INS_UMAXP,
12642 #ifndef CAPSTONE_DIET
12643 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12644 #endif
12645 },
12646 {
12647 AArch64_UMAXPv4i32, ARM64_INS_UMAXP,
12648 #ifndef CAPSTONE_DIET
12649 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12650 #endif
12651 },
12652 {
12653 AArch64_UMAXPv8i16, ARM64_INS_UMAXP,
12654 #ifndef CAPSTONE_DIET
12655 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12656 #endif
12657 },
12658 {
12659 AArch64_UMAXPv8i8, ARM64_INS_UMAXP,
12660 #ifndef CAPSTONE_DIET
12661 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12662 #endif
12663 },
12664 {
12665 AArch64_UMAXVv16i8v, ARM64_INS_UMAXV,
12666 #ifndef CAPSTONE_DIET
12667 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12668 #endif
12669 },
12670 {
12671 AArch64_UMAXVv4i16v, ARM64_INS_UMAXV,
12672 #ifndef CAPSTONE_DIET
12673 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12674 #endif
12675 },
12676 {
12677 AArch64_UMAXVv4i32v, ARM64_INS_UMAXV,
12678 #ifndef CAPSTONE_DIET
12679 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12680 #endif
12681 },
12682 {
12683 AArch64_UMAXVv8i16v, ARM64_INS_UMAXV,
12684 #ifndef CAPSTONE_DIET
12685 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12686 #endif
12687 },
12688 {
12689 AArch64_UMAXVv8i8v, ARM64_INS_UMAXV,
12690 #ifndef CAPSTONE_DIET
12691 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12692 #endif
12693 },
12694 {
12695 AArch64_UMAXv16i8, ARM64_INS_UMAX,
12696 #ifndef CAPSTONE_DIET
12697 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12698 #endif
12699 },
12700 {
12701 AArch64_UMAXv2i32, ARM64_INS_UMAX,
12702 #ifndef CAPSTONE_DIET
12703 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12704 #endif
12705 },
12706 {
12707 AArch64_UMAXv4i16, ARM64_INS_UMAX,
12708 #ifndef CAPSTONE_DIET
12709 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12710 #endif
12711 },
12712 {
12713 AArch64_UMAXv4i32, ARM64_INS_UMAX,
12714 #ifndef CAPSTONE_DIET
12715 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12716 #endif
12717 },
12718 {
12719 AArch64_UMAXv8i16, ARM64_INS_UMAX,
12720 #ifndef CAPSTONE_DIET
12721 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12722 #endif
12723 },
12724 {
12725 AArch64_UMAXv8i8, ARM64_INS_UMAX,
12726 #ifndef CAPSTONE_DIET
12727 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12728 #endif
12729 },
12730 {
12731 AArch64_UMINPv16i8, ARM64_INS_UMINP,
12732 #ifndef CAPSTONE_DIET
12733 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12734 #endif
12735 },
12736 {
12737 AArch64_UMINPv2i32, ARM64_INS_UMINP,
12738 #ifndef CAPSTONE_DIET
12739 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12740 #endif
12741 },
12742 {
12743 AArch64_UMINPv4i16, ARM64_INS_UMINP,
12744 #ifndef CAPSTONE_DIET
12745 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12746 #endif
12747 },
12748 {
12749 AArch64_UMINPv4i32, ARM64_INS_UMINP,
12750 #ifndef CAPSTONE_DIET
12751 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12752 #endif
12753 },
12754 {
12755 AArch64_UMINPv8i16, ARM64_INS_UMINP,
12756 #ifndef CAPSTONE_DIET
12757 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12758 #endif
12759 },
12760 {
12761 AArch64_UMINPv8i8, ARM64_INS_UMINP,
12762 #ifndef CAPSTONE_DIET
12763 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12764 #endif
12765 },
12766 {
12767 AArch64_UMINVv16i8v, ARM64_INS_UMINV,
12768 #ifndef CAPSTONE_DIET
12769 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12770 #endif
12771 },
12772 {
12773 AArch64_UMINVv4i16v, ARM64_INS_UMINV,
12774 #ifndef CAPSTONE_DIET
12775 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12776 #endif
12777 },
12778 {
12779 AArch64_UMINVv4i32v, ARM64_INS_UMINV,
12780 #ifndef CAPSTONE_DIET
12781 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12782 #endif
12783 },
12784 {
12785 AArch64_UMINVv8i16v, ARM64_INS_UMINV,
12786 #ifndef CAPSTONE_DIET
12787 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12788 #endif
12789 },
12790 {
12791 AArch64_UMINVv8i8v, ARM64_INS_UMINV,
12792 #ifndef CAPSTONE_DIET
12793 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12794 #endif
12795 },
12796 {
12797 AArch64_UMINv16i8, ARM64_INS_UMIN,
12798 #ifndef CAPSTONE_DIET
12799 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12800 #endif
12801 },
12802 {
12803 AArch64_UMINv2i32, ARM64_INS_UMIN,
12804 #ifndef CAPSTONE_DIET
12805 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12806 #endif
12807 },
12808 {
12809 AArch64_UMINv4i16, ARM64_INS_UMIN,
12810 #ifndef CAPSTONE_DIET
12811 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12812 #endif
12813 },
12814 {
12815 AArch64_UMINv4i32, ARM64_INS_UMIN,
12816 #ifndef CAPSTONE_DIET
12817 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12818 #endif
12819 },
12820 {
12821 AArch64_UMINv8i16, ARM64_INS_UMIN,
12822 #ifndef CAPSTONE_DIET
12823 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12824 #endif
12825 },
12826 {
12827 AArch64_UMINv8i8, ARM64_INS_UMIN,
12828 #ifndef CAPSTONE_DIET
12829 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12830 #endif
12831 },
12832 {
12833 AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2,
12834 #ifndef CAPSTONE_DIET
12835 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12836 #endif
12837 },
12838 {
12839 AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL,
12840 #ifndef CAPSTONE_DIET
12841 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12842 #endif
12843 },
12844 {
12845 AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL,
12846 #ifndef CAPSTONE_DIET
12847 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12848 #endif
12849 },
12850 {
12851 AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL,
12852 #ifndef CAPSTONE_DIET
12853 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12854 #endif
12855 },
12856 {
12857 AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL,
12858 #ifndef CAPSTONE_DIET
12859 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12860 #endif
12861 },
12862 {
12863 AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2,
12864 #ifndef CAPSTONE_DIET
12865 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12866 #endif
12867 },
12868 {
12869 AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2,
12870 #ifndef CAPSTONE_DIET
12871 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12872 #endif
12873 },
12874 {
12875 AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2,
12876 #ifndef CAPSTONE_DIET
12877 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12878 #endif
12879 },
12880 {
12881 AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2,
12882 #ifndef CAPSTONE_DIET
12883 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12884 #endif
12885 },
12886 {
12887 AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL,
12888 #ifndef CAPSTONE_DIET
12889 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12890 #endif
12891 },
12892 {
12893 AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2,
12894 #ifndef CAPSTONE_DIET
12895 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12896 #endif
12897 },
12898 {
12899 AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL,
12900 #ifndef CAPSTONE_DIET
12901 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12902 #endif
12903 },
12904 {
12905 AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL,
12906 #ifndef CAPSTONE_DIET
12907 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12908 #endif
12909 },
12910 {
12911 AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL,
12912 #ifndef CAPSTONE_DIET
12913 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12914 #endif
12915 },
12916 {
12917 AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL,
12918 #ifndef CAPSTONE_DIET
12919 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12920 #endif
12921 },
12922 {
12923 AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2,
12924 #ifndef CAPSTONE_DIET
12925 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12926 #endif
12927 },
12928 {
12929 AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2,
12930 #ifndef CAPSTONE_DIET
12931 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12932 #endif
12933 },
12934 {
12935 AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2,
12936 #ifndef CAPSTONE_DIET
12937 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12938 #endif
12939 },
12940 {
12941 AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2,
12942 #ifndef CAPSTONE_DIET
12943 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12944 #endif
12945 },
12946 {
12947 AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL,
12948 #ifndef CAPSTONE_DIET
12949 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12950 #endif
12951 },
12952 {
12953 AArch64_UMOVvi16, ARM64_INS_UMOV,
12954 #ifndef CAPSTONE_DIET
12955 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12956 #endif
12957 },
12958 {
12959 AArch64_UMOVvi32, ARM64_INS_UMOV,
12960 #ifndef CAPSTONE_DIET
12961 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12962 #endif
12963 },
12964 {
12965 AArch64_UMOVvi64, ARM64_INS_UMOV,
12966 #ifndef CAPSTONE_DIET
12967 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12968 #endif
12969 },
12970 {
12971 AArch64_UMOVvi8, ARM64_INS_UMOV,
12972 #ifndef CAPSTONE_DIET
12973 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12974 #endif
12975 },
12976 {
12977 AArch64_UMSUBLrrr, ARM64_INS_UMSUBL,
12978 #ifndef CAPSTONE_DIET
12979 { 0 }, { 0 }, { 0 }, 0, 0
12980 #endif
12981 },
12982 {
12983 AArch64_UMULHrr, ARM64_INS_UMULH,
12984 #ifndef CAPSTONE_DIET
12985 { 0 }, { 0 }, { 0 }, 0, 0
12986 #endif
12987 },
12988 {
12989 AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2,
12990 #ifndef CAPSTONE_DIET
12991 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12992 #endif
12993 },
12994 {
12995 AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL,
12996 #ifndef CAPSTONE_DIET
12997 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
12998 #endif
12999 },
13000 {
13001 AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL,
13002 #ifndef CAPSTONE_DIET
13003 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13004 #endif
13005 },
13006 {
13007 AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL,
13008 #ifndef CAPSTONE_DIET
13009 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13010 #endif
13011 },
13012 {
13013 AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL,
13014 #ifndef CAPSTONE_DIET
13015 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13016 #endif
13017 },
13018 {
13019 AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2,
13020 #ifndef CAPSTONE_DIET
13021 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13022 #endif
13023 },
13024 {
13025 AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2,
13026 #ifndef CAPSTONE_DIET
13027 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13028 #endif
13029 },
13030 {
13031 AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2,
13032 #ifndef CAPSTONE_DIET
13033 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13034 #endif
13035 },
13036 {
13037 AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2,
13038 #ifndef CAPSTONE_DIET
13039 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13040 #endif
13041 },
13042 {
13043 AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL,
13044 #ifndef CAPSTONE_DIET
13045 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13046 #endif
13047 },
13048 {
13049 AArch64_UQADDv16i8, ARM64_INS_UQADD,
13050 #ifndef CAPSTONE_DIET
13051 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13052 #endif
13053 },
13054 {
13055 AArch64_UQADDv1i16, ARM64_INS_UQADD,
13056 #ifndef CAPSTONE_DIET
13057 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13058 #endif
13059 },
13060 {
13061 AArch64_UQADDv1i32, ARM64_INS_UQADD,
13062 #ifndef CAPSTONE_DIET
13063 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13064 #endif
13065 },
13066 {
13067 AArch64_UQADDv1i64, ARM64_INS_UQADD,
13068 #ifndef CAPSTONE_DIET
13069 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13070 #endif
13071 },
13072 {
13073 AArch64_UQADDv1i8, ARM64_INS_UQADD,
13074 #ifndef CAPSTONE_DIET
13075 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13076 #endif
13077 },
13078 {
13079 AArch64_UQADDv2i32, ARM64_INS_UQADD,
13080 #ifndef CAPSTONE_DIET
13081 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13082 #endif
13083 },
13084 {
13085 AArch64_UQADDv2i64, ARM64_INS_UQADD,
13086 #ifndef CAPSTONE_DIET
13087 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13088 #endif
13089 },
13090 {
13091 AArch64_UQADDv4i16, ARM64_INS_UQADD,
13092 #ifndef CAPSTONE_DIET
13093 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13094 #endif
13095 },
13096 {
13097 AArch64_UQADDv4i32, ARM64_INS_UQADD,
13098 #ifndef CAPSTONE_DIET
13099 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13100 #endif
13101 },
13102 {
13103 AArch64_UQADDv8i16, ARM64_INS_UQADD,
13104 #ifndef CAPSTONE_DIET
13105 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13106 #endif
13107 },
13108 {
13109 AArch64_UQADDv8i8, ARM64_INS_UQADD,
13110 #ifndef CAPSTONE_DIET
13111 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13112 #endif
13113 },
13114 {
13115 AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL,
13116 #ifndef CAPSTONE_DIET
13117 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13118 #endif
13119 },
13120 {
13121 AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL,
13122 #ifndef CAPSTONE_DIET
13123 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13124 #endif
13125 },
13126 {
13127 AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL,
13128 #ifndef CAPSTONE_DIET
13129 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13130 #endif
13131 },
13132 {
13133 AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL,
13134 #ifndef CAPSTONE_DIET
13135 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13136 #endif
13137 },
13138 {
13139 AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL,
13140 #ifndef CAPSTONE_DIET
13141 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13142 #endif
13143 },
13144 {
13145 AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL,
13146 #ifndef CAPSTONE_DIET
13147 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13148 #endif
13149 },
13150 {
13151 AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL,
13152 #ifndef CAPSTONE_DIET
13153 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13154 #endif
13155 },
13156 {
13157 AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL,
13158 #ifndef CAPSTONE_DIET
13159 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13160 #endif
13161 },
13162 {
13163 AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL,
13164 #ifndef CAPSTONE_DIET
13165 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13166 #endif
13167 },
13168 {
13169 AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL,
13170 #ifndef CAPSTONE_DIET
13171 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13172 #endif
13173 },
13174 {
13175 AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL,
13176 #ifndef CAPSTONE_DIET
13177 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13178 #endif
13179 },
13180 {
13181 AArch64_UQRSHRNb, ARM64_INS_UQRSHRN,
13182 #ifndef CAPSTONE_DIET
13183 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13184 #endif
13185 },
13186 {
13187 AArch64_UQRSHRNh, ARM64_INS_UQRSHRN,
13188 #ifndef CAPSTONE_DIET
13189 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13190 #endif
13191 },
13192 {
13193 AArch64_UQRSHRNs, ARM64_INS_UQRSHRN,
13194 #ifndef CAPSTONE_DIET
13195 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13196 #endif
13197 },
13198 {
13199 AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2,
13200 #ifndef CAPSTONE_DIET
13201 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13202 #endif
13203 },
13204 {
13205 AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN,
13206 #ifndef CAPSTONE_DIET
13207 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13208 #endif
13209 },
13210 {
13211 AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN,
13212 #ifndef CAPSTONE_DIET
13213 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13214 #endif
13215 },
13216 {
13217 AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2,
13218 #ifndef CAPSTONE_DIET
13219 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13220 #endif
13221 },
13222 {
13223 AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2,
13224 #ifndef CAPSTONE_DIET
13225 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13226 #endif
13227 },
13228 {
13229 AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN,
13230 #ifndef CAPSTONE_DIET
13231 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13232 #endif
13233 },
13234 {
13235 AArch64_UQSHLb, ARM64_INS_UQSHL,
13236 #ifndef CAPSTONE_DIET
13237 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13238 #endif
13239 },
13240 {
13241 AArch64_UQSHLd, ARM64_INS_UQSHL,
13242 #ifndef CAPSTONE_DIET
13243 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13244 #endif
13245 },
13246 {
13247 AArch64_UQSHLh, ARM64_INS_UQSHL,
13248 #ifndef CAPSTONE_DIET
13249 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13250 #endif
13251 },
13252 {
13253 AArch64_UQSHLs, ARM64_INS_UQSHL,
13254 #ifndef CAPSTONE_DIET
13255 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13256 #endif
13257 },
13258 {
13259 AArch64_UQSHLv16i8, ARM64_INS_UQSHL,
13260 #ifndef CAPSTONE_DIET
13261 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13262 #endif
13263 },
13264 {
13265 AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL,
13266 #ifndef CAPSTONE_DIET
13267 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13268 #endif
13269 },
13270 {
13271 AArch64_UQSHLv1i16, ARM64_INS_UQSHL,
13272 #ifndef CAPSTONE_DIET
13273 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13274 #endif
13275 },
13276 {
13277 AArch64_UQSHLv1i32, ARM64_INS_UQSHL,
13278 #ifndef CAPSTONE_DIET
13279 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13280 #endif
13281 },
13282 {
13283 AArch64_UQSHLv1i64, ARM64_INS_UQSHL,
13284 #ifndef CAPSTONE_DIET
13285 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13286 #endif
13287 },
13288 {
13289 AArch64_UQSHLv1i8, ARM64_INS_UQSHL,
13290 #ifndef CAPSTONE_DIET
13291 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13292 #endif
13293 },
13294 {
13295 AArch64_UQSHLv2i32, ARM64_INS_UQSHL,
13296 #ifndef CAPSTONE_DIET
13297 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13298 #endif
13299 },
13300 {
13301 AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL,
13302 #ifndef CAPSTONE_DIET
13303 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13304 #endif
13305 },
13306 {
13307 AArch64_UQSHLv2i64, ARM64_INS_UQSHL,
13308 #ifndef CAPSTONE_DIET
13309 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13310 #endif
13311 },
13312 {
13313 AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL,
13314 #ifndef CAPSTONE_DIET
13315 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13316 #endif
13317 },
13318 {
13319 AArch64_UQSHLv4i16, ARM64_INS_UQSHL,
13320 #ifndef CAPSTONE_DIET
13321 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13322 #endif
13323 },
13324 {
13325 AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL,
13326 #ifndef CAPSTONE_DIET
13327 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13328 #endif
13329 },
13330 {
13331 AArch64_UQSHLv4i32, ARM64_INS_UQSHL,
13332 #ifndef CAPSTONE_DIET
13333 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13334 #endif
13335 },
13336 {
13337 AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL,
13338 #ifndef CAPSTONE_DIET
13339 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13340 #endif
13341 },
13342 {
13343 AArch64_UQSHLv8i16, ARM64_INS_UQSHL,
13344 #ifndef CAPSTONE_DIET
13345 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13346 #endif
13347 },
13348 {
13349 AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL,
13350 #ifndef CAPSTONE_DIET
13351 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13352 #endif
13353 },
13354 {
13355 AArch64_UQSHLv8i8, ARM64_INS_UQSHL,
13356 #ifndef CAPSTONE_DIET
13357 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13358 #endif
13359 },
13360 {
13361 AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL,
13362 #ifndef CAPSTONE_DIET
13363 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13364 #endif
13365 },
13366 {
13367 AArch64_UQSHRNb, ARM64_INS_UQSHRN,
13368 #ifndef CAPSTONE_DIET
13369 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13370 #endif
13371 },
13372 {
13373 AArch64_UQSHRNh, ARM64_INS_UQSHRN,
13374 #ifndef CAPSTONE_DIET
13375 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13376 #endif
13377 },
13378 {
13379 AArch64_UQSHRNs, ARM64_INS_UQSHRN,
13380 #ifndef CAPSTONE_DIET
13381 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13382 #endif
13383 },
13384 {
13385 AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2,
13386 #ifndef CAPSTONE_DIET
13387 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13388 #endif
13389 },
13390 {
13391 AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN,
13392 #ifndef CAPSTONE_DIET
13393 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13394 #endif
13395 },
13396 {
13397 AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN,
13398 #ifndef CAPSTONE_DIET
13399 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13400 #endif
13401 },
13402 {
13403 AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2,
13404 #ifndef CAPSTONE_DIET
13405 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13406 #endif
13407 },
13408 {
13409 AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2,
13410 #ifndef CAPSTONE_DIET
13411 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13412 #endif
13413 },
13414 {
13415 AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN,
13416 #ifndef CAPSTONE_DIET
13417 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13418 #endif
13419 },
13420 {
13421 AArch64_UQSUBv16i8, ARM64_INS_UQSUB,
13422 #ifndef CAPSTONE_DIET
13423 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13424 #endif
13425 },
13426 {
13427 AArch64_UQSUBv1i16, ARM64_INS_UQSUB,
13428 #ifndef CAPSTONE_DIET
13429 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13430 #endif
13431 },
13432 {
13433 AArch64_UQSUBv1i32, ARM64_INS_UQSUB,
13434 #ifndef CAPSTONE_DIET
13435 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13436 #endif
13437 },
13438 {
13439 AArch64_UQSUBv1i64, ARM64_INS_UQSUB,
13440 #ifndef CAPSTONE_DIET
13441 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13442 #endif
13443 },
13444 {
13445 AArch64_UQSUBv1i8, ARM64_INS_UQSUB,
13446 #ifndef CAPSTONE_DIET
13447 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13448 #endif
13449 },
13450 {
13451 AArch64_UQSUBv2i32, ARM64_INS_UQSUB,
13452 #ifndef CAPSTONE_DIET
13453 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13454 #endif
13455 },
13456 {
13457 AArch64_UQSUBv2i64, ARM64_INS_UQSUB,
13458 #ifndef CAPSTONE_DIET
13459 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13460 #endif
13461 },
13462 {
13463 AArch64_UQSUBv4i16, ARM64_INS_UQSUB,
13464 #ifndef CAPSTONE_DIET
13465 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13466 #endif
13467 },
13468 {
13469 AArch64_UQSUBv4i32, ARM64_INS_UQSUB,
13470 #ifndef CAPSTONE_DIET
13471 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13472 #endif
13473 },
13474 {
13475 AArch64_UQSUBv8i16, ARM64_INS_UQSUB,
13476 #ifndef CAPSTONE_DIET
13477 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13478 #endif
13479 },
13480 {
13481 AArch64_UQSUBv8i8, ARM64_INS_UQSUB,
13482 #ifndef CAPSTONE_DIET
13483 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13484 #endif
13485 },
13486 {
13487 AArch64_UQXTNv16i8, ARM64_INS_UQXTN2,
13488 #ifndef CAPSTONE_DIET
13489 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13490 #endif
13491 },
13492 {
13493 AArch64_UQXTNv1i16, ARM64_INS_UQXTN,
13494 #ifndef CAPSTONE_DIET
13495 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13496 #endif
13497 },
13498 {
13499 AArch64_UQXTNv1i32, ARM64_INS_UQXTN,
13500 #ifndef CAPSTONE_DIET
13501 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13502 #endif
13503 },
13504 {
13505 AArch64_UQXTNv1i8, ARM64_INS_UQXTN,
13506 #ifndef CAPSTONE_DIET
13507 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13508 #endif
13509 },
13510 {
13511 AArch64_UQXTNv2i32, ARM64_INS_UQXTN,
13512 #ifndef CAPSTONE_DIET
13513 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13514 #endif
13515 },
13516 {
13517 AArch64_UQXTNv4i16, ARM64_INS_UQXTN,
13518 #ifndef CAPSTONE_DIET
13519 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13520 #endif
13521 },
13522 {
13523 AArch64_UQXTNv4i32, ARM64_INS_UQXTN2,
13524 #ifndef CAPSTONE_DIET
13525 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13526 #endif
13527 },
13528 {
13529 AArch64_UQXTNv8i16, ARM64_INS_UQXTN2,
13530 #ifndef CAPSTONE_DIET
13531 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13532 #endif
13533 },
13534 {
13535 AArch64_UQXTNv8i8, ARM64_INS_UQXTN,
13536 #ifndef CAPSTONE_DIET
13537 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13538 #endif
13539 },
13540 {
13541 AArch64_URECPEv2i32, ARM64_INS_URECPE,
13542 #ifndef CAPSTONE_DIET
13543 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13544 #endif
13545 },
13546 {
13547 AArch64_URECPEv4i32, ARM64_INS_URECPE,
13548 #ifndef CAPSTONE_DIET
13549 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13550 #endif
13551 },
13552 {
13553 AArch64_URHADDv16i8, ARM64_INS_URHADD,
13554 #ifndef CAPSTONE_DIET
13555 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13556 #endif
13557 },
13558 {
13559 AArch64_URHADDv2i32, ARM64_INS_URHADD,
13560 #ifndef CAPSTONE_DIET
13561 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13562 #endif
13563 },
13564 {
13565 AArch64_URHADDv4i16, ARM64_INS_URHADD,
13566 #ifndef CAPSTONE_DIET
13567 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13568 #endif
13569 },
13570 {
13571 AArch64_URHADDv4i32, ARM64_INS_URHADD,
13572 #ifndef CAPSTONE_DIET
13573 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13574 #endif
13575 },
13576 {
13577 AArch64_URHADDv8i16, ARM64_INS_URHADD,
13578 #ifndef CAPSTONE_DIET
13579 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13580 #endif
13581 },
13582 {
13583 AArch64_URHADDv8i8, ARM64_INS_URHADD,
13584 #ifndef CAPSTONE_DIET
13585 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13586 #endif
13587 },
13588 {
13589 AArch64_URSHLv16i8, ARM64_INS_URSHL,
13590 #ifndef CAPSTONE_DIET
13591 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13592 #endif
13593 },
13594 {
13595 AArch64_URSHLv1i64, ARM64_INS_URSHL,
13596 #ifndef CAPSTONE_DIET
13597 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13598 #endif
13599 },
13600 {
13601 AArch64_URSHLv2i32, ARM64_INS_URSHL,
13602 #ifndef CAPSTONE_DIET
13603 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13604 #endif
13605 },
13606 {
13607 AArch64_URSHLv2i64, ARM64_INS_URSHL,
13608 #ifndef CAPSTONE_DIET
13609 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13610 #endif
13611 },
13612 {
13613 AArch64_URSHLv4i16, ARM64_INS_URSHL,
13614 #ifndef CAPSTONE_DIET
13615 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13616 #endif
13617 },
13618 {
13619 AArch64_URSHLv4i32, ARM64_INS_URSHL,
13620 #ifndef CAPSTONE_DIET
13621 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13622 #endif
13623 },
13624 {
13625 AArch64_URSHLv8i16, ARM64_INS_URSHL,
13626 #ifndef CAPSTONE_DIET
13627 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13628 #endif
13629 },
13630 {
13631 AArch64_URSHLv8i8, ARM64_INS_URSHL,
13632 #ifndef CAPSTONE_DIET
13633 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13634 #endif
13635 },
13636 {
13637 AArch64_URSHRd, ARM64_INS_URSHR,
13638 #ifndef CAPSTONE_DIET
13639 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13640 #endif
13641 },
13642 {
13643 AArch64_URSHRv16i8_shift, ARM64_INS_URSHR,
13644 #ifndef CAPSTONE_DIET
13645 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13646 #endif
13647 },
13648 {
13649 AArch64_URSHRv2i32_shift, ARM64_INS_URSHR,
13650 #ifndef CAPSTONE_DIET
13651 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13652 #endif
13653 },
13654 {
13655 AArch64_URSHRv2i64_shift, ARM64_INS_URSHR,
13656 #ifndef CAPSTONE_DIET
13657 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13658 #endif
13659 },
13660 {
13661 AArch64_URSHRv4i16_shift, ARM64_INS_URSHR,
13662 #ifndef CAPSTONE_DIET
13663 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13664 #endif
13665 },
13666 {
13667 AArch64_URSHRv4i32_shift, ARM64_INS_URSHR,
13668 #ifndef CAPSTONE_DIET
13669 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13670 #endif
13671 },
13672 {
13673 AArch64_URSHRv8i16_shift, ARM64_INS_URSHR,
13674 #ifndef CAPSTONE_DIET
13675 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13676 #endif
13677 },
13678 {
13679 AArch64_URSHRv8i8_shift, ARM64_INS_URSHR,
13680 #ifndef CAPSTONE_DIET
13681 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13682 #endif
13683 },
13684 {
13685 AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE,
13686 #ifndef CAPSTONE_DIET
13687 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13688 #endif
13689 },
13690 {
13691 AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE,
13692 #ifndef CAPSTONE_DIET
13693 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13694 #endif
13695 },
13696 {
13697 AArch64_URSRAd, ARM64_INS_URSRA,
13698 #ifndef CAPSTONE_DIET
13699 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13700 #endif
13701 },
13702 {
13703 AArch64_URSRAv16i8_shift, ARM64_INS_URSRA,
13704 #ifndef CAPSTONE_DIET
13705 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13706 #endif
13707 },
13708 {
13709 AArch64_URSRAv2i32_shift, ARM64_INS_URSRA,
13710 #ifndef CAPSTONE_DIET
13711 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13712 #endif
13713 },
13714 {
13715 AArch64_URSRAv2i64_shift, ARM64_INS_URSRA,
13716 #ifndef CAPSTONE_DIET
13717 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13718 #endif
13719 },
13720 {
13721 AArch64_URSRAv4i16_shift, ARM64_INS_URSRA,
13722 #ifndef CAPSTONE_DIET
13723 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13724 #endif
13725 },
13726 {
13727 AArch64_URSRAv4i32_shift, ARM64_INS_URSRA,
13728 #ifndef CAPSTONE_DIET
13729 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13730 #endif
13731 },
13732 {
13733 AArch64_URSRAv8i16_shift, ARM64_INS_URSRA,
13734 #ifndef CAPSTONE_DIET
13735 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13736 #endif
13737 },
13738 {
13739 AArch64_URSRAv8i8_shift, ARM64_INS_URSRA,
13740 #ifndef CAPSTONE_DIET
13741 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13742 #endif
13743 },
13744 {
13745 AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2,
13746 #ifndef CAPSTONE_DIET
13747 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13748 #endif
13749 },
13750 {
13751 AArch64_USHLLv2i32_shift, ARM64_INS_USHLL,
13752 #ifndef CAPSTONE_DIET
13753 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13754 #endif
13755 },
13756 {
13757 AArch64_USHLLv4i16_shift, ARM64_INS_USHLL,
13758 #ifndef CAPSTONE_DIET
13759 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13760 #endif
13761 },
13762 {
13763 AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2,
13764 #ifndef CAPSTONE_DIET
13765 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13766 #endif
13767 },
13768 {
13769 AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2,
13770 #ifndef CAPSTONE_DIET
13771 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13772 #endif
13773 },
13774 {
13775 AArch64_USHLLv8i8_shift, ARM64_INS_USHLL,
13776 #ifndef CAPSTONE_DIET
13777 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13778 #endif
13779 },
13780 {
13781 AArch64_USHLv16i8, ARM64_INS_USHL,
13782 #ifndef CAPSTONE_DIET
13783 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13784 #endif
13785 },
13786 {
13787 AArch64_USHLv1i64, ARM64_INS_USHL,
13788 #ifndef CAPSTONE_DIET
13789 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13790 #endif
13791 },
13792 {
13793 AArch64_USHLv2i32, ARM64_INS_USHL,
13794 #ifndef CAPSTONE_DIET
13795 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13796 #endif
13797 },
13798 {
13799 AArch64_USHLv2i64, ARM64_INS_USHL,
13800 #ifndef CAPSTONE_DIET
13801 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13802 #endif
13803 },
13804 {
13805 AArch64_USHLv4i16, ARM64_INS_USHL,
13806 #ifndef CAPSTONE_DIET
13807 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13808 #endif
13809 },
13810 {
13811 AArch64_USHLv4i32, ARM64_INS_USHL,
13812 #ifndef CAPSTONE_DIET
13813 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13814 #endif
13815 },
13816 {
13817 AArch64_USHLv8i16, ARM64_INS_USHL,
13818 #ifndef CAPSTONE_DIET
13819 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13820 #endif
13821 },
13822 {
13823 AArch64_USHLv8i8, ARM64_INS_USHL,
13824 #ifndef CAPSTONE_DIET
13825 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13826 #endif
13827 },
13828 {
13829 AArch64_USHRd, ARM64_INS_USHR,
13830 #ifndef CAPSTONE_DIET
13831 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13832 #endif
13833 },
13834 {
13835 AArch64_USHRv16i8_shift, ARM64_INS_USHR,
13836 #ifndef CAPSTONE_DIET
13837 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13838 #endif
13839 },
13840 {
13841 AArch64_USHRv2i32_shift, ARM64_INS_USHR,
13842 #ifndef CAPSTONE_DIET
13843 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13844 #endif
13845 },
13846 {
13847 AArch64_USHRv2i64_shift, ARM64_INS_USHR,
13848 #ifndef CAPSTONE_DIET
13849 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13850 #endif
13851 },
13852 {
13853 AArch64_USHRv4i16_shift, ARM64_INS_USHR,
13854 #ifndef CAPSTONE_DIET
13855 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13856 #endif
13857 },
13858 {
13859 AArch64_USHRv4i32_shift, ARM64_INS_USHR,
13860 #ifndef CAPSTONE_DIET
13861 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13862 #endif
13863 },
13864 {
13865 AArch64_USHRv8i16_shift, ARM64_INS_USHR,
13866 #ifndef CAPSTONE_DIET
13867 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13868 #endif
13869 },
13870 {
13871 AArch64_USHRv8i8_shift, ARM64_INS_USHR,
13872 #ifndef CAPSTONE_DIET
13873 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13874 #endif
13875 },
13876 {
13877 AArch64_USQADDv16i8, ARM64_INS_USQADD,
13878 #ifndef CAPSTONE_DIET
13879 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13880 #endif
13881 },
13882 {
13883 AArch64_USQADDv1i16, ARM64_INS_USQADD,
13884 #ifndef CAPSTONE_DIET
13885 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13886 #endif
13887 },
13888 {
13889 AArch64_USQADDv1i32, ARM64_INS_USQADD,
13890 #ifndef CAPSTONE_DIET
13891 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13892 #endif
13893 },
13894 {
13895 AArch64_USQADDv1i64, ARM64_INS_USQADD,
13896 #ifndef CAPSTONE_DIET
13897 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13898 #endif
13899 },
13900 {
13901 AArch64_USQADDv1i8, ARM64_INS_USQADD,
13902 #ifndef CAPSTONE_DIET
13903 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13904 #endif
13905 },
13906 {
13907 AArch64_USQADDv2i32, ARM64_INS_USQADD,
13908 #ifndef CAPSTONE_DIET
13909 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13910 #endif
13911 },
13912 {
13913 AArch64_USQADDv2i64, ARM64_INS_USQADD,
13914 #ifndef CAPSTONE_DIET
13915 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13916 #endif
13917 },
13918 {
13919 AArch64_USQADDv4i16, ARM64_INS_USQADD,
13920 #ifndef CAPSTONE_DIET
13921 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13922 #endif
13923 },
13924 {
13925 AArch64_USQADDv4i32, ARM64_INS_USQADD,
13926 #ifndef CAPSTONE_DIET
13927 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13928 #endif
13929 },
13930 {
13931 AArch64_USQADDv8i16, ARM64_INS_USQADD,
13932 #ifndef CAPSTONE_DIET
13933 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13934 #endif
13935 },
13936 {
13937 AArch64_USQADDv8i8, ARM64_INS_USQADD,
13938 #ifndef CAPSTONE_DIET
13939 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13940 #endif
13941 },
13942 {
13943 AArch64_USRAd, ARM64_INS_USRA,
13944 #ifndef CAPSTONE_DIET
13945 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13946 #endif
13947 },
13948 {
13949 AArch64_USRAv16i8_shift, ARM64_INS_USRA,
13950 #ifndef CAPSTONE_DIET
13951 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13952 #endif
13953 },
13954 {
13955 AArch64_USRAv2i32_shift, ARM64_INS_USRA,
13956 #ifndef CAPSTONE_DIET
13957 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13958 #endif
13959 },
13960 {
13961 AArch64_USRAv2i64_shift, ARM64_INS_USRA,
13962 #ifndef CAPSTONE_DIET
13963 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13964 #endif
13965 },
13966 {
13967 AArch64_USRAv4i16_shift, ARM64_INS_USRA,
13968 #ifndef CAPSTONE_DIET
13969 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13970 #endif
13971 },
13972 {
13973 AArch64_USRAv4i32_shift, ARM64_INS_USRA,
13974 #ifndef CAPSTONE_DIET
13975 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13976 #endif
13977 },
13978 {
13979 AArch64_USRAv8i16_shift, ARM64_INS_USRA,
13980 #ifndef CAPSTONE_DIET
13981 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13982 #endif
13983 },
13984 {
13985 AArch64_USRAv8i8_shift, ARM64_INS_USRA,
13986 #ifndef CAPSTONE_DIET
13987 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13988 #endif
13989 },
13990 {
13991 AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2,
13992 #ifndef CAPSTONE_DIET
13993 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
13994 #endif
13995 },
13996 {
13997 AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL,
13998 #ifndef CAPSTONE_DIET
13999 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14000 #endif
14001 },
14002 {
14003 AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL,
14004 #ifndef CAPSTONE_DIET
14005 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14006 #endif
14007 },
14008 {
14009 AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2,
14010 #ifndef CAPSTONE_DIET
14011 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14012 #endif
14013 },
14014 {
14015 AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2,
14016 #ifndef CAPSTONE_DIET
14017 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14018 #endif
14019 },
14020 {
14021 AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL,
14022 #ifndef CAPSTONE_DIET
14023 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14024 #endif
14025 },
14026 {
14027 AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2,
14028 #ifndef CAPSTONE_DIET
14029 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14030 #endif
14031 },
14032 {
14033 AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW,
14034 #ifndef CAPSTONE_DIET
14035 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14036 #endif
14037 },
14038 {
14039 AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW,
14040 #ifndef CAPSTONE_DIET
14041 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14042 #endif
14043 },
14044 {
14045 AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2,
14046 #ifndef CAPSTONE_DIET
14047 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14048 #endif
14049 },
14050 {
14051 AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2,
14052 #ifndef CAPSTONE_DIET
14053 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14054 #endif
14055 },
14056 {
14057 AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW,
14058 #ifndef CAPSTONE_DIET
14059 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14060 #endif
14061 },
14062 {
14063 AArch64_UZP1v16i8, ARM64_INS_UZP1,
14064 #ifndef CAPSTONE_DIET
14065 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14066 #endif
14067 },
14068 {
14069 AArch64_UZP1v2i32, ARM64_INS_UZP1,
14070 #ifndef CAPSTONE_DIET
14071 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14072 #endif
14073 },
14074 {
14075 AArch64_UZP1v2i64, ARM64_INS_UZP1,
14076 #ifndef CAPSTONE_DIET
14077 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14078 #endif
14079 },
14080 {
14081 AArch64_UZP1v4i16, ARM64_INS_UZP1,
14082 #ifndef CAPSTONE_DIET
14083 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14084 #endif
14085 },
14086 {
14087 AArch64_UZP1v4i32, ARM64_INS_UZP1,
14088 #ifndef CAPSTONE_DIET
14089 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14090 #endif
14091 },
14092 {
14093 AArch64_UZP1v8i16, ARM64_INS_UZP1,
14094 #ifndef CAPSTONE_DIET
14095 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14096 #endif
14097 },
14098 {
14099 AArch64_UZP1v8i8, ARM64_INS_UZP1,
14100 #ifndef CAPSTONE_DIET
14101 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14102 #endif
14103 },
14104 {
14105 AArch64_UZP2v16i8, ARM64_INS_UZP2,
14106 #ifndef CAPSTONE_DIET
14107 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14108 #endif
14109 },
14110 {
14111 AArch64_UZP2v2i32, ARM64_INS_UZP2,
14112 #ifndef CAPSTONE_DIET
14113 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14114 #endif
14115 },
14116 {
14117 AArch64_UZP2v2i64, ARM64_INS_UZP2,
14118 #ifndef CAPSTONE_DIET
14119 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14120 #endif
14121 },
14122 {
14123 AArch64_UZP2v4i16, ARM64_INS_UZP2,
14124 #ifndef CAPSTONE_DIET
14125 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14126 #endif
14127 },
14128 {
14129 AArch64_UZP2v4i32, ARM64_INS_UZP2,
14130 #ifndef CAPSTONE_DIET
14131 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14132 #endif
14133 },
14134 {
14135 AArch64_UZP2v8i16, ARM64_INS_UZP2,
14136 #ifndef CAPSTONE_DIET
14137 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14138 #endif
14139 },
14140 {
14141 AArch64_UZP2v8i8, ARM64_INS_UZP2,
14142 #ifndef CAPSTONE_DIET
14143 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14144 #endif
14145 },
14146 {
14147 AArch64_XTNv16i8, ARM64_INS_XTN2,
14148 #ifndef CAPSTONE_DIET
14149 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14150 #endif
14151 },
14152 {
14153 AArch64_XTNv2i32, ARM64_INS_XTN,
14154 #ifndef CAPSTONE_DIET
14155 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14156 #endif
14157 },
14158 {
14159 AArch64_XTNv4i16, ARM64_INS_XTN,
14160 #ifndef CAPSTONE_DIET
14161 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14162 #endif
14163 },
14164 {
14165 AArch64_XTNv4i32, ARM64_INS_XTN2,
14166 #ifndef CAPSTONE_DIET
14167 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14168 #endif
14169 },
14170 {
14171 AArch64_XTNv8i16, ARM64_INS_XTN2,
14172 #ifndef CAPSTONE_DIET
14173 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14174 #endif
14175 },
14176 {
14177 AArch64_XTNv8i8, ARM64_INS_XTN,
14178 #ifndef CAPSTONE_DIET
14179 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14180 #endif
14181 },
14182 {
14183 AArch64_ZIP1v16i8, ARM64_INS_ZIP1,
14184 #ifndef CAPSTONE_DIET
14185 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14186 #endif
14187 },
14188 {
14189 AArch64_ZIP1v2i32, ARM64_INS_ZIP1,
14190 #ifndef CAPSTONE_DIET
14191 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14192 #endif
14193 },
14194 {
14195 AArch64_ZIP1v2i64, ARM64_INS_ZIP1,
14196 #ifndef CAPSTONE_DIET
14197 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14198 #endif
14199 },
14200 {
14201 AArch64_ZIP1v4i16, ARM64_INS_ZIP1,
14202 #ifndef CAPSTONE_DIET
14203 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14204 #endif
14205 },
14206 {
14207 AArch64_ZIP1v4i32, ARM64_INS_ZIP1,
14208 #ifndef CAPSTONE_DIET
14209 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14210 #endif
14211 },
14212 {
14213 AArch64_ZIP1v8i16, ARM64_INS_ZIP1,
14214 #ifndef CAPSTONE_DIET
14215 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14216 #endif
14217 },
14218 {
14219 AArch64_ZIP1v8i8, ARM64_INS_ZIP1,
14220 #ifndef CAPSTONE_DIET
14221 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14222 #endif
14223 },
14224 {
14225 AArch64_ZIP2v16i8, ARM64_INS_ZIP2,
14226 #ifndef CAPSTONE_DIET
14227 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14228 #endif
14229 },
14230 {
14231 AArch64_ZIP2v2i32, ARM64_INS_ZIP2,
14232 #ifndef CAPSTONE_DIET
14233 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14234 #endif
14235 },
14236 {
14237 AArch64_ZIP2v2i64, ARM64_INS_ZIP2,
14238 #ifndef CAPSTONE_DIET
14239 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14240 #endif
14241 },
14242 {
14243 AArch64_ZIP2v4i16, ARM64_INS_ZIP2,
14244 #ifndef CAPSTONE_DIET
14245 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14246 #endif
14247 },
14248 {
14249 AArch64_ZIP2v4i32, ARM64_INS_ZIP2,
14250 #ifndef CAPSTONE_DIET
14251 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14252 #endif
14253 },
14254 {
14255 AArch64_ZIP2v8i16, ARM64_INS_ZIP2,
14256 #ifndef CAPSTONE_DIET
14257 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14258 #endif
14259 },
14260 {
14261 AArch64_ZIP2v8i8, ARM64_INS_ZIP2,
14262 #ifndef CAPSTONE_DIET
14263 { 0 }, { 0 }, { ARM64_GRP_NEON, 0 }, 0, 0
14264 #endif
14265 },
14266 };
14267
14268 // some alias instruction only need to be defined locally to satisfy
14269 // some lookup functions
14270 // just make sure these IDs never reuse any other IDs ARM_INS_*
14271 #define ARM64_INS_NEGS (unsigned short)-1
14272 #define ARM64_INS_NGCS (unsigned short)-2
14273
14274 // given internal insn id, return public instruction info
AArch64_get_insn_id(cs_struct * h,cs_insn * insn,unsigned int id)14275 void AArch64_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
14276 {
14277 int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
14278 if (i != 0) {
14279 insn->id = insns[i].mapid;
14280
14281 if (h->detail) {
14282 #ifndef CAPSTONE_DIET
14283 cs_struct handle;
14284 handle.detail = h->detail;
14285
14286 memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
14287 insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use);
14288
14289 memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
14290 insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
14291
14292 memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
14293 insn->detail->groups_count = (uint8_t)count_positive(insns[i].groups);
14294
14295 insn->detail->arm64.update_flags = cs_reg_write((csh)&handle, insn, ARM64_REG_NZCV);
14296
14297 if (insns[i].branch || insns[i].indirect_branch) {
14298 // this insn also belongs to JUMP group. add JUMP group
14299 insn->detail->groups[insn->detail->groups_count] = ARM64_GRP_JUMP;
14300 insn->detail->groups_count++;
14301 }
14302 #endif
14303 }
14304 }
14305 }
14306
14307 static const name_map insn_name_maps[] = {
14308 { ARM64_INS_INVALID, NULL },
14309
14310 { ARM64_INS_ABS, "abs" },
14311 { ARM64_INS_ADC, "adc" },
14312 { ARM64_INS_ADDHN, "addhn" },
14313 { ARM64_INS_ADDHN2, "addhn2" },
14314 { ARM64_INS_ADDP, "addp" },
14315 { ARM64_INS_ADD, "add" },
14316 { ARM64_INS_ADDV, "addv" },
14317 { ARM64_INS_ADR, "adr" },
14318 { ARM64_INS_ADRP, "adrp" },
14319 { ARM64_INS_AESD, "aesd" },
14320 { ARM64_INS_AESE, "aese" },
14321 { ARM64_INS_AESIMC, "aesimc" },
14322 { ARM64_INS_AESMC, "aesmc" },
14323 { ARM64_INS_AND, "and" },
14324 { ARM64_INS_ASR, "asr" },
14325 { ARM64_INS_B, "b" },
14326 { ARM64_INS_BFM, "bfm" },
14327 { ARM64_INS_BIC, "bic" },
14328 { ARM64_INS_BIF, "bif" },
14329 { ARM64_INS_BIT, "bit" },
14330 { ARM64_INS_BL, "bl" },
14331 { ARM64_INS_BLR, "blr" },
14332 { ARM64_INS_BR, "br" },
14333 { ARM64_INS_BRK, "brk" },
14334 { ARM64_INS_BSL, "bsl" },
14335 { ARM64_INS_CBNZ, "cbnz" },
14336 { ARM64_INS_CBZ, "cbz" },
14337 { ARM64_INS_CCMN, "ccmn" },
14338 { ARM64_INS_CCMP, "ccmp" },
14339 { ARM64_INS_CLREX, "clrex" },
14340 { ARM64_INS_CLS, "cls" },
14341 { ARM64_INS_CLZ, "clz" },
14342 { ARM64_INS_CMEQ, "cmeq" },
14343 { ARM64_INS_CMGE, "cmge" },
14344 { ARM64_INS_CMGT, "cmgt" },
14345 { ARM64_INS_CMHI, "cmhi" },
14346 { ARM64_INS_CMHS, "cmhs" },
14347 { ARM64_INS_CMLE, "cmle" },
14348 { ARM64_INS_CMLT, "cmlt" },
14349 { ARM64_INS_CMTST, "cmtst" },
14350 { ARM64_INS_CNT, "cnt" },
14351 { ARM64_INS_MOV, "mov" },
14352 { ARM64_INS_CRC32B, "crc32b" },
14353 { ARM64_INS_CRC32CB, "crc32cb" },
14354 { ARM64_INS_CRC32CH, "crc32ch" },
14355 { ARM64_INS_CRC32CW, "crc32cw" },
14356 { ARM64_INS_CRC32CX, "crc32cx" },
14357 { ARM64_INS_CRC32H, "crc32h" },
14358 { ARM64_INS_CRC32W, "crc32w" },
14359 { ARM64_INS_CRC32X, "crc32x" },
14360 { ARM64_INS_CSEL, "csel" },
14361 { ARM64_INS_CSINC, "csinc" },
14362 { ARM64_INS_CSINV, "csinv" },
14363 { ARM64_INS_CSNEG, "csneg" },
14364 { ARM64_INS_DCPS1, "dcps1" },
14365 { ARM64_INS_DCPS2, "dcps2" },
14366 { ARM64_INS_DCPS3, "dcps3" },
14367 { ARM64_INS_DMB, "dmb" },
14368 { ARM64_INS_DRPS, "drps" },
14369 { ARM64_INS_DSB, "dsb" },
14370 { ARM64_INS_DUP, "dup" },
14371 { ARM64_INS_EON, "eon" },
14372 { ARM64_INS_EOR, "eor" },
14373 { ARM64_INS_ERET, "eret" },
14374 { ARM64_INS_EXTR, "extr" },
14375 { ARM64_INS_EXT, "ext" },
14376 { ARM64_INS_FABD, "fabd" },
14377 { ARM64_INS_FABS, "fabs" },
14378 { ARM64_INS_FACGE, "facge" },
14379 { ARM64_INS_FACGT, "facgt" },
14380 { ARM64_INS_FADD, "fadd" },
14381 { ARM64_INS_FADDP, "faddp" },
14382 { ARM64_INS_FCCMP, "fccmp" },
14383 { ARM64_INS_FCCMPE, "fccmpe" },
14384 { ARM64_INS_FCMEQ, "fcmeq" },
14385 { ARM64_INS_FCMGE, "fcmge" },
14386 { ARM64_INS_FCMGT, "fcmgt" },
14387 { ARM64_INS_FCMLE, "fcmle" },
14388 { ARM64_INS_FCMLT, "fcmlt" },
14389 { ARM64_INS_FCMP, "fcmp" },
14390 { ARM64_INS_FCMPE, "fcmpe" },
14391 { ARM64_INS_FCSEL, "fcsel" },
14392 { ARM64_INS_FCVTAS, "fcvtas" },
14393 { ARM64_INS_FCVTAU, "fcvtau" },
14394 { ARM64_INS_FCVT, "fcvt" },
14395 { ARM64_INS_FCVTL, "fcvtl" },
14396 { ARM64_INS_FCVTL2, "fcvtl2" },
14397 { ARM64_INS_FCVTMS, "fcvtms" },
14398 { ARM64_INS_FCVTMU, "fcvtmu" },
14399 { ARM64_INS_FCVTNS, "fcvtns" },
14400 { ARM64_INS_FCVTNU, "fcvtnu" },
14401 { ARM64_INS_FCVTN, "fcvtn" },
14402 { ARM64_INS_FCVTN2, "fcvtn2" },
14403 { ARM64_INS_FCVTPS, "fcvtps" },
14404 { ARM64_INS_FCVTPU, "fcvtpu" },
14405 { ARM64_INS_FCVTXN, "fcvtxn" },
14406 { ARM64_INS_FCVTXN2, "fcvtxn2" },
14407 { ARM64_INS_FCVTZS, "fcvtzs" },
14408 { ARM64_INS_FCVTZU, "fcvtzu" },
14409 { ARM64_INS_FDIV, "fdiv" },
14410 { ARM64_INS_FMADD, "fmadd" },
14411 { ARM64_INS_FMAX, "fmax" },
14412 { ARM64_INS_FMAXNM, "fmaxnm" },
14413 { ARM64_INS_FMAXNMP, "fmaxnmp" },
14414 { ARM64_INS_FMAXNMV, "fmaxnmv" },
14415 { ARM64_INS_FMAXP, "fmaxp" },
14416 { ARM64_INS_FMAXV, "fmaxv" },
14417 { ARM64_INS_FMIN, "fmin" },
14418 { ARM64_INS_FMINNM, "fminnm" },
14419 { ARM64_INS_FMINNMP, "fminnmp" },
14420 { ARM64_INS_FMINNMV, "fminnmv" },
14421 { ARM64_INS_FMINP, "fminp" },
14422 { ARM64_INS_FMINV, "fminv" },
14423 { ARM64_INS_FMLA, "fmla" },
14424 { ARM64_INS_FMLS, "fmls" },
14425 { ARM64_INS_FMOV, "fmov" },
14426 { ARM64_INS_FMSUB, "fmsub" },
14427 { ARM64_INS_FMUL, "fmul" },
14428 { ARM64_INS_FMULX, "fmulx" },
14429 { ARM64_INS_FNEG, "fneg" },
14430 { ARM64_INS_FNMADD, "fnmadd" },
14431 { ARM64_INS_FNMSUB, "fnmsub" },
14432 { ARM64_INS_FNMUL, "fnmul" },
14433 { ARM64_INS_FRECPE, "frecpe" },
14434 { ARM64_INS_FRECPS, "frecps" },
14435 { ARM64_INS_FRECPX, "frecpx" },
14436 { ARM64_INS_FRINTA, "frinta" },
14437 { ARM64_INS_FRINTI, "frinti" },
14438 { ARM64_INS_FRINTM, "frintm" },
14439 { ARM64_INS_FRINTN, "frintn" },
14440 { ARM64_INS_FRINTP, "frintp" },
14441 { ARM64_INS_FRINTX, "frintx" },
14442 { ARM64_INS_FRINTZ, "frintz" },
14443 { ARM64_INS_FRSQRTE, "frsqrte" },
14444 { ARM64_INS_FRSQRTS, "frsqrts" },
14445 { ARM64_INS_FSQRT, "fsqrt" },
14446 { ARM64_INS_FSUB, "fsub" },
14447 { ARM64_INS_HINT, "hint" },
14448 { ARM64_INS_HLT, "hlt" },
14449 { ARM64_INS_HVC, "hvc" },
14450 { ARM64_INS_INS, "ins" },
14451 { ARM64_INS_ISB, "isb" },
14452 { ARM64_INS_LD1, "ld1" },
14453 { ARM64_INS_LD1R, "ld1r" },
14454 { ARM64_INS_LD2R, "ld2r" },
14455 { ARM64_INS_LD2, "ld2" },
14456 { ARM64_INS_LD3R, "ld3r" },
14457 { ARM64_INS_LD3, "ld3" },
14458 { ARM64_INS_LD4, "ld4" },
14459 { ARM64_INS_LD4R, "ld4r" },
14460 { ARM64_INS_LDARB, "ldarb" },
14461 { ARM64_INS_LDARH, "ldarh" },
14462 { ARM64_INS_LDAR, "ldar" },
14463 { ARM64_INS_LDAXP, "ldaxp" },
14464 { ARM64_INS_LDAXRB, "ldaxrb" },
14465 { ARM64_INS_LDAXRH, "ldaxrh" },
14466 { ARM64_INS_LDAXR, "ldaxr" },
14467 { ARM64_INS_LDNP, "ldnp" },
14468 { ARM64_INS_LDP, "ldp" },
14469 { ARM64_INS_LDPSW, "ldpsw" },
14470 { ARM64_INS_LDRB, "ldrb" },
14471 { ARM64_INS_LDR, "ldr" },
14472 { ARM64_INS_LDRH, "ldrh" },
14473 { ARM64_INS_LDRSB, "ldrsb" },
14474 { ARM64_INS_LDRSH, "ldrsh" },
14475 { ARM64_INS_LDRSW, "ldrsw" },
14476 { ARM64_INS_LDTRB, "ldtrb" },
14477 { ARM64_INS_LDTRH, "ldtrh" },
14478 { ARM64_INS_LDTRSB, "ldtrsb" },
14479 { ARM64_INS_LDTRSH, "ldtrsh" },
14480 { ARM64_INS_LDTRSW, "ldtrsw" },
14481 { ARM64_INS_LDTR, "ldtr" },
14482 { ARM64_INS_LDURB, "ldurb" },
14483 { ARM64_INS_LDUR, "ldur" },
14484 { ARM64_INS_LDURH, "ldurh" },
14485 { ARM64_INS_LDURSB, "ldursb" },
14486 { ARM64_INS_LDURSH, "ldursh" },
14487 { ARM64_INS_LDURSW, "ldursw" },
14488 { ARM64_INS_LDXP, "ldxp" },
14489 { ARM64_INS_LDXRB, "ldxrb" },
14490 { ARM64_INS_LDXRH, "ldxrh" },
14491 { ARM64_INS_LDXR, "ldxr" },
14492 { ARM64_INS_LSL, "lsl" },
14493 { ARM64_INS_LSR, "lsr" },
14494 { ARM64_INS_MADD, "madd" },
14495 { ARM64_INS_MLA, "mla" },
14496 { ARM64_INS_MLS, "mls" },
14497 { ARM64_INS_MOVI, "movi" },
14498 { ARM64_INS_MOVK, "movk" },
14499 { ARM64_INS_MOVN, "movn" },
14500 { ARM64_INS_MOVZ, "movz" },
14501 { ARM64_INS_MRS, "mrs" },
14502 { ARM64_INS_MSR, "msr" },
14503 { ARM64_INS_MSUB, "msub" },
14504 { ARM64_INS_MUL, "mul" },
14505 { ARM64_INS_MVNI, "mvni" },
14506 { ARM64_INS_NEG, "neg" },
14507 { ARM64_INS_NOT, "not" },
14508 { ARM64_INS_ORN, "orn" },
14509 { ARM64_INS_ORR, "orr" },
14510 { ARM64_INS_PMULL2, "pmull2" },
14511 { ARM64_INS_PMULL, "pmull" },
14512 { ARM64_INS_PMUL, "pmul" },
14513 { ARM64_INS_PRFM, "prfm" },
14514 { ARM64_INS_PRFUM, "prfum" },
14515 { ARM64_INS_RADDHN, "raddhn" },
14516 { ARM64_INS_RADDHN2, "raddhn2" },
14517 { ARM64_INS_RBIT, "rbit" },
14518 { ARM64_INS_RET, "ret" },
14519 { ARM64_INS_REV16, "rev16" },
14520 { ARM64_INS_REV32, "rev32" },
14521 { ARM64_INS_REV64, "rev64" },
14522 { ARM64_INS_REV, "rev" },
14523 { ARM64_INS_ROR, "ror" },
14524 { ARM64_INS_RSHRN2, "rshrn2" },
14525 { ARM64_INS_RSHRN, "rshrn" },
14526 { ARM64_INS_RSUBHN, "rsubhn" },
14527 { ARM64_INS_RSUBHN2, "rsubhn2" },
14528 { ARM64_INS_SABAL2, "sabal2" },
14529 { ARM64_INS_SABAL, "sabal" },
14530 { ARM64_INS_SABA, "saba" },
14531 { ARM64_INS_SABDL2, "sabdl2" },
14532 { ARM64_INS_SABDL, "sabdl" },
14533 { ARM64_INS_SABD, "sabd" },
14534 { ARM64_INS_SADALP, "sadalp" },
14535 { ARM64_INS_SADDLP, "saddlp" },
14536 { ARM64_INS_SADDLV, "saddlv" },
14537 { ARM64_INS_SADDL2, "saddl2" },
14538 { ARM64_INS_SADDL, "saddl" },
14539 { ARM64_INS_SADDW2, "saddw2" },
14540 { ARM64_INS_SADDW, "saddw" },
14541 { ARM64_INS_SBC, "sbc" },
14542 { ARM64_INS_SBFM, "sbfm" },
14543 { ARM64_INS_SCVTF, "scvtf" },
14544 { ARM64_INS_SDIV, "sdiv" },
14545 { ARM64_INS_SHA1C, "sha1c" },
14546 { ARM64_INS_SHA1H, "sha1h" },
14547 { ARM64_INS_SHA1M, "sha1m" },
14548 { ARM64_INS_SHA1P, "sha1p" },
14549 { ARM64_INS_SHA1SU0, "sha1su0" },
14550 { ARM64_INS_SHA1SU1, "sha1su1" },
14551 { ARM64_INS_SHA256H2, "sha256h2" },
14552 { ARM64_INS_SHA256H, "sha256h" },
14553 { ARM64_INS_SHA256SU0, "sha256su0" },
14554 { ARM64_INS_SHA256SU1, "sha256su1" },
14555 { ARM64_INS_SHADD, "shadd" },
14556 { ARM64_INS_SHLL2, "shll2" },
14557 { ARM64_INS_SHLL, "shll" },
14558 { ARM64_INS_SHL, "shl" },
14559 { ARM64_INS_SHRN2, "shrn2" },
14560 { ARM64_INS_SHRN, "shrn" },
14561 { ARM64_INS_SHSUB, "shsub" },
14562 { ARM64_INS_SLI, "sli" },
14563 { ARM64_INS_SMADDL, "smaddl" },
14564 { ARM64_INS_SMAXP, "smaxp" },
14565 { ARM64_INS_SMAXV, "smaxv" },
14566 { ARM64_INS_SMAX, "smax" },
14567 { ARM64_INS_SMC, "smc" },
14568 { ARM64_INS_SMINP, "sminp" },
14569 { ARM64_INS_SMINV, "sminv" },
14570 { ARM64_INS_SMIN, "smin" },
14571 { ARM64_INS_SMLAL2, "smlal2" },
14572 { ARM64_INS_SMLAL, "smlal" },
14573 { ARM64_INS_SMLSL2, "smlsl2" },
14574 { ARM64_INS_SMLSL, "smlsl" },
14575 { ARM64_INS_SMOV, "smov" },
14576 { ARM64_INS_SMSUBL, "smsubl" },
14577 { ARM64_INS_SMULH, "smulh" },
14578 { ARM64_INS_SMULL2, "smull2" },
14579 { ARM64_INS_SMULL, "smull" },
14580 { ARM64_INS_SQABS, "sqabs" },
14581 { ARM64_INS_SQADD, "sqadd" },
14582 { ARM64_INS_SQDMLAL, "sqdmlal" },
14583 { ARM64_INS_SQDMLAL2, "sqdmlal2" },
14584 { ARM64_INS_SQDMLSL, "sqdmlsl" },
14585 { ARM64_INS_SQDMLSL2, "sqdmlsl2" },
14586 { ARM64_INS_SQDMULH, "sqdmulh" },
14587 { ARM64_INS_SQDMULL, "sqdmull" },
14588 { ARM64_INS_SQDMULL2, "sqdmull2" },
14589 { ARM64_INS_SQNEG, "sqneg" },
14590 { ARM64_INS_SQRDMULH, "sqrdmulh" },
14591 { ARM64_INS_SQRSHL, "sqrshl" },
14592 { ARM64_INS_SQRSHRN, "sqrshrn" },
14593 { ARM64_INS_SQRSHRN2, "sqrshrn2" },
14594 { ARM64_INS_SQRSHRUN, "sqrshrun" },
14595 { ARM64_INS_SQRSHRUN2, "sqrshrun2" },
14596 { ARM64_INS_SQSHLU, "sqshlu" },
14597 { ARM64_INS_SQSHL, "sqshl" },
14598 { ARM64_INS_SQSHRN, "sqshrn" },
14599 { ARM64_INS_SQSHRN2, "sqshrn2" },
14600 { ARM64_INS_SQSHRUN, "sqshrun" },
14601 { ARM64_INS_SQSHRUN2, "sqshrun2" },
14602 { ARM64_INS_SQSUB, "sqsub" },
14603 { ARM64_INS_SQXTN2, "sqxtn2" },
14604 { ARM64_INS_SQXTN, "sqxtn" },
14605 { ARM64_INS_SQXTUN2, "sqxtun2" },
14606 { ARM64_INS_SQXTUN, "sqxtun" },
14607 { ARM64_INS_SRHADD, "srhadd" },
14608 { ARM64_INS_SRI, "sri" },
14609 { ARM64_INS_SRSHL, "srshl" },
14610 { ARM64_INS_SRSHR, "srshr" },
14611 { ARM64_INS_SRSRA, "srsra" },
14612 { ARM64_INS_SSHLL2, "sshll2" },
14613 { ARM64_INS_SSHLL, "sshll" },
14614 { ARM64_INS_SSHL, "sshl" },
14615 { ARM64_INS_SSHR, "sshr" },
14616 { ARM64_INS_SSRA, "ssra" },
14617 { ARM64_INS_SSUBL2, "ssubl2" },
14618 { ARM64_INS_SSUBL, "ssubl" },
14619 { ARM64_INS_SSUBW2, "ssubw2" },
14620 { ARM64_INS_SSUBW, "ssubw" },
14621 { ARM64_INS_ST1, "st1" },
14622 { ARM64_INS_ST2, "st2" },
14623 { ARM64_INS_ST3, "st3" },
14624 { ARM64_INS_ST4, "st4" },
14625 { ARM64_INS_STLRB, "stlrb" },
14626 { ARM64_INS_STLRH, "stlrh" },
14627 { ARM64_INS_STLR, "stlr" },
14628 { ARM64_INS_STLXP, "stlxp" },
14629 { ARM64_INS_STLXRB, "stlxrb" },
14630 { ARM64_INS_STLXRH, "stlxrh" },
14631 { ARM64_INS_STLXR, "stlxr" },
14632 { ARM64_INS_STNP, "stnp" },
14633 { ARM64_INS_STP, "stp" },
14634 { ARM64_INS_STRB, "strb" },
14635 { ARM64_INS_STR, "str" },
14636 { ARM64_INS_STRH, "strh" },
14637 { ARM64_INS_STTRB, "sttrb" },
14638 { ARM64_INS_STTRH, "sttrh" },
14639 { ARM64_INS_STTR, "sttr" },
14640 { ARM64_INS_STURB, "sturb" },
14641 { ARM64_INS_STUR, "stur" },
14642 { ARM64_INS_STURH, "sturh" },
14643 { ARM64_INS_STXP, "stxp" },
14644 { ARM64_INS_STXRB, "stxrb" },
14645 { ARM64_INS_STXRH, "stxrh" },
14646 { ARM64_INS_STXR, "stxr" },
14647 { ARM64_INS_SUBHN, "subhn" },
14648 { ARM64_INS_SUBHN2, "subhn2" },
14649 { ARM64_INS_SUB, "sub" },
14650 { ARM64_INS_SUQADD, "suqadd" },
14651 { ARM64_INS_SVC, "svc" },
14652 { ARM64_INS_SYSL, "sysl" },
14653 { ARM64_INS_SYS, "sys" },
14654 { ARM64_INS_TBL, "tbl" },
14655 { ARM64_INS_TBNZ, "tbnz" },
14656 { ARM64_INS_TBX, "tbx" },
14657 { ARM64_INS_TBZ, "tbz" },
14658 { ARM64_INS_TRN1, "trn1" },
14659 { ARM64_INS_TRN2, "trn2" },
14660 { ARM64_INS_UABAL2, "uabal2" },
14661 { ARM64_INS_UABAL, "uabal" },
14662 { ARM64_INS_UABA, "uaba" },
14663 { ARM64_INS_UABDL2, "uabdl2" },
14664 { ARM64_INS_UABDL, "uabdl" },
14665 { ARM64_INS_UABD, "uabd" },
14666 { ARM64_INS_UADALP, "uadalp" },
14667 { ARM64_INS_UADDLP, "uaddlp" },
14668 { ARM64_INS_UADDLV, "uaddlv" },
14669 { ARM64_INS_UADDL2, "uaddl2" },
14670 { ARM64_INS_UADDL, "uaddl" },
14671 { ARM64_INS_UADDW2, "uaddw2" },
14672 { ARM64_INS_UADDW, "uaddw" },
14673 { ARM64_INS_UBFM, "ubfm" },
14674 { ARM64_INS_UCVTF, "ucvtf" },
14675 { ARM64_INS_UDIV, "udiv" },
14676 { ARM64_INS_UHADD, "uhadd" },
14677 { ARM64_INS_UHSUB, "uhsub" },
14678 { ARM64_INS_UMADDL, "umaddl" },
14679 { ARM64_INS_UMAXP, "umaxp" },
14680 { ARM64_INS_UMAXV, "umaxv" },
14681 { ARM64_INS_UMAX, "umax" },
14682 { ARM64_INS_UMINP, "uminp" },
14683 { ARM64_INS_UMINV, "uminv" },
14684 { ARM64_INS_UMIN, "umin" },
14685 { ARM64_INS_UMLAL2, "umlal2" },
14686 { ARM64_INS_UMLAL, "umlal" },
14687 { ARM64_INS_UMLSL2, "umlsl2" },
14688 { ARM64_INS_UMLSL, "umlsl" },
14689 { ARM64_INS_UMOV, "umov" },
14690 { ARM64_INS_UMSUBL, "umsubl" },
14691 { ARM64_INS_UMULH, "umulh" },
14692 { ARM64_INS_UMULL2, "umull2" },
14693 { ARM64_INS_UMULL, "umull" },
14694 { ARM64_INS_UQADD, "uqadd" },
14695 { ARM64_INS_UQRSHL, "uqrshl" },
14696 { ARM64_INS_UQRSHRN, "uqrshrn" },
14697 { ARM64_INS_UQRSHRN2, "uqrshrn2" },
14698 { ARM64_INS_UQSHL, "uqshl" },
14699 { ARM64_INS_UQSHRN, "uqshrn" },
14700 { ARM64_INS_UQSHRN2, "uqshrn2" },
14701 { ARM64_INS_UQSUB, "uqsub" },
14702 { ARM64_INS_UQXTN2, "uqxtn2" },
14703 { ARM64_INS_UQXTN, "uqxtn" },
14704 { ARM64_INS_URECPE, "urecpe" },
14705 { ARM64_INS_URHADD, "urhadd" },
14706 { ARM64_INS_URSHL, "urshl" },
14707 { ARM64_INS_URSHR, "urshr" },
14708 { ARM64_INS_URSQRTE, "ursqrte" },
14709 { ARM64_INS_URSRA, "ursra" },
14710 { ARM64_INS_USHLL2, "ushll2" },
14711 { ARM64_INS_USHLL, "ushll" },
14712 { ARM64_INS_USHL, "ushl" },
14713 { ARM64_INS_USHR, "ushr" },
14714 { ARM64_INS_USQADD, "usqadd" },
14715 { ARM64_INS_USRA, "usra" },
14716 { ARM64_INS_USUBL2, "usubl2" },
14717 { ARM64_INS_USUBL, "usubl" },
14718 { ARM64_INS_USUBW2, "usubw2" },
14719 { ARM64_INS_USUBW, "usubw" },
14720 { ARM64_INS_UZP1, "uzp1" },
14721 { ARM64_INS_UZP2, "uzp2" },
14722 { ARM64_INS_XTN2, "xtn2" },
14723 { ARM64_INS_XTN, "xtn" },
14724 { ARM64_INS_ZIP1, "zip1" },
14725 { ARM64_INS_ZIP2, "zip2" },
14726 };
14727
14728 // map *S & alias instructions back to original id
14729 static const name_map alias_insn_name_maps[] = {
14730 { ARM64_INS_ADC, "adcs" },
14731 { ARM64_INS_AND, "ands" },
14732 { ARM64_INS_ADD, "adds" },
14733 { ARM64_INS_BIC, "bics" },
14734 { ARM64_INS_SBC, "sbcs" },
14735 { ARM64_INS_SUB, "subs" },
14736
14737 // alias insn
14738 { ARM64_INS_MNEG, "mneg" },
14739 { ARM64_INS_UMNEGL, "umnegl" },
14740 { ARM64_INS_SMNEGL, "smnegl" },
14741 { ARM64_INS_NOP, "nop" },
14742 { ARM64_INS_YIELD, "yield" },
14743 { ARM64_INS_WFE, "wfe" },
14744 { ARM64_INS_WFI, "wfi" },
14745 { ARM64_INS_SEV, "sev" },
14746 { ARM64_INS_SEVL, "sevl" },
14747 { ARM64_INS_NGC, "ngc" },
14748 { ARM64_INS_NGCS, "ngcs" },
14749 { ARM64_INS_NEGS, "negs" },
14750
14751 { ARM64_INS_SBFIZ, "sbfiz" },
14752 { ARM64_INS_UBFIZ, "ubfiz" },
14753 { ARM64_INS_SBFX, "sbfx" },
14754 { ARM64_INS_UBFX, "ubfx" },
14755 { ARM64_INS_BFI, "bfi" },
14756 { ARM64_INS_BFXIL, "bfxil" },
14757 { ARM64_INS_CMN, "cmn" },
14758 { ARM64_INS_MVN, "mvn" },
14759 { ARM64_INS_TST, "tst" },
14760 { ARM64_INS_CSET, "cset" },
14761 { ARM64_INS_CINC, "cinc" },
14762 { ARM64_INS_CSETM, "csetm" },
14763 { ARM64_INS_CINV, "cinv" },
14764 { ARM64_INS_CNEG, "cneg" },
14765 { ARM64_INS_SXTB, "sxtb" },
14766 { ARM64_INS_SXTH, "sxth" },
14767 { ARM64_INS_SXTW, "sxtw" },
14768 { ARM64_INS_CMP, "cmp" },
14769 { ARM64_INS_UXTB, "uxtb" },
14770 { ARM64_INS_UXTH, "uxth" },
14771 { ARM64_INS_UXTW, "uxtw" },
14772
14773 { ARM64_INS_IC, "ic" },
14774 { ARM64_INS_DC, "dc" },
14775 { ARM64_INS_AT, "at" },
14776 { ARM64_INS_TLBI, "tlbi" },
14777 };
14778
AArch64_insn_name(csh handle,unsigned int id)14779 const char *AArch64_insn_name(csh handle, unsigned int id)
14780 {
14781 #ifndef CAPSTONE_DIET
14782 unsigned int i;
14783
14784 if (id >= ARM64_INS_ENDING)
14785 return NULL;
14786
14787 if (id < ARR_SIZE(insn_name_maps))
14788 return insn_name_maps[id].name;
14789
14790 // then find alias insn
14791 for (i = 0; i < ARR_SIZE(alias_insn_name_maps); i++) {
14792 if (alias_insn_name_maps[i].id == id)
14793 return alias_insn_name_maps[i].name;
14794 }
14795
14796 // not found
14797 return NULL;
14798 #else
14799 return NULL;
14800 #endif
14801 }
14802
14803 #ifndef CAPSTONE_DIET
14804 static const name_map group_name_maps[] = {
14805 // generic groups
14806 { ARM64_GRP_INVALID, NULL },
14807 { ARM64_GRP_JUMP, "jump" },
14808
14809 // architecture-specific groups
14810 { ARM64_GRP_CRYPTO, "crypto" },
14811 { ARM64_GRP_FPARMV8, "fparmv8" },
14812 { ARM64_GRP_NEON, "neon" },
14813 { ARM64_GRP_CRC, "crc" },
14814
14815 };
14816 #endif
14817
AArch64_group_name(csh handle,unsigned int id)14818 const char *AArch64_group_name(csh handle, unsigned int id)
14819 {
14820 #ifndef CAPSTONE_DIET
14821 // verify group id
14822 if (id >= ARM64_GRP_ENDING || (id > ARM64_GRP_JUMP && id < ARM64_GRP_CRYPTO))
14823 return NULL;
14824
14825 // NOTE: when new generic groups are added, 2 must be changed accordingly
14826 if (id >= 128)
14827 return group_name_maps[id - 128 + 2].name;
14828 else
14829 return group_name_maps[id].name;
14830 #else
14831 return NULL;
14832 #endif
14833 }
14834
14835 // map instruction name to public instruction ID
AArch64_map_insn(const char * name)14836 arm64_reg AArch64_map_insn(const char *name)
14837 {
14838 // NOTE: skip first NULL name in insn_name_maps
14839 int i = name2id(&insn_name_maps[1], ARR_SIZE(insn_name_maps) - 1, name);
14840
14841 if (i == -1)
14842 // try again with 'special' insn that is not available in insn_name_maps
14843 i = name2id(alias_insn_name_maps, ARR_SIZE(alias_insn_name_maps), name);
14844
14845 return (i != -1)? i : ARM64_REG_INVALID;
14846 }
14847
14848 // map internal raw vregister to 'public' register
AArch64_map_vregister(unsigned int r)14849 arm64_reg AArch64_map_vregister(unsigned int r)
14850 {
14851 // for some reasons different Arm64 can map different register number to
14852 // the same register. this function handles the issue for exposing Mips
14853 // operands by mapping internal registers to 'public' register.
14854 static const unsigned int map[] = { 0,
14855 0, 0, 0, 0, 0,
14856 0, 0, 0, 0, 0,
14857 0, 0, 0, 0, 0,
14858 0, 0, 0, 0, 0,
14859 0, 0, 0, 0, 0,
14860 0, 0, 0, 0, 0,
14861 0, 0, 0, 0, 0,
14862 0, 0, 0, 0, ARM64_REG_V0,
14863 ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
14864 ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
14865 ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
14866 ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
14867 ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
14868 ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
14869 ARM64_REG_V31, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14870 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
14871 0, 0, 0, ARM64_REG_V0, ARM64_REG_V1,
14872 ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
14873 ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
14874 ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
14875 ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
14876 ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
14877 ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
14878 0, 0, 0, 0, 0,
14879 0, 0, 0, 0, 0,
14880 0, 0, 0, 0, 0,
14881 0, 0, 0, 0, 0,
14882 0, 0, 0, 0, 0,
14883 0, 0, 0, 0, 0,
14884 0, 0, 0, 0, 0,
14885 0, 0, 0, 0, 0,
14886 0, 0, 0, 0, 0,
14887 0, 0, 0, 0, 0,
14888 0, 0, 0, 0, 0,
14889 0, 0, 0, 0, 0,
14890 0, 0, 0, 0, 0,
14891 0, 0, 0, 0, 0,
14892 0, 0, 0, 0, 0,
14893 0, 0, 0, 0, 0,
14894 0, 0, 0, 0, 0,
14895 0, 0, 0, 0, 0,
14896 0, 0, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
14897 ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
14898 ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
14899 ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
14900 ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
14901 ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
14902 ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0,
14903 ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5,
14904 ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10,
14905 ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15,
14906 ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20,
14907 ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25,
14908 ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30,
14909 ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3,
14910 ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8,
14911 ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13,
14912 ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18,
14913 ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23,
14914 ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28,
14915 ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1,
14916 ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6,
14917 ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11,
14918 ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16,
14919 ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21,
14920 ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26,
14921 ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31,
14922 ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2, ARM64_REG_V3, ARM64_REG_V4,
14923 ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7, ARM64_REG_V8, ARM64_REG_V9,
14924 ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12, ARM64_REG_V13, ARM64_REG_V14,
14925 ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17, ARM64_REG_V18, ARM64_REG_V19,
14926 ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22, ARM64_REG_V23, ARM64_REG_V24,
14927 ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27, ARM64_REG_V28, ARM64_REG_V29,
14928 ARM64_REG_V30, ARM64_REG_V31, ARM64_REG_V0, ARM64_REG_V1, ARM64_REG_V2,
14929 ARM64_REG_V3, ARM64_REG_V4, ARM64_REG_V5, ARM64_REG_V6, ARM64_REG_V7,
14930 ARM64_REG_V8, ARM64_REG_V9, ARM64_REG_V10, ARM64_REG_V11, ARM64_REG_V12,
14931 ARM64_REG_V13, ARM64_REG_V14, ARM64_REG_V15, ARM64_REG_V16, ARM64_REG_V17,
14932 ARM64_REG_V18, ARM64_REG_V19, ARM64_REG_V20, ARM64_REG_V21, ARM64_REG_V22,
14933 ARM64_REG_V23, ARM64_REG_V24, ARM64_REG_V25, ARM64_REG_V26, ARM64_REG_V27,
14934 ARM64_REG_V28, ARM64_REG_V29, ARM64_REG_V30, ARM64_REG_V31, };
14935
14936 if (r < ARR_SIZE(map))
14937 return map[r];
14938
14939 // cannot find this register
14940 return 0;
14941 }
14942
arm64_op_addVectorArrSpecifier(MCInst * MI,int sp)14943 void arm64_op_addVectorArrSpecifier(MCInst * MI, int sp)
14944 {
14945 if (MI->csh->detail) {
14946 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vas = sp;
14947 }
14948 }
14949
arm64_op_addVectorElementSizeSpecifier(MCInst * MI,int sp)14950 void arm64_op_addVectorElementSizeSpecifier(MCInst * MI, int sp)
14951 {
14952 if (MI->csh->detail) {
14953 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count - 1].vess = sp;
14954 }
14955 }
14956
arm64_op_addFP(MCInst * MI,float fp)14957 void arm64_op_addFP(MCInst *MI, float fp)
14958 {
14959 if (MI->csh->detail) {
14960 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
14961 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = fp;
14962 MI->flat_insn->detail->arm64.op_count++;
14963 }
14964 }
14965
arm64_op_addImm(MCInst * MI,int64_t imm)14966 void arm64_op_addImm(MCInst *MI, int64_t imm)
14967 {
14968 if (MI->csh->detail) {
14969 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
14970 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)imm;
14971 MI->flat_insn->detail->arm64.op_count++;
14972 }
14973 }
14974
14975 #endif
14976