1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|*Target Register Enum Values *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9/* Capstone Disassembly Engine, http://www.capstone-engine.org */ 10/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ 11 12 13#ifdef GET_REGINFO_ENUM 14#undef GET_REGINFO_ENUM 15 16enum { 17 X86_NoRegister, 18 X86_AH = 1, 19 X86_AL = 2, 20 X86_AX = 3, 21 X86_BH = 4, 22 X86_BL = 5, 23 X86_BP = 6, 24 X86_BPL = 7, 25 X86_BX = 8, 26 X86_CH = 9, 27 X86_CL = 10, 28 X86_CS = 11, 29 X86_CX = 12, 30 X86_DH = 13, 31 X86_DI = 14, 32 X86_DIL = 15, 33 X86_DL = 16, 34 X86_DS = 17, 35 X86_DX = 18, 36 X86_EAX = 19, 37 X86_EBP = 20, 38 X86_EBX = 21, 39 X86_ECX = 22, 40 X86_EDI = 23, 41 X86_EDX = 24, 42 X86_EFLAGS = 25, 43 X86_EIP = 26, 44 X86_EIZ = 27, 45 X86_ES = 28, 46 X86_ESI = 29, 47 X86_ESP = 30, 48 X86_FPSW = 31, 49 X86_FS = 32, 50 X86_GS = 33, 51 X86_IP = 34, 52 X86_RAX = 35, 53 X86_RBP = 36, 54 X86_RBX = 37, 55 X86_RCX = 38, 56 X86_RDI = 39, 57 X86_RDX = 40, 58 X86_RIP = 41, 59 X86_RIZ = 42, 60 X86_RSI = 43, 61 X86_RSP = 44, 62 X86_SI = 45, 63 X86_SIL = 46, 64 X86_SP = 47, 65 X86_SPL = 48, 66 X86_SS = 49, 67 X86_CR0 = 50, 68 X86_CR1 = 51, 69 X86_CR2 = 52, 70 X86_CR3 = 53, 71 X86_CR4 = 54, 72 X86_CR5 = 55, 73 X86_CR6 = 56, 74 X86_CR7 = 57, 75 X86_CR8 = 58, 76 X86_CR9 = 59, 77 X86_CR10 = 60, 78 X86_CR11 = 61, 79 X86_CR12 = 62, 80 X86_CR13 = 63, 81 X86_CR14 = 64, 82 X86_CR15 = 65, 83 X86_DR0 = 66, 84 X86_DR1 = 67, 85 X86_DR2 = 68, 86 X86_DR3 = 69, 87 X86_DR4 = 70, 88 X86_DR5 = 71, 89 X86_DR6 = 72, 90 X86_DR7 = 73, 91 X86_DR8 = 74, 92 X86_DR9 = 75, 93 X86_DR10 = 76, 94 X86_DR11 = 77, 95 X86_DR12 = 78, 96 X86_DR13 = 79, 97 X86_DR14 = 80, 98 X86_DR15 = 81, 99 X86_FP0 = 82, 100 X86_FP1 = 83, 101 X86_FP2 = 84, 102 X86_FP3 = 85, 103 X86_FP4 = 86, 104 X86_FP5 = 87, 105 X86_FP6 = 88, 106 X86_FP7 = 89, 107 X86_K0 = 90, 108 X86_K1 = 91, 109 X86_K2 = 92, 110 X86_K3 = 93, 111 X86_K4 = 94, 112 X86_K5 = 95, 113 X86_K6 = 96, 114 X86_K7 = 97, 115 X86_MM0 = 98, 116 X86_MM1 = 99, 117 X86_MM2 = 100, 118 X86_MM3 = 101, 119 X86_MM4 = 102, 120 X86_MM5 = 103, 121 X86_MM6 = 104, 122 X86_MM7 = 105, 123 X86_R8 = 106, 124 X86_R9 = 107, 125 X86_R10 = 108, 126 X86_R11 = 109, 127 X86_R12 = 110, 128 X86_R13 = 111, 129 X86_R14 = 112, 130 X86_R15 = 113, 131 X86_ST0 = 114, 132 X86_ST1 = 115, 133 X86_ST2 = 116, 134 X86_ST3 = 117, 135 X86_ST4 = 118, 136 X86_ST5 = 119, 137 X86_ST6 = 120, 138 X86_ST7 = 121, 139 X86_XMM0 = 122, 140 X86_XMM1 = 123, 141 X86_XMM2 = 124, 142 X86_XMM3 = 125, 143 X86_XMM4 = 126, 144 X86_XMM5 = 127, 145 X86_XMM6 = 128, 146 X86_XMM7 = 129, 147 X86_XMM8 = 130, 148 X86_XMM9 = 131, 149 X86_XMM10 = 132, 150 X86_XMM11 = 133, 151 X86_XMM12 = 134, 152 X86_XMM13 = 135, 153 X86_XMM14 = 136, 154 X86_XMM15 = 137, 155 X86_XMM16 = 138, 156 X86_XMM17 = 139, 157 X86_XMM18 = 140, 158 X86_XMM19 = 141, 159 X86_XMM20 = 142, 160 X86_XMM21 = 143, 161 X86_XMM22 = 144, 162 X86_XMM23 = 145, 163 X86_XMM24 = 146, 164 X86_XMM25 = 147, 165 X86_XMM26 = 148, 166 X86_XMM27 = 149, 167 X86_XMM28 = 150, 168 X86_XMM29 = 151, 169 X86_XMM30 = 152, 170 X86_XMM31 = 153, 171 X86_YMM0 = 154, 172 X86_YMM1 = 155, 173 X86_YMM2 = 156, 174 X86_YMM3 = 157, 175 X86_YMM4 = 158, 176 X86_YMM5 = 159, 177 X86_YMM6 = 160, 178 X86_YMM7 = 161, 179 X86_YMM8 = 162, 180 X86_YMM9 = 163, 181 X86_YMM10 = 164, 182 X86_YMM11 = 165, 183 X86_YMM12 = 166, 184 X86_YMM13 = 167, 185 X86_YMM14 = 168, 186 X86_YMM15 = 169, 187 X86_YMM16 = 170, 188 X86_YMM17 = 171, 189 X86_YMM18 = 172, 190 X86_YMM19 = 173, 191 X86_YMM20 = 174, 192 X86_YMM21 = 175, 193 X86_YMM22 = 176, 194 X86_YMM23 = 177, 195 X86_YMM24 = 178, 196 X86_YMM25 = 179, 197 X86_YMM26 = 180, 198 X86_YMM27 = 181, 199 X86_YMM28 = 182, 200 X86_YMM29 = 183, 201 X86_YMM30 = 184, 202 X86_YMM31 = 185, 203 X86_ZMM0 = 186, 204 X86_ZMM1 = 187, 205 X86_ZMM2 = 188, 206 X86_ZMM3 = 189, 207 X86_ZMM4 = 190, 208 X86_ZMM5 = 191, 209 X86_ZMM6 = 192, 210 X86_ZMM7 = 193, 211 X86_ZMM8 = 194, 212 X86_ZMM9 = 195, 213 X86_ZMM10 = 196, 214 X86_ZMM11 = 197, 215 X86_ZMM12 = 198, 216 X86_ZMM13 = 199, 217 X86_ZMM14 = 200, 218 X86_ZMM15 = 201, 219 X86_ZMM16 = 202, 220 X86_ZMM17 = 203, 221 X86_ZMM18 = 204, 222 X86_ZMM19 = 205, 223 X86_ZMM20 = 206, 224 X86_ZMM21 = 207, 225 X86_ZMM22 = 208, 226 X86_ZMM23 = 209, 227 X86_ZMM24 = 210, 228 X86_ZMM25 = 211, 229 X86_ZMM26 = 212, 230 X86_ZMM27 = 213, 231 X86_ZMM28 = 214, 232 X86_ZMM29 = 215, 233 X86_ZMM30 = 216, 234 X86_ZMM31 = 217, 235 X86_R8B = 218, 236 X86_R9B = 219, 237 X86_R10B = 220, 238 X86_R11B = 221, 239 X86_R12B = 222, 240 X86_R13B = 223, 241 X86_R14B = 224, 242 X86_R15B = 225, 243 X86_R8D = 226, 244 X86_R9D = 227, 245 X86_R10D = 228, 246 X86_R11D = 229, 247 X86_R12D = 230, 248 X86_R13D = 231, 249 X86_R14D = 232, 250 X86_R15D = 233, 251 X86_R8W = 234, 252 X86_R9W = 235, 253 X86_R10W = 236, 254 X86_R11W = 237, 255 X86_R12W = 238, 256 X86_R13W = 239, 257 X86_R14W = 240, 258 X86_R15W = 241, 259 X86_NUM_TARGET_REGS // 242 260}; 261 262// Register classes 263enum { 264 X86_GR8RegClassID = 0, 265 X86_GR8_NOREXRegClassID = 1, 266 X86_VK1RegClassID = 2, 267 X86_VK2RegClassID = 3, 268 X86_VK4RegClassID = 4, 269 X86_VK8RegClassID = 5, 270 X86_VK1WMRegClassID = 6, 271 X86_VK2WMRegClassID = 7, 272 X86_VK4WMRegClassID = 8, 273 X86_VK8WMRegClassID = 9, 274 X86_GR8_ABCD_HRegClassID = 10, 275 X86_GR8_ABCD_LRegClassID = 11, 276 X86_GR16RegClassID = 12, 277 X86_GR16_NOREXRegClassID = 13, 278 X86_VK16RegClassID = 14, 279 X86_VK16WMRegClassID = 15, 280 X86_SEGMENT_REGRegClassID = 16, 281 X86_GR16_ABCDRegClassID = 17, 282 X86_FPCCRRegClassID = 18, 283 X86_FR32XRegClassID = 19, 284 X86_FR32RegClassID = 20, 285 X86_GR32RegClassID = 21, 286 X86_GR32_NOAXRegClassID = 22, 287 X86_GR32_NOSPRegClassID = 23, 288 X86_GR32_NOAX_and_GR32_NOSPRegClassID = 24, 289 X86_DEBUG_REGRegClassID = 25, 290 X86_GR32_NOREXRegClassID = 26, 291 X86_VK32RegClassID = 27, 292 X86_GR32_NOAX_and_GR32_NOREXRegClassID = 28, 293 X86_GR32_NOREX_NOSPRegClassID = 29, 294 X86_RFP32RegClassID = 30, 295 X86_VK32WMRegClassID = 31, 296 X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 32, 297 X86_GR32_ABCDRegClassID = 33, 298 X86_GR32_ABCD_and_GR32_NOAXRegClassID = 34, 299 X86_GR32_TCRegClassID = 35, 300 X86_GR32_ADRegClassID = 36, 301 X86_GR32_NOAX_and_GR32_TCRegClassID = 37, 302 X86_CCRRegClassID = 38, 303 X86_GR32_AD_and_GR32_NOAXRegClassID = 39, 304 X86_RFP64RegClassID = 40, 305 X86_FR64XRegClassID = 41, 306 X86_GR64RegClassID = 42, 307 X86_CONTROL_REGRegClassID = 43, 308 X86_FR64RegClassID = 44, 309 X86_GR64_with_sub_8bitRegClassID = 45, 310 X86_GR64_NOSPRegClassID = 46, 311 X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 47, 312 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID = 48, 313 X86_GR64_NOREXRegClassID = 49, 314 X86_GR64_TCRegClassID = 50, 315 X86_GR64_NOSP_and_GR64_TCRegClassID = 51, 316 X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 52, 317 X86_VK64RegClassID = 53, 318 X86_VR64RegClassID = 54, 319 X86_GR64_NOREX_NOSPRegClassID = 55, 320 X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 56, 321 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 57, 322 X86_VK64WMRegClassID = 58, 323 X86_GR64_NOREX_and_GR64_TCRegClassID = 59, 324 X86_GR64_TCW64RegClassID = 60, 325 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID = 61, 326 X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID = 62, 327 X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID = 63, 328 X86_GR64_ABCDRegClassID = 64, 329 X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID = 65, 330 X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID = 66, 331 X86_GR64_with_sub_32bit_in_GR32_TCRegClassID = 67, 332 X86_GR64_with_sub_32bit_in_GR32_ADRegClassID = 68, 333 X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID = 69, 334 X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID = 70, 335 X86_RSTRegClassID = 71, 336 X86_RFP80RegClassID = 72, 337 X86_VR128XRegClassID = 73, 338 X86_VR128RegClassID = 74, 339 X86_VR256XRegClassID = 75, 340 X86_VR256RegClassID = 76, 341 X86_VR512RegClassID = 77, 342 X86_VR512_with_sub_xmm_in_FR32RegClassID = 78, 343}; 344 345#endif // GET_REGINFO_ENUM 346 347#ifdef GET_REGINFO_MC_DESC 348#undef GET_REGINFO_MC_DESC 349 350static const MCPhysReg X86RegDiffLists[] = { 351 /* 0 */ 0, 1, 0, 352 /* 3 */ 2, 1, 0, 353 /* 6 */ 5, 1, 0, 354 /* 9 */ 65522, 16, 1, 0, 355 /* 13 */ 65522, 17, 1, 0, 356 /* 17 */ 65427, 1, 0, 357 /* 20 */ 65475, 1, 0, 358 /* 23 */ 65520, 65522, 1, 0, 359 /* 27 */ 65520, 65527, 1, 0, 360 /* 31 */ 8, 2, 0, 361 /* 34 */ 4, 0, 362 /* 36 */ 65521, 8, 0, 363 /* 39 */ 9, 0, 364 /* 41 */ 13, 0, 365 /* 43 */ 65535, 65519, 14, 0, 366 /* 47 */ 65535, 65520, 14, 0, 367 /* 51 */ 65528, 15, 0, 368 /* 54 */ 2, 6, 16, 0, 369 /* 58 */ 5, 6, 16, 0, 370 /* 62 */ 65535, 9, 16, 0, 371 /* 66 */ 2, 10, 16, 0, 372 /* 70 */ 3, 10, 16, 0, 373 /* 74 */ 3, 13, 16, 0, 374 /* 78 */ 4, 13, 16, 0, 375 /* 82 */ 65535, 14, 16, 0, 376 /* 86 */ 1, 16, 16, 0, 377 /* 90 */ 2, 16, 16, 0, 378 /* 94 */ 17, 0, 379 /* 96 */ 32, 32, 0, 380 /* 99 */ 65221, 0, 381 /* 101 */ 65381, 0, 382 /* 103 */ 65389, 0, 383 /* 105 */ 65397, 0, 384 /* 107 */ 16, 65528, 65416, 0, 385 /* 111 */ 65445, 0, 386 /* 113 */ 65477, 0, 387 /* 115 */ 65504, 65504, 0, 388 /* 118 */ 65509, 0, 389 /* 120 */ 120, 8, 65520, 0, 390 /* 124 */ 65523, 0, 391 /* 126 */ 65530, 0, 392 /* 128 */ 65531, 0, 393 /* 130 */ 65532, 0, 394 /* 132 */ 65520, 65530, 65534, 65533, 0, 395 /* 137 */ 65534, 0, 396 /* 139 */ 65520, 65523, 65533, 65535, 0, 397 /* 144 */ 65520, 65526, 65534, 65535, 0, 398 /* 149 */ 65520, 65520, 65535, 65535, 0, 399}; 400 401static const uint16_t X86SubRegIdxLists[] = { 402 /* 0 */ 4, 3, 1, 0, 403 /* 4 */ 4, 3, 1, 2, 0, 404 /* 9 */ 4, 3, 0, 405 /* 12 */ 6, 5, 0, 406}; 407 408static MCRegisterDesc X86RegDesc[] = { // Descriptors 409 { 5, 0, 0, 0, 0, 0 }, 410 { 850, 2, 90, 3, 2273, 0 }, 411 { 878, 2, 86, 3, 2273, 0 }, 412 { 996, 151, 87, 6, 0, 2 }, 413 { 853, 2, 78, 3, 2193, 0 }, 414 { 881, 2, 74, 3, 2193, 0 }, 415 { 907, 1, 83, 2, 544, 3 }, 416 { 898, 2, 82, 3, 544, 0 }, 417 { 1004, 141, 75, 6, 48, 2 }, 418 { 856, 2, 70, 3, 2081, 0 }, 419 { 884, 2, 66, 3, 2081, 0 }, 420 { 930, 2, 2, 3, 2081, 0 }, 421 { 1012, 146, 67, 6, 96, 2 }, 422 { 859, 2, 58, 3, 2049, 0 }, 423 { 863, 1, 63, 2, 624, 3 }, 424 { 890, 2, 62, 3, 624, 0 }, 425 { 887, 2, 54, 3, 2017, 0 }, 426 { 933, 2, 2, 3, 2017, 0 }, 427 { 1020, 134, 55, 6, 496, 2 }, 428 { 995, 150, 56, 5, 0, 2 }, 429 { 906, 24, 56, 1, 544, 3 }, 430 { 1003, 140, 56, 5, 323, 2 }, 431 { 1011, 145, 56, 5, 323, 2 }, 432 { 862, 28, 56, 1, 624, 3 }, 433 { 1019, 133, 56, 5, 496, 2 }, 434 { 942, 2, 2, 3, 1985, 0 }, 435 { 914, 37, 52, 10, 1985, 5 }, 436 { 1027, 2, 2, 3, 1985, 0 }, 437 { 936, 2, 2, 3, 1985, 0 }, 438 { 870, 10, 45, 1, 1985, 3 }, 439 { 922, 14, 45, 1, 1985, 3 }, 440 { 990, 2, 2, 3, 1985, 0 }, 441 { 939, 2, 2, 3, 1985, 0 }, 442 { 946, 2, 2, 3, 1985, 0 }, 443 { 915, 2, 51, 3, 656, 0 }, 444 { 999, 149, 2, 4, 0, 2 }, 445 { 910, 23, 2, 0, 544, 3 }, 446 { 1007, 139, 2, 4, 275, 2 }, 447 { 1015, 144, 2, 4, 275, 2 }, 448 { 866, 27, 2, 0, 624, 3 }, 449 { 1023, 132, 2, 4, 496, 2 }, 450 { 918, 36, 2, 9, 1592, 5 }, 451 { 1031, 2, 2, 3, 1592, 0 }, 452 { 874, 9, 2, 0, 1889, 3 }, 453 { 926, 13, 2, 0, 1889, 3 }, 454 { 871, 1, 48, 2, 896, 3 }, 455 { 894, 2, 47, 3, 896, 0 }, 456 { 923, 1, 44, 2, 1504, 3 }, 457 { 902, 2, 43, 3, 1504, 0 }, 458 { 949, 2, 2, 3, 1889, 0 }, 459 { 86, 2, 2, 3, 1889, 0 }, 460 { 184, 2, 2, 3, 1889, 0 }, 461 { 264, 2, 2, 3, 1889, 0 }, 462 { 344, 2, 2, 3, 1889, 0 }, 463 { 424, 2, 2, 3, 1889, 0 }, 464 { 504, 2, 2, 3, 1889, 0 }, 465 { 574, 2, 2, 3, 1889, 0 }, 466 { 644, 2, 2, 3, 1889, 0 }, 467 { 707, 2, 2, 3, 1889, 0 }, 468 { 766, 2, 2, 3, 1889, 0 }, 469 { 18, 2, 2, 3, 1889, 0 }, 470 { 116, 2, 2, 3, 1889, 0 }, 471 { 214, 2, 2, 3, 1889, 0 }, 472 { 294, 2, 2, 3, 1889, 0 }, 473 { 374, 2, 2, 3, 1889, 0 }, 474 { 454, 2, 2, 3, 1889, 0 }, 475 { 90, 2, 2, 3, 1889, 0 }, 476 { 188, 2, 2, 3, 1889, 0 }, 477 { 268, 2, 2, 3, 1889, 0 }, 478 { 348, 2, 2, 3, 1889, 0 }, 479 { 428, 2, 2, 3, 1889, 0 }, 480 { 508, 2, 2, 3, 1889, 0 }, 481 { 578, 2, 2, 3, 1889, 0 }, 482 { 648, 2, 2, 3, 1889, 0 }, 483 { 711, 2, 2, 3, 1889, 0 }, 484 { 770, 2, 2, 3, 1889, 0 }, 485 { 23, 2, 2, 3, 1889, 0 }, 486 { 121, 2, 2, 3, 1889, 0 }, 487 { 219, 2, 2, 3, 1889, 0 }, 488 { 299, 2, 2, 3, 1889, 0 }, 489 { 379, 2, 2, 3, 1889, 0 }, 490 { 459, 2, 2, 3, 1889, 0 }, 491 { 82, 2, 2, 3, 1889, 0 }, 492 { 180, 2, 2, 3, 1889, 0 }, 493 { 260, 2, 2, 3, 1889, 0 }, 494 { 340, 2, 2, 3, 1889, 0 }, 495 { 420, 2, 2, 3, 1889, 0 }, 496 { 500, 2, 2, 3, 1889, 0 }, 497 { 570, 2, 2, 3, 1889, 0 }, 498 { 640, 2, 2, 3, 1889, 0 }, 499 { 64, 2, 2, 3, 1889, 0 }, 500 { 162, 2, 2, 3, 1889, 0 }, 501 { 242, 2, 2, 3, 1889, 0 }, 502 { 322, 2, 2, 3, 1889, 0 }, 503 { 402, 2, 2, 3, 1889, 0 }, 504 { 482, 2, 2, 3, 1889, 0 }, 505 { 552, 2, 2, 3, 1889, 0 }, 506 { 622, 2, 2, 3, 1889, 0 }, 507 { 68, 2, 2, 3, 1889, 0 }, 508 { 166, 2, 2, 3, 1889, 0 }, 509 { 246, 2, 2, 3, 1889, 0 }, 510 { 326, 2, 2, 3, 1889, 0 }, 511 { 406, 2, 2, 3, 1889, 0 }, 512 { 486, 2, 2, 3, 1889, 0 }, 513 { 556, 2, 2, 3, 1889, 0 }, 514 { 626, 2, 2, 3, 1889, 0 }, 515 { 708, 120, 2, 0, 1889, 3 }, 516 { 767, 120, 2, 0, 1889, 3 }, 517 { 19, 120, 2, 0, 1889, 3 }, 518 { 117, 120, 2, 0, 1889, 3 }, 519 { 215, 120, 2, 0, 1889, 3 }, 520 { 295, 120, 2, 0, 1889, 3 }, 521 { 375, 120, 2, 0, 1889, 3 }, 522 { 455, 120, 2, 0, 1889, 3 }, 523 { 94, 2, 2, 3, 1889, 0 }, 524 { 192, 2, 2, 3, 1889, 0 }, 525 { 272, 2, 2, 3, 1889, 0 }, 526 { 352, 2, 2, 3, 1889, 0 }, 527 { 432, 2, 2, 3, 1889, 0 }, 528 { 512, 2, 2, 3, 1889, 0 }, 529 { 582, 2, 2, 3, 1889, 0 }, 530 { 652, 2, 2, 3, 1889, 0 }, 531 { 67, 2, 96, 3, 1889, 0 }, 532 { 165, 2, 96, 3, 1889, 0 }, 533 { 245, 2, 96, 3, 1889, 0 }, 534 { 325, 2, 96, 3, 1889, 0 }, 535 { 405, 2, 96, 3, 1889, 0 }, 536 { 485, 2, 96, 3, 1889, 0 }, 537 { 555, 2, 96, 3, 1889, 0 }, 538 { 625, 2, 96, 3, 1889, 0 }, 539 { 692, 2, 96, 3, 1889, 0 }, 540 { 751, 2, 96, 3, 1889, 0 }, 541 { 0, 2, 96, 3, 1889, 0 }, 542 { 98, 2, 96, 3, 1889, 0 }, 543 { 196, 2, 96, 3, 1889, 0 }, 544 { 276, 2, 96, 3, 1889, 0 }, 545 { 356, 2, 96, 3, 1889, 0 }, 546 { 436, 2, 96, 3, 1889, 0 }, 547 { 516, 2, 96, 3, 1889, 0 }, 548 { 586, 2, 96, 3, 1889, 0 }, 549 { 656, 2, 96, 3, 1889, 0 }, 550 { 715, 2, 96, 3, 1889, 0 }, 551 { 28, 2, 96, 3, 1889, 0 }, 552 { 126, 2, 96, 3, 1889, 0 }, 553 { 224, 2, 96, 3, 1889, 0 }, 554 { 304, 2, 96, 3, 1889, 0 }, 555 { 384, 2, 96, 3, 1889, 0 }, 556 { 464, 2, 96, 3, 1889, 0 }, 557 { 534, 2, 96, 3, 1889, 0 }, 558 { 604, 2, 96, 3, 1889, 0 }, 559 { 674, 2, 96, 3, 1889, 0 }, 560 { 733, 2, 96, 3, 1889, 0 }, 561 { 46, 2, 96, 3, 1889, 0 }, 562 { 144, 2, 96, 3, 1889, 0 }, 563 { 72, 116, 97, 13, 1809, 7 }, 564 { 170, 116, 97, 13, 1809, 7 }, 565 { 250, 116, 97, 13, 1809, 7 }, 566 { 330, 116, 97, 13, 1809, 7 }, 567 { 410, 116, 97, 13, 1809, 7 }, 568 { 490, 116, 97, 13, 1809, 7 }, 569 { 560, 116, 97, 13, 1809, 7 }, 570 { 630, 116, 97, 13, 1809, 7 }, 571 { 697, 116, 97, 13, 1809, 7 }, 572 { 756, 116, 97, 13, 1809, 7 }, 573 { 6, 116, 97, 13, 1809, 7 }, 574 { 104, 116, 97, 13, 1809, 7 }, 575 { 202, 116, 97, 13, 1809, 7 }, 576 { 282, 116, 97, 13, 1809, 7 }, 577 { 362, 116, 97, 13, 1809, 7 }, 578 { 442, 116, 97, 13, 1809, 7 }, 579 { 522, 116, 97, 13, 1809, 7 }, 580 { 592, 116, 97, 13, 1809, 7 }, 581 { 662, 116, 97, 13, 1809, 7 }, 582 { 721, 116, 97, 13, 1809, 7 }, 583 { 34, 116, 97, 13, 1809, 7 }, 584 { 132, 116, 97, 13, 1809, 7 }, 585 { 230, 116, 97, 13, 1809, 7 }, 586 { 310, 116, 97, 13, 1809, 7 }, 587 { 390, 116, 97, 13, 1809, 7 }, 588 { 470, 116, 97, 13, 1809, 7 }, 589 { 540, 116, 97, 13, 1809, 7 }, 590 { 610, 116, 97, 13, 1809, 7 }, 591 { 680, 116, 97, 13, 1809, 7 }, 592 { 739, 116, 97, 13, 1809, 7 }, 593 { 52, 116, 97, 13, 1809, 7 }, 594 { 150, 116, 97, 13, 1809, 7 }, 595 { 77, 115, 2, 12, 1777, 7 }, 596 { 175, 115, 2, 12, 1777, 7 }, 597 { 255, 115, 2, 12, 1777, 7 }, 598 { 335, 115, 2, 12, 1777, 7 }, 599 { 415, 115, 2, 12, 1777, 7 }, 600 { 495, 115, 2, 12, 1777, 7 }, 601 { 565, 115, 2, 12, 1777, 7 }, 602 { 635, 115, 2, 12, 1777, 7 }, 603 { 702, 115, 2, 12, 1777, 7 }, 604 { 761, 115, 2, 12, 1777, 7 }, 605 { 12, 115, 2, 12, 1777, 7 }, 606 { 110, 115, 2, 12, 1777, 7 }, 607 { 208, 115, 2, 12, 1777, 7 }, 608 { 288, 115, 2, 12, 1777, 7 }, 609 { 368, 115, 2, 12, 1777, 7 }, 610 { 448, 115, 2, 12, 1777, 7 }, 611 { 528, 115, 2, 12, 1777, 7 }, 612 { 598, 115, 2, 12, 1777, 7 }, 613 { 668, 115, 2, 12, 1777, 7 }, 614 { 727, 115, 2, 12, 1777, 7 }, 615 { 40, 115, 2, 12, 1777, 7 }, 616 { 138, 115, 2, 12, 1777, 7 }, 617 { 236, 115, 2, 12, 1777, 7 }, 618 { 316, 115, 2, 12, 1777, 7 }, 619 { 396, 115, 2, 12, 1777, 7 }, 620 { 476, 115, 2, 12, 1777, 7 }, 621 { 546, 115, 2, 12, 1777, 7 }, 622 { 616, 115, 2, 12, 1777, 7 }, 623 { 686, 115, 2, 12, 1777, 7 }, 624 { 745, 115, 2, 12, 1777, 7 }, 625 { 58, 115, 2, 12, 1777, 7 }, 626 { 156, 115, 2, 12, 1777, 7 }, 627 { 804, 2, 107, 3, 1681, 0 }, 628 { 808, 2, 107, 3, 1681, 0 }, 629 { 774, 2, 107, 3, 1681, 0 }, 630 { 779, 2, 107, 3, 1681, 0 }, 631 { 784, 2, 107, 3, 1681, 0 }, 632 { 789, 2, 107, 3, 1681, 0 }, 633 { 794, 2, 107, 3, 1681, 0 }, 634 { 799, 2, 107, 3, 1681, 0 }, 635 { 842, 121, 109, 1, 1649, 3 }, 636 { 846, 121, 109, 1, 1649, 3 }, 637 { 812, 121, 109, 1, 1649, 3 }, 638 { 817, 121, 109, 1, 1649, 3 }, 639 { 822, 121, 109, 1, 1649, 3 }, 640 { 827, 121, 109, 1, 1649, 3 }, 641 { 832, 121, 109, 1, 1649, 3 }, 642 { 837, 121, 109, 1, 1649, 3 }, 643 { 982, 122, 108, 2, 1617, 3 }, 644 { 986, 122, 108, 2, 1617, 3 }, 645 { 952, 122, 108, 2, 1617, 3 }, 646 { 957, 122, 108, 2, 1617, 3 }, 647 { 962, 122, 108, 2, 1617, 3 }, 648 { 967, 122, 108, 2, 1617, 3 }, 649 { 972, 122, 108, 2, 1617, 3 }, 650 { 977, 122, 108, 2, 1617, 3 }, 651}; 652 653 // GR8 Register Class... 654 static const MCPhysReg GR8[] = { 655 X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, X86_SIL, X86_DIL, X86_BPL, X86_SPL, X86_R8B, X86_R9B, X86_R10B, X86_R11B, X86_R14B, X86_R15B, X86_R12B, X86_R13B, 656 }; 657 658 // GR8 Bit set. 659 static uint8_t GR8Bits[] = { 660 0xb6, 0xa6, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 661 }; 662 663 // GR8_NOREX Register Class... 664 static const MCPhysReg GR8_NOREX[] = { 665 X86_AL, X86_CL, X86_DL, X86_AH, X86_CH, X86_DH, X86_BL, X86_BH, 666 }; 667 668 // GR8_NOREX Bit set. 669 static const uint8_t GR8_NOREXBits[] = { 670 0x36, 0x26, 0x01, 671 }; 672 673 // VK1 Register Class... 674 static const MCPhysReg VK1[] = { 675 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 676 }; 677 678 // VK1 Bit set. 679 static uint8_t VK1Bits[] = { 680 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 681 }; 682 683 // VK2 Register Class... 684 static const MCPhysReg VK2[] = { 685 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 686 }; 687 688 // VK2 Bit set. 689 static uint8_t VK2Bits[] = { 690 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 691 }; 692 693 // VK4 Register Class... 694 static const MCPhysReg VK4[] = { 695 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 696 }; 697 698 // VK4 Bit set. 699 static uint8_t VK4Bits[] = { 700 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 701 }; 702 703 // VK8 Register Class... 704 static const MCPhysReg VK8[] = { 705 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 706 }; 707 708 // VK8 Bit set. 709 static uint8_t VK8Bits[] = { 710 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 711 }; 712 713 // VK1WM Register Class... 714 static const MCPhysReg VK1WM[] = { 715 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 716 }; 717 718 // VK1WM Bit set. 719 static uint8_t VK1WMBits[] = { 720 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 721 }; 722 723 // VK2WM Register Class... 724 static const MCPhysReg VK2WM[] = { 725 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 726 }; 727 728 // VK2WM Bit set. 729 static uint8_t VK2WMBits[] = { 730 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 731 }; 732 733 // VK4WM Register Class... 734 static const MCPhysReg VK4WM[] = { 735 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 736 }; 737 738 // VK4WM Bit set. 739 static uint8_t VK4WMBits[] = { 740 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 741 }; 742 743 // VK8WM Register Class... 744 static const MCPhysReg VK8WM[] = { 745 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 746 }; 747 748 // VK8WM Bit set. 749 static uint8_t VK8WMBits[] = { 750 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 751 }; 752 753 // GR8_ABCD_H Register Class... 754 static MCPhysReg GR8_ABCD_H[] = { 755 X86_AH, X86_CH, X86_DH, X86_BH, 756 }; 757 758 // GR8_ABCD_H Bit set. 759 static uint8_t GR8_ABCD_HBits[] = { 760 0x12, 0x22, 761 }; 762 763 // GR8_ABCD_L Register Class... 764 static MCPhysReg GR8_ABCD_L[] = { 765 X86_AL, X86_CL, X86_DL, X86_BL, 766 }; 767 768 // GR8_ABCD_L Bit set. 769 static uint8_t GR8_ABCD_LBits[] = { 770 0x24, 0x04, 0x01, 771 }; 772 773 // GR16 Register Class... 774 static MCPhysReg GR16[] = { 775 X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, X86_R8W, X86_R9W, X86_R10W, X86_R11W, X86_R14W, X86_R15W, X86_R12W, X86_R13W, 776 }; 777 778 // GR16 Bit set. 779 static uint8_t GR16Bits[] = { 780 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 781 }; 782 783 // GR16_NOREX Register Class... 784 static MCPhysReg GR16_NOREX[] = { 785 X86_AX, X86_CX, X86_DX, X86_SI, X86_DI, X86_BX, X86_BP, X86_SP, 786 }; 787 788 // GR16_NOREX Bit set. 789 static uint8_t GR16_NOREXBits[] = { 790 0x48, 0x51, 0x04, 0x00, 0x00, 0xa0, 791 }; 792 793 // VK16 Register Class... 794 static MCPhysReg VK16[] = { 795 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 796 }; 797 798 // VK16 Bit set. 799 static uint8_t VK16Bits[] = { 800 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 801 }; 802 803 // VK16WM Register Class... 804 static MCPhysReg VK16WM[] = { 805 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 806 }; 807 808 // VK16WM Bit set. 809 static uint8_t VK16WMBits[] = { 810 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 811 }; 812 813 // SEGMENT_REG Register Class... 814 static const MCPhysReg SEGMENT_REG[] = { 815 X86_CS, X86_DS, X86_SS, X86_ES, X86_FS, X86_GS, 816 }; 817 818 // SEGMENT_REG Bit set. 819 static const uint8_t SEGMENT_REGBits[] = { 820 0x00, 0x08, 0x02, 0x10, 0x03, 0x00, 0x02, 821 }; 822 823 // GR16_ABCD Register Class... 824 static const MCPhysReg GR16_ABCD[] = { 825 X86_AX, X86_CX, X86_DX, X86_BX, 826 }; 827 828 // GR16_ABCD Bit set. 829 static const uint8_t GR16_ABCDBits[] = { 830 0x08, 0x11, 0x04, 831 }; 832 833 // FPCCR Register Class... 834 static const MCPhysReg FPCCR[] = { 835 X86_FPSW, 836 }; 837 838 // FPCCR Bit set. 839 static const uint8_t FPCCRBits[] = { 840 0x00, 0x00, 0x00, 0x80, 841 }; 842 843 // FR32X Register Class... 844 static const MCPhysReg FR32X[] = { 845 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 846 }; 847 848 // FR32X Bit set. 849 static uint8_t FR32XBits[] = { 850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 851 }; 852 853 // FR32 Register Class... 854 static const MCPhysReg FR32[] = { 855 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 856 }; 857 858 // FR32 Bit set. 859 static uint8_t FR32Bits[] = { 860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 861 }; 862 863 // GR32 Register Class... 864 static const MCPhysReg GR32[] = { 865 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 866 }; 867 868 // GR32 Bit set. 869 static uint8_t GR32Bits[] = { 870 0x00, 0x00, 0xf8, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 871 }; 872 873 // GR32_NOAX Register Class... 874 static const MCPhysReg GR32_NOAX[] = { 875 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 876 }; 877 878 // GR32_NOAX Bit set. 879 static uint8_t GR32_NOAXBits[] = { 880 0x00, 0x00, 0xf0, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 881 }; 882 883 // GR32_NOSP Register Class... 884 static const MCPhysReg GR32_NOSP[] = { 885 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 886 }; 887 888 // GR32_NOSP Bit set. 889 static uint8_t GR32_NOSPBits[] = { 890 0x00, 0x00, 0xf8, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 891 }; 892 893 // GR32_NOAX_and_GR32_NOSP Register Class... 894 static const MCPhysReg GR32_NOAX_and_GR32_NOSP[] = { 895 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_R8D, X86_R9D, X86_R10D, X86_R11D, X86_R14D, X86_R15D, X86_R12D, X86_R13D, 896 }; 897 898 // GR32_NOAX_and_GR32_NOSP Bit set. 899 static uint8_t GR32_NOAX_and_GR32_NOSPBits[] = { 900 0x00, 0x00, 0xf0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 901 }; 902 903 // DEBUG_REG Register Class... 904 static const MCPhysReg DEBUG_REG[] = { 905 X86_DR0, X86_DR1, X86_DR2, X86_DR3, X86_DR4, X86_DR5, X86_DR6, X86_DR7, 906 }; 907 908 // DEBUG_REG Bit set. 909 static const uint8_t DEBUG_REGBits[] = { 910 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 911 }; 912 913 // GR32_NOREX Register Class... 914 static const MCPhysReg GR32_NOREX[] = { 915 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, 916 }; 917 918 // GR32_NOREX Bit set. 919 static const uint8_t GR32_NOREXBits[] = { 920 0x00, 0x00, 0xf8, 0x61, 921 }; 922 923 // VK32 Register Class... 924 static const MCPhysReg VK32[] = { 925 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 926 }; 927 928 // VK32 Bit set. 929 static uint8_t VK32Bits[] = { 930 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 931 }; 932 933 // GR32_NOAX_and_GR32_NOREX Register Class... 934 static const MCPhysReg GR32_NOAX_and_GR32_NOREX[] = { 935 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, X86_ESP, 936 }; 937 938 // GR32_NOAX_and_GR32_NOREX Bit set. 939 static const uint8_t GR32_NOAX_and_GR32_NOREXBits[] = { 940 0x00, 0x00, 0xf0, 0x61, 941 }; 942 943 // GR32_NOREX_NOSP Register Class... 944 static const MCPhysReg GR32_NOREX_NOSP[] = { 945 X86_EAX, X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, 946 }; 947 948 // GR32_NOREX_NOSP Bit set. 949 static const uint8_t GR32_NOREX_NOSPBits[] = { 950 0x00, 0x00, 0xf8, 0x21, 951 }; 952 953 // RFP32 Register Class... 954 static const MCPhysReg RFP32[] = { 955 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 956 }; 957 958 // RFP32 Bit set. 959 static uint8_t RFP32Bits[] = { 960 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 961 }; 962 963 // VK32WM Register Class... 964 static const MCPhysReg VK32WM[] = { 965 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 966 }; 967 968 // VK32WM Bit set. 969 static uint8_t VK32WMBits[] = { 970 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 971 }; 972 973 // GR32_NOAX_and_GR32_NOREX_NOSP Register Class... 974 static const MCPhysReg GR32_NOAX_and_GR32_NOREX_NOSP[] = { 975 X86_ECX, X86_EDX, X86_ESI, X86_EDI, X86_EBX, X86_EBP, 976 }; 977 978 // GR32_NOAX_and_GR32_NOREX_NOSP Bit set. 979 static const uint8_t GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 980 0x00, 0x00, 0xf0, 0x21, 981 }; 982 983 // GR32_ABCD Register Class... 984 static const MCPhysReg GR32_ABCD[] = { 985 X86_EAX, X86_ECX, X86_EDX, X86_EBX, 986 }; 987 988 // GR32_ABCD Bit set. 989 static const uint8_t GR32_ABCDBits[] = { 990 0x00, 0x00, 0x68, 0x01, 991 }; 992 993 // GR32_ABCD_and_GR32_NOAX Register Class... 994 static const MCPhysReg GR32_ABCD_and_GR32_NOAX[] = { 995 X86_ECX, X86_EDX, X86_EBX, 996 }; 997 998 // GR32_ABCD_and_GR32_NOAX Bit set. 999 static const uint8_t GR32_ABCD_and_GR32_NOAXBits[] = { 1000 0x00, 0x00, 0x60, 0x01, 1001 }; 1002 1003 // GR32_TC Register Class... 1004 static const MCPhysReg GR32_TC[] = { 1005 X86_EAX, X86_ECX, X86_EDX, 1006 }; 1007 1008 // GR32_TC Bit set. 1009 static const uint8_t GR32_TCBits[] = { 1010 0x00, 0x00, 0x48, 0x01, 1011 }; 1012 1013 // GR32_AD Register Class... 1014 static const MCPhysReg GR32_AD[] = { 1015 X86_EAX, X86_EDX, 1016 }; 1017 1018 // GR32_AD Bit set. 1019 static const uint8_t GR32_ADBits[] = { 1020 0x00, 0x00, 0x08, 0x01, 1021 }; 1022 1023 // GR32_NOAX_and_GR32_TC Register Class... 1024 static const MCPhysReg GR32_NOAX_and_GR32_TC[] = { 1025 X86_ECX, X86_EDX, 1026 }; 1027 1028 // GR32_NOAX_and_GR32_TC Bit set. 1029 static const uint8_t GR32_NOAX_and_GR32_TCBits[] = { 1030 0x00, 0x00, 0x40, 0x01, 1031 }; 1032 1033 // CCR Register Class... 1034 static const MCPhysReg CCR[] = { 1035 X86_EFLAGS, 1036 }; 1037 1038 // CCR Bit set. 1039 static const uint8_t CCRBits[] = { 1040 0x00, 0x00, 0x00, 0x02, 1041 }; 1042 1043 // GR32_AD_and_GR32_NOAX Register Class... 1044 static const MCPhysReg GR32_AD_and_GR32_NOAX[] = { 1045 X86_EDX, 1046 }; 1047 1048 // GR32_AD_and_GR32_NOAX Bit set. 1049 static const uint8_t GR32_AD_and_GR32_NOAXBits[] = { 1050 0x00, 0x00, 0x00, 0x01, 1051 }; 1052 1053 // RFP64 Register Class... 1054 static const MCPhysReg RFP64[] = { 1055 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 1056 }; 1057 1058 // RFP64 Bit set. 1059 static uint8_t RFP64Bits[] = { 1060 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 1061 }; 1062 1063 // FR64X Register Class... 1064 static const MCPhysReg FR64X[] = { 1065 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 1066 }; 1067 1068 // FR64X Bit set. 1069 static uint8_t FR64XBits[] = { 1070 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1071 }; 1072 1073 // GR64 Register Class... 1074 static const MCPhysReg GR64[] = { 1075 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, X86_RIP, 1076 }; 1077 1078 // GR64 Bit set. 1079 static uint8_t GR64Bits[] = { 1080 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1081 }; 1082 1083 // CONTROL_REG Register Class... 1084 static const MCPhysReg CONTROL_REG[] = { 1085 X86_CR0, X86_CR1, X86_CR2, X86_CR3, X86_CR4, X86_CR5, X86_CR6, X86_CR7, X86_CR8, X86_CR9, X86_CR10, X86_CR11, X86_CR12, X86_CR13, X86_CR14, X86_CR15, 1086 }; 1087 1088 // CONTROL_REG Bit set. 1089 static const uint8_t CONTROL_REGBits[] = { 1090 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1091 }; 1092 1093 // FR64 Register Class... 1094 static const MCPhysReg FR64[] = { 1095 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 1096 }; 1097 1098 // FR64 Bit set. 1099 static uint8_t FR64Bits[] = { 1100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1101 }; 1102 1103 // GR64_with_sub_8bit Register Class... 1104 static const MCPhysReg GR64_with_sub_8bit[] = { 1105 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, 1106 }; 1107 1108 // GR64_with_sub_8bit Bit set. 1109 static uint8_t GR64_with_sub_8bitBits[] = { 1110 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1111 }; 1112 1113 // GR64_NOSP Register Class... 1114 static const MCPhysReg GR64_NOSP[] = { 1115 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, 1116 }; 1117 1118 // GR64_NOSP Bit set. 1119 static uint8_t GR64_NOSPBits[] = { 1120 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1121 }; 1122 1123 // GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1124 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX[] = { 1125 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, X86_RSP, 1126 }; 1127 1128 // GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1129 static uint8_t GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1130 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1131 }; 1132 1133 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Register Class... 1134 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP[] = { 1135 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R10, X86_R11, X86_RBX, X86_R14, X86_R15, X86_R12, X86_R13, X86_RBP, 1136 }; 1137 1138 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP Bit set. 1139 static uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits[] = { 1140 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1141 }; 1142 1143 // GR64_NOREX Register Class... 1144 static const MCPhysReg GR64_NOREX[] = { 1145 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, X86_RIP, 1146 }; 1147 1148 // GR64_NOREX Bit set. 1149 static const uint8_t GR64_NOREXBits[] = { 1150 0x00, 0x00, 0x00, 0x00, 0xf8, 0x1b, 1151 }; 1152 1153 // GR64_TC Register Class... 1154 static const MCPhysReg GR64_TC[] = { 1155 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, X86_RIP, 1156 }; 1157 1158 // GR64_TC Bit set. 1159 static uint8_t GR64_TCBits[] = { 1160 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1161 }; 1162 1163 // GR64_NOSP_and_GR64_TC Register Class... 1164 static const MCPhysReg GR64_NOSP_and_GR64_TC[] = { 1165 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, 1166 }; 1167 1168 // GR64_NOSP_and_GR64_TC Bit set. 1169 static uint8_t GR64_NOSP_and_GR64_TCBits[] = { 1170 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1171 }; 1172 1173 // GR64_with_sub_16bit_in_GR16_NOREX Register Class... 1174 static const MCPhysReg GR64_with_sub_16bit_in_GR16_NOREX[] = { 1175 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, 1176 }; 1177 1178 // GR64_with_sub_16bit_in_GR16_NOREX Bit set. 1179 static const uint8_t GR64_with_sub_16bit_in_GR16_NOREXBits[] = { 1180 0x00, 0x00, 0x00, 0x00, 0xf8, 0x19, 1181 }; 1182 1183 // VK64 Register Class... 1184 static const MCPhysReg VK64[] = { 1185 X86_K0, X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 1186 }; 1187 1188 // VK64 Bit set. 1189 static uint8_t VK64Bits[] = { 1190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1191 }; 1192 1193 // VR64 Register Class... 1194 static const MCPhysReg VR64[] = { 1195 X86_MM0, X86_MM1, X86_MM2, X86_MM3, X86_MM4, X86_MM5, X86_MM6, X86_MM7, 1196 }; 1197 1198 // VR64 Bit set. 1199 static uint8_t VR64Bits[] = { 1200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1201 }; 1202 1203 // GR64_NOREX_NOSP Register Class... 1204 static const MCPhysReg GR64_NOREX_NOSP[] = { 1205 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, 1206 }; 1207 1208 // GR64_NOREX_NOSP Bit set. 1209 static const uint8_t GR64_NOREX_NOSPBits[] = { 1210 0x00, 0x00, 0x00, 0x00, 0xf8, 0x09, 1211 }; 1212 1213 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1214 static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { 1215 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_R8, X86_R9, X86_R11, 1216 }; 1217 1218 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1219 static uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1220 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1221 }; 1222 1223 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... 1224 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { 1225 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, X86_RSP, 1226 }; 1227 1228 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. 1229 static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 1230 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, 1231 }; 1232 1233 // VK64WM Register Class... 1234 static const MCPhysReg VK64WM[] = { 1235 X86_K1, X86_K2, X86_K3, X86_K4, X86_K5, X86_K6, X86_K7, 1236 }; 1237 1238 // VK64WM Bit set. 1239 static uint8_t VK64WMBits[] = { 1240 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 1241 }; 1242 1243 // GR64_NOREX_and_GR64_TC Register Class... 1244 static const MCPhysReg GR64_NOREX_and_GR64_TC[] = { 1245 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RIP, 1246 }; 1247 1248 // GR64_NOREX_and_GR64_TC Bit set. 1249 static const uint8_t GR64_NOREX_and_GR64_TCBits[] = { 1250 0x00, 0x00, 0x00, 0x00, 0xc8, 0x0b, 1251 }; 1252 1253 // GR64_TCW64 Register Class... 1254 static const MCPhysReg GR64_TCW64[] = { 1255 X86_RAX, X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, 1256 }; 1257 1258 // GR64_TCW64 Bit set. 1259 static uint8_t GR64_TCW64Bits[] = { 1260 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1261 }; 1262 1263 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Register Class... 1264 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP[] = { 1265 X86_RCX, X86_RDX, X86_RSI, X86_RDI, X86_RBX, X86_RBP, 1266 }; 1267 1268 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP Bit set. 1269 static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits[] = { 1270 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, 1271 }; 1272 1273 // GR64_NOREX_NOSP_and_GR64_TC Register Class... 1274 static const MCPhysReg GR64_NOREX_NOSP_and_GR64_TC[] = { 1275 X86_RAX, X86_RCX, X86_RDX, X86_RSI, X86_RDI, 1276 }; 1277 1278 // GR64_NOREX_NOSP_and_GR64_TC Bit set. 1279 static const uint8_t GR64_NOREX_NOSP_and_GR64_TCBits[] = { 1280 0x00, 0x00, 0x00, 0x00, 0xc8, 0x09, 1281 }; 1282 1283 // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Register Class... 1284 static const MCPhysReg GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX[] = { 1285 X86_RCX, X86_RDX, X86_R8, X86_R9, X86_R11, 1286 }; 1287 1288 // GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX Bit set. 1289 static uint8_t GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits[] = { 1290 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2c, 1291 }; 1292 1293 // GR64_ABCD Register Class... 1294 static const MCPhysReg GR64_ABCD[] = { 1295 X86_RAX, X86_RCX, X86_RDX, X86_RBX, 1296 }; 1297 1298 // GR64_ABCD Bit set. 1299 static const uint8_t GR64_ABCDBits[] = { 1300 0x00, 0x00, 0x00, 0x00, 0x68, 0x01, 1301 }; 1302 1303 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Register Class... 1304 static const MCPhysReg GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX[] = { 1305 X86_RCX, X86_RDX, X86_RSI, X86_RDI, 1306 }; 1307 1308 // GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX Bit set. 1309 static const uint8_t GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits[] = { 1310 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 1311 }; 1312 1313 // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Register Class... 1314 static const MCPhysReg GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX[] = { 1315 X86_RCX, X86_RDX, X86_RBX, 1316 }; 1317 1318 // GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX Bit set. 1319 static const uint8_t GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits[] = { 1320 0x00, 0x00, 0x00, 0x00, 0x60, 0x01, 1321 }; 1322 1323 // GR64_with_sub_32bit_in_GR32_TC Register Class... 1324 static const MCPhysReg GR64_with_sub_32bit_in_GR32_TC[] = { 1325 X86_RAX, X86_RCX, X86_RDX, 1326 }; 1327 1328 // GR64_with_sub_32bit_in_GR32_TC Bit set. 1329 static const uint8_t GR64_with_sub_32bit_in_GR32_TCBits[] = { 1330 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 1331 }; 1332 1333 // GR64_with_sub_32bit_in_GR32_AD Register Class... 1334 static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD[] = { 1335 X86_RAX, X86_RDX, 1336 }; 1337 1338 // GR64_with_sub_32bit_in_GR32_AD Bit set. 1339 static const uint8_t GR64_with_sub_32bit_in_GR32_ADBits[] = { 1340 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 1341 }; 1342 1343 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Register Class... 1344 static const MCPhysReg GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC[] = { 1345 X86_RCX, X86_RDX, 1346 }; 1347 1348 // GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC Bit set. 1349 static const uint8_t GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits[] = { 1350 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 1351 }; 1352 1353 // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Register Class... 1354 static const MCPhysReg GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX[] = { 1355 X86_RDX, 1356 }; 1357 1358 // GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX Bit set. 1359 static const uint8_t GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits[] = { 1360 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 1361 }; 1362 1363 // RST Register Class... 1364 static const MCPhysReg RST[] = { 1365 X86_ST0, X86_ST1, X86_ST2, X86_ST3, X86_ST4, X86_ST5, X86_ST6, X86_ST7, 1366 }; 1367 1368 // RST Bit set. 1369 static uint8_t RSTBits[] = { 1370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 1371 }; 1372 1373 // RFP80 Register Class... 1374 static const MCPhysReg RFP80[] = { 1375 X86_FP0, X86_FP1, X86_FP2, X86_FP3, X86_FP4, X86_FP5, X86_FP6, 1376 }; 1377 1378 // RFP80 Bit set. 1379 static uint8_t RFP80Bits[] = { 1380 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 1381 }; 1382 1383 // VR128X Register Class... 1384 static const MCPhysReg VR128X[] = { 1385 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, X86_XMM16, X86_XMM17, X86_XMM18, X86_XMM19, X86_XMM20, X86_XMM21, X86_XMM22, X86_XMM23, X86_XMM24, X86_XMM25, X86_XMM26, X86_XMM27, X86_XMM28, X86_XMM29, X86_XMM30, X86_XMM31, 1386 }; 1387 1388 // VR128X Bit set. 1389 static uint8_t VR128XBits[] = { 1390 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1391 }; 1392 1393 // VR128 Register Class... 1394 static const MCPhysReg VR128[] = { 1395 X86_XMM0, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15, 1396 }; 1397 1398 // VR128 Bit set. 1399 static uint8_t VR128Bits[] = { 1400 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1401 }; 1402 1403 // VR256X Register Class... 1404 static const MCPhysReg VR256X[] = { 1405 X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, X86_YMM16, X86_YMM17, X86_YMM18, X86_YMM19, X86_YMM20, X86_YMM21, X86_YMM22, X86_YMM23, X86_YMM24, X86_YMM25, X86_YMM26, X86_YMM27, X86_YMM28, X86_YMM29, X86_YMM30, X86_YMM31, 1406 }; 1407 1408 // VR256X Bit set. 1409 static uint8_t VR256XBits[] = { 1410 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1411 }; 1412 1413 // VR256 Register Class... 1414 static const MCPhysReg VR256[] = { 1415 X86_YMM0, X86_YMM1, X86_YMM2, X86_YMM3, X86_YMM4, X86_YMM5, X86_YMM6, X86_YMM7, X86_YMM8, X86_YMM9, X86_YMM10, X86_YMM11, X86_YMM12, X86_YMM13, X86_YMM14, X86_YMM15, 1416 }; 1417 1418 // VR256 Bit set. 1419 static uint8_t VR256Bits[] = { 1420 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1421 }; 1422 1423 // VR512 Register Class... 1424 static const MCPhysReg VR512[] = { 1425 X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, X86_ZMM16, X86_ZMM17, X86_ZMM18, X86_ZMM19, X86_ZMM20, X86_ZMM21, X86_ZMM22, X86_ZMM23, X86_ZMM24, X86_ZMM25, X86_ZMM26, X86_ZMM27, X86_ZMM28, X86_ZMM29, X86_ZMM30, X86_ZMM31, 1426 }; 1427 1428 // VR512 Bit set. 1429 static uint8_t VR512Bits[] = { 1430 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 1431 }; 1432 1433 // VR512_with_sub_xmm_in_FR32 Register Class... 1434 static const MCPhysReg VR512_with_sub_xmm_in_FR32[] = { 1435 X86_ZMM0, X86_ZMM1, X86_ZMM2, X86_ZMM3, X86_ZMM4, X86_ZMM5, X86_ZMM6, X86_ZMM7, X86_ZMM8, X86_ZMM9, X86_ZMM10, X86_ZMM11, X86_ZMM12, X86_ZMM13, X86_ZMM14, X86_ZMM15, 1436 }; 1437 1438 // VR512_with_sub_xmm_in_FR32 Bit set. 1439 static uint8_t VR512_with_sub_xmm_in_FR32Bits[] = { 1440 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 1441 }; 1442 1443static MCRegisterClass X86MCRegisterClasses[] = { 1444 { GR8, GR8Bits, 130, 20, sizeof(GR8Bits), X86_GR8RegClassID, 1, 1, 1, 1 }, 1445 { GR8_NOREX, GR8_NOREXBits, 897, 8, sizeof(GR8_NOREXBits), X86_GR8_NOREXRegClassID, 1, 1, 1, 1 }, 1446 { VK1, VK1Bits, 6, 8, sizeof(VK1Bits), X86_VK1RegClassID, 1, 1, 1, 1 }, 1447 { VK2, VK2Bits, 59, 8, sizeof(VK2Bits), X86_VK2RegClassID, 1, 1, 1, 1 }, 1448 { VK4, VK4Bits, 100, 8, sizeof(VK4Bits), X86_VK4RegClassID, 1, 1, 1, 1 }, 1449 { VK8, VK8Bits, 126, 8, sizeof(VK8Bits), X86_VK8RegClassID, 1, 1, 1, 1 }, 1450 { VK1WM, VK1WMBits, 400, 7, sizeof(VK1WMBits), X86_VK1WMRegClassID, 1, 1, 1, 1 }, 1451 { VK2WM, VK2WMBits, 413, 7, sizeof(VK2WMBits), X86_VK2WMRegClassID, 1, 1, 1, 1 }, 1452 { VK4WM, VK4WMBits, 426, 7, sizeof(VK4WMBits), X86_VK4WMRegClassID, 1, 1, 1, 1 }, 1453 { VK8WM, VK8WMBits, 439, 7, sizeof(VK8WMBits), X86_VK8WMRegClassID, 1, 1, 1, 1 }, 1454 { GR8_ABCD_H, GR8_ABCD_HBits, 378, 4, sizeof(GR8_ABCD_HBits), X86_GR8_ABCD_HRegClassID, 1, 1, 1, 1 }, 1455 { GR8_ABCD_L, GR8_ABCD_LBits, 389, 4, sizeof(GR8_ABCD_LBits), X86_GR8_ABCD_LRegClassID, 1, 1, 1, 1 }, 1456 { GR16, GR16Bits, 109, 16, sizeof(GR16Bits), X86_GR16RegClassID, 2, 2, 1, 1 }, 1457 { GR16_NOREX, GR16_NOREXBits, 886, 8, sizeof(GR16_NOREXBits), X86_GR16_NOREXRegClassID, 2, 2, 1, 1 }, 1458 { VK16, VK16Bits, 104, 8, sizeof(VK16Bits), X86_VK16RegClassID, 2, 2, 1, 1 }, 1459 { VK16WM, VK16WMBits, 432, 7, sizeof(VK16WMBits), X86_VK16WMRegClassID, 2, 2, 1, 1 }, 1460 { SEGMENT_REG, SEGMENT_REGBits, 366, 6, sizeof(SEGMENT_REGBits), X86_SEGMENT_REGRegClassID, 2, 2, 1, 1 }, 1461 { GR16_ABCD, GR16_ABCDBits, 334, 4, sizeof(GR16_ABCDBits), X86_GR16_ABCDRegClassID, 2, 2, 1, 1 }, 1462 { FPCCR, FPCCRBits, 571, 1, sizeof(FPCCRBits), X86_FPCCRRegClassID, 2, 2, -1, 0 }, 1463 { FR32X, FR32XBits, 581, 32, sizeof(FR32XBits), X86_FR32XRegClassID, 4, 4, 1, 1 }, 1464 { FR32, FR32Bits, 49, 16, sizeof(FR32Bits), X86_FR32RegClassID, 4, 4, 1, 1 }, 1465 { GR32, GR32Bits, 54, 16, sizeof(GR32Bits), X86_GR32RegClassID, 4, 4, 1, 1 }, 1466 { GR32_NOAX, GR32_NOAXBits, 642, 15, sizeof(GR32_NOAXBits), X86_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1467 { GR32_NOSP, GR32_NOSPBits, 482, 15, sizeof(GR32_NOSPBits), X86_GR32_NOSPRegClassID, 4, 4, 1, 1 }, 1468 { GR32_NOAX_and_GR32_NOSP, GR32_NOAX_and_GR32_NOSPBits, 468, 14, sizeof(GR32_NOAX_and_GR32_NOSPBits), X86_GR32_NOAX_and_GR32_NOSPRegClassID, 4, 4, 1, 1 }, 1469 { DEBUG_REG, DEBUG_REGBits, 344, 8, sizeof(DEBUG_REGBits), X86_DEBUG_REGRegClassID, 4, 4, 1, 1 }, 1470 { GR32_NOREX, GR32_NOREXBits, 841, 8, sizeof(GR32_NOREXBits), X86_GR32_NOREXRegClassID, 4, 4, 1, 1 }, 1471 { VK32, VK32Bits, 16, 8, sizeof(VK32Bits), X86_VK32RegClassID, 4, 4, 1, 1 }, 1472 { GR32_NOAX_and_GR32_NOREX, GR32_NOAX_and_GR32_NOREXBits, 827, 7, sizeof(GR32_NOAX_and_GR32_NOREXBits), X86_GR32_NOAX_and_GR32_NOREXRegClassID, 4, 4, 1, 1 }, 1473 { GR32_NOREX_NOSP, GR32_NOREX_NOSPBits, 539, 7, sizeof(GR32_NOREX_NOSPBits), X86_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, 1474 { RFP32, RFP32Bits, 21, 7, sizeof(RFP32Bits), X86_RFP32RegClassID, 4, 4, 1, 1 }, 1475 { VK32WM, VK32WMBits, 406, 7, sizeof(VK32WMBits), X86_VK32WMRegClassID, 4, 4, 1, 1 }, 1476 { GR32_NOAX_and_GR32_NOREX_NOSP, GR32_NOAX_and_GR32_NOREX_NOSPBits, 525, 6, sizeof(GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 4, 4, 1, 1 }, 1477 { GR32_ABCD, GR32_ABCDBits, 314, 4, sizeof(GR32_ABCDBits), X86_GR32_ABCDRegClassID, 4, 4, 1, 1 }, 1478 { GR32_ABCD_and_GR32_NOAX, GR32_ABCD_and_GR32_NOAXBits, 675, 3, sizeof(GR32_ABCD_and_GR32_NOAXBits), X86_GR32_ABCD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1479 { GR32_TC, GR32_TCBits, 171, 3, sizeof(GR32_TCBits), X86_GR32_TCRegClassID, 4, 4, 1, 1 }, 1480 { GR32_AD, GR32_ADBits, 306, 2, sizeof(GR32_ADBits), X86_GR32_ADRegClassID, 4, 4, 1, 1 }, 1481 { GR32_NOAX_and_GR32_TC, GR32_NOAX_and_GR32_TCBits, 157, 2, sizeof(GR32_NOAX_and_GR32_TCBits), X86_GR32_NOAX_and_GR32_TCRegClassID, 4, 4, 1, 1 }, 1482 { CCR, CCRBits, 573, 1, sizeof(CCRBits), X86_CCRRegClassID, 4, 4, -1, 0 }, 1483 { GR32_AD_and_GR32_NOAX, GR32_AD_and_GR32_NOAXBits, 630, 1, sizeof(GR32_AD_and_GR32_NOAXBits), X86_GR32_AD_and_GR32_NOAXRegClassID, 4, 4, 1, 1 }, 1484 { RFP64, RFP64Bits, 68, 7, sizeof(RFP64Bits), X86_RFP64RegClassID, 8, 4, 1, 1 }, 1485 { FR64X, FR64XBits, 587, 32, sizeof(FR64XBits), X86_FR64XRegClassID, 8, 8, 1, 1 }, 1486 { GR64, GR64Bits, 79, 17, sizeof(GR64Bits), X86_GR64RegClassID, 8, 8, 1, 1 }, 1487 { CONTROL_REG, CONTROL_REGBits, 354, 16, sizeof(CONTROL_REGBits), X86_CONTROL_REGRegClassID, 8, 8, 1, 1 }, 1488 { FR64, FR64Bits, 74, 16, sizeof(FR64Bits), X86_FR64RegClassID, 8, 8, 1, 1 }, 1489 { GR64_with_sub_8bit, GR64_with_sub_8bitBits, 907, 16, sizeof(GR64_with_sub_8bitBits), X86_GR64_with_sub_8bitRegClassID, 8, 8, 1, 1 }, 1490 { GR64_NOSP, GR64_NOSPBits, 492, 15, sizeof(GR64_NOSPBits), X86_GR64_NOSPRegClassID, 8, 8, 1, 1 }, 1491 { GR64_with_sub_32bit_in_GR32_NOAX, GR64_with_sub_32bit_in_GR32_NOAXBits, 714, 15, sizeof(GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1492 { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits, 445, 14, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSPRegClassID, 8, 8, 1, 1 }, 1493 { GR64_NOREX, GR64_NOREXBits, 852, 9, sizeof(GR64_NOREXBits), X86_GR64_NOREXRegClassID, 8, 8, 1, 1 }, 1494 { GR64_TC, GR64_TCBits, 224, 9, sizeof(GR64_TCBits), X86_GR64_TCRegClassID, 8, 8, 1, 1 }, 1495 { GR64_NOSP_and_GR64_TC, GR64_NOSP_and_GR64_TCBits, 210, 8, sizeof(GR64_NOSP_and_GR64_TCBits), X86_GR64_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1496 { GR64_with_sub_16bit_in_GR16_NOREX, GR64_with_sub_16bit_in_GR16_NOREXBits, 863, 8, sizeof(GR64_with_sub_16bit_in_GR16_NOREXBits), X86_GR64_with_sub_16bit_in_GR16_NOREXRegClassID, 8, 8, 1, 1 }, 1497 { VK64, VK64Bits, 63, 8, sizeof(VK64Bits), X86_VK64RegClassID, 8, 8, 1, 1 }, 1498 { VR64, VR64Bits, 84, 8, sizeof(VR64Bits), X86_VR64RegClassID, 8, 8, 1, 1 }, 1499 { GR64_NOREX_NOSP, GR64_NOREX_NOSPBits, 555, 7, sizeof(GR64_NOREX_NOSPBits), X86_GR64_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, 1500 { GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 747, 7, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1501 { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 804, 7, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, 1502 { VK64WM, VK64WMBits, 419, 7, sizeof(VK64WMBits), X86_VK64WMRegClassID, 8, 8, 1, 1 }, 1503 { GR64_NOREX_and_GR64_TC, GR64_NOREX_and_GR64_TCBits, 260, 6, sizeof(GR64_NOREX_and_GR64_TCBits), X86_GR64_NOREX_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1504 { GR64_TCW64, GR64_TCW64Bits, 89, 6, sizeof(GR64_TCW64Bits), X86_GR64_TCW64RegClassID, 8, 8, 1, 1 }, 1505 { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits, 502, 6, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSPRegClassID, 8, 8, 1, 1 }, 1506 { GR64_NOREX_NOSP_and_GR64_TC, GR64_NOREX_NOSP_and_GR64_TCBits, 232, 5, sizeof(GR64_NOREX_NOSP_and_GR64_TCBits), X86_GR64_NOREX_NOSP_and_GR64_TCRegClassID, 8, 8, 1, 1 }, 1507 { GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX, GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits, 699, 5, sizeof(GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXBits), X86_GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1508 { GR64_ABCD, GR64_ABCDBits, 324, 4, sizeof(GR64_ABCDBits), X86_GR64_ABCDRegClassID, 8, 8, 1, 1 }, 1509 { GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX, GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits, 792, 4, sizeof(GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXBits), X86_GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREXRegClassID, 8, 8, 1, 1 }, 1510 { GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits, 652, 3, sizeof(GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1511 { GR64_with_sub_32bit_in_GR32_TC, GR64_with_sub_32bit_in_GR32_TCBits, 179, 3, sizeof(GR64_with_sub_32bit_in_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_TCRegClassID, 8, 8, 1, 1 }, 1512 { GR64_with_sub_32bit_in_GR32_AD, GR64_with_sub_32bit_in_GR32_ADBits, 283, 2, sizeof(GR64_with_sub_32bit_in_GR32_ADBits), X86_GR64_with_sub_32bit_in_GR32_ADRegClassID, 8, 8, 1, 1 }, 1513 { GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC, GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits, 134, 2, sizeof(GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCBits), X86_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TCRegClassID, 8, 8, 1, 1 }, 1514 { GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX, GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits, 607, 1, sizeof(GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXBits), X86_GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAXRegClassID, 8, 8, 1, 1 }, 1515 { RST, RSTBits, 577, 8, sizeof(RSTBits), X86_RSTRegClassID, 10, 4, 1, 0 }, 1516 { RFP80, RFP80Bits, 0, 7, sizeof(RFP80Bits), X86_RFP80RegClassID, 10, 4, 1, 1 }, 1517 { VR128X, VR128XBits, 600, 32, sizeof(VR128XBits), X86_VR128XRegClassID, 16, 16, 1, 1 }, 1518 { VR128, VR128Bits, 120, 16, sizeof(VR128Bits), X86_VR128RegClassID, 16, 16, 1, 1 }, 1519 { VR256X, VR256XBits, 593, 32, sizeof(VR256XBits), X86_VR256XRegClassID, 32, 32, 1, 1 }, 1520 { VR256, VR256Bits, 114, 16, sizeof(VR256Bits), X86_VR256RegClassID, 32, 32, 1, 1 }, 1521 { VR512, VR512Bits, 10, 32, sizeof(VR512Bits), X86_VR512RegClassID, 64, 64, 1, 1 }, 1522 { VR512_with_sub_xmm_in_FR32, VR512_with_sub_xmm_in_FR32Bits, 27, 16, sizeof(VR512_with_sub_xmm_in_FR32Bits), X86_VR512_with_sub_xmm_in_FR32RegClassID, 64, 64, 1, 1 }, 1523}; 1524 1525#endif // GET_REGINFO_MC_DESC 1526