1 /* 2 x86defs.h 3 4 diStorm3 - Powerful disassembler for X86/AMD64 5 http://ragestorm.net/distorm/ 6 distorm at gmail dot com 7 Copyright (C) 2003-2012 Gil Dabah 8 9 This program is free software: you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation, either version 3 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program. If not, see <http://www.gnu.org/licenses/> 21 */ 22 23 24 #ifndef X86DEFS_H 25 #define X86DEFS_H 26 27 28 #define SEG_REGS_MAX (6) 29 #define CREGS_MAX (9) 30 #define DREGS_MAX (8) 31 32 /* Maximum instruction size, including prefixes */ 33 #define INST_MAXIMUM_SIZE (15) 34 35 /* Maximum range of imm8 (comparison type) of special SSE CMP instructions. */ 36 #define INST_CMP_MAX_RANGE (8) 37 38 /* Maximum range of imm8 (comparison type) of special AVX VCMP instructions. */ 39 #define INST_VCMP_MAX_RANGE (32) 40 41 /* Wait instruction byte code. */ 42 #define INST_WAIT_INDEX (0x9b) 43 44 /* Lea instruction byte code. */ 45 #define INST_LEA_INDEX (0x8d) 46 47 /* NOP/XCHG instruction byte code. */ 48 #define INST_NOP_INDEX (0x90) 49 50 /* ARPL/MOVSXD instruction byte code. */ 51 #define INST_ARPL_INDEX (0x63) 52 53 /* 54 * Minimal MODR/M value of divided instructions. 55 * It's 0xc0, two MSBs set, which indicates a general purpose register is used too. 56 */ 57 #define INST_DIVIDED_MODRM (0xc0) 58 59 /* This is the escape byte value used for 3DNow! instructions. */ 60 #define _3DNOW_ESCAPE_BYTE (0x0f) 61 62 #define PREFIX_LOCK (0xf0) 63 #define PREFIX_REPNZ (0xf2) 64 #define PREFIX_REP (0xf3) 65 #define PREFIX_CS (0x2e) 66 #define PREFIX_SS (0x36) 67 #define PREFIX_DS (0x3e) 68 #define PREFIX_ES (0x26) 69 #define PREFIX_FS (0x64) 70 #define PREFIX_GS (0x65) 71 #define PREFIX_OP_SIZE (0x66) 72 #define PREFIX_ADDR_SIZE (0x67) 73 #define PREFIX_VEX2b (0xc5) 74 #define PREFIX_VEX3b (0xc4) 75 76 /* REX prefix value range, 64 bits mode decoding only. */ 77 #define PREFIX_REX_LOW (0x40) 78 #define PREFIX_REX_HI (0x4f) 79 /* In order to use the extended GPR's we have to add 8 to the Modr/M info values. */ 80 #define EX_GPR_BASE (8) 81 82 /* Mask for REX and VEX features: */ 83 /* Base */ 84 #define PREFIX_EX_B (1) 85 /* Index */ 86 #define PREFIX_EX_X (2) 87 /* Register */ 88 #define PREFIX_EX_R (4) 89 /* Operand Width */ 90 #define PREFIX_EX_W (8) 91 /* Vector Lengh */ 92 #define PREFIX_EX_L (0x10) 93 94 #endif /* X86DEFS_H */ 95