1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2013 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21
22 #include <sys/ptrace.h>
23 #include <endian.h>
24
25 #include "gdb_proc_service.h"
26
27 /* Defined in auto-generated file mips-linux.c. */
28 void init_registers_mips_linux (void);
29 /* Defined in auto-generated file mips-dsp-linux.c. */
30 void init_registers_mips_dsp_linux (void);
31 /* Defined in auto-generated file mips64-linux.c. */
32 void init_registers_mips64_linux (void);
33 /* Defined in auto-generated file mips64-dsp-linux.c. */
34 void init_registers_mips64_dsp_linux (void);
35
36 #ifdef __mips64
37 #define init_registers_mips_linux init_registers_mips64_linux
38 #define init_registers_mips_dsp_linux init_registers_mips64_dsp_linux
39 #endif
40
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
43 #endif
44
45 #ifdef HAVE_SYS_REG_H
46 #include <sys/reg.h>
47 #endif
48
49 #define mips_num_regs 73
50 #define mips_dsp_num_regs 80
51
52 #include <asm/ptrace.h>
53
54 #ifndef DSP_BASE
55 #define DSP_BASE 71
56 #define DSP_CONTROL 77
57 #endif
58
59 union mips_register
60 {
61 unsigned char buf[8];
62
63 /* Deliberately signed, for proper sign extension. */
64 int reg32;
65 long long reg64;
66 };
67
68 /* Return the ptrace ``address'' of register REGNO. */
69
70 #define mips_base_regs \
71 -1, 1, 2, 3, 4, 5, 6, 7, \
72 8, 9, 10, 11, 12, 13, 14, 15, \
73 16, 17, 18, 19, 20, 21, 22, 23, \
74 24, 25, 26, 27, 28, 29, 30, 31, \
75 \
76 -1, MMLO, MMHI, BADVADDR, CAUSE, PC, \
77 \
78 FPR_BASE, FPR_BASE + 1, FPR_BASE + 2, FPR_BASE + 3, \
79 FPR_BASE + 4, FPR_BASE + 5, FPR_BASE + 6, FPR_BASE + 7, \
80 FPR_BASE + 8, FPR_BASE + 9, FPR_BASE + 10, FPR_BASE + 11, \
81 FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15, \
82 FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19, \
83 FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23, \
84 FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27, \
85 FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31, \
86 FPC_CSR, FPC_EIR
87
88 #define mips_dsp_regs \
89 DSP_BASE, DSP_BASE + 1, DSP_BASE + 2, DSP_BASE + 3, \
90 DSP_BASE + 4, DSP_BASE + 5, \
91 DSP_CONTROL
92
93 static int mips_regmap[mips_num_regs] = {
94 mips_base_regs,
95 0
96 };
97
98 static int mips_dsp_regmap[mips_dsp_num_regs] = {
99 mips_base_regs,
100 mips_dsp_regs,
101 0
102 };
103
104 /* DSP registers are not in any regset and can only be accessed
105 individually. */
106
107 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
108 0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
109 };
110
111 /* Try peeking at an arbitrarily chosen DSP register and pick the available
112 user register set accordingly. */
113
114 static void
mips_arch_setup(void)115 mips_arch_setup (void)
116 {
117 static void (*init_registers) (void);
118
119 gdb_assert (current_inferior);
120
121 if (init_registers == NULL)
122 {
123 int pid = lwpid_of (get_thread_lwp (current_inferior));
124
125 ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
126 switch (errno)
127 {
128 case 0:
129 the_low_target.num_regs = mips_dsp_num_regs;
130 the_low_target.regmap = mips_dsp_regmap;
131 the_low_target.regset_bitmap = mips_dsp_regset_bitmap;
132 init_registers = init_registers_mips_dsp_linux;
133 break;
134 case EIO:
135 the_low_target.num_regs = mips_num_regs;
136 the_low_target.regmap = mips_regmap;
137 the_low_target.regset_bitmap = NULL;
138 init_registers = init_registers_mips_linux;
139 break;
140 default:
141 perror_with_name ("ptrace");
142 break;
143 }
144 }
145 init_registers ();
146 }
147
148 /* From mips-linux-nat.c. */
149
150 /* Pseudo registers can not be read. ptrace does not provide a way to
151 read (or set) PS_REGNUM, and there's no point in reading or setting
152 ZERO_REGNUM. We also can not set BADVADDR, CAUSE, or FCRIR via
153 ptrace(). */
154
155 static int
mips_cannot_fetch_register(int regno)156 mips_cannot_fetch_register (int regno)
157 {
158 if (the_low_target.regmap[regno] == -1)
159 return 1;
160
161 if (find_regno ("r0") == regno)
162 return 1;
163
164 return 0;
165 }
166
167 static int
mips_cannot_store_register(int regno)168 mips_cannot_store_register (int regno)
169 {
170 if (the_low_target.regmap[regno] == -1)
171 return 1;
172
173 if (find_regno ("r0") == regno)
174 return 1;
175
176 if (find_regno ("cause") == regno)
177 return 1;
178
179 if (find_regno ("badvaddr") == regno)
180 return 1;
181
182 if (find_regno ("fir") == regno)
183 return 1;
184
185 return 0;
186 }
187
188 static CORE_ADDR
mips_get_pc(struct regcache * regcache)189 mips_get_pc (struct regcache *regcache)
190 {
191 union mips_register pc;
192 collect_register_by_name (regcache, "pc", pc.buf);
193 return register_size (0) == 4 ? pc.reg32 : pc.reg64;
194 }
195
196 static void
mips_set_pc(struct regcache * regcache,CORE_ADDR pc)197 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
198 {
199 union mips_register newpc;
200 if (register_size (0) == 4)
201 newpc.reg32 = pc;
202 else
203 newpc.reg64 = pc;
204
205 supply_register_by_name (regcache, "pc", newpc.buf);
206 }
207
208 /* Correct in either endianness. */
209 static const unsigned int mips_breakpoint = 0x0005000d;
210 #define mips_breakpoint_len 4
211
212 /* We only place breakpoints in empty marker functions, and thread locking
213 is outside of the function. So rather than importing software single-step,
214 we can just run until exit. */
215 static CORE_ADDR
mips_reinsert_addr(void)216 mips_reinsert_addr (void)
217 {
218 struct regcache *regcache = get_thread_regcache (current_inferior, 1);
219 union mips_register ra;
220 collect_register_by_name (regcache, "r31", ra.buf);
221 return register_size (0) == 4 ? ra.reg32 : ra.reg64;
222 }
223
224 static int
mips_breakpoint_at(CORE_ADDR where)225 mips_breakpoint_at (CORE_ADDR where)
226 {
227 unsigned int insn;
228
229 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
230 if (insn == mips_breakpoint)
231 return 1;
232
233 /* If necessary, recognize more trap instructions here. GDB only uses the
234 one. */
235 return 0;
236 }
237
238 /* Fetch the thread-local storage pointer for libthread_db. */
239
240 ps_err_e
ps_get_thread_area(const struct ps_prochandle * ph,lwpid_t lwpid,int idx,void ** base)241 ps_get_thread_area (const struct ps_prochandle *ph,
242 lwpid_t lwpid, int idx, void **base)
243 {
244 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
245 return PS_ERR;
246
247 /* IDX is the bias from the thread pointer to the beginning of the
248 thread descriptor. It has to be subtracted due to implementation
249 quirks in libthread_db. */
250 *base = (void *) ((char *)*base - idx);
251
252 return PS_OK;
253 }
254
255 #ifdef HAVE_PTRACE_GETREGS
256
257 static void
mips_collect_register(struct regcache * regcache,int use_64bit,int regno,union mips_register * reg)258 mips_collect_register (struct regcache *regcache,
259 int use_64bit, int regno, union mips_register *reg)
260 {
261 union mips_register tmp_reg;
262
263 if (use_64bit)
264 {
265 collect_register (regcache, regno, &tmp_reg.reg64);
266 *reg = tmp_reg;
267 }
268 else
269 {
270 collect_register (regcache, regno, &tmp_reg.reg32);
271 reg->reg64 = tmp_reg.reg32;
272 }
273 }
274
275 static void
mips_supply_register(struct regcache * regcache,int use_64bit,int regno,const union mips_register * reg)276 mips_supply_register (struct regcache *regcache,
277 int use_64bit, int regno, const union mips_register *reg)
278 {
279 int offset = 0;
280
281 /* For big-endian 32-bit targets, ignore the high four bytes of each
282 eight-byte slot. */
283 if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
284 offset = 4;
285
286 supply_register (regcache, regno, reg->buf + offset);
287 }
288
289 static void
mips_collect_register_32bit(struct regcache * regcache,int use_64bit,int regno,unsigned char * buf)290 mips_collect_register_32bit (struct regcache *regcache,
291 int use_64bit, int regno, unsigned char *buf)
292 {
293 union mips_register tmp_reg;
294 int reg32;
295
296 mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
297 reg32 = tmp_reg.reg64;
298 memcpy (buf, ®32, 4);
299 }
300
301 static void
mips_supply_register_32bit(struct regcache * regcache,int use_64bit,int regno,const unsigned char * buf)302 mips_supply_register_32bit (struct regcache *regcache,
303 int use_64bit, int regno, const unsigned char *buf)
304 {
305 union mips_register tmp_reg;
306 int reg32;
307
308 memcpy (®32, buf, 4);
309 tmp_reg.reg64 = reg32;
310 mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
311 }
312
313 static void
mips_fill_gregset(struct regcache * regcache,void * buf)314 mips_fill_gregset (struct regcache *regcache, void *buf)
315 {
316 union mips_register *regset = buf;
317 int i, use_64bit;
318
319 use_64bit = (register_size (0) == 8);
320
321 for (i = 1; i < 32; i++)
322 mips_collect_register (regcache, use_64bit, i, regset + i);
323
324 mips_collect_register (regcache, use_64bit,
325 find_regno ("lo"), regset + 32);
326 mips_collect_register (regcache, use_64bit,
327 find_regno ("hi"), regset + 33);
328 mips_collect_register (regcache, use_64bit,
329 find_regno ("pc"), regset + 34);
330 mips_collect_register (regcache, use_64bit,
331 find_regno ("badvaddr"), regset + 35);
332 mips_collect_register (regcache, use_64bit,
333 find_regno ("status"), regset + 36);
334 mips_collect_register (regcache, use_64bit,
335 find_regno ("cause"), regset + 37);
336
337 mips_collect_register (regcache, use_64bit,
338 find_regno ("restart"), regset + 0);
339 }
340
341 static void
mips_store_gregset(struct regcache * regcache,const void * buf)342 mips_store_gregset (struct regcache *regcache, const void *buf)
343 {
344 const union mips_register *regset = buf;
345 int i, use_64bit;
346
347 use_64bit = (register_size (0) == 8);
348
349 for (i = 0; i < 32; i++)
350 mips_supply_register (regcache, use_64bit, i, regset + i);
351
352 mips_supply_register (regcache, use_64bit, find_regno ("lo"), regset + 32);
353 mips_supply_register (regcache, use_64bit, find_regno ("hi"), regset + 33);
354 mips_supply_register (regcache, use_64bit, find_regno ("pc"), regset + 34);
355 mips_supply_register (regcache, use_64bit,
356 find_regno ("badvaddr"), regset + 35);
357 mips_supply_register (regcache, use_64bit,
358 find_regno ("status"), regset + 36);
359 mips_supply_register (regcache, use_64bit,
360 find_regno ("cause"), regset + 37);
361
362 mips_supply_register (regcache, use_64bit,
363 find_regno ("restart"), regset + 0);
364 }
365
366 static void
mips_fill_fpregset(struct regcache * regcache,void * buf)367 mips_fill_fpregset (struct regcache *regcache, void *buf)
368 {
369 union mips_register *regset = buf;
370 int i, use_64bit, first_fp, big_endian;
371
372 use_64bit = (register_size (0) == 8);
373 first_fp = find_regno ("f0");
374 big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
375
376 /* See GDB for a discussion of this peculiar layout. */
377 for (i = 0; i < 32; i++)
378 if (use_64bit)
379 collect_register (regcache, first_fp + i, regset[i].buf);
380 else
381 collect_register (regcache, first_fp + i,
382 regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
383
384 mips_collect_register_32bit (regcache, use_64bit,
385 find_regno ("fcsr"), regset[32].buf);
386 mips_collect_register_32bit (regcache, use_64bit, find_regno ("fir"),
387 regset[32].buf + 4);
388 }
389
390 static void
mips_store_fpregset(struct regcache * regcache,const void * buf)391 mips_store_fpregset (struct regcache *regcache, const void *buf)
392 {
393 const union mips_register *regset = buf;
394 int i, use_64bit, first_fp, big_endian;
395
396 use_64bit = (register_size (0) == 8);
397 first_fp = find_regno ("f0");
398 big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
399
400 /* See GDB for a discussion of this peculiar layout. */
401 for (i = 0; i < 32; i++)
402 if (use_64bit)
403 supply_register (regcache, first_fp + i, regset[i].buf);
404 else
405 supply_register (regcache, first_fp + i,
406 regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
407
408 mips_supply_register_32bit (regcache, use_64bit,
409 find_regno ("fcsr"), regset[32].buf);
410 mips_supply_register_32bit (regcache, use_64bit, find_regno ("fir"),
411 regset[32].buf + 4);
412 }
413 #endif /* HAVE_PTRACE_GETREGS */
414
415 struct regset_info target_regsets[] = {
416 #ifdef HAVE_PTRACE_GETREGS
417 { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
418 mips_fill_gregset, mips_store_gregset },
419 { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
420 mips_fill_fpregset, mips_store_fpregset },
421 #endif /* HAVE_PTRACE_GETREGS */
422 { 0, 0, 0, -1, -1, NULL, NULL }
423 };
424
425 struct linux_target_ops the_low_target = {
426 mips_arch_setup,
427 -1,
428 NULL,
429 NULL,
430 mips_cannot_fetch_register,
431 mips_cannot_store_register,
432 NULL, /* fetch_register */
433 mips_get_pc,
434 mips_set_pc,
435 (const unsigned char *) &mips_breakpoint,
436 mips_breakpoint_len,
437 mips_reinsert_addr,
438 0,
439 mips_breakpoint_at,
440 };
441