1 /* Architecture, machine, and model support. 2 Copyright (C) 1997-2013 Free Software Foundation, Inc. 3 Contributed by Cygnus Support. 4 5 This file is part of GDB, the GNU debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 /* Nomenclature: 21 architecture = one of sparc, mips, sh, etc. 22 in the sparc architecture, mach = one of v6, v7, v8, sparclite, etc. 23 in the v8 mach, model = one of supersparc, etc. 24 */ 25 26 /* This file is intended to be included by sim-basics.h. */ 27 28 #ifndef SIM_MODEL_H 29 #define SIM_MODEL_H 30 31 /* Function unit and instruction timing support. 32 ??? This is obviously insufficiently general. 33 It's useful but it needs elaborating upon. */ 34 35 typedef struct { 36 unsigned char name; /* actually a UNIT_TYPE enum */ 37 unsigned char issue; 38 unsigned char done; 39 } UNIT; 40 41 #ifndef MAX_UNITS 42 #define MAX_UNITS 1 43 #endif 44 45 typedef int (MODEL_FN) (sim_cpu *, void *); 46 47 typedef struct { 48 /* This is an integer that identifies this insn. 49 How this works is up to the target. */ 50 int num; 51 52 /* Function to handle insn-specific profiling. */ 53 MODEL_FN *model_fn; 54 55 /* Array of function units used by this insn. */ 56 UNIT units[MAX_UNITS]; 57 } INSN_TIMING; 58 59 /* Struct to describe various implementation properties of a cpu. 60 When multiple cpu variants are supported, the sizes of some structs 61 can vary. */ 62 63 typedef struct { 64 /* The size of the SIM_CPU struct. */ 65 int sim_cpu_size; 66 #define IMP_PROPS_SIM_CPU_SIZE(cpu_props) ((cpu_props)->sim_cpu_size) 67 /* An SCACHE element can vary in size, depending on the selected cpu. 68 This is zero if the SCACHE isn't in use for this variant. */ 69 int scache_elm_size; 70 #define IMP_PROPS_SCACHE_ELM_SIZE(cpu_props) ((cpu_props)->scache_elm_size) 71 } MACH_IMP_PROPERTIES; 72 73 /* A machine variant. */ 74 75 typedef struct { 76 const char *name; 77 #define MACH_NAME(m) ((m)->name) 78 /* This is the argument to bfd_scan_arch. */ 79 const char *bfd_name; 80 #define MACH_BFD_NAME(m) ((m)->bfd_name) 81 enum mach_attr num; 82 #define MACH_NUM(m) ((m)->num) 83 84 int word_bitsize; 85 #define MACH_WORD_BITSIZE(m) ((m)->word_bitsize) 86 int addr_bitsize; 87 #define MACH_ADDR_BITSIZE(m) ((m)->addr_bitsize) 88 89 /* Pointer to null-entry terminated table of models of this mach. 90 The default is the first one. */ 91 const struct model *models; 92 #define MACH_MODELS(m) ((m)->models) 93 94 /* Pointer to the implementation properties of this mach. */ 95 const MACH_IMP_PROPERTIES *imp_props; 96 #define MACH_IMP_PROPS(m) ((m)->imp_props) 97 98 /* Called by sim_model_set when the model of a cpu is set. */ 99 void (* init_cpu) (sim_cpu *); 100 #define MACH_INIT_CPU(m) ((m)->init_cpu) 101 102 /* Initialize the simulator engine for this cpu. 103 Used by cgen simulators to initialize the insn descriptor table. */ 104 void (* prepare_run) (sim_cpu *); 105 #define MACH_PREPARE_RUN(m) ((m)->prepare_run) 106 } MACH; 107 108 /* A model (implementation) of a machine. */ 109 110 typedef struct model { 111 const char *name; 112 #define MODEL_NAME(m) ((m)->name) 113 const MACH *mach; 114 #define MODEL_MACH(m) ((m)->mach) 115 /* An enum that distinguished the model. */ 116 int num; 117 #define MODEL_NUM(m) ((m)->num) 118 /* Pointer to timing table for this model. */ 119 const INSN_TIMING *timing; 120 #define MODEL_TIMING(m) ((m)->timing) 121 void (* init) (sim_cpu *); 122 #define MODEL_INIT(m) ((m)->init) 123 } MODEL; 124 125 /* Tables of supported machines. */ 126 /* ??? In a simulator of multiple architectures, will need multiple copies of 127 this. Have an `archs' array that contains a pointer to the machs array 128 for each (which in turn has a pointer to the models array for each). */ 129 extern const MACH *sim_machs[]; 130 131 /* Model module handlers. */ 132 extern MODULE_INSTALL_FN sim_model_install; 133 134 /* Support routines. */ 135 extern void sim_model_set (SIM_DESC sd_, sim_cpu *cpu_, const MODEL *model_); 136 extern const MODEL * sim_model_lookup (const char *name_); 137 extern const MACH * sim_mach_lookup (const char *name_); 138 extern const MACH * sim_mach_lookup_bfd_name (const char *bfd_name_); 139 140 #endif /* SIM_MODEL_H */ 141