1//  reg-based SHIFT test program.
2//  Test  r4 = ASHIFT (r2 by rl3);
3//  Test  r4 = LSHIFT (r2 by rl3);
4# mach: bfin
5
6.include "testutils.inc"
7	start
8
9
10	R0.L = 0x0001;
11	R0.H = 0x8000;
12
13// arithmetic
14//  left by  31
15// 8000 0001 -> 8000 0000
16	R7 = 0;
17	ASTAT = R7;
18	R3.L = 31;
19	R3.H = 0;
20	R6 = ASHIFT R0 BY R3.L;
21	DBGA ( R6.L , 0x0000 );
22	DBGA ( R6.H , 0x8000 );
23	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
24	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
25	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
26	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
27	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
28
29// arithmetic
30//  left by  32
31// 8000 0001 -> 8000 0000
32	R7 = 0;
33	ASTAT = R7;
34	R3.L = 32;
35	R3.H = 0;
36	R6 = ASHIFT R0 BY R3.L;
37	DBGA ( R6.L , 0xffff );
38	DBGA ( R6.H , 0xffff );
39	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
40	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
41	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
42	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
43	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
44
45// arithmetic
46//  left by  40
47// 8000 0001 -> 8000 0000
48	R7 = 0;
49	ASTAT = R7;
50	R3.L = 40;
51	R3.H = 0;
52	R6 = ASHIFT R0 BY R3.L;
53	DBGA ( R6.L , 0xFF80 );
54	DBGA ( R6.H , 0xFFFF );
55	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
56	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
57	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
58	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
59	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
60
61// arithmetic
62//  left by  -32
63// 8000 0001 -> 8000 0000
64	R7 = 0;
65	ASTAT = R7;
66	R3.L = -32;
67	R3.H = 0;
68	R6 = ASHIFT R0 BY R3.L;
69	DBGA ( R6.L , 0xffff );
70	DBGA ( R6.H , 0xffff );
71	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
72	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
73	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
74	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
75	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
76
77// arithmetic
78//  left by  63 (off scale)
79// 8000 0001 -> 0000 0000
80	R7 = 0;
81	ASTAT = R7;
82	R0.L = 1;
83	R0.H = 0;
84	R3.L = 63;
85	R3.H = 0;
86	R6 = ASHIFT R0 BY R3.L;
87	DBGA ( R6.L , 0x0000 );
88	DBGA ( R6.H , 0x0000 );
89	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x1 );
90	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
91	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
92	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
93	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
94
95// arithmetic
96//  left by  255 looks like -1 (mask 7 bits)
97// 8000 0001 -> 0000 0000
98	R7 = 0;
99	ASTAT = R7;
100	R0.L = 0x0100;
101	R0.H = 0;
102	R3.L = 255;
103	R3.H = 0;
104	R6 = ASHIFT R0 BY R3.L;
105	DBGA ( R6.L , 0x0080 );
106	DBGA ( R6.H , 0x0000 );
107	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
108	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
109	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
110	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
111	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
112
113// arithmetic
114//  left by 1
115// 8000 0001 -> 0000 0002
116	R0.L = 0x0001;
117	R0.H = 0x8000;
118	R3.L = 1;
119	R3.H = 0;
120	R6 = ASHIFT R0 BY R3.L;
121	DBGA ( R6.L , 0x0002 );
122	DBGA ( R6.H , 0x0000 );
123	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
124	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
125	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
126	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
127	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
128
129// arithmetic
130//  right by 1
131// 8000 0001 -> 0000 0002
132	R0.L = 0x0001;
133	R0.H = 0x8000;
134	R3.L = -1;
135	R3.H = 0;
136	R6 = ASHIFT R0 BY R3.L;
137	DBGA ( R6.L , 0x0000 );
138	DBGA ( R6.H , 0xc000 );
139	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
140	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
141	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
142	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
143	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
144
145// arithmetic
146//  right by  -31
147// 8000 0001 -> ffff ffff
148	R0.L = 0x0001;
149	R0.H = 0x8000;
150	R3.L = -31;
151	R3.H = 0;
152	R6 = ASHIFT R0 BY R3.L;
153	DBGA ( R6.L , 0xffff );
154	DBGA ( R6.H , 0xffff );
155	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
156	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
157	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
158	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
159	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
160
161// logic
162//  left by largest positive magnitude of 31 (0x1f)
163// 8000 0001 -> 8000 0000
164	R0.L = 0x0001;
165	R0.H = 0x8000;
166	R3.L = 31;
167	R3.H = 0;
168	R6 = ASHIFT R0 BY R3.L;
169	DBGA ( R6.L , 0x0000 );
170	DBGA ( R6.H , 0x8000 );
171	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
172	CC = AN;	R7 = CC; DBGA ( R7.L , 0x1 );
173	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
174	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
175	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
176
177// logic
178//  left by 1
179// 8000 0001 -> 0000 0002
180	R0.L = 0x0001;
181	R0.H = 0x8000;
182	R3.L = 1;
183	R3.H = 0;
184	R6 = LSHIFT R0 BY R3.L;
185	DBGA ( R6.L , 0x0002 );
186	DBGA ( R6.H , 0x0000 );
187	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
188	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
189	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
190	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
191	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
192
193// logic
194//  right by 1
195// 8000 0001 -> 4000 0000
196	R0.L = 0x0001;
197	R0.H = 0x8000;
198	R3.L = -1;
199	R3.H = 0;
200	R6 = LSHIFT R0 BY R3.L;
201	DBGA ( R6.L , 0x0000 );
202	DBGA ( R6.H , 0x4000 );
203	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
204	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
205	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
206	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
207	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
208
209// logic
210//  right by largest negative magnitude of -31
211// 8000 0001 -> 0000 0001
212	R0.L = 0x0001;
213	R0.H = 0x8000;
214	R3.L = -31;
215	R3.H = 0;
216	R6 = LSHIFT R0 BY R3.L;
217	DBGA ( R6.L , 0x0001 );
218	DBGA ( R6.H , 0x0000 );
219	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
220	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
221	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
222	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
223	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
224
225// logic
226//  right by -32
227// 8000 0001 -> 0000 0001
228	R0.L = 0x0001;
229	R0.H = 0x8000;
230	R3.L = -32;
231	R3.H = 0;
232	R6 = LSHIFT R0 BY R3.L;
233	DBGA ( R6.L , 0x0000 );
234	DBGA ( R6.H , 0x0000 );
235	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x1 );
236	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
237	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
238	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
239	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
240
241// logic
242//   by +40
243// 8000 0001 -> 0000 0001
244	R0.L = 0x0001;
245	R0.H = 0x8000;
246	R3.L = 40;
247	R3.H = 0;
248	R6 = LSHIFT R0 BY R3.L;
249	DBGA ( R6.L , 0x0080 );
250	DBGA ( R6.H , 0x0000 );
251	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x0 );
252	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
253
254	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
255	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
256	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
257
258// rot
259//  left  by 1
260// 8000 0001 -> 0000 0002 cc=1
261	R7 = 0;
262	CC = R7;
263	R6 = ROT R0 BY 1;
264	DBGA ( R6.L , 0x0002 );
265	DBGA ( R6.H , 0x0000 );
266	R7 = CC;	DBGA ( R7.L , 0x0001 );
267
268// rot
269//  right by -1
270// 8000 0001 -> 4000 0000 cc=1
271	R7 = 0;
272	CC = R7;
273	R6 = ROT R0 BY -1;
274	DBGA ( R6.L , 0x0000 );
275	DBGA ( R6.H , 0x4000 );
276	R7 = CC;	DBGA ( R7.L , 0x0001 );
277
278// rot
279//  right by largest positive magnitude of 31
280// 8000 0001 -> a000 0000 cc=0
281	R7 = 0;
282	CC = R7;
283	R6 = ROT R0 BY 31;
284	DBGA ( R6.L , 0x0000 );
285	DBGA ( R6.H , 0xa000 );
286	R7 = CC;	DBGA ( R7.L , 0x0000 );
287
288// rot
289//  right by largest positive magnitude of 31 with cc=1
290// 8000 0001 cc=1 -> a000 0000 cc=0
291	R7 = 1;
292	CC = R7;
293	R6 = ROT R0 BY 31;
294	DBGA ( R6.L , 0x0000 );
295	DBGA ( R6.H , 0xe000 );
296	R7 = CC;	DBGA ( R7.L , 0x0000 );
297
298// rot
299//  right by largest negative magnitude of -31
300// 8000 0001 -> 0000 0005 cc=0
301	R7 = 0;
302	CC = R7;
303	R6 = ROT R0 BY -31;
304	DBGA ( R6.L , 0x0005 );
305	DBGA ( R6.H , 0x0000 );
306	R7 = CC;	DBGA ( R7.L , 0x0000 );
307
308// rot
309//  right by largest negative magnitude of -31 with cc=1
310// 8000 0001 cc=1 -> 0000 0007 cc=0
311	R7 = 1;
312	CC = R7;
313	R6 = ROT R0 BY -31;
314	DBGA ( R6.L , 0x0007 );
315	DBGA ( R6.H , 0x0000 );
316	R7 = CC;	DBGA ( R7.L , 0x0000 );
317
318// rot
319//  left by 7
320// 8000 0001 cc=1 -> 0000 00e0 cc=0
321	R7 = 1;
322	CC = R7;
323	R6 = ROT R0 BY 7;
324	DBGA ( R6.L , 0x00e0 );
325	DBGA ( R6.H , 0x0000 );
326	R7 = CC;	DBGA ( R7.L , 0x0000 );
327
328// rot by zero
329// 8000 0001 -> 8000 000
330	R7 = 1;
331	CC = R7;
332	R6 = ROT R0 BY 0;
333	DBGA ( R6.L , 0x0001 );
334	DBGA ( R6.H , 0x8000 );
335	R7 = CC;	DBGA ( R7.L , 0x0001 );
336
337//  0 by 1
338	R7 = 0;
339	R0 = 0;
340	ASTAT = R7;
341	R6 = R0 << 1;
342	DBGA ( R6.L , 0x0000 );
343	DBGA ( R6.H , 0x0000 );
344	CC = AZ;	R7 = CC; DBGA ( R7.L , 0x1 );
345	CC = AN;	R7 = CC; DBGA ( R7.L , 0x0 );
346	CC = AC0;	R7 = CC; DBGA ( R7.L , 0x0 );
347	CC = AV0;	R7 = CC; DBGA ( R7.L , 0x0 );
348	CC = AV1;	R7 = CC; DBGA ( R7.L , 0x0 );
349
350	pass
351