1// Test rl3 = ashift (rh0 by 7); 2// Test rl3 = lshift (rh0 by 7); 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 init_r_regs 0; 9 10 R0 = 0; 11 ASTAT = R0; 12 R0.L = 0x1; 13 R0.H = 0x1; 14 R7.L = R0.L << 4; 15 DBGA ( R7.L , 0x0010 ); 16 DBGA ( R7.H , 0x0000 ); 17 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 18 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 19 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 20 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 21 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 22 23 R0 = 0; 24 ASTAT = R0; 25 R0.L = 0x8000; 26 R0.H = 0x1; 27 R7.L = R0.L >>> 4; 28 DBGA ( R7.L , 0xf800 ); 29 DBGA ( R7.H , 0x0000 ); 30 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 31 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 32 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 33 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 34 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 35 36 R0 = 0; 37 ASTAT = R0; 38 R0.L = 0x0; 39 R0.H = 0x1; 40 R7.L = R0.L << 0; 41 DBGA ( R7.L , 0x0000 ); 42 DBGA ( R7.H , 0x0000 ); 43 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 44 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 45 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 46 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 47 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 48 49 R0 = 0; 50 ASTAT = R0; 51 R7 = 0; 52 R0.L = 0x1; 53 R0.H = 0x8000; 54 R7.H = R0.H >>> 4; 55 DBGA ( R7.L , 0x0000 ); 56 DBGA ( R7.H , 0xf800 ); 57 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 58 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 59 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 60 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 61 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 62 63 R0 = 0; 64 ASTAT = R0; 65 R7 = 0; 66 R0.L = 0x1; 67 R0.H = 0x8000; 68 R7.L = R0.H >>> 4; 69 DBGA ( R7.L , 0xf800 ); 70 DBGA ( R7.H , 0x0000 ); 71 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 72 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 73 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 74 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 75 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 76 77// logic shifts 78 R0 = 0; 79 ASTAT = R0; 80 R7 = 0; 81 R0.L = 0x1; 82 R0.H = 0x8000; 83 R7.L = R0.H >> 4; 84 DBGA ( R7.L , 0x0800 ); 85 DBGA ( R7.H , 0x0000 ); 86 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 87 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 88 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 89 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 90 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 91 92 R0 = 0; 93 ASTAT = R0; 94 R7 = 0; 95 R0.L = 0x1; 96 R0.H = 0x1; 97 R7.H = R0.L << 4; 98 DBGA ( R7.L , 0x0000 ); 99 DBGA ( R7.H , 0x0010 ); 100 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 101 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 102 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 103 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 104 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 105 106 R0 = 0; 107 ASTAT = R0; 108 R7 = 1; 109 R0.L = 0x0; 110 R0.H = 0x0; 111 R7.L = R0.L << 0; 112 DBGA ( R7.L , 0x0000 ); 113 DBGA ( R7.H , 0x0000 ); 114 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); 115 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); 116 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 117 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 118 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 119 120 R0 = 0; 121 ASTAT = R0; 122 R7 = 1; 123 R0.L = 0x1; 124 R0.H = 0x0; 125 R7.L = R0.L << 15; 126 DBGA ( R7.L , 0x8000 ); 127 DBGA ( R7.H , 0x0000 ); 128 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); 129 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); 130 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); 131 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); 132 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); 133 134 pass 135