1 #ifndef SIMOPS_H 2 #define SIMOPS_H 3 int OP_380 (void); 4 int OP_480 (void); 5 int OP_501 (void); 6 int OP_700 (void); 7 int OP_720 (void); 8 int OP_10720 (void); 9 int OP_740 (void); 10 int OP_760 (void); 11 int OP_10760 (void); 12 int OP_1C0 (void); 13 int OP_240 (void); 14 int OP_600 (void); 15 int OP_1A0 (void); 16 int OP_180 (void); 17 int OP_E0 (void); 18 int OP_2E0 (void); 19 int OP_6E0 (void); 20 int OP_1E0 (void); 21 int OP_260 (void); 22 int OP_7E0 (void); 23 int OP_C0 (void); 24 int OP_220 (void); 25 int OP_A0 (void); 26 int OP_660 (void); 27 int OP_80 (void); 28 int OP_160 (void); 29 int OP_200 (void); 30 int OP_640 (void); 31 int OP_2A0 (void); 32 int OP_A007E0 (void); 33 int OP_2C0 (void); 34 int OP_C007E0 (void); 35 int OP_280 (void); 36 int OP_8007E0 (void); 37 int OP_100 (void); 38 int OP_680 (void); 39 int OP_140 (void); 40 int OP_6C0 (void); 41 int OP_120 (void); 42 int OP_6A0 (void); 43 int OP_20 (void); 44 int OP_7C0 (void); 45 int OP_47C0 (void); 46 int OP_87C0 (void); 47 int OP_C7C0 (void); 48 int OP_16007E0 (void); 49 int OP_16087E0 (void); 50 int OP_12007E0 (void); 51 int OP_10007E0 (void); 52 int OP_E607E0 (void); 53 int OP_22207E0 (void); 54 int OP_E407E0 (void); 55 int OP_E207E0 (void); 56 int OP_E007E0 (void); 57 int OP_20007E0 (void); 58 int OP_1C207E0 (void); 59 int OP_1C007E0 (void); 60 int OP_18207E0 (void); 61 int OP_18007E0 (void); 62 int OP_2C207E0 (void); 63 int OP_2C007E0 (void); 64 int OP_28207E0 (void); 65 int OP_28007E0 (void); 66 int OP_24207E0 (void); 67 int OP_24007E0 (void); 68 int OP_107E0 (void); 69 int OP_10780 (void); 70 int OP_1B0780 (void); 71 int OP_130780 (void); 72 int OP_B0780 (void); 73 int OP_30780 (void); 74 int OP_22007E0 (void); 75 int OP_307F0 (void); 76 int OP_107F0 (void); 77 int OP_307E0 (void); 78 79 int v850_float_compare(SIM_DESC sd, int cmp, sim_fpu wop1, sim_fpu wop2, int double_op_p); 80 81 /* MEMORY ACCESS */ 82 unsigned32 load_data_mem(SIM_DESC sd, SIM_ADDR addr, int len); 83 void store_data_mem(SIM_DESC sd, SIM_ADDR addr, int len, unsigned32 data); 84 85 unsigned long Add32 (unsigned long a1, unsigned long a2, int * carry); 86 87 /* FPU */ 88 89 /* 90 FPU: update FPSR flags 91 invalid, inexact, overflow, underflow 92 */ 93 94 extern void check_invalid_snan (SIM_DESC sd, sim_fpu_status, unsigned int); 95 96 #define check_cvt_fi(sd, status, double_op_p) \ 97 update_fpsr (sd, status, FPSR_XEV | FPSR_XEI, double_op_p) 98 99 #define check_cvt_if(sd, status, double_op_p) \ 100 update_fpsr (sd, status, FPSR_XEI, double_op_p) 101 102 #define check_cvt_ff(sd, status, double_op_p) \ 103 update_fpsr (sd, status, FPSR_XEV | FPSR_XEI | FPSR_XEO | FPSR_XEU, double_op_p) 104 105 extern void update_fpsr (SIM_DESC sd, sim_fpu_status, unsigned int, unsigned int); 106 107 108 /* 109 Exception 110 */ 111 void SignalException (SIM_DESC sd); 112 void SignalExceptionFPE (SIM_DESC sd, unsigned int double_op_p); 113 114 int mpu_load_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg); 115 int mpu_store_mem_test (SIM_DESC sd, unsigned int addr, int len, int base_reg); 116 117 void v850_sar (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 118 void v850_shl (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 119 void v850_rotl (SIM_DESC sd, unsigned int, unsigned int, unsigned int *); 120 void v850_bins (SIM_DESC sd, unsigned int, unsigned int, unsigned int, unsigned int *); 121 void v850_shr (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 122 void v850_satadd (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 123 void v850_satsub (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p); 124 void v850_div (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p); 125 void v850_divu (SIM_DESC sd, unsigned int op0, unsigned int op1, unsigned int *op2p, unsigned int *op3p); 126 127 #endif 128