1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996-2021 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
20
21 #include "as.h"
22 #include "safe-ctype.h"
23 #include "subsegs.h"
24 #include "opcode/mn10300.h"
25 #include "dwarf2dbg.h"
26 #include "libiberty.h"
27
28 /* Structure to hold information about predefined registers. */
29 struct reg_name
30 {
31 const char *name;
32 int value;
33 };
34
35 /* Generic assembler global variables which must be defined by all
36 targets. */
37
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
40
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
43
44 /* Characters which may be used to separate multiple commands on a
45 single line. */
46 const char line_separator_chars[] = ";";
47
48 /* Characters which are used to indicate an exponent in a floating
49 point number. */
50 const char EXP_CHARS[] = "eE";
51
52 /* Characters which mean that a number is a floating point constant,
53 as in 0d1.0. */
54 const char FLT_CHARS[] = "dD";
55
56 const relax_typeS md_relax_table[] =
57 {
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
62 /* bCC relaxing. */
63 {0x7f, -0x80, 2, 1},
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
66
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
68 {0x7f, -0x80, 3, 4},
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
71
72 /* call relaxing. */
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
75
76 /* calls relaxing. */
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
79
80 /* jmp relaxing. */
81 {0x7f, -0x80, 2, 11},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
84
85 /* fbCC relaxing. */
86 {0x7f, -0x80, 3, 14},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
89
90 };
91
92 static int current_machine;
93
94 /* Fixups. */
95 #define MAX_INSN_FIXUPS 5
96
97 struct mn10300_fixup
98 {
99 expressionS exp;
100 int opindex;
101 bfd_reloc_code_real_type reloc;
102 };
103 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
104 static int fc;
105
106 /* We must store the value of each register operand so that we can
107 verify that certain registers do not match. */
108 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
109
110 const char *md_shortopts = "";
111
112 struct option md_longopts[] =
113 {
114 {NULL, no_argument, NULL, 0}
115 };
116
117 size_t md_longopts_size = sizeof (md_longopts);
118
119 #define HAVE_AM33_2 (current_machine == AM33_2)
120 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
121 #define HAVE_AM30 (current_machine == AM30)
122
123 /* Opcode hash table. */
124 static htab_t mn10300_hash;
125
126 /* This table is sorted. Suitable for searching by a binary search. */
127 static const struct reg_name data_registers[] =
128 {
129 { "d0", 0 },
130 { "d1", 1 },
131 { "d2", 2 },
132 { "d3", 3 },
133 };
134
135 static const struct reg_name address_registers[] =
136 {
137 { "a0", 0 },
138 { "a1", 1 },
139 { "a2", 2 },
140 { "a3", 3 },
141 };
142
143 static const struct reg_name r_registers[] =
144 {
145 { "a0", 8 },
146 { "a1", 9 },
147 { "a2", 10 },
148 { "a3", 11 },
149 { "d0", 12 },
150 { "d1", 13 },
151 { "d2", 14 },
152 { "d3", 15 },
153 { "e0", 0 },
154 { "e1", 1 },
155 { "e10", 10 },
156 { "e11", 11 },
157 { "e12", 12 },
158 { "e13", 13 },
159 { "e14", 14 },
160 { "e15", 15 },
161 { "e2", 2 },
162 { "e3", 3 },
163 { "e4", 4 },
164 { "e5", 5 },
165 { "e6", 6 },
166 { "e7", 7 },
167 { "e8", 8 },
168 { "e9", 9 },
169 { "r0", 0 },
170 { "r1", 1 },
171 { "r10", 10 },
172 { "r11", 11 },
173 { "r12", 12 },
174 { "r13", 13 },
175 { "r14", 14 },
176 { "r15", 15 },
177 { "r2", 2 },
178 { "r3", 3 },
179 { "r4", 4 },
180 { "r5", 5 },
181 { "r6", 6 },
182 { "r7", 7 },
183 { "r8", 8 },
184 { "r9", 9 },
185 };
186
187 static const struct reg_name xr_registers[] =
188 {
189 { "mcrh", 2 },
190 { "mcrl", 3 },
191 { "mcvf", 4 },
192 { "mdrq", 1 },
193 { "sp", 0 },
194 { "xr0", 0 },
195 { "xr1", 1 },
196 { "xr10", 10 },
197 { "xr11", 11 },
198 { "xr12", 12 },
199 { "xr13", 13 },
200 { "xr14", 14 },
201 { "xr15", 15 },
202 { "xr2", 2 },
203 { "xr3", 3 },
204 { "xr4", 4 },
205 { "xr5", 5 },
206 { "xr6", 6 },
207 { "xr7", 7 },
208 { "xr8", 8 },
209 { "xr9", 9 },
210 };
211
212 static const struct reg_name float_registers[] =
213 {
214 { "fs0", 0 },
215 { "fs1", 1 },
216 { "fs10", 10 },
217 { "fs11", 11 },
218 { "fs12", 12 },
219 { "fs13", 13 },
220 { "fs14", 14 },
221 { "fs15", 15 },
222 { "fs16", 16 },
223 { "fs17", 17 },
224 { "fs18", 18 },
225 { "fs19", 19 },
226 { "fs2", 2 },
227 { "fs20", 20 },
228 { "fs21", 21 },
229 { "fs22", 22 },
230 { "fs23", 23 },
231 { "fs24", 24 },
232 { "fs25", 25 },
233 { "fs26", 26 },
234 { "fs27", 27 },
235 { "fs28", 28 },
236 { "fs29", 29 },
237 { "fs3", 3 },
238 { "fs30", 30 },
239 { "fs31", 31 },
240 { "fs4", 4 },
241 { "fs5", 5 },
242 { "fs6", 6 },
243 { "fs7", 7 },
244 { "fs8", 8 },
245 { "fs9", 9 },
246 };
247
248 static const struct reg_name double_registers[] =
249 {
250 { "fd0", 0 },
251 { "fd10", 10 },
252 { "fd12", 12 },
253 { "fd14", 14 },
254 { "fd16", 16 },
255 { "fd18", 18 },
256 { "fd2", 2 },
257 { "fd20", 20 },
258 { "fd22", 22 },
259 { "fd24", 24 },
260 { "fd26", 26 },
261 { "fd28", 28 },
262 { "fd30", 30 },
263 { "fd4", 4 },
264 { "fd6", 6 },
265 { "fd8", 8 },
266 };
267
268 /* We abuse the `value' field, that would be otherwise unused, to
269 encode the architecture on which (access to) the register was
270 introduced. FIXME: we should probably warn when we encounter a
271 register name when assembling for an architecture that doesn't
272 support it, before parsing it as a symbol name. */
273 static const struct reg_name other_registers[] =
274 {
275 { "epsw", AM33 },
276 { "mdr", 0 },
277 { "pc", AM33 },
278 { "psw", 0 },
279 { "sp", 0 },
280 { "ssp", 0 },
281 { "usp", 0 },
282 };
283
284 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
285
286 /* Perform a binary search of the given register table REGS to see
287 if NAME is a valid register name. Returns the register number from
288 the array on success, or -1 on failure. */
289
290 static int
reg_name_search(const struct reg_name * regs,int regcount,const char * name)291 reg_name_search (const struct reg_name *regs,
292 int regcount,
293 const char *name)
294 {
295 int low, high;
296
297 low = 0;
298 high = regcount - 1;
299
300 do
301 {
302 int cmp, middle;
303
304 middle = (low + high) / 2;
305 cmp = strcasecmp (name, regs[middle].name);
306 if (cmp < 0)
307 high = middle - 1;
308 else if (cmp > 0)
309 low = middle + 1;
310 else
311 return regs[middle].value;
312 }
313 while (low <= high);
314
315 return -1;
316 }
317
318 /* Looks at the current position in the input line to see if it is
319 the name of a register in TABLE. If it is, then the name is
320 converted into an expression returned in EXPRESSIONP (with X_op
321 set to O_register and X_add_number set to the register number), the
322 input pointer is left pointing at the first non-blank character after
323 the name and the function returns TRUE. Otherwise the input pointer
324 is left alone and the function returns FALSE. */
325
326 static bool
get_register_name(expressionS * expressionP,const struct reg_name * table,size_t table_length)327 get_register_name (expressionS * expressionP,
328 const struct reg_name * table,
329 size_t table_length)
330 {
331 int reg_number;
332 char *name;
333 char *start;
334 char c;
335
336 /* Find the spelling of the operand. */
337 start = input_line_pointer;
338
339 c = get_symbol_name (&name);
340 reg_number = reg_name_search (table, table_length, name);
341
342 /* Put back the delimiting char. */
343 (void) restore_line_pointer (c);
344
345 /* Look to see if it's in the register table. */
346 if (reg_number >= 0)
347 {
348 expressionP->X_op = O_register;
349 expressionP->X_add_number = reg_number;
350
351 /* Make the rest nice. */
352 expressionP->X_add_symbol = NULL;
353 expressionP->X_op_symbol = NULL;
354
355 return true;
356 }
357
358 /* Reset the line as if we had not done anything. */
359 input_line_pointer = start;
360 return false;
361 }
362
363 static bool
r_register_name(expressionS * expressionP)364 r_register_name (expressionS *expressionP)
365 {
366 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
367 }
368
369
370 static bool
xr_register_name(expressionS * expressionP)371 xr_register_name (expressionS *expressionP)
372 {
373 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
374 }
375
376 static bool
data_register_name(expressionS * expressionP)377 data_register_name (expressionS *expressionP)
378 {
379 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
380 }
381
382 static bool
address_register_name(expressionS * expressionP)383 address_register_name (expressionS *expressionP)
384 {
385 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
386 }
387
388 static bool
float_register_name(expressionS * expressionP)389 float_register_name (expressionS *expressionP)
390 {
391 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
392 }
393
394 static bool
double_register_name(expressionS * expressionP)395 double_register_name (expressionS *expressionP)
396 {
397 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
398 }
399
400 static bool
other_register_name(expressionS * expressionP)401 other_register_name (expressionS *expressionP)
402 {
403 int reg_number;
404 char *name;
405 char *start;
406 char c;
407
408 /* Find the spelling of the operand. */
409 start = input_line_pointer;
410
411 c = get_symbol_name (&name);
412 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
413
414 /* Put back the delimiting char. */
415 (void) restore_line_pointer (c);
416
417 /* Look to see if it's in the register table. */
418 if (reg_number == 0
419 || (reg_number == AM33 && HAVE_AM33))
420 {
421 expressionP->X_op = O_register;
422 expressionP->X_add_number = 0;
423
424 /* Make the rest nice. */
425 expressionP->X_add_symbol = NULL;
426 expressionP->X_op_symbol = NULL;
427
428 return true;
429 }
430
431 /* Reset the line as if we had not done anything. */
432 input_line_pointer = start;
433 return false;
434 }
435
436 void
md_show_usage(FILE * stream)437 md_show_usage (FILE *stream)
438 {
439 fprintf (stream, _("MN10300 assembler options:\n\
440 none yet\n"));
441 }
442
443 int
md_parse_option(int c ATTRIBUTE_UNUSED,const char * arg ATTRIBUTE_UNUSED)444 md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
445 {
446 return 0;
447 }
448
449 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)450 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
451 {
452 return 0;
453 }
454
455 const char *
md_atof(int type,char * litp,int * sizep)456 md_atof (int type, char *litp, int *sizep)
457 {
458 return ieee_md_atof (type, litp, sizep, false);
459 }
460
461 void
md_convert_frag(bfd * abfd ATTRIBUTE_UNUSED,asection * sec,fragS * fragP)462 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
463 asection *sec,
464 fragS *fragP)
465 {
466 static unsigned long label_count = 0;
467 char buf[40];
468
469 subseg_change (sec, 0);
470 if (fragP->fr_subtype == 0)
471 {
472 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
473 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
474 fragP->fr_var = 0;
475 fragP->fr_fix += 2;
476 }
477 else if (fragP->fr_subtype == 1)
478 {
479 /* Reverse the condition of the first branch. */
480 int offset = fragP->fr_fix;
481 int opcode = fragP->fr_literal[offset] & 0xff;
482
483 switch (opcode)
484 {
485 case 0xc8:
486 opcode = 0xc9;
487 break;
488 case 0xc9:
489 opcode = 0xc8;
490 break;
491 case 0xc0:
492 opcode = 0xc2;
493 break;
494 case 0xc2:
495 opcode = 0xc0;
496 break;
497 case 0xc3:
498 opcode = 0xc1;
499 break;
500 case 0xc1:
501 opcode = 0xc3;
502 break;
503 case 0xc4:
504 opcode = 0xc6;
505 break;
506 case 0xc6:
507 opcode = 0xc4;
508 break;
509 case 0xc7:
510 opcode = 0xc5;
511 break;
512 case 0xc5:
513 opcode = 0xc7;
514 break;
515 default:
516 abort ();
517 }
518 fragP->fr_literal[offset] = opcode;
519
520 /* Create a fixup for the reversed conditional branch. */
521 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
522 fix_new (fragP, fragP->fr_fix + 1, 1,
523 symbol_new (buf, sec, fragP->fr_next, 0),
524 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
525
526 /* Now create the unconditional branch + fixup to the
527 final target. */
528 fragP->fr_literal[offset + 2] = 0xcc;
529 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
530 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
531 fragP->fr_var = 0;
532 fragP->fr_fix += 5;
533 }
534 else if (fragP->fr_subtype == 2)
535 {
536 /* Reverse the condition of the first branch. */
537 int offset = fragP->fr_fix;
538 int opcode = fragP->fr_literal[offset] & 0xff;
539
540 switch (opcode)
541 {
542 case 0xc8:
543 opcode = 0xc9;
544 break;
545 case 0xc9:
546 opcode = 0xc8;
547 break;
548 case 0xc0:
549 opcode = 0xc2;
550 break;
551 case 0xc2:
552 opcode = 0xc0;
553 break;
554 case 0xc3:
555 opcode = 0xc1;
556 break;
557 case 0xc1:
558 opcode = 0xc3;
559 break;
560 case 0xc4:
561 opcode = 0xc6;
562 break;
563 case 0xc6:
564 opcode = 0xc4;
565 break;
566 case 0xc7:
567 opcode = 0xc5;
568 break;
569 case 0xc5:
570 opcode = 0xc7;
571 break;
572 default:
573 abort ();
574 }
575 fragP->fr_literal[offset] = opcode;
576
577 /* Create a fixup for the reversed conditional branch. */
578 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
579 fix_new (fragP, fragP->fr_fix + 1, 1,
580 symbol_new (buf, sec, fragP->fr_next, 0),
581 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
582
583 /* Now create the unconditional branch + fixup to the
584 final target. */
585 fragP->fr_literal[offset + 2] = 0xdc;
586 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
587 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
588 fragP->fr_var = 0;
589 fragP->fr_fix += 7;
590 }
591 else if (fragP->fr_subtype == 3)
592 {
593 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
594 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
595 fragP->fr_var = 0;
596 fragP->fr_fix += 3;
597 }
598 else if (fragP->fr_subtype == 4)
599 {
600 /* Reverse the condition of the first branch. */
601 int offset = fragP->fr_fix;
602 int opcode = fragP->fr_literal[offset + 1] & 0xff;
603
604 switch (opcode)
605 {
606 case 0xe8:
607 opcode = 0xe9;
608 break;
609 case 0xe9:
610 opcode = 0xe8;
611 break;
612 case 0xea:
613 opcode = 0xeb;
614 break;
615 case 0xeb:
616 opcode = 0xea;
617 break;
618 default:
619 abort ();
620 }
621 fragP->fr_literal[offset + 1] = opcode;
622
623 /* Create a fixup for the reversed conditional branch. */
624 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
625 fix_new (fragP, fragP->fr_fix + 2, 1,
626 symbol_new (buf, sec, fragP->fr_next, 0),
627 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
628
629 /* Now create the unconditional branch + fixup to the
630 final target. */
631 fragP->fr_literal[offset + 3] = 0xcc;
632 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
633 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
634 fragP->fr_var = 0;
635 fragP->fr_fix += 6;
636 }
637 else if (fragP->fr_subtype == 5)
638 {
639 /* Reverse the condition of the first branch. */
640 int offset = fragP->fr_fix;
641 int opcode = fragP->fr_literal[offset + 1] & 0xff;
642
643 switch (opcode)
644 {
645 case 0xe8:
646 opcode = 0xe9;
647 break;
648 case 0xea:
649 opcode = 0xeb;
650 break;
651 case 0xeb:
652 opcode = 0xea;
653 break;
654 default:
655 abort ();
656 }
657 fragP->fr_literal[offset + 1] = opcode;
658
659 /* Create a fixup for the reversed conditional branch. */
660 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
661 fix_new (fragP, fragP->fr_fix + 2, 1,
662 symbol_new (buf, sec, fragP->fr_next, 0),
663 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
664
665 /* Now create the unconditional branch + fixup to the
666 final target. */
667 fragP->fr_literal[offset + 3] = 0xdc;
668 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
669 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
670 fragP->fr_var = 0;
671 fragP->fr_fix += 8;
672 }
673 else if (fragP->fr_subtype == 6)
674 {
675 int offset = fragP->fr_fix;
676
677 fragP->fr_literal[offset] = 0xcd;
678 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
679 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
680 fragP->fr_var = 0;
681 fragP->fr_fix += 5;
682 }
683 else if (fragP->fr_subtype == 7)
684 {
685 int offset = fragP->fr_fix;
686
687 fragP->fr_literal[offset] = 0xdd;
688 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
689 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
690 fragP->fr_literal[offset + 3] = 0;
691 fragP->fr_literal[offset + 4] = 0;
692
693 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
694 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
695 fragP->fr_var = 0;
696 fragP->fr_fix += 7;
697 }
698 else if (fragP->fr_subtype == 8)
699 {
700 int offset = fragP->fr_fix;
701
702 fragP->fr_literal[offset] = 0xfa;
703 fragP->fr_literal[offset + 1] = 0xff;
704 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
705 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
706 fragP->fr_var = 0;
707 fragP->fr_fix += 4;
708 }
709 else if (fragP->fr_subtype == 9)
710 {
711 int offset = fragP->fr_fix;
712
713 fragP->fr_literal[offset] = 0xfc;
714 fragP->fr_literal[offset + 1] = 0xff;
715
716 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
717 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
718 fragP->fr_var = 0;
719 fragP->fr_fix += 6;
720 }
721 else if (fragP->fr_subtype == 10)
722 {
723 fragP->fr_literal[fragP->fr_fix] = 0xca;
724 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
725 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
726 fragP->fr_var = 0;
727 fragP->fr_fix += 2;
728 }
729 else if (fragP->fr_subtype == 11)
730 {
731 int offset = fragP->fr_fix;
732
733 fragP->fr_literal[offset] = 0xcc;
734
735 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
736 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
737 fragP->fr_var = 0;
738 fragP->fr_fix += 3;
739 }
740 else if (fragP->fr_subtype == 12)
741 {
742 int offset = fragP->fr_fix;
743
744 fragP->fr_literal[offset] = 0xdc;
745
746 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
747 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
748 fragP->fr_var = 0;
749 fragP->fr_fix += 5;
750 }
751 else if (fragP->fr_subtype == 13)
752 {
753 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
754 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
755 fragP->fr_var = 0;
756 fragP->fr_fix += 3;
757 }
758 else if (fragP->fr_subtype == 14)
759 {
760 /* Reverse the condition of the first branch. */
761 int offset = fragP->fr_fix;
762 int opcode = fragP->fr_literal[offset + 1] & 0xff;
763
764 switch (opcode)
765 {
766 case 0xd0:
767 opcode = 0xd1;
768 break;
769 case 0xd1:
770 opcode = 0xd0;
771 break;
772 case 0xd2:
773 opcode = 0xdc;
774 break;
775 case 0xd3:
776 opcode = 0xdb;
777 break;
778 case 0xd4:
779 opcode = 0xda;
780 break;
781 case 0xd5:
782 opcode = 0xd9;
783 break;
784 case 0xd6:
785 opcode = 0xd8;
786 break;
787 case 0xd7:
788 opcode = 0xdd;
789 break;
790 case 0xd8:
791 opcode = 0xd6;
792 break;
793 case 0xd9:
794 opcode = 0xd5;
795 break;
796 case 0xda:
797 opcode = 0xd4;
798 break;
799 case 0xdb:
800 opcode = 0xd3;
801 break;
802 case 0xdc:
803 opcode = 0xd2;
804 break;
805 case 0xdd:
806 opcode = 0xd7;
807 break;
808 default:
809 abort ();
810 }
811 fragP->fr_literal[offset + 1] = opcode;
812
813 /* Create a fixup for the reversed conditional branch. */
814 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
815 fix_new (fragP, fragP->fr_fix + 2, 1,
816 symbol_new (buf, sec, fragP->fr_next, 0),
817 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
818
819 /* Now create the unconditional branch + fixup to the
820 final target. */
821 fragP->fr_literal[offset + 3] = 0xcc;
822 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
823 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
824 fragP->fr_var = 0;
825 fragP->fr_fix += 6;
826 }
827 else if (fragP->fr_subtype == 15)
828 {
829 /* Reverse the condition of the first branch. */
830 int offset = fragP->fr_fix;
831 int opcode = fragP->fr_literal[offset + 1] & 0xff;
832
833 switch (opcode)
834 {
835 case 0xd0:
836 opcode = 0xd1;
837 break;
838 case 0xd1:
839 opcode = 0xd0;
840 break;
841 case 0xd2:
842 opcode = 0xdc;
843 break;
844 case 0xd3:
845 opcode = 0xdb;
846 break;
847 case 0xd4:
848 opcode = 0xda;
849 break;
850 case 0xd5:
851 opcode = 0xd9;
852 break;
853 case 0xd6:
854 opcode = 0xd8;
855 break;
856 case 0xd7:
857 opcode = 0xdd;
858 break;
859 case 0xd8:
860 opcode = 0xd6;
861 break;
862 case 0xd9:
863 opcode = 0xd5;
864 break;
865 case 0xda:
866 opcode = 0xd4;
867 break;
868 case 0xdb:
869 opcode = 0xd3;
870 break;
871 case 0xdc:
872 opcode = 0xd2;
873 break;
874 case 0xdd:
875 opcode = 0xd7;
876 break;
877 default:
878 abort ();
879 }
880 fragP->fr_literal[offset + 1] = opcode;
881
882 /* Create a fixup for the reversed conditional branch. */
883 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
884 fix_new (fragP, fragP->fr_fix + 2, 1,
885 symbol_new (buf, sec, fragP->fr_next, 0),
886 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
887
888 /* Now create the unconditional branch + fixup to the
889 final target. */
890 fragP->fr_literal[offset + 3] = 0xdc;
891 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
892 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
893 fragP->fr_var = 0;
894 fragP->fr_fix += 8;
895 }
896 else
897 abort ();
898 }
899
900 valueT
md_section_align(asection * seg,valueT addr)901 md_section_align (asection *seg, valueT addr)
902 {
903 int align = bfd_section_alignment (seg);
904
905 return ((addr + (1 << align) - 1) & -(1 << align));
906 }
907
908 void
md_begin(void)909 md_begin (void)
910 {
911 const char *prev_name = "";
912 const struct mn10300_opcode *op;
913
914 mn10300_hash = str_htab_create ();
915
916 /* Insert unique names into hash table. The MN10300 instruction set
917 has many identical opcode names that have different opcodes based
918 on the operands. This hash table then provides a quick index to
919 the first opcode with a particular name in the opcode table. */
920
921 op = mn10300_opcodes;
922 while (op->name)
923 {
924 if (strcmp (prev_name, op->name))
925 {
926 prev_name = (char *) op->name;
927 str_hash_insert (mn10300_hash, op->name, op, 0);
928 }
929 op++;
930 }
931
932 /* Set the default machine type. */
933 #ifdef TE_LINUX
934 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
935 as_warn (_("could not set architecture and machine"));
936
937 current_machine = AM33_2;
938 #else
939 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
940 as_warn (_("could not set architecture and machine"));
941
942 current_machine = MN103;
943 #endif
944
945 /* Set linkrelax here to avoid fixups in most sections. */
946 linkrelax = 1;
947 }
948
949 static symbolS *GOT_symbol;
950
951 static inline int
mn10300_PIC_related_p(symbolS * sym)952 mn10300_PIC_related_p (symbolS *sym)
953 {
954 expressionS *exp;
955
956 if (! sym)
957 return 0;
958
959 if (sym == GOT_symbol)
960 return 1;
961
962 exp = symbol_get_value_expression (sym);
963
964 return (exp->X_op == O_PIC_reloc
965 || mn10300_PIC_related_p (exp->X_add_symbol)
966 || mn10300_PIC_related_p (exp->X_op_symbol));
967 }
968
969 static inline int
mn10300_check_fixup(struct mn10300_fixup * fixup)970 mn10300_check_fixup (struct mn10300_fixup *fixup)
971 {
972 expressionS *exp = &fixup->exp;
973
974 repeat:
975 switch (exp->X_op)
976 {
977 case O_add:
978 case O_subtract: /* If we're sufficiently unlucky that the label
979 and the expression that references it happen
980 to end up in different frags, the subtract
981 won't be simplified within expression(). */
982 /* The PIC-related operand must be the first operand of a sum. */
983 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
984 return 1;
985
986 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
987 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
988
989 exp = symbol_get_value_expression (exp->X_add_symbol);
990 goto repeat;
991
992 case O_symbol:
993 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
994 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
995 break;
996
997 case O_PIC_reloc:
998 fixup->reloc = exp->X_md;
999 exp->X_op = O_symbol;
1000 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1001 && fixup->opindex >= 0
1002 && (mn10300_operands[fixup->opindex].flags
1003 & MN10300_OPERAND_RELAX))
1004 return 1;
1005 break;
1006
1007 default:
1008 return (mn10300_PIC_related_p (exp->X_add_symbol)
1009 || mn10300_PIC_related_p (exp->X_op_symbol));
1010 }
1011
1012 return 0;
1013 }
1014
1015 void
mn10300_cons_fix_new(fragS * frag,int off,int size,expressionS * exp,bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)1016 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
1017 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
1018 {
1019 struct mn10300_fixup fixup;
1020
1021 fixup.opindex = -1;
1022 fixup.exp = *exp;
1023 fixup.reloc = BFD_RELOC_UNUSED;
1024
1025 mn10300_check_fixup (&fixup);
1026
1027 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1028 switch (size)
1029 {
1030 case 2:
1031 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1032 break;
1033
1034 case 3:
1035 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1036 break;
1037
1038 case 4:
1039 break;
1040
1041 default:
1042 goto error;
1043 }
1044 else if (fixup.reloc == BFD_RELOC_UNUSED)
1045 switch (size)
1046 {
1047 case 1:
1048 fixup.reloc = BFD_RELOC_8;
1049 break;
1050
1051 case 2:
1052 fixup.reloc = BFD_RELOC_16;
1053 break;
1054
1055 case 3:
1056 fixup.reloc = BFD_RELOC_24;
1057 break;
1058
1059 case 4:
1060 fixup.reloc = BFD_RELOC_32;
1061 break;
1062
1063 default:
1064 goto error;
1065 }
1066 else if (size != 4)
1067 {
1068 error:
1069 as_bad (_("unsupported BFD relocation size %u"), size);
1070 fixup.reloc = BFD_RELOC_UNUSED;
1071 }
1072
1073 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1074 }
1075
1076 static bool
check_operand(const struct mn10300_operand * operand,offsetT val)1077 check_operand (const struct mn10300_operand *operand,
1078 offsetT val)
1079 {
1080 /* No need to check 32bit operands for a bit. Note that
1081 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1082 if (operand->bits != 32
1083 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1084 {
1085 long min, max;
1086 offsetT test;
1087 int bits;
1088
1089 bits = operand->bits;
1090 if (operand->flags & MN10300_OPERAND_24BIT)
1091 bits = 24;
1092
1093 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1094 {
1095 max = (1 << (bits - 1)) - 1;
1096 min = - (1 << (bits - 1));
1097 }
1098 else
1099 {
1100 max = (1 << bits) - 1;
1101 min = 0;
1102 }
1103
1104 test = val;
1105
1106 if (test < (offsetT) min || test > (offsetT) max)
1107 return false;
1108 }
1109 return true;
1110 }
1111
1112 /* Insert an operand value into an instruction. */
1113
1114 static void
mn10300_insert_operand(unsigned long * insnp,unsigned long * extensionp,const struct mn10300_operand * operand,offsetT val,char * file,unsigned int line,unsigned int shift)1115 mn10300_insert_operand (unsigned long *insnp,
1116 unsigned long *extensionp,
1117 const struct mn10300_operand *operand,
1118 offsetT val,
1119 char *file,
1120 unsigned int line,
1121 unsigned int shift)
1122 {
1123 /* No need to check 32bit operands for a bit. Note that
1124 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1125 if (operand->bits != 32
1126 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1127 {
1128 long min, max;
1129 offsetT test;
1130 int bits;
1131
1132 bits = operand->bits;
1133 if (operand->flags & MN10300_OPERAND_24BIT)
1134 bits = 24;
1135
1136 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1137 {
1138 max = (1 << (bits - 1)) - 1;
1139 min = - (1 << (bits - 1));
1140 }
1141 else
1142 {
1143 max = (1 << bits) - 1;
1144 min = 0;
1145 }
1146
1147 test = val;
1148
1149 if (test < (offsetT) min || test > (offsetT) max)
1150 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1151 }
1152
1153 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1154 {
1155 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1156 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1157 << operand->shift);
1158 }
1159 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1160 {
1161 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1162 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1163 << operand->shift);
1164 }
1165 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1166 {
1167 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1168 explanation of these variables. Note that FMT-implied shifts
1169 are not taken into account for FP registers. */
1170 unsigned long mask_low, mask_high;
1171 int shl_low, shr_high, shl_high;
1172
1173 switch (operand->bits)
1174 {
1175 case 5:
1176 /* Handle regular FP registers. */
1177 if (operand->shift >= 0)
1178 {
1179 /* This is an `m' register. */
1180 shl_low = operand->shift;
1181 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1182 }
1183 else
1184 {
1185 /* This is an `n' register. */
1186 shl_low = -operand->shift;
1187 shl_high = shl_low / 4;
1188 }
1189
1190 mask_low = 0x0f;
1191 mask_high = 0x10;
1192 shr_high = 4;
1193 break;
1194
1195 case 3:
1196 /* Handle accumulators. */
1197 shl_low = -operand->shift;
1198 shl_high = 0;
1199 mask_low = 0x03;
1200 mask_high = 0x04;
1201 shr_high = 2;
1202 break;
1203
1204 default:
1205 abort ();
1206 }
1207 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1208 | ((val & mask_low) << shl_low));
1209 }
1210 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1211 {
1212 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1213 << (operand->shift + shift));
1214
1215 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1216 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1217 << (operand->shift + shift + operand->bits));
1218 }
1219 else
1220 {
1221 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1222 << (operand->shift + shift));
1223
1224 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1225 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1226 << (operand->shift + shift + operand->bits));
1227 }
1228 }
1229
1230 void
md_assemble(char * str)1231 md_assemble (char *str)
1232 {
1233 char *s;
1234 struct mn10300_opcode *opcode;
1235 struct mn10300_opcode *next_opcode;
1236 const unsigned char *opindex_ptr;
1237 int next_opindex, relaxable;
1238 unsigned long insn, extension, size = 0;
1239 char *f;
1240 int i;
1241 int match;
1242
1243 /* Get the opcode. */
1244 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1245 ;
1246 if (*s != '\0')
1247 *s++ = '\0';
1248
1249 /* Find the first opcode with the proper name. */
1250 opcode = (struct mn10300_opcode *) str_hash_find (mn10300_hash, str);
1251 if (opcode == NULL)
1252 {
1253 as_bad (_("Unrecognized opcode: `%s'"), str);
1254 return;
1255 }
1256
1257 str = s;
1258 while (ISSPACE (*str))
1259 ++str;
1260
1261 input_line_pointer = str;
1262
1263 for (;;)
1264 {
1265 const char *errmsg;
1266 int op_idx;
1267 char *hold;
1268 int extra_shift = 0;
1269
1270 errmsg = _("Invalid opcode/operands");
1271
1272 /* Reset the array of register operands. */
1273 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1274
1275 relaxable = 0;
1276 fc = 0;
1277 match = 0;
1278 next_opindex = 0;
1279 insn = opcode->opcode;
1280 extension = 0;
1281
1282 /* If the instruction is not available on the current machine
1283 then it can not possibly match. */
1284 if (opcode->machine
1285 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1286 && !(opcode->machine == AM33 && HAVE_AM33)
1287 && !(opcode->machine == AM30 && HAVE_AM30))
1288 goto error;
1289
1290 for (op_idx = 1, opindex_ptr = opcode->operands;
1291 *opindex_ptr != 0;
1292 opindex_ptr++, op_idx++)
1293 {
1294 const struct mn10300_operand *operand;
1295 expressionS ex;
1296
1297 if (next_opindex == 0)
1298 {
1299 operand = &mn10300_operands[*opindex_ptr];
1300 }
1301 else
1302 {
1303 operand = &mn10300_operands[next_opindex];
1304 next_opindex = 0;
1305 }
1306
1307 while (*str == ' ' || *str == ',')
1308 ++str;
1309
1310 if (operand->flags & MN10300_OPERAND_RELAX)
1311 relaxable = 1;
1312
1313 /* Gather the operand. */
1314 hold = input_line_pointer;
1315 input_line_pointer = str;
1316
1317 if (operand->flags & MN10300_OPERAND_PAREN)
1318 {
1319 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1320 {
1321 input_line_pointer = hold;
1322 str = hold;
1323 goto error;
1324 }
1325 input_line_pointer++;
1326 goto keep_going;
1327 }
1328 /* See if we can match the operands. */
1329 else if (operand->flags & MN10300_OPERAND_DREG)
1330 {
1331 if (!data_register_name (&ex))
1332 {
1333 input_line_pointer = hold;
1334 str = hold;
1335 goto error;
1336 }
1337 }
1338 else if (operand->flags & MN10300_OPERAND_AREG)
1339 {
1340 if (!address_register_name (&ex))
1341 {
1342 input_line_pointer = hold;
1343 str = hold;
1344 goto error;
1345 }
1346 }
1347 else if (operand->flags & MN10300_OPERAND_SP)
1348 {
1349 char *start;
1350 char c = get_symbol_name (&start);
1351
1352 if (strcasecmp (start, "sp") != 0)
1353 {
1354 (void) restore_line_pointer (c);
1355 input_line_pointer = hold;
1356 str = hold;
1357 goto error;
1358 }
1359 (void) restore_line_pointer (c);
1360 goto keep_going;
1361 }
1362 else if (operand->flags & MN10300_OPERAND_RREG)
1363 {
1364 if (!r_register_name (&ex))
1365 {
1366 input_line_pointer = hold;
1367 str = hold;
1368 goto error;
1369 }
1370 }
1371 else if (operand->flags & MN10300_OPERAND_XRREG)
1372 {
1373 if (!xr_register_name (&ex))
1374 {
1375 input_line_pointer = hold;
1376 str = hold;
1377 goto error;
1378 }
1379 }
1380 else if (operand->flags & MN10300_OPERAND_FSREG)
1381 {
1382 if (!float_register_name (&ex))
1383 {
1384 input_line_pointer = hold;
1385 str = hold;
1386 goto error;
1387 }
1388 }
1389 else if (operand->flags & MN10300_OPERAND_FDREG)
1390 {
1391 if (!double_register_name (&ex))
1392 {
1393 input_line_pointer = hold;
1394 str = hold;
1395 goto error;
1396 }
1397 }
1398 else if (operand->flags & MN10300_OPERAND_FPCR)
1399 {
1400 char *start;
1401 char c = get_symbol_name (&start);
1402
1403 if (strcasecmp (start, "fpcr") != 0)
1404 {
1405 (void) restore_line_pointer (c);
1406 input_line_pointer = hold;
1407 str = hold;
1408 goto error;
1409 }
1410 (void) restore_line_pointer (c);
1411 goto keep_going;
1412 }
1413 else if (operand->flags & MN10300_OPERAND_USP)
1414 {
1415 char *start;
1416 char c = get_symbol_name (&start);
1417
1418 if (strcasecmp (start, "usp") != 0)
1419 {
1420 (void) restore_line_pointer (c);
1421 input_line_pointer = hold;
1422 str = hold;
1423 goto error;
1424 }
1425 (void) restore_line_pointer (c);
1426 goto keep_going;
1427 }
1428 else if (operand->flags & MN10300_OPERAND_SSP)
1429 {
1430 char *start;
1431 char c = get_symbol_name (&start);
1432
1433 if (strcasecmp (start, "ssp") != 0)
1434 {
1435 (void) restore_line_pointer (c);
1436 input_line_pointer = hold;
1437 str = hold;
1438 goto error;
1439 }
1440 (void) restore_line_pointer (c);
1441 goto keep_going;
1442 }
1443 else if (operand->flags & MN10300_OPERAND_MSP)
1444 {
1445 char *start;
1446 char c = get_symbol_name (&start);
1447
1448 if (strcasecmp (start, "msp") != 0)
1449 {
1450 (void) restore_line_pointer (c);
1451 input_line_pointer = hold;
1452 str = hold;
1453 goto error;
1454 }
1455 (void) restore_line_pointer (c);
1456 goto keep_going;
1457 }
1458 else if (operand->flags & MN10300_OPERAND_PC)
1459 {
1460 char *start;
1461 char c = get_symbol_name (&start);
1462
1463 if (strcasecmp (start, "pc") != 0)
1464 {
1465 (void) restore_line_pointer (c);
1466 input_line_pointer = hold;
1467 str = hold;
1468 goto error;
1469 }
1470 (void) restore_line_pointer (c);
1471 goto keep_going;
1472 }
1473 else if (operand->flags & MN10300_OPERAND_EPSW)
1474 {
1475 char *start;
1476 char c = get_symbol_name (&start);
1477
1478 if (strcasecmp (start, "epsw") != 0)
1479 {
1480 (void) restore_line_pointer (c);
1481 input_line_pointer = hold;
1482 str = hold;
1483 goto error;
1484 }
1485 (void) restore_line_pointer (c);
1486 goto keep_going;
1487 }
1488 else if (operand->flags & MN10300_OPERAND_PLUS)
1489 {
1490 if (*input_line_pointer != '+')
1491 {
1492 input_line_pointer = hold;
1493 str = hold;
1494 goto error;
1495 }
1496 input_line_pointer++;
1497 goto keep_going;
1498 }
1499 else if (operand->flags & MN10300_OPERAND_PSW)
1500 {
1501 char *start;
1502 char c = get_symbol_name (&start);
1503
1504 if (strcasecmp (start, "psw") != 0)
1505 {
1506 (void) restore_line_pointer (c);
1507 input_line_pointer = hold;
1508 str = hold;
1509 goto error;
1510 }
1511 (void) restore_line_pointer (c);
1512 goto keep_going;
1513 }
1514 else if (operand->flags & MN10300_OPERAND_MDR)
1515 {
1516 char *start;
1517 char c = get_symbol_name (&start);
1518
1519 if (strcasecmp (start, "mdr") != 0)
1520 {
1521 (void) restore_line_pointer (c);
1522 input_line_pointer = hold;
1523 str = hold;
1524 goto error;
1525 }
1526 (void) restore_line_pointer (c);
1527 goto keep_going;
1528 }
1529 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1530 {
1531 unsigned int value = 0;
1532 if (*input_line_pointer != '[')
1533 {
1534 input_line_pointer = hold;
1535 str = hold;
1536 goto error;
1537 }
1538
1539 /* Eat the '['. */
1540 input_line_pointer++;
1541
1542 /* We used to reject a null register list here; however,
1543 we accept it now so the compiler can emit "call"
1544 instructions for all calls to named functions.
1545
1546 The linker can then fill in the appropriate bits for the
1547 register list and stack size or change the instruction
1548 into a "calls" if using "call" is not profitable. */
1549 while (*input_line_pointer != ']')
1550 {
1551 char *start;
1552 char c;
1553
1554 if (*input_line_pointer == ',')
1555 input_line_pointer++;
1556
1557 c = get_symbol_name (&start);
1558
1559 if (strcasecmp (start, "d2") == 0)
1560 {
1561 value |= 0x80;
1562 (void) restore_line_pointer (c);
1563 }
1564 else if (strcasecmp (start, "d3") == 0)
1565 {
1566 value |= 0x40;
1567 (void) restore_line_pointer (c);
1568 }
1569 else if (strcasecmp (start, "a2") == 0)
1570 {
1571 value |= 0x20;
1572 (void) restore_line_pointer (c);
1573 }
1574 else if (strcasecmp (start, "a3") == 0)
1575 {
1576 value |= 0x10;
1577 (void) restore_line_pointer (c);
1578 }
1579 else if (strcasecmp (start, "other") == 0)
1580 {
1581 value |= 0x08;
1582 (void) restore_line_pointer (c);
1583 }
1584 else if (HAVE_AM33
1585 && strcasecmp (start, "exreg0") == 0)
1586 {
1587 value |= 0x04;
1588 (void) restore_line_pointer (c);
1589 }
1590 else if (HAVE_AM33
1591 && strcasecmp (start, "exreg1") == 0)
1592 {
1593 value |= 0x02;
1594 (void) restore_line_pointer (c);
1595 }
1596 else if (HAVE_AM33
1597 && strcasecmp (start, "exother") == 0)
1598 {
1599 value |= 0x01;
1600 (void) restore_line_pointer (c);
1601 }
1602 else if (HAVE_AM33
1603 && strcasecmp (start, "all") == 0)
1604 {
1605 value |= 0xff;
1606 (void) restore_line_pointer (c);
1607 }
1608 else
1609 {
1610 input_line_pointer = hold;
1611 str = hold;
1612 goto error;
1613 }
1614 }
1615 input_line_pointer++;
1616 mn10300_insert_operand (& insn, & extension, operand,
1617 value, NULL, 0, 0);
1618 goto keep_going;
1619
1620 }
1621 else if (data_register_name (&ex))
1622 {
1623 input_line_pointer = hold;
1624 str = hold;
1625 goto error;
1626 }
1627 else if (address_register_name (&ex))
1628 {
1629 input_line_pointer = hold;
1630 str = hold;
1631 goto error;
1632 }
1633 else if (other_register_name (&ex))
1634 {
1635 input_line_pointer = hold;
1636 str = hold;
1637 goto error;
1638 }
1639 else if (HAVE_AM33 && r_register_name (&ex))
1640 {
1641 input_line_pointer = hold;
1642 str = hold;
1643 goto error;
1644 }
1645 else if (HAVE_AM33 && xr_register_name (&ex))
1646 {
1647 input_line_pointer = hold;
1648 str = hold;
1649 goto error;
1650 }
1651 else if (HAVE_AM33_2 && float_register_name (&ex))
1652 {
1653 input_line_pointer = hold;
1654 str = hold;
1655 goto error;
1656 }
1657 else if (HAVE_AM33_2 && double_register_name (&ex))
1658 {
1659 input_line_pointer = hold;
1660 str = hold;
1661 goto error;
1662 }
1663 else if (*str == ')' || *str == '(')
1664 {
1665 input_line_pointer = hold;
1666 str = hold;
1667 goto error;
1668 }
1669 else
1670 {
1671 expression (&ex);
1672 }
1673
1674 switch (ex.X_op)
1675 {
1676 case O_illegal:
1677 errmsg = _("illegal operand");
1678 goto error;
1679 case O_absent:
1680 errmsg = _("missing operand");
1681 goto error;
1682 case O_register:
1683 {
1684 int mask;
1685
1686 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1687 if (HAVE_AM33)
1688 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1689 if (HAVE_AM33_2)
1690 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1691 if ((operand->flags & mask) == 0)
1692 {
1693 input_line_pointer = hold;
1694 str = hold;
1695 goto error;
1696 }
1697
1698 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1699 extra_shift = 8;
1700 else if (opcode->format == FMT_D2
1701 || opcode->format == FMT_D4
1702 || opcode->format == FMT_S2
1703 || opcode->format == FMT_S4
1704 || opcode->format == FMT_S6
1705 || opcode->format == FMT_D5)
1706 extra_shift = 16;
1707 else if (opcode->format == FMT_D7)
1708 extra_shift = 8;
1709 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1710 extra_shift = 8;
1711 else
1712 extra_shift = 0;
1713
1714 mn10300_insert_operand (& insn, & extension, operand,
1715 ex.X_add_number, NULL,
1716 0, extra_shift);
1717
1718 /* And note the register number in the register array. */
1719 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1720 break;
1721 }
1722
1723 case O_constant:
1724 /* If this operand can be promoted, and it doesn't
1725 fit into the allocated bitfield for this insn,
1726 then promote it (ie this opcode does not match). */
1727 if (operand->flags
1728 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1729 && !check_operand (operand, ex.X_add_number))
1730 {
1731 input_line_pointer = hold;
1732 str = hold;
1733 goto error;
1734 }
1735
1736 mn10300_insert_operand (& insn, & extension, operand,
1737 ex.X_add_number, NULL, 0, 0);
1738 break;
1739
1740 default:
1741 /* If this operand can be promoted, then this opcode didn't
1742 match since we can't know if it needed promotion! */
1743 if (operand->flags & MN10300_OPERAND_PROMOTE)
1744 {
1745 input_line_pointer = hold;
1746 str = hold;
1747 goto error;
1748 }
1749
1750 /* We need to generate a fixup for this expression. */
1751 if (fc >= MAX_INSN_FIXUPS)
1752 as_fatal (_("too many fixups"));
1753 fixups[fc].exp = ex;
1754 fixups[fc].opindex = *opindex_ptr;
1755 fixups[fc].reloc = BFD_RELOC_UNUSED;
1756 if (mn10300_check_fixup (& fixups[fc]))
1757 goto error;
1758 ++fc;
1759 break;
1760 }
1761
1762 keep_going:
1763 str = input_line_pointer;
1764 input_line_pointer = hold;
1765
1766 while (*str == ' ' || *str == ',')
1767 ++str;
1768 }
1769
1770 /* Make sure we used all the operands! */
1771 if (*str != ',')
1772 match = 1;
1773
1774 /* If this instruction has registers that must not match, verify
1775 that they do indeed not match. */
1776 if (opcode->no_match_operands)
1777 {
1778 /* Look at each operand to see if it's marked. */
1779 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1780 {
1781 if ((1 << i) & opcode->no_match_operands)
1782 {
1783 int j;
1784
1785 /* operand I is marked. Check that it does not match any
1786 operands > I which are marked. */
1787 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1788 {
1789 if (((1 << j) & opcode->no_match_operands)
1790 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1791 {
1792 errmsg = _("Invalid register specification.");
1793 match = 0;
1794 goto error;
1795 }
1796 }
1797 }
1798 }
1799 }
1800
1801 error:
1802 if (match == 0)
1803 {
1804 next_opcode = opcode + 1;
1805 if (!strcmp (next_opcode->name, opcode->name))
1806 {
1807 opcode = next_opcode;
1808 continue;
1809 }
1810
1811 as_bad ("%s", errmsg);
1812 return;
1813 }
1814 break;
1815 }
1816
1817 while (ISSPACE (*str))
1818 ++str;
1819
1820 if (*str != '\0')
1821 as_bad (_("junk at end of line: `%s'"), str);
1822
1823 input_line_pointer = str;
1824
1825 /* Determine the size of the instruction. */
1826 if (opcode->format == FMT_S0)
1827 size = 1;
1828
1829 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1830 size = 2;
1831
1832 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1833 size = 3;
1834
1835 if (opcode->format == FMT_D6)
1836 size = 3;
1837
1838 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1839 size = 4;
1840
1841 if (opcode->format == FMT_D8)
1842 size = 6;
1843
1844 if (opcode->format == FMT_D9)
1845 size = 7;
1846
1847 if (opcode->format == FMT_S4)
1848 size = 5;
1849
1850 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1851 size = 7;
1852
1853 if (opcode->format == FMT_D2)
1854 size = 4;
1855
1856 if (opcode->format == FMT_D3)
1857 size = 5;
1858
1859 if (opcode->format == FMT_D4)
1860 size = 6;
1861
1862 if (relaxable && fc > 0)
1863 {
1864 /* On a 64-bit host the size of an 'int' is not the same
1865 as the size of a pointer, so we need a union to convert
1866 the opindex field of the fr_cgen structure into a char *
1867 so that it can be stored in the frag. We do not have
1868 to worry about losing accuracy as we are not going to
1869 be even close to the 32bit limit of the int. */
1870 union
1871 {
1872 int opindex;
1873 char * ptr;
1874 }
1875 opindex_converter;
1876 int type;
1877
1878 /* We want to anchor the line info to the previous frag (if
1879 there isn't one, create it), so that, when the insn is
1880 resized, we still get the right address for the beginning of
1881 the region. */
1882 f = frag_more (0);
1883 dwarf2_emit_insn (0);
1884
1885 /* bCC */
1886 if (size == 2)
1887 {
1888 /* Handle bra specially. Basically treat it like jmp so
1889 that we automatically handle 8, 16 and 32 bit offsets
1890 correctly as well as jumps to an undefined address.
1891
1892 It is also important to not treat it like other bCC
1893 instructions since the long forms of bra is different
1894 from other bCC instructions. */
1895 if (opcode->opcode == 0xca00)
1896 type = 10;
1897 else
1898 type = 0;
1899 }
1900 /* call */
1901 else if (size == 5)
1902 type = 6;
1903 /* calls */
1904 else if (size == 4)
1905 type = 8;
1906 /* jmp */
1907 else if (size == 3 && opcode->opcode == 0xcc0000)
1908 type = 10;
1909 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1910 type = 13;
1911 /* bCC (uncommon cases) */
1912 else
1913 type = 3;
1914
1915 opindex_converter.opindex = fixups[0].opindex;
1916 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1917 fixups[0].exp.X_add_symbol,
1918 fixups[0].exp.X_add_number,
1919 opindex_converter.ptr);
1920
1921 /* This is pretty hokey. We basically just care about the
1922 opcode, so we have to write out the first word big endian.
1923
1924 The exception is "call", which has two operands that we
1925 care about.
1926
1927 The first operand (the register list) happens to be in the
1928 first instruction word, and will be in the right place if
1929 we output the first word in big endian mode.
1930
1931 The second operand (stack size) is in the extension word,
1932 and we want it to appear as the first character in the extension
1933 word (as it appears in memory). Luckily, writing the extension
1934 word in big endian format will do what we want. */
1935 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1936 if (size > 8)
1937 {
1938 number_to_chars_bigendian (f + 4, extension, 4);
1939 number_to_chars_bigendian (f + 8, 0, size - 8);
1940 }
1941 else if (size > 4)
1942 number_to_chars_bigendian (f + 4, extension, size - 4);
1943 }
1944 else
1945 {
1946 /* Allocate space for the instruction. */
1947 f = frag_more (size);
1948
1949 /* Fill in bytes for the instruction. Note that opcode fields
1950 are written big-endian, 16 & 32bit immediates are written
1951 little endian. Egad. */
1952 if (opcode->format == FMT_S0
1953 || opcode->format == FMT_S1
1954 || opcode->format == FMT_D0
1955 || opcode->format == FMT_D6
1956 || opcode->format == FMT_D7
1957 || opcode->format == FMT_D10
1958 || opcode->format == FMT_D1)
1959 {
1960 number_to_chars_bigendian (f, insn, size);
1961 }
1962 else if (opcode->format == FMT_S2
1963 && opcode->opcode != 0xdf0000
1964 && opcode->opcode != 0xde0000)
1965 {
1966 /* A format S2 instruction that is _not_ "ret" and "retf". */
1967 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1968 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1969 }
1970 else if (opcode->format == FMT_S2)
1971 {
1972 /* This must be a ret or retf, which is written entirely in
1973 big-endian format. */
1974 number_to_chars_bigendian (f, insn, 3);
1975 }
1976 else if (opcode->format == FMT_S4
1977 && opcode->opcode != 0xdc000000)
1978 {
1979 /* This must be a format S4 "call" instruction. What a pain. */
1980 unsigned long temp = (insn >> 8) & 0xffff;
1981 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1982 number_to_chars_littleendian (f + 1, temp, 2);
1983 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1984 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1985 }
1986 else if (opcode->format == FMT_S4)
1987 {
1988 /* This must be a format S4 "jmp" instruction. */
1989 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1990 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1991 number_to_chars_littleendian (f + 1, temp, 4);
1992 }
1993 else if (opcode->format == FMT_S6)
1994 {
1995 unsigned long temp = ((insn & 0xffffff) << 8)
1996 | ((extension >> 16) & 0xff);
1997 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1998 number_to_chars_littleendian (f + 1, temp, 4);
1999 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2000 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2001 }
2002 else if (opcode->format == FMT_D2
2003 && opcode->opcode != 0xfaf80000
2004 && opcode->opcode != 0xfaf00000
2005 && opcode->opcode != 0xfaf40000)
2006 {
2007 /* A format D2 instruction where the 16bit immediate is
2008 really a single 16bit value, not two 8bit values. */
2009 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2010 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2011 }
2012 else if (opcode->format == FMT_D2)
2013 {
2014 /* A format D2 instruction where the 16bit immediate
2015 is really two 8bit immediates. */
2016 number_to_chars_bigendian (f, insn, 4);
2017 }
2018 else if (opcode->format == FMT_D3)
2019 {
2020 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2021 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2022 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2023 }
2024 else if (opcode->format == FMT_D4)
2025 {
2026 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2027
2028 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2029 number_to_chars_littleendian (f + 2, temp, 4);
2030 }
2031 else if (opcode->format == FMT_D5)
2032 {
2033 unsigned long temp = (((insn & 0xffff) << 16)
2034 | ((extension >> 8) & 0xffff));
2035
2036 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2037 number_to_chars_littleendian (f + 2, temp, 4);
2038 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2039 }
2040 else if (opcode->format == FMT_D8)
2041 {
2042 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2043
2044 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2045 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2046 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2047 }
2048 else if (opcode->format == FMT_D9)
2049 {
2050 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2051
2052 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2053 number_to_chars_littleendian (f + 3, temp, 4);
2054 }
2055
2056 /* Create any fixups. */
2057 for (i = 0; i < fc; i++)
2058 {
2059 const struct mn10300_operand *operand;
2060 int reloc_size;
2061
2062 operand = &mn10300_operands[fixups[i].opindex];
2063 if (fixups[i].reloc != BFD_RELOC_UNUSED
2064 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2065 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2066 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2067 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD
2068 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD
2069 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO
2070 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE
2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE
2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE
2073 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2074 {
2075 reloc_howto_type *reloc_howto;
2076 int offset;
2077
2078 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2079 fixups[i].reloc);
2080
2081 if (!reloc_howto)
2082 abort ();
2083
2084 reloc_size = bfd_get_reloc_size (reloc_howto);
2085
2086 if (reloc_size < 1 || reloc_size > 4)
2087 abort ();
2088
2089 offset = 4 - size;
2090 fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2091 reloc_size, &fixups[i].exp,
2092 reloc_howto->pc_relative,
2093 fixups[i].reloc);
2094 }
2095 else
2096 {
2097 int reloc, pcrel, offset;
2098 fixS *fixP;
2099
2100 reloc = BFD_RELOC_NONE;
2101 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2102 reloc = fixups[i].reloc;
2103 /* How big is the reloc? Remember SPLIT relocs are
2104 implicitly 32bits. */
2105 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2106 reloc_size = 32;
2107 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2108 reloc_size = 24;
2109 else
2110 reloc_size = operand->bits;
2111
2112 /* Is the reloc pc-relative? */
2113 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2114 if (reloc != BFD_RELOC_NONE)
2115 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2116
2117 offset = size - (reloc_size + operand->shift) / 8;
2118
2119 /* Choose a proper BFD relocation type. */
2120 if (reloc != BFD_RELOC_NONE)
2121 ;
2122 else if (pcrel)
2123 {
2124 if (reloc_size == 32)
2125 reloc = BFD_RELOC_32_PCREL;
2126 else if (reloc_size == 16)
2127 reloc = BFD_RELOC_16_PCREL;
2128 else if (reloc_size == 8)
2129 reloc = BFD_RELOC_8_PCREL;
2130 else
2131 abort ();
2132 }
2133 else
2134 {
2135 if (reloc_size == 32)
2136 reloc = BFD_RELOC_32;
2137 else if (reloc_size == 16)
2138 reloc = BFD_RELOC_16;
2139 else if (reloc_size == 8)
2140 reloc = BFD_RELOC_8;
2141 else
2142 abort ();
2143 }
2144
2145 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2146 reloc_size / 8, &fixups[i].exp, pcrel,
2147 ((bfd_reloc_code_real_type) reloc));
2148
2149 if (pcrel)
2150 fixP->fx_offset += offset;
2151 }
2152 }
2153
2154 dwarf2_emit_insn (size);
2155 }
2156
2157 /* Label this frag as one that contains instructions. */
2158 frag_now->tc_frag_data = true;
2159 }
2160
2161 /* If while processing a fixup, a reloc really needs to be created
2162 then it is done here. */
2163
2164 arelent **
tc_gen_reloc(asection * seg ATTRIBUTE_UNUSED,fixS * fixp)2165 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2166 {
2167 static arelent * no_relocs = NULL;
2168 static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2169 arelent *reloc;
2170
2171 reloc = XNEW (arelent);
2172
2173 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2174 if (reloc->howto == NULL)
2175 {
2176 as_bad_where (fixp->fx_file, fixp->fx_line,
2177 _("reloc %d not supported by object file format"),
2178 (int) fixp->fx_r_type);
2179 free (reloc);
2180 return & no_relocs;
2181 }
2182
2183 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2184 relocs[0] = reloc;
2185 relocs[1] = NULL;
2186
2187 if (fixp->fx_subsy
2188 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2189 {
2190 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2191 fixp->fx_subsy = NULL;
2192 }
2193
2194 if (fixp->fx_addsy && fixp->fx_subsy)
2195 {
2196 asection *asec, *ssec;
2197
2198 asec = S_GET_SEGMENT (fixp->fx_addsy);
2199 ssec = S_GET_SEGMENT (fixp->fx_subsy);
2200
2201 /* If we have a difference between two (non-absolute) symbols we must
2202 generate two relocs (one for each symbol) and allow the linker to
2203 resolve them - relaxation may change the distances between symbols,
2204 even local symbols defined in the same section. */
2205 if (ssec != absolute_section || asec != absolute_section)
2206 {
2207 arelent * reloc2 = XNEW (arelent);
2208
2209 relocs[0] = reloc2;
2210 relocs[1] = reloc;
2211
2212 reloc2->address = reloc->address;
2213 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2214 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2215 reloc2->sym_ptr_ptr = XNEW (asymbol *);
2216 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2217
2218 reloc->addend = fixp->fx_offset;
2219 if (asec == absolute_section)
2220 {
2221 reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2222 reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
2223 }
2224 else
2225 {
2226 reloc->sym_ptr_ptr = XNEW (asymbol *);
2227 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2228 }
2229
2230 fixp->fx_pcrel = 0;
2231 fixp->fx_done = 1;
2232 return relocs;
2233 }
2234 else
2235 {
2236 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2237
2238 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2239 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2240
2241 switch (fixp->fx_r_type)
2242 {
2243 case BFD_RELOC_8:
2244 md_number_to_chars (fixpos, reloc->addend, 1);
2245 break;
2246
2247 case BFD_RELOC_16:
2248 md_number_to_chars (fixpos, reloc->addend, 2);
2249 break;
2250
2251 case BFD_RELOC_24:
2252 md_number_to_chars (fixpos, reloc->addend, 3);
2253 break;
2254
2255 case BFD_RELOC_32:
2256 md_number_to_chars (fixpos, reloc->addend, 4);
2257 break;
2258
2259 default:
2260 reloc->sym_ptr_ptr
2261 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2262 return relocs;
2263 }
2264
2265 free (reloc);
2266 return & no_relocs;
2267 }
2268 }
2269 else
2270 {
2271 reloc->sym_ptr_ptr = XNEW (asymbol *);
2272 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2273 reloc->addend = fixp->fx_offset;
2274 }
2275 return relocs;
2276 }
2277
2278 /* Returns true iff the symbol attached to the frag is at a known location
2279 in the given section, (and hence the relocation to it can be relaxed by
2280 the assembler). */
2281 static inline bool
has_known_symbol_location(fragS * fragp,asection * sec)2282 has_known_symbol_location (fragS * fragp, asection * sec)
2283 {
2284 symbolS * sym = fragp->fr_symbol;
2285
2286 return sym != NULL
2287 && S_IS_DEFINED (sym)
2288 && ! S_IS_WEAK (sym)
2289 && S_GET_SEGMENT (sym) == sec;
2290 }
2291
2292 int
md_estimate_size_before_relax(fragS * fragp,asection * seg)2293 md_estimate_size_before_relax (fragS *fragp, asection *seg)
2294 {
2295 if (fragp->fr_subtype == 6
2296 && ! has_known_symbol_location (fragp, seg))
2297 fragp->fr_subtype = 7;
2298 else if (fragp->fr_subtype == 8
2299 && ! has_known_symbol_location (fragp, seg))
2300 fragp->fr_subtype = 9;
2301 else if (fragp->fr_subtype == 10
2302 && ! has_known_symbol_location (fragp, seg))
2303 fragp->fr_subtype = 12;
2304
2305 if (fragp->fr_subtype == 13)
2306 return 3;
2307
2308 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2309 abort ();
2310
2311 return md_relax_table[fragp->fr_subtype].rlx_length;
2312 }
2313
2314 long
md_pcrel_from(fixS * fixp)2315 md_pcrel_from (fixS *fixp)
2316 {
2317 if (fixp->fx_addsy != (symbolS *) NULL
2318 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
2319 /* The symbol is undefined or weak. Let the linker figure it out. */
2320 return 0;
2321
2322 return fixp->fx_frag->fr_address + fixp->fx_where;
2323 }
2324
2325 void
md_apply_fix(fixS * fixP,valueT * valP,segT seg)2326 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2327 {
2328 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2329 int size = 0;
2330 int value = (int) * valP;
2331
2332 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2333
2334 /* This should never happen. */
2335 if (seg->flags & SEC_ALLOC)
2336 abort ();
2337
2338 /* The value we are passed in *valuep includes the symbol values.
2339 If we are doing this relocation the code in write.c is going to
2340 call bfd_install_relocation, which is also going to use the symbol
2341 value. That means that if the reloc is fully resolved we want to
2342 use *valuep since bfd_install_relocation is not being used.
2343
2344 However, if the reloc is not fully resolved we do not want to use
2345 *valuep, and must use fx_offset instead. However, if the reloc
2346 is PC relative, we do want to use *valuep since it includes the
2347 result of md_pcrel_from. */
2348 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2349 value = fixP->fx_offset;
2350
2351 /* If the fix is relative to a symbol which is not defined, or not
2352 in the same segment as the fix, we cannot resolve it here. */
2353 if (fixP->fx_addsy != NULL
2354 && (! S_IS_DEFINED (fixP->fx_addsy)
2355 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2356 {
2357 fixP->fx_done = 0;
2358 return;
2359 }
2360
2361 switch (fixP->fx_r_type)
2362 {
2363 case BFD_RELOC_8:
2364 case BFD_RELOC_8_PCREL:
2365 size = 1;
2366 break;
2367
2368 case BFD_RELOC_16:
2369 case BFD_RELOC_16_PCREL:
2370 size = 2;
2371 break;
2372
2373 case BFD_RELOC_32:
2374 case BFD_RELOC_32_PCREL:
2375 size = 4;
2376 break;
2377
2378 case BFD_RELOC_VTABLE_INHERIT:
2379 case BFD_RELOC_VTABLE_ENTRY:
2380 fixP->fx_done = 0;
2381 return;
2382
2383 case BFD_RELOC_MN10300_ALIGN:
2384 fixP->fx_done = 1;
2385 return;
2386
2387 case BFD_RELOC_NONE:
2388 default:
2389 as_bad_where (fixP->fx_file, fixP->fx_line,
2390 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2391 }
2392
2393 md_number_to_chars (fixpos, value, size);
2394
2395 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2396 if (fixP->fx_addsy == NULL)
2397 fixP->fx_done = 1;
2398 }
2399
2400 /* Return zero if the fixup in fixp should be left alone and not
2401 adjusted. */
2402
2403 bool
mn10300_fix_adjustable(struct fix * fixp)2404 mn10300_fix_adjustable (struct fix *fixp)
2405 {
2406 if (fixp->fx_pcrel)
2407 {
2408 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2409 return false;
2410 }
2411 /* Non-relative relocs can (and must) be adjusted if they do
2412 not meet the criteria below, or the generic criteria. */
2413 else if (TC_FORCE_RELOCATION (fixp))
2414 return false;
2415
2416 /* Do not adjust relocations involving symbols in code sections,
2417 because it breaks linker relaxations. This could be fixed in the
2418 linker, but this fix is simpler, and it pretty much only affects
2419 object size a little bit. */
2420 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2421 return false;
2422
2423 /* Likewise, do not adjust symbols that won't be merged, or debug
2424 symbols, because they too break relaxation. We do want to adjust
2425 other mergeable symbols, like .rodata, because code relaxations
2426 need section-relative symbols to properly relax them. */
2427 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2428 return false;
2429
2430 if (startswith (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug"))
2431 return false;
2432
2433 return true;
2434 }
2435
2436 static void
set_arch_mach(int mach)2437 set_arch_mach (int mach)
2438 {
2439 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2440 as_warn (_("could not set architecture and machine"));
2441
2442 current_machine = mach;
2443 }
2444
2445 static inline char *
mn10300_end_of_match(char * cont,const char * what)2446 mn10300_end_of_match (char *cont, const char *what)
2447 {
2448 int len = strlen (what);
2449
2450 if (startswith (cont, what)
2451 && ! is_part_of_name (cont[len]))
2452 return cont + len;
2453
2454 return NULL;
2455 }
2456
2457 int
mn10300_parse_name(char const * name,expressionS * exprP,enum expr_mode mode,char * nextcharP)2458 mn10300_parse_name (char const *name,
2459 expressionS *exprP,
2460 enum expr_mode mode,
2461 char *nextcharP)
2462 {
2463 char *next = input_line_pointer;
2464 char *next_end;
2465 int reloc_type;
2466 segT segment;
2467
2468 exprP->X_op_symbol = NULL;
2469
2470 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2471 {
2472 if (! GOT_symbol)
2473 GOT_symbol = symbol_find_or_make (name);
2474
2475 exprP->X_add_symbol = GOT_symbol;
2476 no_suffix:
2477 /* If we have an absolute symbol or a reg,
2478 then we know its value now. */
2479 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2480 if (mode != expr_defer && segment == absolute_section)
2481 {
2482 exprP->X_op = O_constant;
2483 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2484 exprP->X_add_symbol = NULL;
2485 }
2486 else if (mode != expr_defer && segment == reg_section)
2487 {
2488 exprP->X_op = O_register;
2489 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2490 exprP->X_add_symbol = NULL;
2491 }
2492 else
2493 {
2494 exprP->X_op = O_symbol;
2495 exprP->X_add_number = 0;
2496 }
2497
2498 return 1;
2499 }
2500
2501 exprP->X_add_symbol = symbol_find_or_make (name);
2502
2503 if (*nextcharP != '@')
2504 goto no_suffix;
2505 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2506 reloc_type = BFD_RELOC_32_GOTOFF;
2507 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2508 reloc_type = BFD_RELOC_MN10300_GOT32;
2509 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2510 reloc_type = BFD_RELOC_32_PLT_PCREL;
2511 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd")))
2512 reloc_type = BFD_RELOC_MN10300_TLS_GD;
2513 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm")))
2514 reloc_type = BFD_RELOC_MN10300_TLS_LD;
2515 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff")))
2516 reloc_type = BFD_RELOC_MN10300_TLS_LDO;
2517 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff")))
2518 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE;
2519 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff")))
2520 reloc_type = BFD_RELOC_MN10300_TLS_IE;
2521 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff")))
2522 reloc_type = BFD_RELOC_MN10300_TLS_LE;
2523 else
2524 goto no_suffix;
2525
2526 *input_line_pointer = *nextcharP;
2527 input_line_pointer = next_end;
2528 *nextcharP = *input_line_pointer;
2529 *input_line_pointer = '\0';
2530
2531 exprP->X_op = O_PIC_reloc;
2532 exprP->X_add_number = 0;
2533 exprP->X_md = reloc_type;
2534
2535 return 1;
2536 }
2537
2538 /* The target specific pseudo-ops which we support. */
2539 const pseudo_typeS md_pseudo_table[] =
2540 {
2541 { "am30", set_arch_mach, AM30 },
2542 { "am33", set_arch_mach, AM33 },
2543 { "am33_2", set_arch_mach, AM33_2 },
2544 { "mn10300", set_arch_mach, MN103 },
2545 {NULL, 0, 0}
2546 };
2547
2548 /* Returns FALSE if there is some mn10300 specific reason why the
2549 subtraction of two same-section symbols cannot be computed by
2550 the assembler. */
2551
2552 bool
mn10300_allow_local_subtract(expressionS * left,expressionS * right,segT section)2553 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2554 {
2555 bool result;
2556 fragS * left_frag;
2557 fragS * right_frag;
2558 fragS * frag;
2559
2560 /* If we are not performing linker relaxation then we have nothing
2561 to worry about. */
2562 if (linkrelax == 0)
2563 return true;
2564
2565 /* If the symbols are not in a code section then they are OK. */
2566 if ((section->flags & SEC_CODE) == 0)
2567 return true;
2568
2569 /* Otherwise we have to scan the fragments between the two symbols.
2570 If any instructions are found then we have to assume that linker
2571 relaxation may change their size and so we must delay resolving
2572 the subtraction until the final link. */
2573 left_frag = symbol_get_frag (left->X_add_symbol);
2574 right_frag = symbol_get_frag (right->X_add_symbol);
2575
2576 if (left_frag == right_frag)
2577 return ! left_frag->tc_frag_data;
2578
2579 result = true;
2580 for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2581 {
2582 if (frag->tc_frag_data)
2583 result = false;
2584 if (frag == right_frag)
2585 break;
2586 }
2587
2588 if (frag == NULL)
2589 for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2590 {
2591 if (frag->tc_frag_data)
2592 result = false;
2593 if (frag == left_frag)
2594 break;
2595 }
2596
2597 if (frag == NULL)
2598 /* The two symbols are on disjoint fragment chains
2599 - we cannot possibly compute their difference. */
2600 return false;
2601
2602 return result;
2603 }
2604
2605 /* When relaxing, we need to output a reloc for any .align directive
2606 that requests alignment to a two byte boundary or larger. */
2607
2608 void
mn10300_handle_align(fragS * frag)2609 mn10300_handle_align (fragS *frag)
2610 {
2611 if (linkrelax
2612 && (frag->fr_type == rs_align
2613 || frag->fr_type == rs_align_code)
2614 && frag->fr_address + frag->fr_fix > 0
2615 && frag->fr_offset > 1
2616 && now_seg != bss_section
2617 /* Do not create relocs for the merging sections - such
2618 relocs will prevent the contents from being merged. */
2619 && (bfd_section_flags (now_seg) & SEC_MERGE) == 0)
2620 /* Create a new fixup to record the alignment request. The symbol is
2621 irrelevant but must be present so we use the absolute section symbol.
2622 The offset from the symbol is used to record the power-of-two alignment
2623 value. The size is set to 0 because the frag may already be aligned,
2624 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2625 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, false,
2626 BFD_RELOC_MN10300_ALIGN);
2627 }
2628
2629 bool
mn10300_force_relocation(struct fix * fixp)2630 mn10300_force_relocation (struct fix * fixp)
2631 {
2632 if (linkrelax
2633 && (fixp->fx_pcrel
2634 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN))
2635 return true;
2636
2637 return generic_force_reloc (fixp);
2638 }
2639