1 #as: 2 #objdump: -dw -Mintel 3 #name: x86_64 AVX512VNNI insns (Intel disassembly) 4 #source: x86-64-avx512vnni.s 5 6 .*: +file format .* 7 8 9 Disassembly of section \.text: 10 11 0+ <_start>: 12 [ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 d1[ ]*vpdpwssd zmm18,zmm18,zmm17 13 [ ]*[a-f0-9]+:[ ]*62 a2 6d 45 52 d1[ ]*vpdpwssd zmm18\{k5\},zmm18,zmm17 14 [ ]*[a-f0-9]+:[ ]*62 a2 6d c5 52 d1[ ]*vpdpwssd zmm18\{k5\}\{z\},zmm18,zmm17 15 [ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 94 f0 23 01 00 00[ ]*vpdpwssd zmm18,zmm18,ZMMWORD PTR \[rax\+r14\*8\+0x123\] 16 [ ]*[a-f0-9]+:[ ]*62 e2 6d 40 52 52 7f[ ]*vpdpwssd zmm18,zmm18,ZMMWORD PTR \[rdx\+0x1fc0\] 17 [ ]*[a-f0-9]+:[ ]*62 e2 6d 50 52 52 7f[ ]*vpdpwssd zmm18,zmm18,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 18 [ ]*[a-f0-9]+:[ ]*62 a2 55 40 53 e9[ ]*vpdpwssds zmm21,zmm21,zmm17 19 [ ]*[a-f0-9]+:[ ]*62 a2 55 44 53 e9[ ]*vpdpwssds zmm21\{k4\},zmm21,zmm17 20 [ ]*[a-f0-9]+:[ ]*62 a2 55 c4 53 e9[ ]*vpdpwssds zmm21\{k4\}\{z\},zmm21,zmm17 21 [ ]*[a-f0-9]+:[ ]*62 a2 55 40 53 ac f0 23 01 00 00[ ]*vpdpwssds zmm21,zmm21,ZMMWORD PTR \[rax\+r14\*8\+0x123\] 22 [ ]*[a-f0-9]+:[ ]*62 e2 55 40 53 6a 7f[ ]*vpdpwssds zmm21,zmm21,ZMMWORD PTR \[rdx\+0x1fc0\] 23 [ ]*[a-f0-9]+:[ ]*62 e2 55 50 53 6a 7f[ ]*vpdpwssds zmm21,zmm21,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 24 [ ]*[a-f0-9]+:[ ]*62 a2 55 40 50 fa[ ]*vpdpbusd zmm23,zmm21,zmm18 25 [ ]*[a-f0-9]+:[ ]*62 a2 55 44 50 fa[ ]*vpdpbusd zmm23\{k4\},zmm21,zmm18 26 [ ]*[a-f0-9]+:[ ]*62 a2 55 c4 50 fa[ ]*vpdpbusd zmm23\{k4\}\{z\},zmm21,zmm18 27 [ ]*[a-f0-9]+:[ ]*62 a2 55 40 50 bc f0 23 01 00 00[ ]*vpdpbusd zmm23,zmm21,ZMMWORD PTR \[rax\+r14\*8\+0x123\] 28 [ ]*[a-f0-9]+:[ ]*62 e2 55 40 50 7a 7f[ ]*vpdpbusd zmm23,zmm21,ZMMWORD PTR \[rdx\+0x1fc0\] 29 [ ]*[a-f0-9]+:[ ]*62 e2 55 50 50 7a 7f[ ]*vpdpbusd zmm23,zmm21,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 30 [ ]*[a-f0-9]+:[ ]*62 02 3d 40 51 c1[ ]*vpdpbusds zmm24,zmm24,zmm25 31 [ ]*[a-f0-9]+:[ ]*62 02 3d 47 51 c1[ ]*vpdpbusds zmm24\{k7\},zmm24,zmm25 32 [ ]*[a-f0-9]+:[ ]*62 02 3d c7 51 c1[ ]*vpdpbusds zmm24\{k7\}\{z\},zmm24,zmm25 33 [ ]*[a-f0-9]+:[ ]*62 22 3d 40 51 84 f0 23 01 00 00[ ]*vpdpbusds zmm24,zmm24,ZMMWORD PTR \[rax\+r14\*8\+0x123\] 34 [ ]*[a-f0-9]+:[ ]*62 62 3d 40 51 42 7f[ ]*vpdpbusds zmm24,zmm24,ZMMWORD PTR \[rdx\+0x1fc0\] 35 [ ]*[a-f0-9]+:[ ]*62 62 3d 50 51 42 7f[ ]*vpdpbusds zmm24,zmm24,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 36 [ ]*[a-f0-9]+:[ ]*62 22 25 40 52 e1[ ]*vpdpwssd zmm28,zmm27,zmm17 37 [ ]*[a-f0-9]+:[ ]*62 22 25 47 52 e1[ ]*vpdpwssd zmm28\{k7\},zmm27,zmm17 38 [ ]*[a-f0-9]+:[ ]*62 22 25 c7 52 e1[ ]*vpdpwssd zmm28\{k7\}\{z\},zmm27,zmm17 39 [ ]*[a-f0-9]+:[ ]*62 22 25 40 52 a4 f0 34 12 00 00[ ]*vpdpwssd zmm28,zmm27,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] 40 [ ]*[a-f0-9]+:[ ]*62 62 25 40 52 62 7f[ ]*vpdpwssd zmm28,zmm27,ZMMWORD PTR \[rdx\+0x1fc0\] 41 [ ]*[a-f0-9]+:[ ]*62 62 25 50 52 62 7f[ ]*vpdpwssd zmm28,zmm27,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 42 [ ]*[a-f0-9]+:[ ]*62 22 1d 40 53 e9[ ]*vpdpwssds zmm29,zmm28,zmm17 43 [ ]*[a-f0-9]+:[ ]*62 22 1d 43 53 e9[ ]*vpdpwssds zmm29\{k3\},zmm28,zmm17 44 [ ]*[a-f0-9]+:[ ]*62 22 1d c3 53 e9[ ]*vpdpwssds zmm29\{k3\}\{z\},zmm28,zmm17 45 [ ]*[a-f0-9]+:[ ]*62 22 1d 40 53 ac f0 34 12 00 00[ ]*vpdpwssds zmm29,zmm28,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] 46 [ ]*[a-f0-9]+:[ ]*62 62 1d 40 53 6a 7f[ ]*vpdpwssds zmm29,zmm28,ZMMWORD PTR \[rdx\+0x1fc0\] 47 [ ]*[a-f0-9]+:[ ]*62 62 1d 50 53 6a 7f[ ]*vpdpwssds zmm29,zmm28,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 48 [ ]*[a-f0-9]+:[ ]*62 22 3d 40 50 e5[ ]*vpdpbusd zmm28,zmm24,zmm21 49 [ ]*[a-f0-9]+:[ ]*62 22 3d 46 50 e5[ ]*vpdpbusd zmm28\{k6\},zmm24,zmm21 50 [ ]*[a-f0-9]+:[ ]*62 22 3d c6 50 e5[ ]*vpdpbusd zmm28\{k6\}\{z\},zmm24,zmm21 51 [ ]*[a-f0-9]+:[ ]*62 22 3d 40 50 a4 f0 34 12 00 00[ ]*vpdpbusd zmm28,zmm24,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] 52 [ ]*[a-f0-9]+:[ ]*62 62 3d 40 50 62 7f[ ]*vpdpbusd zmm28,zmm24,ZMMWORD PTR \[rdx\+0x1fc0\] 53 [ ]*[a-f0-9]+:[ ]*62 62 3d 50 50 62 7f[ ]*vpdpbusd zmm28,zmm24,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 54 [ ]*[a-f0-9]+:[ ]*62 a2 75 40 51 e4[ ]*vpdpbusds zmm20,zmm17,zmm20 55 [ ]*[a-f0-9]+:[ ]*62 a2 75 42 51 e4[ ]*vpdpbusds zmm20\{k2\},zmm17,zmm20 56 [ ]*[a-f0-9]+:[ ]*62 a2 75 c2 51 e4[ ]*vpdpbusds zmm20\{k2\}\{z\},zmm17,zmm20 57 [ ]*[a-f0-9]+:[ ]*62 a2 75 40 51 a4 f0 34 12 00 00[ ]*vpdpbusds zmm20,zmm17,ZMMWORD PTR \[rax\+r14\*8\+0x1234\] 58 [ ]*[a-f0-9]+:[ ]*62 e2 75 40 51 62 7f[ ]*vpdpbusds zmm20,zmm17,ZMMWORD PTR \[rdx\+0x1fc0\] 59 [ ]*[a-f0-9]+:[ ]*62 e2 75 50 51 62 7f[ ]*vpdpbusds zmm20,zmm17,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 60 #pass 61