1 2import GHC.Cmm.Expr 3#if !(defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \ 4 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc)) 5import GHC.Utils.Panic.Plain 6#endif 7import GHC.Platform.Reg 8 9#include "stg/MachRegs.h" 10 11#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) 12 13# if defined(MACHREGS_i386) 14# define eax 0 15# define ebx 1 16# define ecx 2 17# define edx 3 18# define esi 4 19# define edi 5 20# define ebp 6 21# define esp 7 22# endif 23 24# if defined(MACHREGS_x86_64) 25# define rax 0 26# define rbx 1 27# define rcx 2 28# define rdx 3 29# define rsi 4 30# define rdi 5 31# define rbp 6 32# define rsp 7 33# define r8 8 34# define r9 9 35# define r10 10 36# define r11 11 37# define r12 12 38# define r13 13 39# define r14 14 40# define r15 15 41# endif 42 43 44-- N.B. XMM, YMM, and ZMM are all aliased to the same hardware registers hence 45-- being assigned the same RegNos. 46# define xmm0 16 47# define xmm1 17 48# define xmm2 18 49# define xmm3 19 50# define xmm4 20 51# define xmm5 21 52# define xmm6 22 53# define xmm7 23 54# define xmm8 24 55# define xmm9 25 56# define xmm10 26 57# define xmm11 27 58# define xmm12 28 59# define xmm13 29 60# define xmm14 30 61# define xmm15 31 62 63# define ymm0 16 64# define ymm1 17 65# define ymm2 18 66# define ymm3 19 67# define ymm4 20 68# define ymm5 21 69# define ymm6 22 70# define ymm7 23 71# define ymm8 24 72# define ymm9 25 73# define ymm10 26 74# define ymm11 27 75# define ymm12 28 76# define ymm13 29 77# define ymm14 30 78# define ymm15 31 79 80# define zmm0 16 81# define zmm1 17 82# define zmm2 18 83# define zmm3 19 84# define zmm4 20 85# define zmm5 21 86# define zmm6 22 87# define zmm7 23 88# define zmm8 24 89# define zmm9 25 90# define zmm10 26 91# define zmm11 27 92# define zmm12 28 93# define zmm13 29 94# define zmm14 30 95# define zmm15 31 96 97-- Note: these are only needed for ARM/AArch64 because globalRegMaybe is now used in CmmSink.hs. 98-- Since it's only used to check 'isJust', the actual values don't matter, thus 99-- I'm not sure if these are the correct numberings. 100-- Normally, the register names are just stringified as part of the REG() macro 101 102#elif defined(MACHREGS_powerpc) || defined(MACHREGS_arm) \ 103 || defined(MACHREGS_aarch64) 104 105# define r0 0 106# define r1 1 107# define r2 2 108# define r3 3 109# define r4 4 110# define r5 5 111# define r6 6 112# define r7 7 113# define r8 8 114# define r9 9 115# define r10 10 116# define r11 11 117# define r12 12 118# define r13 13 119# define r14 14 120# define r15 15 121# define r16 16 122# define r17 17 123# define r18 18 124# define r19 19 125# define r20 20 126# define r21 21 127# define r22 22 128# define r23 23 129# define r24 24 130# define r25 25 131# define r26 26 132# define r27 27 133# define r28 28 134# define r29 29 135# define r30 30 136# define r31 31 137 138-- See note above. These aren't actually used for anything except satisfying the compiler for globalRegMaybe 139-- so I'm unsure if they're the correct numberings, should they ever be attempted to be used in the NCG. 140#if defined(MACHREGS_aarch64) || defined(MACHREGS_arm) 141# define s0 32 142# define s1 33 143# define s2 34 144# define s3 35 145# define s4 36 146# define s5 37 147# define s6 38 148# define s7 39 149# define s8 40 150# define s9 41 151# define s10 42 152# define s11 43 153# define s12 44 154# define s13 45 155# define s14 46 156# define s15 47 157# define s16 48 158# define s17 49 159# define s18 50 160# define s19 51 161# define s20 52 162# define s21 53 163# define s22 54 164# define s23 55 165# define s24 56 166# define s25 57 167# define s26 58 168# define s27 59 169# define s28 60 170# define s29 61 171# define s30 62 172# define s31 63 173 174# define d0 32 175# define d1 33 176# define d2 34 177# define d3 35 178# define d4 36 179# define d5 37 180# define d6 38 181# define d7 39 182# define d8 40 183# define d9 41 184# define d10 42 185# define d11 43 186# define d12 44 187# define d13 45 188# define d14 46 189# define d15 47 190# define d16 48 191# define d17 49 192# define d18 50 193# define d19 51 194# define d20 52 195# define d21 53 196# define d22 54 197# define d23 55 198# define d24 56 199# define d25 57 200# define d26 58 201# define d27 59 202# define d28 60 203# define d29 61 204# define d30 62 205# define d31 63 206#endif 207 208# if defined(MACHREGS_darwin) 209# define f0 32 210# define f1 33 211# define f2 34 212# define f3 35 213# define f4 36 214# define f5 37 215# define f6 38 216# define f7 39 217# define f8 40 218# define f9 41 219# define f10 42 220# define f11 43 221# define f12 44 222# define f13 45 223# define f14 46 224# define f15 47 225# define f16 48 226# define f17 49 227# define f18 50 228# define f19 51 229# define f20 52 230# define f21 53 231# define f22 54 232# define f23 55 233# define f24 56 234# define f25 57 235# define f26 58 236# define f27 59 237# define f28 60 238# define f29 61 239# define f30 62 240# define f31 63 241# else 242# define fr0 32 243# define fr1 33 244# define fr2 34 245# define fr3 35 246# define fr4 36 247# define fr5 37 248# define fr6 38 249# define fr7 39 250# define fr8 40 251# define fr9 41 252# define fr10 42 253# define fr11 43 254# define fr12 44 255# define fr13 45 256# define fr14 46 257# define fr15 47 258# define fr16 48 259# define fr17 49 260# define fr18 50 261# define fr19 51 262# define fr20 52 263# define fr21 53 264# define fr22 54 265# define fr23 55 266# define fr24 56 267# define fr25 57 268# define fr26 58 269# define fr27 59 270# define fr28 60 271# define fr29 61 272# define fr30 62 273# define fr31 63 274# endif 275 276#elif defined(MACHREGS_sparc) 277 278# define g0 0 279# define g1 1 280# define g2 2 281# define g3 3 282# define g4 4 283# define g5 5 284# define g6 6 285# define g7 7 286 287# define o0 8 288# define o1 9 289# define o2 10 290# define o3 11 291# define o4 12 292# define o5 13 293# define o6 14 294# define o7 15 295 296# define l0 16 297# define l1 17 298# define l2 18 299# define l3 19 300# define l4 20 301# define l5 21 302# define l6 22 303# define l7 23 304 305# define i0 24 306# define i1 25 307# define i2 26 308# define i3 27 309# define i4 28 310# define i5 29 311# define i6 30 312# define i7 31 313 314# define f0 32 315# define f1 33 316# define f2 34 317# define f3 35 318# define f4 36 319# define f5 37 320# define f6 38 321# define f7 39 322# define f8 40 323# define f9 41 324# define f10 42 325# define f11 43 326# define f12 44 327# define f13 45 328# define f14 46 329# define f15 47 330# define f16 48 331# define f17 49 332# define f18 50 333# define f19 51 334# define f20 52 335# define f21 53 336# define f22 54 337# define f23 55 338# define f24 56 339# define f25 57 340# define f26 58 341# define f27 59 342# define f28 60 343# define f29 61 344# define f30 62 345# define f31 63 346 347#elif defined(MACHREGS_s390x) 348 349# define r0 0 350# define r1 1 351# define r2 2 352# define r3 3 353# define r4 4 354# define r5 5 355# define r6 6 356# define r7 7 357# define r8 8 358# define r9 9 359# define r10 10 360# define r11 11 361# define r12 12 362# define r13 13 363# define r14 14 364# define r15 15 365 366# define f0 16 367# define f1 17 368# define f2 18 369# define f3 19 370# define f4 20 371# define f5 21 372# define f6 22 373# define f7 23 374# define f8 24 375# define f9 25 376# define f10 26 377# define f11 27 378# define f12 28 379# define f13 29 380# define f14 30 381# define f15 31 382 383#endif 384 385callerSaves :: GlobalReg -> Bool 386#if defined(CALLER_SAVES_Base) 387callerSaves BaseReg = True 388#endif 389#if defined(CALLER_SAVES_R1) 390callerSaves (VanillaReg 1 _) = True 391#endif 392#if defined(CALLER_SAVES_R2) 393callerSaves (VanillaReg 2 _) = True 394#endif 395#if defined(CALLER_SAVES_R3) 396callerSaves (VanillaReg 3 _) = True 397#endif 398#if defined(CALLER_SAVES_R4) 399callerSaves (VanillaReg 4 _) = True 400#endif 401#if defined(CALLER_SAVES_R5) 402callerSaves (VanillaReg 5 _) = True 403#endif 404#if defined(CALLER_SAVES_R6) 405callerSaves (VanillaReg 6 _) = True 406#endif 407#if defined(CALLER_SAVES_R7) 408callerSaves (VanillaReg 7 _) = True 409#endif 410#if defined(CALLER_SAVES_R8) 411callerSaves (VanillaReg 8 _) = True 412#endif 413#if defined(CALLER_SAVES_R9) 414callerSaves (VanillaReg 9 _) = True 415#endif 416#if defined(CALLER_SAVES_R10) 417callerSaves (VanillaReg 10 _) = True 418#endif 419#if defined(CALLER_SAVES_F1) 420callerSaves (FloatReg 1) = True 421#endif 422#if defined(CALLER_SAVES_F2) 423callerSaves (FloatReg 2) = True 424#endif 425#if defined(CALLER_SAVES_F3) 426callerSaves (FloatReg 3) = True 427#endif 428#if defined(CALLER_SAVES_F4) 429callerSaves (FloatReg 4) = True 430#endif 431#if defined(CALLER_SAVES_F5) 432callerSaves (FloatReg 5) = True 433#endif 434#if defined(CALLER_SAVES_F6) 435callerSaves (FloatReg 6) = True 436#endif 437#if defined(CALLER_SAVES_D1) 438callerSaves (DoubleReg 1) = True 439#endif 440#if defined(CALLER_SAVES_D2) 441callerSaves (DoubleReg 2) = True 442#endif 443#if defined(CALLER_SAVES_D3) 444callerSaves (DoubleReg 3) = True 445#endif 446#if defined(CALLER_SAVES_D4) 447callerSaves (DoubleReg 4) = True 448#endif 449#if defined(CALLER_SAVES_D5) 450callerSaves (DoubleReg 5) = True 451#endif 452#if defined(CALLER_SAVES_D6) 453callerSaves (DoubleReg 6) = True 454#endif 455#if defined(CALLER_SAVES_L1) 456callerSaves (LongReg 1) = True 457#endif 458#if defined(CALLER_SAVES_Sp) 459callerSaves Sp = True 460#endif 461#if defined(CALLER_SAVES_SpLim) 462callerSaves SpLim = True 463#endif 464#if defined(CALLER_SAVES_Hp) 465callerSaves Hp = True 466#endif 467#if defined(CALLER_SAVES_HpLim) 468callerSaves HpLim = True 469#endif 470#if defined(CALLER_SAVES_CCCS) 471callerSaves CCCS = True 472#endif 473#if defined(CALLER_SAVES_CurrentTSO) 474callerSaves CurrentTSO = True 475#endif 476#if defined(CALLER_SAVES_CurrentNursery) 477callerSaves CurrentNursery = True 478#endif 479callerSaves _ = False 480 481activeStgRegs :: [GlobalReg] 482activeStgRegs = [ 483#if defined(REG_Base) 484 BaseReg 485#endif 486#if defined(REG_Sp) 487 ,Sp 488#endif 489#if defined(REG_Hp) 490 ,Hp 491#endif 492#if defined(REG_R1) 493 ,VanillaReg 1 VGcPtr 494#endif 495#if defined(REG_R2) 496 ,VanillaReg 2 VGcPtr 497#endif 498#if defined(REG_R3) 499 ,VanillaReg 3 VGcPtr 500#endif 501#if defined(REG_R4) 502 ,VanillaReg 4 VGcPtr 503#endif 504#if defined(REG_R5) 505 ,VanillaReg 5 VGcPtr 506#endif 507#if defined(REG_R6) 508 ,VanillaReg 6 VGcPtr 509#endif 510#if defined(REG_R7) 511 ,VanillaReg 7 VGcPtr 512#endif 513#if defined(REG_R8) 514 ,VanillaReg 8 VGcPtr 515#endif 516#if defined(REG_R9) 517 ,VanillaReg 9 VGcPtr 518#endif 519#if defined(REG_R10) 520 ,VanillaReg 10 VGcPtr 521#endif 522#if defined(REG_SpLim) 523 ,SpLim 524#endif 525#if MAX_REAL_XMM_REG != 0 526#if defined(REG_F1) 527 ,FloatReg 1 528#endif 529#if defined(REG_D1) 530 ,DoubleReg 1 531#endif 532#if defined(REG_XMM1) 533 ,XmmReg 1 534#endif 535#if defined(REG_YMM1) 536 ,YmmReg 1 537#endif 538#if defined(REG_ZMM1) 539 ,ZmmReg 1 540#endif 541#if defined(REG_F2) 542 ,FloatReg 2 543#endif 544#if defined(REG_D2) 545 ,DoubleReg 2 546#endif 547#if defined(REG_XMM2) 548 ,XmmReg 2 549#endif 550#if defined(REG_YMM2) 551 ,YmmReg 2 552#endif 553#if defined(REG_ZMM2) 554 ,ZmmReg 2 555#endif 556#if defined(REG_F3) 557 ,FloatReg 3 558#endif 559#if defined(REG_D3) 560 ,DoubleReg 3 561#endif 562#if defined(REG_XMM3) 563 ,XmmReg 3 564#endif 565#if defined(REG_YMM3) 566 ,YmmReg 3 567#endif 568#if defined(REG_ZMM3) 569 ,ZmmReg 3 570#endif 571#if defined(REG_F4) 572 ,FloatReg 4 573#endif 574#if defined(REG_D4) 575 ,DoubleReg 4 576#endif 577#if defined(REG_XMM4) 578 ,XmmReg 4 579#endif 580#if defined(REG_YMM4) 581 ,YmmReg 4 582#endif 583#if defined(REG_ZMM4) 584 ,ZmmReg 4 585#endif 586#if defined(REG_F5) 587 ,FloatReg 5 588#endif 589#if defined(REG_D5) 590 ,DoubleReg 5 591#endif 592#if defined(REG_XMM5) 593 ,XmmReg 5 594#endif 595#if defined(REG_YMM5) 596 ,YmmReg 5 597#endif 598#if defined(REG_ZMM5) 599 ,ZmmReg 5 600#endif 601#if defined(REG_F6) 602 ,FloatReg 6 603#endif 604#if defined(REG_D6) 605 ,DoubleReg 6 606#endif 607#if defined(REG_XMM6) 608 ,XmmReg 6 609#endif 610#if defined(REG_YMM6) 611 ,YmmReg 6 612#endif 613#if defined(REG_ZMM6) 614 ,ZmmReg 6 615#endif 616#else /* MAX_REAL_XMM_REG == 0 */ 617#if defined(REG_F1) 618 ,FloatReg 1 619#endif 620#if defined(REG_F2) 621 ,FloatReg 2 622#endif 623#if defined(REG_F3) 624 ,FloatReg 3 625#endif 626#if defined(REG_F4) 627 ,FloatReg 4 628#endif 629#if defined(REG_F5) 630 ,FloatReg 5 631#endif 632#if defined(REG_F6) 633 ,FloatReg 6 634#endif 635#if defined(REG_D1) 636 ,DoubleReg 1 637#endif 638#if defined(REG_D2) 639 ,DoubleReg 2 640#endif 641#if defined(REG_D3) 642 ,DoubleReg 3 643#endif 644#if defined(REG_D4) 645 ,DoubleReg 4 646#endif 647#if defined(REG_D5) 648 ,DoubleReg 5 649#endif 650#if defined(REG_D6) 651 ,DoubleReg 6 652#endif 653#endif /* MAX_REAL_XMM_REG == 0 */ 654 ] 655 656haveRegBase :: Bool 657#if defined(REG_Base) 658haveRegBase = True 659#else 660haveRegBase = False 661#endif 662 663-- | Returns 'Nothing' if this global register is not stored 664-- in a real machine register, otherwise returns @'Just' reg@, where 665-- reg is the machine register it is stored in. 666globalRegMaybe :: GlobalReg -> Maybe RealReg 667#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) \ 668 || defined(MACHREGS_sparc) || defined(MACHREGS_powerpc) \ 669 || defined(MACHREGS_arm) || defined(MACHREGS_aarch64) \ 670 || defined(MACHREGS_s390x) 671# if defined(REG_Base) 672globalRegMaybe BaseReg = Just (RealRegSingle REG_Base) 673# endif 674# if defined(REG_R1) 675globalRegMaybe (VanillaReg 1 _) = Just (RealRegSingle REG_R1) 676# endif 677# if defined(REG_R2) 678globalRegMaybe (VanillaReg 2 _) = Just (RealRegSingle REG_R2) 679# endif 680# if defined(REG_R3) 681globalRegMaybe (VanillaReg 3 _) = Just (RealRegSingle REG_R3) 682# endif 683# if defined(REG_R4) 684globalRegMaybe (VanillaReg 4 _) = Just (RealRegSingle REG_R4) 685# endif 686# if defined(REG_R5) 687globalRegMaybe (VanillaReg 5 _) = Just (RealRegSingle REG_R5) 688# endif 689# if defined(REG_R6) 690globalRegMaybe (VanillaReg 6 _) = Just (RealRegSingle REG_R6) 691# endif 692# if defined(REG_R7) 693globalRegMaybe (VanillaReg 7 _) = Just (RealRegSingle REG_R7) 694# endif 695# if defined(REG_R8) 696globalRegMaybe (VanillaReg 8 _) = Just (RealRegSingle REG_R8) 697# endif 698# if defined(REG_R9) 699globalRegMaybe (VanillaReg 9 _) = Just (RealRegSingle REG_R9) 700# endif 701# if defined(REG_R10) 702globalRegMaybe (VanillaReg 10 _) = Just (RealRegSingle REG_R10) 703# endif 704# if defined(REG_F1) 705globalRegMaybe (FloatReg 1) = Just (RealRegSingle REG_F1) 706# endif 707# if defined(REG_F2) 708globalRegMaybe (FloatReg 2) = Just (RealRegSingle REG_F2) 709# endif 710# if defined(REG_F3) 711globalRegMaybe (FloatReg 3) = Just (RealRegSingle REG_F3) 712# endif 713# if defined(REG_F4) 714globalRegMaybe (FloatReg 4) = Just (RealRegSingle REG_F4) 715# endif 716# if defined(REG_F5) 717globalRegMaybe (FloatReg 5) = Just (RealRegSingle REG_F5) 718# endif 719# if defined(REG_F6) 720globalRegMaybe (FloatReg 6) = Just (RealRegSingle REG_F6) 721# endif 722# if defined(REG_D1) 723globalRegMaybe (DoubleReg 1) = 724# if defined(MACHREGS_sparc) 725 Just (RealRegPair REG_D1 (REG_D1 + 1)) 726# else 727 Just (RealRegSingle REG_D1) 728# endif 729# endif 730# if defined(REG_D2) 731globalRegMaybe (DoubleReg 2) = 732# if defined(MACHREGS_sparc) 733 Just (RealRegPair REG_D2 (REG_D2 + 1)) 734# else 735 Just (RealRegSingle REG_D2) 736# endif 737# endif 738# if defined(REG_D3) 739globalRegMaybe (DoubleReg 3) = 740# if defined(MACHREGS_sparc) 741 Just (RealRegPair REG_D3 (REG_D3 + 1)) 742# else 743 Just (RealRegSingle REG_D3) 744# endif 745# endif 746# if defined(REG_D4) 747globalRegMaybe (DoubleReg 4) = 748# if defined(MACHREGS_sparc) 749 Just (RealRegPair REG_D4 (REG_D4 + 1)) 750# else 751 Just (RealRegSingle REG_D4) 752# endif 753# endif 754# if defined(REG_D5) 755globalRegMaybe (DoubleReg 5) = 756# if defined(MACHREGS_sparc) 757 Just (RealRegPair REG_D5 (REG_D5 + 1)) 758# else 759 Just (RealRegSingle REG_D5) 760# endif 761# endif 762# if defined(REG_D6) 763globalRegMaybe (DoubleReg 6) = 764# if defined(MACHREGS_sparc) 765 Just (RealRegPair REG_D6 (REG_D6 + 1)) 766# else 767 Just (RealRegSingle REG_D6) 768# endif 769# endif 770# if MAX_REAL_XMM_REG != 0 771# if defined(REG_XMM1) 772globalRegMaybe (XmmReg 1) = Just (RealRegSingle REG_XMM1) 773# endif 774# if defined(REG_XMM2) 775globalRegMaybe (XmmReg 2) = Just (RealRegSingle REG_XMM2) 776# endif 777# if defined(REG_XMM3) 778globalRegMaybe (XmmReg 3) = Just (RealRegSingle REG_XMM3) 779# endif 780# if defined(REG_XMM4) 781globalRegMaybe (XmmReg 4) = Just (RealRegSingle REG_XMM4) 782# endif 783# if defined(REG_XMM5) 784globalRegMaybe (XmmReg 5) = Just (RealRegSingle REG_XMM5) 785# endif 786# if defined(REG_XMM6) 787globalRegMaybe (XmmReg 6) = Just (RealRegSingle REG_XMM6) 788# endif 789# endif 790# if defined(MAX_REAL_YMM_REG) && MAX_REAL_YMM_REG != 0 791# if defined(REG_YMM1) 792globalRegMaybe (YmmReg 1) = Just (RealRegSingle REG_YMM1) 793# endif 794# if defined(REG_YMM2) 795globalRegMaybe (YmmReg 2) = Just (RealRegSingle REG_YMM2) 796# endif 797# if defined(REG_YMM3) 798globalRegMaybe (YmmReg 3) = Just (RealRegSingle REG_YMM3) 799# endif 800# if defined(REG_YMM4) 801globalRegMaybe (YmmReg 4) = Just (RealRegSingle REG_YMM4) 802# endif 803# if defined(REG_YMM5) 804globalRegMaybe (YmmReg 5) = Just (RealRegSingle REG_YMM5) 805# endif 806# if defined(REG_YMM6) 807globalRegMaybe (YmmReg 6) = Just (RealRegSingle REG_YMM6) 808# endif 809# endif 810# if defined(MAX_REAL_ZMM_REG) && MAX_REAL_ZMM_REG != 0 811# if defined(REG_ZMM1) 812globalRegMaybe (ZmmReg 1) = Just (RealRegSingle REG_ZMM1) 813# endif 814# if defined(REG_ZMM2) 815globalRegMaybe (ZmmReg 2) = Just (RealRegSingle REG_ZMM2) 816# endif 817# if defined(REG_ZMM3) 818globalRegMaybe (ZmmReg 3) = Just (RealRegSingle REG_ZMM3) 819# endif 820# if defined(REG_ZMM4) 821globalRegMaybe (ZmmReg 4) = Just (RealRegSingle REG_ZMM4) 822# endif 823# if defined(REG_ZMM5) 824globalRegMaybe (ZmmReg 5) = Just (RealRegSingle REG_ZMM5) 825# endif 826# if defined(REG_ZMM6) 827globalRegMaybe (ZmmReg 6) = Just (RealRegSingle REG_ZMM6) 828# endif 829# endif 830# if defined(REG_Sp) 831globalRegMaybe Sp = Just (RealRegSingle REG_Sp) 832# endif 833# if defined(REG_Lng1) 834globalRegMaybe (LongReg 1) = Just (RealRegSingle REG_Lng1) 835# endif 836# if defined(REG_Lng2) 837globalRegMaybe (LongReg 2) = Just (RealRegSingle REG_Lng2) 838# endif 839# if defined(REG_SpLim) 840globalRegMaybe SpLim = Just (RealRegSingle REG_SpLim) 841# endif 842# if defined(REG_Hp) 843globalRegMaybe Hp = Just (RealRegSingle REG_Hp) 844# endif 845# if defined(REG_HpLim) 846globalRegMaybe HpLim = Just (RealRegSingle REG_HpLim) 847# endif 848# if defined(REG_CurrentTSO) 849globalRegMaybe CurrentTSO = Just (RealRegSingle REG_CurrentTSO) 850# endif 851# if defined(REG_CurrentNursery) 852globalRegMaybe CurrentNursery = Just (RealRegSingle REG_CurrentNursery) 853# endif 854# if defined(REG_MachSp) 855globalRegMaybe MachSp = Just (RealRegSingle REG_MachSp) 856# endif 857globalRegMaybe _ = Nothing 858#elif defined(MACHREGS_NO_REGS) 859globalRegMaybe _ = Nothing 860#else 861globalRegMaybe = panic "globalRegMaybe not defined for this platform" 862#endif 863 864freeReg :: RegNo -> Bool 865 866#if defined(MACHREGS_i386) || defined(MACHREGS_x86_64) 867 868# if defined(MACHREGS_i386) 869freeReg esp = False -- %esp is the C stack pointer 870freeReg esi = False -- Note [esi/edi/ebp not allocatable] 871freeReg edi = False 872freeReg ebp = False 873# endif 874# if defined(MACHREGS_x86_64) 875freeReg rsp = False -- %rsp is the C stack pointer 876# endif 877 878{- 879Note [esi/edi/ebp not allocatable] 880 881%esi is mapped to R1, so %esi would normally be allocatable while it 882is not being used for R1. However, %esi has no 8-bit version on x86, 883and the linear register allocator is not sophisticated enough to 884handle this irregularity (we need more RegClasses). The 885graph-colouring allocator also cannot handle this - it was designed 886with more flexibility in mind, but the current implementation is 887restricted to the same set of classes as the linear allocator. 888 889Hence, on x86 esi, edi and ebp are treated as not allocatable. 890-} 891 892-- split patterns in two functions to prevent overlaps 893freeReg r = freeRegBase r 894 895freeRegBase :: RegNo -> Bool 896# if defined(REG_Base) 897freeRegBase REG_Base = False 898# endif 899# if defined(REG_Sp) 900freeRegBase REG_Sp = False 901# endif 902# if defined(REG_SpLim) 903freeRegBase REG_SpLim = False 904# endif 905# if defined(REG_Hp) 906freeRegBase REG_Hp = False 907# endif 908# if defined(REG_HpLim) 909freeRegBase REG_HpLim = False 910# endif 911-- All other regs are considered to be "free", because we can track 912-- their liveness accurately. 913freeRegBase _ = True 914 915#elif defined(MACHREGS_powerpc) 916 917freeReg 0 = False -- Used by code setting the back chain pointer 918 -- in stack reallocations on Linux. 919 -- Moreover r0 is not usable in all insns. 920freeReg 1 = False -- The Stack Pointer 921-- most ELF PowerPC OSes use r2 as a TOC pointer 922freeReg 2 = False 923freeReg 13 = False -- reserved for system thread ID on 64 bit 924-- at least linux in -fPIC relies on r30 in PLT stubs 925freeReg 30 = False 926{- TODO: reserve r13 on 64 bit systems only and r30 on 32 bit respectively. 927 For now we use r30 on 64 bit and r13 on 32 bit as a temporary register 928 in stack handling code. See compiler/GHC/CmmToAsm/PPC/Instr.hs. 929 930 Later we might want to reserve r13 and r30 only where it is required. 931 Then use r12 as temporary register, which is also what the C ABI does. 932-} 933 934# if defined(REG_Base) 935freeReg REG_Base = False 936# endif 937# if defined(REG_Sp) 938freeReg REG_Sp = False 939# endif 940# if defined(REG_SpLim) 941freeReg REG_SpLim = False 942# endif 943# if defined(REG_Hp) 944freeReg REG_Hp = False 945# endif 946# if defined(REG_HpLim) 947freeReg REG_HpLim = False 948# endif 949freeReg _ = True 950 951#elif defined(MACHREGS_sparc) 952 953-- SPARC regs used by the OS / ABI 954-- %g0(r0) is always zero 955freeReg g0 = False 956 957-- %g5(r5) - %g7(r7) 958-- are reserved for the OS 959freeReg g5 = False 960freeReg g6 = False 961freeReg g7 = False 962 963-- %o6(r14) 964-- is the C stack pointer 965freeReg o6 = False 966 967-- %o7(r15) 968-- holds the C return address 969freeReg o7 = False 970 971-- %i6(r30) 972-- is the C frame pointer 973freeReg i6 = False 974 975-- %i7(r31) 976-- is used for C return addresses 977freeReg i7 = False 978 979-- %f0(r32) - %f1(r32) 980-- are C floating point return regs 981freeReg f0 = False 982freeReg f1 = False 983 984{- 985freeReg regNo 986 -- don't release high half of double regs 987 | regNo >= f0 988 , regNo < NCG_FirstFloatReg 989 , regNo `mod` 2 /= 0 990 = False 991-} 992 993# if defined(REG_Base) 994freeReg REG_Base = False 995# endif 996# if defined(REG_R1) 997freeReg REG_R1 = False 998# endif 999# if defined(REG_R2) 1000freeReg REG_R2 = False 1001# endif 1002# if defined(REG_R3) 1003freeReg REG_R3 = False 1004# endif 1005# if defined(REG_R4) 1006freeReg REG_R4 = False 1007# endif 1008# if defined(REG_R5) 1009freeReg REG_R5 = False 1010# endif 1011# if defined(REG_R6) 1012freeReg REG_R6 = False 1013# endif 1014# if defined(REG_R7) 1015freeReg REG_R7 = False 1016# endif 1017# if defined(REG_R8) 1018freeReg REG_R8 = False 1019# endif 1020# if defined(REG_R9) 1021freeReg REG_R9 = False 1022# endif 1023# if defined(REG_R10) 1024freeReg REG_R10 = False 1025# endif 1026# if defined(REG_F1) 1027freeReg REG_F1 = False 1028# endif 1029# if defined(REG_F2) 1030freeReg REG_F2 = False 1031# endif 1032# if defined(REG_F3) 1033freeReg REG_F3 = False 1034# endif 1035# if defined(REG_F4) 1036freeReg REG_F4 = False 1037# endif 1038# if defined(REG_F5) 1039freeReg REG_F5 = False 1040# endif 1041# if defined(REG_F6) 1042freeReg REG_F6 = False 1043# endif 1044# if defined(REG_D1) 1045freeReg REG_D1 = False 1046# endif 1047# if defined(REG_D1_2) 1048freeReg REG_D1_2 = False 1049# endif 1050# if defined(REG_D2) 1051freeReg REG_D2 = False 1052# endif 1053# if defined(REG_D2_2) 1054freeReg REG_D2_2 = False 1055# endif 1056# if defined(REG_D3) 1057freeReg REG_D3 = False 1058# endif 1059# if defined(REG_D3_2) 1060freeReg REG_D3_2 = False 1061# endif 1062# if defined(REG_D4) 1063freeReg REG_D4 = False 1064# endif 1065# if defined(REG_D4_2) 1066freeReg REG_D4_2 = False 1067# endif 1068# if defined(REG_D5) 1069freeReg REG_D5 = False 1070# endif 1071# if defined(REG_D5_2) 1072freeReg REG_D5_2 = False 1073# endif 1074# if defined(REG_D6) 1075freeReg REG_D6 = False 1076# endif 1077# if defined(REG_D6_2) 1078freeReg REG_D6_2 = False 1079# endif 1080# if defined(REG_Sp) 1081freeReg REG_Sp = False 1082# endif 1083# if defined(REG_SpLim) 1084freeReg REG_SpLim = False 1085# endif 1086# if defined(REG_Hp) 1087freeReg REG_Hp = False 1088# endif 1089# if defined(REG_HpLim) 1090freeReg REG_HpLim = False 1091# endif 1092freeReg _ = True 1093 1094#else 1095 1096freeReg = panic "freeReg not defined for this platform" 1097 1098#endif 1099