1 /*========================== begin_copyright_notice ============================
2
3 Copyright (C) 2017-2021 Intel Corporation
4
5 SPDX-License-Identifier: MIT
6
7 ============================= end_copyright_notice ===========================*/
8
9 #ifndef _BINARYENCODINGCNL_H_
10 #define _BINARYENCODINGCNL_H_
11
12 #include "FlowGraph.h"
13 #include "BinaryEncoding.h"
14
15 ///=--- Definitions for auto-generated header.
16
17 #if defined(_WIN32)
18 #include <windows.h>
19 #endif
20 #include "VISADefines.h"
21
22 #if !defined(_WIN32)
23 typedef unsigned char BYTE;
24 typedef uint32_t UINT;
25 #endif
26 typedef uint64_t QWORD;
27
28 #define BITFIELD_RANGE(startbit, endbit) ((endbit)-(startbit)+1)
29 #define BITFIELD_BIT(bit) 1
30
31 #if !defined(__ANDROID__)
32 #define __CONCAT(x,y) x ## y
33 #endif
34 #define __UNIQUENAME(a1, a2) __CONCAT(a1, a2)
35 #define UNIQUENAME(__text) __UNIQUENAME(__text, __COUNTER__)
36 #define STATIC_ASSERT(e) typedef char UNIQUENAME(STATIC_ASSERT_)[(e)?1:-1]
37
38 #define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1]
39
40 #define __CODEGEN_UNIQUE(field) UNIQUENAME(field)
41 #define __CODEGEN_INLINE inline
42 #define __CODEGEN_PACKED _PACKED
43 #define __CODEGEN_ATTRIBUTES_STRUCTURE
44
45 #define __CODEGEN_GET_MACRO()
46 #define __CODEGEN_SET_MACRO(value)
47
48 #define __CODEGEN_DefineDebugCommand(type, ...) inline void DebugCommand(type, ...)
49 #define __CODEGEN_DebugCommandEnumParam(type, ...)
50 #define __CODEGEN_DebugCommandUIntParam(type, ...)
51 #define __CODEGEN_DebugCommandBoolParam(type, ...)
52 #define __CODEGEN_DefineEnumString(type) inline void EnumString(type)
53 #define __CODEGEN_EnumStringValue(value)
54
55 // Gen9 defines
56 #define __CODEGEN_FILE_DIRECTIVES_OPEN
57 #define __CODEGEN_NAMESPACE_OPEN namespace G9HDL {
58 #define __CODEGEN_NAMESPACE_CLOSE } // namespace G9HDL
59 #define __CODEGEN_FILE_DIRECTIVES_CLOSE
60 #define __CODEGEN_ACCESS_SPECIFIER_DEFINITION
61 #define __CODEGEN_ACCESS_SPECIFIER_METHODS
62
63 ///=--- Definitions for auto-generated header.
64 #pragma pack(push, 1)
65 #include "IGfxHwEuIsaCNL.h"
66
67 #include "IGfxHwEuIsaICL.h"
68
69
70 /// \brief Class encapsulating encoding machinery using new auto-generated headers
71 ///
72 ///
73 namespace vISA
74 {
75 class BinaryEncodingCNL : public BinaryEncodingBase
76 {
77 public:
BinaryEncodingCNL(Mem_Manager & m,G4_Kernel & k,std::string fname)78 BinaryEncodingCNL(Mem_Manager &m, G4_Kernel& k, std::string fname)
79 : BinaryEncodingBase(m, k, fname)
80 {}
81
~BinaryEncodingCNL()82 virtual ~BinaryEncodingCNL()
83 {
84
85 };
86
87 typedef enum { SUCCESS, FAILURE } Status;
88
89 //BinaryEncodingCNL::Status DoAll();
90 //void *EmitBinary(uint32_t&);
alloc(size_t size)91 void *alloc(size_t size) { return mem.alloc(size); };
92 BinaryEncodingCNL::Status DoAllEncoding(G4_INST*);
93
94 virtual void DoAll();
95
96 // Handle CNL+ specific opcode. For common opcode (pre-CNL and CNL+),
97 // it invokes base's getEUOpcode().
98 G9HDL::EU_OPCODE getEUOpcode(G4_opcode g4opc);
99
100 private:
101
102 bool EncodeConditionalBranches(G4_INST *, uint32_t);
103 void SetBranchOffsets(G4_INST* inst,
104 uint32_t JIP,
105 uint32_t UIP = 0);
106
107 ///==------------------------------------------------------------------------
108 BinaryEncodingCNL::Status DoAllEncodingWAIT(G4_INST*);
109 BinaryEncodingCNL::Status DoAllEncodingJMPI(G4_INST*);
110 BinaryEncodingCNL::Status DoAllEncodingCALL(G4_INST*);
111 BinaryEncodingCNL::Status DoAllEncodingCF(G4_INST*);
112 BinaryEncodingCNL::Status DoAllEncodingSplitSEND(G4_INST*);
113 BinaryEncodingCNL::Status EncodeSplitSend(G4_INST*, G9HDL::EU_INSTRUCTION_SENDS&);
114
115 BinaryEncodingCNL::Status DoAllEncodingRegular(G4_INST*);
116 void EncodeOneSrcInst(G4_INST*, G9HDL::EU_INSTRUCTION_BASIC_ONE_SRC&);
117 void EncodeTwoSrcInst(G4_INST*, G9HDL::EU_INSTRUCTION_BASIC_TWO_SRC&);
118 void EncodeThreeSrcInst(G4_INST*, G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC&);
119 void EncodeThreeSrcInstAlign1(G4_INST*, G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC&);
120
121 /// 0-th DWORD of instruction, header
122 void EncodeInstHeader(G4_INST*, G9HDL::EU_INSTRUCTION_HEADER&);
123 /// note: indentation shows that those are subfields of instruction header
124 void EncodeOpCode(G4_INST*, G9HDL::EU_INSTRUCTION_HEADER&);
125 void EncodeAccessMode(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
126 void EncodeDepControl(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
127 void EncodeQtrControl(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
128 void EncodeThreadControl(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
129 void EncodeFlagRegPredicate(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
130 void EncodeExecSize(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS_A&);
131 void EncodeCondModifier(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS&);
132 void EncodeAccWrCtrl(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS&);
133 void EncodeInstModifier(G4_INST*, G9HDL::EU_INSTRUCTION_CONTROLS&);
134
135 /// 1-st DWORD of instruction, header
136 void EncodeOperandDst(G4_INST*, G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
137 void EncodeDstChanEn(G4_INST*,G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
138 void EncodeDstRegFile(G4_INST*,G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
139 void EncodeDstRegNum(G4_INST *, G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
140 void EncodeDstArchRegNum(G4_INST *, G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
141 void EncodeDstIndirectRegNum(G4_INST *, G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
142 void EncodeDstHorzStride(G4_INST *, G4_DstRegRegion *, G9HDL::EU_INSTRUCTION_OPERAND_CONTROLS&);
143
144 ///==------------------------------------------------------------------------
145
146 //inline void EncodeSrcImmData(G9HDL::EU_INSTRUCTION_SOURCES_IMM32&, G4_Operand *);
147 inline void EncodeSrcImm64Data(G9HDL::EU_INSTRUCTION_IMM64_SRC&, G4_Operand *);
148 //void insertWaitDst(G4_INST*);
149
150 /// Virtual methods overrides, used by generic (base) methods.
151 virtual void SetCompactCtrl (BinInst *mybin, uint32_t value);
152 virtual uint32_t GetCompactCtrl(BinInst *mybin);
153
154 ///====----- Inline helpers:
155
156 /// \brief Translates from v-isa reg file enum to HDL reg file type enum
157 ///
TranslateVisaToHDLRegFile(RegFile regFile)158 static inline G9HDL::REGFILE TranslateVisaToHDLRegFile(RegFile regFile)
159 {
160 return(G9HDL::REGFILE)regFile;
161 }
162
163 /// \brief Translates from v-isa AddrMode enum to HDL ADDRMODE type enum
164 ///
TranslateVisaToHDLAddrMode(AddrMode addrMode)165 static inline G9HDL::ADDRMODE TranslateVisaToHDLAddrMode(AddrMode addrMode)
166 {
167 return(G9HDL::ADDRMODE)addrMode;
168 }
169
170 /// \brief Packs Arch Reg File and Arch Reg Num into single unsigned short for encoding
171 ///
PackArchRegTypeAndArchRegFile(unsigned short RegFile,unsigned short RegNumValue)172 static inline unsigned short PackArchRegTypeAndArchRegFile(unsigned short RegFile, unsigned short RegNumValue)
173 {
174 unsigned short EncodedRegNum = RegFile << 4;
175 EncodedRegNum = EncodedRegNum | (RegNumValue & 0xF);
176 return EncodedRegNum;
177 }
178
179
180 public:
181 //////////////////////////////////////////////////////////////////////////
182 //reviewed
GetSrcHLDMod(G4_SrcRegRegion * srcRegion)183 static inline G9HDL::SRCMOD GetSrcHLDMod(G4_SrcRegRegion *srcRegion)
184 {
185 uint32_t mod = srcRegion->getModifier();
186 G9HDL::SRCMOD srcMod = G9HDL::SRCMOD_NO_MODIFICATION;
187 switch (mod) {
188 case Mod_Minus_Abs:
189 srcMod = G9HDL::SRCMOD_NEGATE_OF_ABS;
190 break;
191 case Mod_Abs:
192 srcMod = G9HDL::SRCMOD_ABS;
193 break;
194 case Mod_Minus:
195 srcMod = G9HDL::SRCMOD_NEGATE;
196 break;
197 case Mod_Not:
198 // same as negate
199 srcMod = G9HDL::SRCMOD_NEGATE;
200 break;
201 case Mod_src_undef:
202 // do nothing
203 break;
204 default:
205 MUST_BE_TRUE(false, "unexpected source modifier");
206 break;
207 }
208 return srcMod;
209 }
210 };
211
212 //===----------------------------------------------------------------------===//
213
214 /// \brief Template class for destination operand encoder
215 ///
216 /// Template parameter is an auto-header generated struct that
217 /// performs encoding of destination operand (WORD1) part of instruction.
218 /// The template and template specialization is used so to isolate the
219 /// high-level builder logic from underlying encoding mechanism for
220 /// different kind of instruction types (two-src, three-src etc.)
221 template<typename T>
222 class DstOperandEncoder
223 {
224 public:
SetCombinedFlagRegSubregNumber(T & opndCtl,unsigned FlagRegNumValue,unsigned FlagRegSubNumValue)225 static void SetCombinedFlagRegSubregNumber(
226 T& opndCtl,
227 unsigned FlagRegNumValue,
228 unsigned FlagRegSubNumValue)
229 {
230 uint32_t value = 0;
231 value = FlagRegNumValue << 1;
232 value = value | FlagRegSubNumValue;
233
234 opndCtl.SetFlagRegisterNumberSubregisterNumber(value);
235 }
236 };
237
238 template<>
239 class DstOperandEncoder<G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC>
240 {
241 public:
SetCombinedFlagRegSubregNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC & opndCtl,unsigned FlagRegNumValue,unsigned FlagRegSubNumValue)242 static void SetCombinedFlagRegSubregNumber(
243 G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC& opndCtl,
244 unsigned FlagRegNumValue,
245 unsigned FlagRegSubNumValue)
246 {
247 opndCtl.SetFlagRegisterNumberSubregisterNumber(FlagRegSubNumValue);
248 opndCtl.SetFlagRegisterNumber(FlagRegNumValue);
249 }
250 };
251
252 template<>
253 class DstOperandEncoder<G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC>
254 {
255 public:
SetCombinedFlagRegSubregNumber(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC & opndCtl,unsigned FlagRegNumValue,unsigned FlagRegSubNumValue)256 static void SetCombinedFlagRegSubregNumber(
257 G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC& opndCtl,
258 unsigned FlagRegNumValue,
259 unsigned FlagRegSubNumValue)
260 {
261 opndCtl.SetFlagSubregisterNumber(FlagRegSubNumValue);
262 opndCtl.SetFlagRegisterNumber(FlagRegNumValue);
263 }
264 };
265
266 /// \brief Template-based builder for destination instruction fields.
267 ///
268 /// Basically those fields whose encoding methods in auto-generated
269 /// header differ by name/parameters based on the instruction type will need
270 /// to be encoded through this template.
271 template<typename T>
272 class DstBuilder
273 {
274 public:
275
276 /// \brief Template based field encoder for mask control (a.k.a. write-enable)
277 ///
278 /// This one will get template specialized, and is will call suitable field
279 /// encoder method for either OPERAND_CONTROLS, three-src, send or sends type
280 /// encoding
EncodeMaskCtrl(G4_INST * inst,T & opnds)281 static void EncodeMaskCtrl(G4_INST* inst, T& opnds)
282 {
283 if (inst->isWriteEnableInst())
284 opnds.SetMaskctrl(G9HDL::MASKCTRL_WRITE_ALL_CHANNELS);
285
286 if (inst->opcode()==G4_jmpi)
287 opnds.SetMaskctrl(G9HDL::MASKCTRL_WRITE_ALL_CHANNELS);
288 }
289
290 /// \brief Template based field encoder for operant destination type
291 /// Template parameter is the type of encoding mask.
EncodeOperandDstType(G4_INST * inst,T & opnds)292 static void EncodeOperandDstType(G4_INST* inst, T& opnds)
293 {
294 G4_DstRegRegion* dst = inst->getDst();
295 G4_Type regType = dst->asDstRegRegion()->getType();
296
297 switch (regType)
298 { //BXML bug Line 851: bitrange 5-8, should be: 37-40
299 case Type_UD:
300 opnds.SetDestinationDataType(G11HDL::DSTTYPE_UD);
301 break;
302 case Type_D:
303 opnds.SetDestinationDataType(G11HDL::DSTTYPE_D);
304 break;
305 case Type_UW:
306 opnds.SetDestinationDataType(G11HDL::DSTTYPE_UW);
307 break;
308 case Type_W:
309 opnds.SetDestinationDataType(G11HDL::DSTTYPE_W);
310 break;
311 case Type_UB:
312 opnds.SetDestinationDataType(G11HDL::DSTTYPE_UB);
313 break;
314 case Type_B:
315 opnds.SetDestinationDataType(G11HDL::DSTTYPE_B);
316 break;
317 case Type_DF:
318 opnds.SetDestinationDataType(G11HDL::DSTTYPE_DF);
319 break;
320 case Type_F:
321 opnds.SetDestinationDataType(G11HDL::DSTTYPE_F);
322 break;
323 case Type_UQ:
324 opnds.SetDestinationDataType(G11HDL::DSTTYPE_UQ);
325 break;
326 case Type_Q:
327 opnds.SetDestinationDataType(G11HDL::DSTTYPE_Q);
328 break;
329 case Type_HF:
330 opnds.SetDestinationDataType(G11HDL::DSTTYPE_HF);
331 break;
332 default:
333 MUST_BE_TRUE(false, "Encoding error: destination type unknown");
334 break;
335 }
336 }
337
338 /// \brief Template based field encoder for combined destination FlagRegNum and FlagSubRegNum
339 ///
EncodeFlagReg(G4_INST * inst,T & opnds)340 static void EncodeFlagReg(G4_INST* inst, T& opnds)
341 {
342 bool flagRegNumValid = false;
343 unsigned FlagRegNumValue = 0;
344 unsigned FlagRegSubNumValue = 0;
345
346 G4_Predicate *pred = inst->getPredicate();
347 if (pred) {
348 FlagRegNumValue =
349 pred->getBase()->ExRegNum(flagRegNumValid);
350 FlagRegSubNumValue = pred->getBase()->asRegVar()->getPhyRegOff();
351 }
352
353 G4_CondMod *cModifier = inst->getCondMod();
354 if (cModifier) { // cond modifier
355 G4_VarBase* flagReg = cModifier->getBase();
356 if (flagReg != NULL)
357 {
358 FlagRegNumValue = flagReg->ExRegNum(flagRegNumValid);
359 FlagRegSubNumValue = flagReg->asRegVar()->getPhyRegOff();
360 }
361 else
362 {
363 FlagRegNumValue = 0;
364 FlagRegSubNumValue = 0;
365 }
366 }
367
368 if (pred || cModifier) {
369
370 DstOperandEncoder<T>::SetCombinedFlagRegSubregNumber(opnds, FlagRegNumValue, FlagRegSubNumValue);
371 }
372 }
373
374 /// \brief Template based field encoder for combined Dst.AddrMode
375 ///
EncodeDstAddrMode(G4_INST * inst,T & opnds)376 static void EncodeDstAddrMode(G4_INST* inst, T& opnds)
377 {
378 G4_DstRegRegion* dst = inst->getDst();
379 switch (EncodingHelper::GetDstAddrMode(dst))
380 {
381 case ADDR_MODE_IMMED:
382 //same field for align16
383 opnds.SetDestinationAddressingMode(G9HDL::ADDRMODE_DIRECT);
384 break;
385 case ADDR_MODE_INDIR:
386 //same field for align16
387 opnds.SetDestinationAddressingMode(G9HDL::ADDRMODE_INDIRECT);
388 break;
389 default:
390 MUST_BE_TRUE(false, "Encoding error: addressing mode type unknown");
391 break;
392 }
393 }
394
395 };
396
397 //===----------------------------------------------------------------------===//
398
399
400
401 /// \brief Template class for source operand encoder
402 ///
403 /// There are two template parameters: auto-generated struct type
404 /// and source operand number that select which source (src0,src1,src2) is
405 /// being encoded.
406 ///
407 /// Template parameter is an auto-header generated struct that
408 /// performs encoding of selected source operand part of instruction.
409 /// The template and template specialization is used so to isolate the
410 /// high-level builder logic from underlying encoding mechanism for
411 /// different kind of instruction types (one-src, two-src, three-src etc.)
412 /// and different source numbers.
413 template<typename T, int SrcNum>
414 class SrcOperandEncoder
415 {
416 public:
417
SetSrcChanSel(T * EuInstructionSources,uint32_t value)418 static void SetSrcChanSel(T *EuInstructionSources, uint32_t value)
419 {
420 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSrcChanSel template specialization not implemented.");
421 }
422
SetSrcChanSel_10(T * EuInstructionSources,uint32_t value)423 static void SetSrcChanSel_10(T *EuInstructionSources, uint32_t value)
424 {
425 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSrcChanSel_10 template specialization not implemented.");
426 }
SetSrcChanSel_32(T * EuInstructionSources,uint32_t value)427 static void SetSrcChanSel_32(T *EuInstructionSources, uint32_t value)
428 {
429 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSrcChanSel_32 template specialization not implemented.");
430 }
431
SetSourceWidth(T * EuInstructionSources,G9HDL::WIDTH width)432 static void SetSourceWidth(T *EuInstructionSources, G9HDL::WIDTH width)
433 {
434 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceWidth template specialization not implemented.");
435 }
436
SetSourceHorizontalStride(T * EuInstructionSources,G9HDL::HORZSTRIDE stride)437 static void SetSourceHorizontalStride(T *EuInstructionSources, G9HDL::HORZSTRIDE stride)
438 {
439 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceHorizontalStride template specialization not implemented.");
440 }
441
SetSourceVerticalStride(T * EuInstructionSources,G9HDL::VERTSTRIDE vertStride)442 static void SetSourceVerticalStride(T *EuInstructionSources, G9HDL::VERTSTRIDE vertStride)
443 {
444 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceVerticalStride template specialization not implemented.");
445 }
446
SetSourceRegisterNumber(T * EuInstructionSources,uint32_t value)447 static void SetSourceRegisterNumber(T *EuInstructionSources, uint32_t value)
448 {
449 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceRegisterNumber template specialization not implemented.");
450 }
451
SetSourceSpecialAcc(T * EuInstructionSources,uint32_t value)452 static void SetSourceSpecialAcc(T *EuInstructionSources, uint32_t value)
453 {
454 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceSpecialAcc template specialization not implemented.");
455 }
456
SetSourceSubRegisterNumber(T * EuInstructionSources,uint32_t value)457 static void SetSourceSubRegisterNumber(T *EuInstructionSources, uint32_t value)
458 {
459 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceSubRegisterNumber template specialization not implemented.");
460 }
461
SetSourceSubregisterNumber44(T * EuInstructionSources,uint32_t value)462 static void SetSourceSubregisterNumber44(T *EuInstructionSources, uint32_t value)
463 {
464 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceSubregisterNumber44 template specialization not implemented.");
465 }
466
SetAddressSubregisterNumber(T * EuInstructionSources,uint32_t value)467 static void SetAddressSubregisterNumber(T *EuInstructionSources, uint32_t value)
468 {
469 MUST_BE_TRUE(false, "SrcOperandEncoder::SetAddressSubregisterNumber template specialization not implemented.");
470 }
471
SetSourceAddressImmediate84(T * EuInstructionSources,uint32_t value)472 static void SetSourceAddressImmediate84(T *EuInstructionSources, uint32_t value)
473 {
474 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceAddressImmediate84 template specialization not implemented.");
475 }
476
SetSourceAddressImmediate90(T * EuInstructionSources,int32_t value)477 static void SetSourceAddressImmediate90(T *EuInstructionSources, int32_t value)
478 {
479 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceAddressImmediate80 template specialization not implemented.");
480 }
481
SetSourceImmediateData(T * EuInstructionSources,uint32_t value)482 static void SetSourceImmediateData(T *EuInstructionSources, uint32_t value)
483 {
484 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceImmediateData template specialization not implemented.");
485 }
486
SetSourceAddressingMode(T * EuInstructionSources,G9HDL::ADDRMODE addrMode)487 static void SetSourceAddressingMode(T *EuInstructionSources, G9HDL::ADDRMODE addrMode)
488 {
489 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceAddressingMode template specialization not implemented.");
490 }
491
SetSourceModifier(T * EuInstructionSources,G9HDL::SRCMOD srcMod)492 static void SetSourceModifier(T *EuInstructionSources, G9HDL::SRCMOD srcMod)
493 {
494 MUST_BE_TRUE(false, "SrcOperandEncoder::SetSourceModifier template specialization not implemented.");
495 }
496 };
497
498 /// \brief Template specialization for source operand encoder for T, src0
499 ///
500 template<typename T>
501 class SrcOperandEncoder<T,0>
502 {
503 public:
504
SetSrcChanSel(T * EuInstructionSources,uint32_t value)505 static void SetSrcChanSel(T *EuInstructionSources, uint32_t value)
506 {
507 //first 4 bits
508 SetSrcChanSel_10(EuInstructionSources, value & 0xf);
509 //second 4 bits
510 SetSrcChanSel_32(EuInstructionSources, (value >> 4) & 0xf);
511 }
512
SetSrcChanSel_10(T * EuInstructionSources,uint32_t value)513 static void SetSrcChanSel_10(T *EuInstructionSources, uint32_t value)
514 {
515 EuInstructionSources->SetSource0_SourceChannelSelect30(value);
516 }
SetSrcChanSel_32(T * EuInstructionSources,uint32_t value)517 static void SetSrcChanSel_32(T *EuInstructionSources, uint32_t value)
518 {
519 EuInstructionSources->SetSource0_SourceChannelSelect74(value);
520 }
SetSourceWidth(T * EuInstructionSources,G9HDL::WIDTH width)521 static void SetSourceWidth(T *EuInstructionSources, G9HDL::WIDTH width)
522 {
523 EuInstructionSources->SetSource0_SourceWidth(width);
524 }
SetSourceHorizontalStride(T * EuInstructionSources,G9HDL::HORZSTRIDE stride)525 static void SetSourceHorizontalStride(T *EuInstructionSources, G9HDL::HORZSTRIDE stride)
526 {
527 EuInstructionSources->SetSource0_SourceHorizontalStride (stride);
528 }
SetSourceVerticalStride(T * EuInstructionSources,G9HDL::VERTSTRIDE vertStride)529 static void SetSourceVerticalStride(T *EuInstructionSources, G9HDL::VERTSTRIDE vertStride)
530 {
531 EuInstructionSources->SetSource0_SourceVerticalStride (vertStride);
532 }
SetSourceRegisterNumber(T * EuInstructionSources,uint32_t value)533 static void SetSourceRegisterNumber(T *EuInstructionSources, uint32_t value)
534 {
535 EuInstructionSources->SetSource0_SourceRegisterNumber (value);
536 }
537
SetSourceSpecialAcc(T * EuInstructionSources,uint32_t value)538 static void SetSourceSpecialAcc(T *EuInstructionSources, uint32_t value)
539 {
540 EuInstructionSources->SetSource0_SourceSubRegisterNumber(value & 0xF);
541 }
542
SetSourceSubRegisterNumber(T * EuInstructionSources,uint32_t value)543 static void SetSourceSubRegisterNumber(T *EuInstructionSources, uint32_t value)
544 {
545 EuInstructionSources->SetSource0_SourceSubRegisterNumber (value);
546 }
547
SetSourceSubregisterNumber44(T * EuInstructionSources,uint32_t value)548 static void SetSourceSubregisterNumber44(T *EuInstructionSources, uint32_t value)
549 {
550 EuInstructionSources->SetSource0_SourceSubregisterNumber44 (value);
551 }
552
SetAddressSubregisterNumber(T * EuInstructionSources,uint32_t value)553 static void SetAddressSubregisterNumber(T *EuInstructionSources, uint32_t value)
554 {
555 EuInstructionSources->SetSource0_AddressSubregisterNumber_0 (value);
556 }
557
SetSourceAddressImmediate84(T * EuInstructionSources,uint32_t value)558 static void SetSourceAddressImmediate84(T *EuInstructionSources, uint32_t value)
559 {
560 EuInstructionSources->SetSource0_SourceAddressImmediate84 (value);
561 }
562
SetSourceAddressImmediate90(T * EuInstructionSources,int32_t value)563 static void SetSourceAddressImmediate90(T *EuInstructionSources, int32_t value)
564 {
565 EuInstructionSources->SetSource0_SourceAddressImmediate80 (value);
566
567 value = value >> 9;
568 EuInstructionSources->SetSource0_SourceAddressImmediate9(value);
569 }
570
SetSourceImmediateData(T * EuInstructionSources,uint32_t value)571 static void SetSourceImmediateData(T *EuInstructionSources, uint32_t value)
572 {
573 EuInstructionSources->SetSource0Immediate(value);
574 }
575
SetSourceAddressingMode(T * EuInstructionSources,G9HDL::ADDRMODE addrMode)576 static void SetSourceAddressingMode(T *EuInstructionSources, G9HDL::ADDRMODE addrMode)
577 {
578 EuInstructionSources->SetSource0_SourceAddressingMode(addrMode);
579 }
580
SetSourceModifier(T * EuInstructionSources,G9HDL::SRCMOD srcMod)581 static void SetSourceModifier(T *EuInstructionSources, G9HDL::SRCMOD srcMod)
582 {
583 EuInstructionSources->SetSource0_SourceModifier(srcMod);
584 }
585 };
586
587 /// \brief Template specialization for source operand encoder for 3-src instruction
588 /// type in align16 mode, SRC 0
589 ///
590 template<>
591 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC,0>
592 {
593 public:
594
SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)595 static void SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
596 {
597 threeSrc->SetSource0_SourceSwizzle(value);
598 }
599
SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::SRCMOD srcMod)600 static void SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::SRCMOD srcMod)
601 {
602 threeSrc->SetSource0_SourceModifier(srcMod);
603 }
604
SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::REPCTRL repCtrl)605 static void SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::REPCTRL repCtrl)
606 {
607 threeSrc->SetSource0_SourceReplicateControl(repCtrl);
608 }
609
SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)610 static void SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
611 {
612 threeSrc->SetSource0_SourceRegisterNumber(value);
613 }
614
SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)615 static void SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
616 {
617 threeSrc->SetSource0_SourceSubregisterNumber42(value);
618 }
619
SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)620 static void SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
621 {
622 threeSrc->SetSource0_SourceSubregisterNumber1(value);
623 }
624
625
626 };
627
628 /// \brief Template specialization for source operand encoder for 3-src instruction
629 /// type in align16 mode, SRC 1
630 ///
631 template<>
632 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC,1>
633 {
634 public:
635
SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)636 static void SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
637 {
638 threeSrc->SetSource1_SourceSwizzle(value);
639 }
640
SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::SRCMOD srcMod)641 static void SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::SRCMOD srcMod)
642 {
643 threeSrc->SetSource1_SourceModifier(srcMod);
644 }
645
SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::REPCTRL repCtrl)646 static void SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::REPCTRL repCtrl)
647 {
648 threeSrc->SetSource1_SourceReplicateControl(repCtrl);
649 }
650
SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)651 static void SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
652 {
653 threeSrc->SetSource1_SourceRegisterNumber(value);
654 }
655
SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)656 static void SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
657 {
658 threeSrc->SetSource1_SourceSubregisterNumber42(value);
659 }
660
SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)661 static void SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
662 {
663 threeSrc->SetSource1_SourceSubregisterNumber1(value);
664 }
665
666
667 };
668
669 /// \brief Template specialization for source operand encoder for 3-src instruction
670 /// type in align16 mode, SRC 2
671 ///
672 template<>
673 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC,2>
674 {
675 public:
676
SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)677 static void SetSrcChanSel(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
678 {
679 threeSrc->SetSource2_SourceSwizzle(value);
680 }
681
SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::SRCMOD srcMod)682 static void SetSourceModifier(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::SRCMOD srcMod)
683 {
684 threeSrc->SetSource2_SourceModifier(srcMod);
685 }
686
SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,G9HDL::REPCTRL repCtrl)687 static void SrcReplicateControl(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, G9HDL::REPCTRL repCtrl)
688 {
689 threeSrc->SetSource2_SourceReplicateControl(repCtrl);
690 }
691
SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)692 static void SetSourceRegisterNumber(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
693 {
694 threeSrc->SetSource2_SourceRegisterNumber(value);
695 }
696
SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)697 static void SetSourceSubregisterNumber42(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
698 {
699 threeSrc->SetSource2_SourceSubregisterNumber42(value);
700 }
701
SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC * threeSrc,uint32_t value)702 static void SetSourceSubregisterNumber1(G9HDL::EU_INSTRUCTION_BASIC_THREE_SRC *threeSrc, uint32_t value)
703 {
704 threeSrc->SetSource2_SourceSubregisterNumber1(value);
705 }
706
707
708 };
709
710 /// \brief Template specialization for source operand encoder for T, src1
711 ///
712 template<typename T>
713 class SrcOperandEncoder<T,1>
714 {
715 public:
716
SetSrcChanSel(T * EuInstructionSources,uint32_t value)717 static void SetSrcChanSel(T *EuInstructionSources, uint32_t value)
718 {
719 //first 4 bits
720 SetSrcChanSel_10(EuInstructionSources, value & 0xf);
721 //second 4 bits
722 SetSrcChanSel_32(EuInstructionSources, (value >> 4) & 0xf);
723 }
724
SetSrcChanSel_10(T * EuInstructionSources,uint32_t value)725 static void SetSrcChanSel_10(T *EuInstructionSources, uint32_t value)
726 {
727 EuInstructionSources->SetSource1_SourceChannelSelect30(value);
728 }
SetSrcChanSel_32(T * EuInstructionSources,uint32_t value)729 static void SetSrcChanSel_32(T *EuInstructionSources, uint32_t value)
730 {
731 EuInstructionSources->SetSource1_SourceChannelSelect74(value);
732 }
SetSourceWidth(T * EuInstructionSources,G9HDL::WIDTH width)733 static void SetSourceWidth(T *EuInstructionSources, G9HDL::WIDTH width)
734 {
735 EuInstructionSources->SetSource1_SourceWidth(width);
736 }
SetSourceHorizontalStride(T * EuInstructionSources,G9HDL::HORZSTRIDE stride)737 static void SetSourceHorizontalStride(T *EuInstructionSources, G9HDL::HORZSTRIDE stride)
738 {
739 EuInstructionSources->SetSource1_SourceHorizontalStride(stride);
740 }
SetSourceVerticalStride(T * EuInstructionSources,G9HDL::VERTSTRIDE vertStride)741 static void SetSourceVerticalStride(T *EuInstructionSources, G9HDL::VERTSTRIDE vertStride)
742 {
743 EuInstructionSources->SetSource1_SourceVerticalStride (vertStride);
744 }
745
SetSourceRegisterNumber(T * EuInstructionSources,uint32_t value)746 static void SetSourceRegisterNumber(T *EuInstructionSources, uint32_t value)
747 {
748 EuInstructionSources->SetSource1_SourceRegisterNumber (value);
749 }
750
SetSourceSpecialAcc(T * EuInstructionSources,uint32_t value)751 static void SetSourceSpecialAcc(T *EuInstructionSources, uint32_t value)
752 {
753 EuInstructionSources->SetSource1_SourceSubRegisterNumber(value & 0xF);
754 }
755
SetSourceSubRegisterNumber(T * EuInstructionSources,uint32_t value)756 static void SetSourceSubRegisterNumber(T *EuInstructionSources, uint32_t value)
757 {
758 EuInstructionSources->SetSource1_SourceSubRegisterNumber (value);
759 }
760
SetSourceSubregisterNumber44(T * EuInstructionSources,uint32_t value)761 static void SetSourceSubregisterNumber44(T *EuInstructionSources, uint32_t value)
762 {
763 EuInstructionSources->SetSource1_SourceSubregisterNumber44 (value);
764 }
765
SetAddressSubregisterNumber(T * EuInstructionSources,uint32_t value)766 static void SetAddressSubregisterNumber(T *EuInstructionSources, uint32_t value)
767 {
768 EuInstructionSources->SetSource1_AddressSubregisterNumber (value);
769 }
770
SetSourceAddressImmediate84(T * EuInstructionSources,uint32_t value)771 static void SetSourceAddressImmediate84(T *EuInstructionSources, uint32_t value)
772 {
773 EuInstructionSources->SetSource1_SourceAddressImmediate84 (value);
774 }
775
SetSourceAddressImmediate90(T * EuInstructionSources,uint32_t value)776 static void SetSourceAddressImmediate90(T *EuInstructionSources, uint32_t value)
777 {
778 EuInstructionSources->SetSource1_SourceAddressImmediate80 (value);
779 value = value >> 9;
780 EuInstructionSources->SetSource1_SourceAddressImmediate9(value);
781 }
782
SetSourceImmediateData(T * EuInstructionSources,uint32_t value)783 static void SetSourceImmediateData(T *EuInstructionSources, uint32_t value)
784 {
785 EuInstructionSources->SetSource1Immediate(value);
786 }
787
SetSourceAddressingMode(T * EuInstructionSources,G9HDL::ADDRMODE addrMode)788 static void SetSourceAddressingMode(T *EuInstructionSources, G9HDL::ADDRMODE addrMode)
789 {
790 EuInstructionSources->SetSource1_SourceAddressingMode(addrMode);
791 }
792
SetSourceModifier(T * EuInstructionSources,G9HDL::SRCMOD srcMod)793 static void SetSourceModifier(T *EuInstructionSources, G9HDL::SRCMOD srcMod)
794 {
795 EuInstructionSources->SetSource1_SourceModifier(srcMod);
796 }
797
798 };
799
800 /// \brief Template specialization for source operand encoder for 3-src instruction
801 /// type in align1 mode, SRC 0
802 ///
803 template<>
804 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC, 0>
805 {
806 public:
807
SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC * EuInstructionSources,G9HDL::HORZSTRIDE stride)808 static void SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC *EuInstructionSources, G9HDL::HORZSTRIDE stride)
809 {
810 EuInstructionSources->SetSource0HorizontalStride(stride);
811 }
SetSourceVerticalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC * EuInstructionSources,G9HDL::TERNARYALIGN1VERTSTRIDE vertStride)812 static void SetSourceVerticalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC *EuInstructionSources, G9HDL::TERNARYALIGN1VERTSTRIDE vertStride)
813 {
814 EuInstructionSources->SetSource0VerticalStride(vertStride);
815 }
816 };
817
818 /// \brief Template specialization for source operand encoder for 3-src instruction
819 /// type in align1 mode, SRC 1
820 ///
821 template<>
822 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC, 1>
823 {
824 public:
825
SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC * EuInstructionSources,G9HDL::HORZSTRIDE stride)826 static void SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC *EuInstructionSources, G9HDL::HORZSTRIDE stride)
827 {
828 EuInstructionSources->SetSource1HorizontalStride(stride);
829 }
SetSourceVerticalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC * EuInstructionSources,G9HDL::TERNARYALIGN1VERTSTRIDE vertStride)830 static void SetSourceVerticalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC *EuInstructionSources, G9HDL::TERNARYALIGN1VERTSTRIDE vertStride)
831 {
832 EuInstructionSources->SetSource1VerticalStride(vertStride);
833 }
834
835 };
836
837 /// \brief Template specialization for source operand encoder for 3-src instruction
838 /// type in align1 mode, SRC 2
839 ///
840 template<>
841 class SrcOperandEncoder<G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC, 2>
842 {
843 public:
844
SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC * EuInstructionSources,G9HDL::HORZSTRIDE stride)845 static void SetSourceHorizontalStride(G9HDL::EU_INSTRUCTION_ALIGN1_THREE_SRC *EuInstructionSources, G9HDL::HORZSTRIDE stride)
846 {
847 EuInstructionSources->SetSource2HorizontalStride(stride);
848 }
849 };
850
851
852 /// \brief Template-based builder for source instruction fields.
853 ///
854 /// Builder is parametrized by two template parameters, one of which
855 /// is the type of the auto-generated header class, and other is source
856 /// number that is to be encoded
857 template<typename T, int SrcNum>
858 class SrcBuilder
859 {
860 public:
861
862 /// \brief Template based field encoder for Src[SrcNum].AddrMode
863 ///
EncodeSrcAddrMode(T * EuInstructionSources,G4_INST * inst,G4_Operand * src0)864 static void EncodeSrcAddrMode(T *EuInstructionSources,
865 G4_INST* inst,
866 G4_Operand *src0)
867 {
868 if (src0->asSrcRegRegion()->getRegAccess() == Direct)
869 {
870 SrcOperandEncoder<T,SrcNum>::
871 SetSourceAddressingMode(EuInstructionSources, G9HDL::ADDRMODE_DIRECT);
872 } else {
873 SrcOperandEncoder<T,SrcNum>::
874 SetSourceAddressingMode(EuInstructionSources, G9HDL::ADDRMODE_INDIRECT);
875 }
876 }
877
878 //////////////////////////////////////////////////////////////////////////
879 /// \brief Template based field encoder for RegNum field for 3src instruction types
880 ///
EncodeSrcRegNum3Src(G4_INST * inst,G4_Operand * src0,T & sourcesReg)881 static void EncodeSrcRegNum3Src(
882 G4_INST* inst,
883 G4_Operand *src0,
884 T& sourcesReg)
885 {
886 if (EncodingHelper::GetSrcRegFile(src0) != REG_FILE_A &&
887 EncodingHelper::GetSrcAddrMode(src0) == ADDR_MODE_IMMED)
888 {
889 uint32_t byteAddress = src0->getLinearizedStart();
890
891 //repCtrl is only set for 3src instructions
892 //if (inst->isAligned1Inst() || repControl)
893 //TODO: how do we understand this commented line (from original EncodeSrc0RegNum) ?
894 // in 3src, bits 83 - 73 encode (73-75):3 subreg, and (76-83):8 bits regnum, dword aligned
895 if (inst->isAligned1Inst())
896 {
897 MUST_BE_TRUE(false, "align1 not allowed for 3src instructions");
898 } else { //align 16
899 //register number: 256 bit (32 byte) aligned part of an address
900 //sub-register number: first/second 16 byte part of 32 byte address. Encoded with 1 bit.
901 // 9876543210
902 // regn|xxxy0
903 //dword aligned
904
905 SrcOperandEncoder<T, SrcNum>::SetSourceRegisterNumber (&sourcesReg, byteAddress >> 5);
906 //it will be shifted to right within setter method
907 SrcOperandEncoder<T, SrcNum>::SetSourceSubregisterNumber42 (&sourcesReg, byteAddress & 0x1f);
908 SrcOperandEncoder<T, SrcNum>::SetSourceSubregisterNumber1 (&sourcesReg, (byteAddress >> 1) & 0x1);
909 }
910 }
911 }
912
913 //////////////////////////////////////////////////////////////////////////
914 /// \brief Template based field encoder for replicate control field
915 /// of 3src instruction types
916 ///
Encode3SrcReplicateControl(T * myBin,G4_SrcRegRegion * srcRegion)917 static void Encode3SrcReplicateControl(
918 T *myBin,
919 G4_SrcRegRegion *srcRegion)
920 {
921 const char *swizzle = srcRegion->getSwizzle();
922 if (swizzle[0] == 'r')
923 SrcOperandEncoder<T, SrcNum>::SrcReplicateControl(myBin, G9HDL::REPCTRL_REPLICATE_ACROSS_ALL_CHANNELS);
924 else
925 SrcOperandEncoder<T, SrcNum>::SrcReplicateControl(myBin, G9HDL::REPCTRL_NO_REPLICATION);
926 }
927
928 //////////////////////////////////////////////////////////////////////////
929 /// \brief Template based field encoder for ChanSel
930 ///
EncodeSrcChanSelect(T * myBin,G4_INST * inst,G4_Operand * src0,G4_SrcRegRegion * srcRegion)931 static void EncodeSrcChanSelect(
932 T *myBin,
933 G4_INST* inst,
934 G4_Operand *src0,
935 G4_SrcRegRegion *srcRegion)
936 {
937 bool ChanSelectValid = false;
938
939 // encode acc2~acc9 if it is valid
940 if (src0->isAccRegValid() && inst->getPlatform() < GENX_ICLLP)
941 {
942 if (inst->opcode() == G4_madm ||
943 (inst->isMath() && (inst->asMathInst()->getMathCtrl() == MATH_INVM || inst->asMathInst()->getMathCtrl() == MATH_RSQRTM)))
944 {
945 uint32_t value = src0->getAccRegSel();
946 SrcOperandEncoder<T, SrcNum>::SetSrcChanSel(myBin, value);
947 return;
948 }
949 ASSERT_USER(false, "acc2~acc7 were set on wrong instruction");
950 }
951
952 const char *swizzle = srcRegion->getSwizzle();
953 if (swizzle[0] != '\0' && swizzle[0] != 'r') {
954 ChanSelectValid = true;
955 ChanSel ch0 = EncodingHelper::GetSrcChannelSelectValue(srcRegion, 0);
956 ChanSel ch1 = EncodingHelper::GetSrcChannelSelectValue(srcRegion, 1);
957 ChanSel ch2 = EncodingHelper::GetSrcChannelSelectValue(srcRegion, 2);
958 ChanSel ch3 = EncodingHelper::GetSrcChannelSelectValue(srcRegion, 3);
959 uint32_t value = 0;
960
961 if (ch0 != CHAN_SEL_UNDEF)
962 value = ch0;
963 if (ch1 != CHAN_SEL_UNDEF)
964 value = value | (ch1 << 2);
965
966 uint32_t value2 = 0;
967
968 //value = 0;
969 if (ch2 != CHAN_SEL_UNDEF)
970 value2 = ch2;
971 if (ch3 != CHAN_SEL_UNDEF)
972 value2 = value2 | (ch3 << 2);
973
974 SrcOperandEncoder<T, SrcNum>::SetSrcChanSel(myBin, value | (value2 << 4));
975 }
976
977 if (!ChanSelectValid &
978 inst->isAligned16Inst())
979 {
980 uint32_t value = 0;
981 value = CHAN_SEL_X;
982 value = value | (CHAN_SEL_Y << 2);
983
984 uint32_t value2 = 0;
985 //value = 0;
986 value2 = CHAN_SEL_Z;
987 value2 = value2 | (CHAN_SEL_W << 2);
988
989 SrcOperandEncoder<T, SrcNum>::SetSrcChanSel(myBin, value | (value2 << 4));
990 }
991 }
992
993 //////////////////////////////////////////////////////////////////////////
994 /// \brief Template based field encoder for SrcMod
995 ///
EncodeSrcModifier(G4_INST * inst,G4_Operand * src0,T & sourcesReg)996 static void EncodeSrcModifier(
997 G4_INST* inst,
998 G4_Operand *src0,
999 T& sourcesReg)
1000 {
1001 G4_SrcRegRegion *srcRegion = src0->asSrcRegRegion();
1002 {
1003 SrcOperandEncoder<T, SrcNum>::
1004 SetSourceModifier(&sourcesReg, BinaryEncodingCNL::GetSrcHLDMod(srcRegion));
1005 }
1006 }
1007
1008 //////////////////////////////////////////////////////////////////////////
1009 /// \brief Template based field encoder for Src[SrcNum].Width
1010 ///
EncodeSrcWidth(G4_INST * inst,T * mybin,const RegionDesc * rd,G4_Operand * src)1011 static bool EncodeSrcWidth(
1012 G4_INST *inst, T *mybin, const RegionDesc *rd, G4_Operand *src)
1013 {
1014 bool WidthValid = false;
1015 if (inst->isAligned16Inst()) return false;
1016
1017 if (rd)
1018 {
1019 if (rd->width != UNDEFINED_SHORT)
1020 {
1021 WidthValid = true;
1022 }
1023
1024 switch (rd->width)
1025 {
1026 case 1:
1027 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_1_ELEMENTS);
1028 break;
1029 case 2:
1030 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_2_ELEMENTS);
1031 break;
1032 case 4:
1033 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_4_ELEMENTS);
1034 break;
1035 case 8:
1036 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_8_ELEMENTS);
1037 break;
1038 case 16:
1039 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_16_ELEMENTS);
1040 break;
1041 case UNDEFINED_SHORT: break;
1042 default: MUST_BE_TRUE(false, "wrong width for src0!"); break;
1043 }
1044
1045 }
1046
1047 // apply default width
1048 if (!WidthValid)
1049 {
1050 if (EncodingHelper::isSrcSubRegNumValid(src))
1051 {
1052 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_1_ELEMENTS);
1053 }
1054 else
1055 {
1056 switch (GetEncodeExecSize(inst))
1057 {
1058 case ES_1_CHANNEL:
1059 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_1_ELEMENTS);
1060 break;
1061 case ES_2_CHANNELS:
1062 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_2_ELEMENTS);
1063 break;
1064 case ES_4_CHANNELS:
1065 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_4_ELEMENTS);
1066 break;
1067 case ES_8_CHANNELS:
1068 case ES_16_CHANNELS:
1069 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_8_ELEMENTS);
1070 break;
1071 case ES_32_CHANNELS:
1072 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(mybin, G9HDL::WIDTH_16_ELEMENTS);
1073 break;
1074 }
1075 }
1076 }
1077
1078 return WidthValid;
1079 }
1080
1081 //////////////////////////////////////////////////////////////////////////
1082 /// \brief Template based field encoder for Src[SrcNum].HorzStride
1083 ///
EncodeSrcHorzStride(G4_INST * inst,T * mybin,const RegionDesc * rd,G4_Operand * src0)1084 static bool EncodeSrcHorzStride(
1085 G4_INST *inst, T *mybin, const RegionDesc *rd, G4_Operand *src0)
1086 {
1087 // For Align16 instruction (SIMD4), treat <HorzStride> as <VertStride>
1088 // For Align16 source operand disable HorzStride
1089 bool HorzStrideValid = false; // undef
1090 if (inst->isAligned16Inst()) return false;
1091
1092 if (rd) {
1093 if (rd->horzStride != UNDEFINED_SHORT)
1094 {
1095 HorzStrideValid = true;
1096 }
1097 switch (rd->horzStride)
1098 {
1099 case 0:
1100 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_0_ELEMENTS);
1101 break;
1102 case 1:
1103 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_1_ELEMENTS);
1104 break;
1105 case 2:
1106 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_2_ELEMENTS);
1107 break;
1108 case 4:
1109 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_4_ELEMENTS);
1110 break;
1111 case UNDEFINED_SHORT: break;
1112 default: MUST_BE_TRUE(false, "wrong horizontal stride for src0!"); break;
1113 }
1114 }
1115 // apply default horizontal stride
1116 if (!HorzStrideValid)
1117 {
1118 if (EncodingHelper::isSrcSubRegNumValid(src0))
1119 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_0_ELEMENTS);
1120 else {
1121 switch (GetEncodeExecSize(inst))
1122 {
1123 case ES_1_CHANNEL:
1124 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_0_ELEMENTS);
1125 break;
1126 case ES_2_CHANNELS:
1127 case ES_4_CHANNELS:
1128 case ES_8_CHANNELS:
1129 case ES_16_CHANNELS:
1130 case ES_32_CHANNELS:
1131 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(mybin, G9HDL::HORZSTRIDE_1_ELEMENTS);
1132 break;
1133 }
1134 }
1135 } // end of valid horz stride
1136 return HorzStrideValid;
1137 }
1138
1139 //////////////////////////////////////////////////////////////////////////
1140 /// \brief Template based field encoder for Src[SrcNum].VertStride
1141 ///
EncodeSrcVertStride(G4_INST * inst,T * mybin,const RegionDesc * rd,G4_Operand * src0,const bool WidthValid,const bool HorzStrideValid)1142 static void EncodeSrcVertStride(
1143 G4_INST *inst,
1144 T *mybin,
1145 const RegionDesc *rd,
1146 G4_Operand *src0,
1147 const bool WidthValid,
1148 const bool HorzStrideValid)
1149 {
1150 bool VertStrideValid = false; // undef
1151 unsigned short VertStrideValue = UNDEFINED_SHORT, HorzStrideValue = 0;
1152
1153 if (rd)
1154 {
1155 VertStrideValue = rd->vertStride;
1156 HorzStrideValue = rd->horzStride;
1157 if (VertStrideValue != UNDEFINED_SHORT)
1158 {
1159 VertStrideValid = true;
1160 }
1161
1162 switch (VertStrideValue)
1163 {
1164 case 0:
1165 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_0_ELEMENTS);
1166 break;
1167 case 1:
1168 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_1_ELEMENT);
1169 break;
1170 case 2:
1171 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_2_ELEMENTS);
1172 break;
1173 case 4:
1174 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_4_ELEMENTS);
1175 break;
1176 case 8:
1177 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_8_ELEMENTS);
1178 break;
1179 case 16:
1180 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_16_ELEMENTS);
1181 break;
1182 case 32:
1183 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_32_ELEMENTS);
1184 break;
1185 case UNDEFINED_SHORT: break;
1186 default: MUST_BE_TRUE(false, "wrong vertical stride for src0!"); break;
1187 }
1188
1189 }
1190
1191 //apply default vertical stride below
1192 if (!WidthValid &&
1193 !HorzStrideValid &&
1194 !VertStrideValid &&
1195 src0)
1196 {
1197 VertStrideValid = true;
1198 if (EncodingHelper::isSrcSubRegNumValid(src0))
1199 {
1200 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_0_ELEMENTS);
1201 }
1202 else
1203 {
1204 if (inst->isAligned1Inst())
1205 {
1206 switch (GetEncodeExecSize(inst))
1207 {
1208 case ES_1_CHANNEL:
1209 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_0_ELEMENTS);
1210 break;
1211 case ES_2_CHANNELS:
1212 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_2_ELEMENTS);
1213 break;
1214 case ES_4_CHANNELS:
1215 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_4_ELEMENTS);
1216 break;
1217 case ES_8_CHANNELS:
1218 case ES_16_CHANNELS:
1219 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_8_ELEMENTS);
1220 break;
1221 case ES_32_CHANNELS:
1222 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_16_ELEMENTS);
1223 break;
1224 }
1225 }
1226 else
1227 {
1228 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_4_ELEMENTS);
1229 }
1230 }
1231 }
1232
1233 //Do some post processing, if none of the previous cases was true.
1234 if (VertStrideValid) {}
1235 else if (inst->isAligned16Inst())
1236 {
1237 //FIXME: should this be ever valid?
1238 //we cannot be setting horz stride in align16 instructions!!!
1239 if (HorzStrideValid && HorzStrideValue == 0)
1240 {
1241 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_0_ELEMENTS);
1242 }
1243 else if (HorzStrideValid && HorzStrideValue == 4)
1244 {
1245 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_4_ELEMENTS);
1246 }
1247 }
1248 else if (EncodingHelper::GetSrcAddrMode(src0) == ADDR_MODE_INDIR) { //indirect
1249 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(mybin, G9HDL::VERTSTRIDE_VXH_OR_VX1_MODE);
1250 }
1251 }
1252
1253 //////////////////////////////////////////////////////////////////////////
1254 /// \brief Template based field encoder for source immediate based addressing
1255 /// RegNum. It encodes RegNum for non-ARF based register files.
EncodeSrcRegNum(G4_INST * inst,G4_Operand * src0,T & sourcesReg)1256 static void EncodeSrcRegNum(
1257 G4_INST* inst,
1258 G4_Operand *src0,
1259 T& sourcesReg)
1260 {
1261 if (EncodingHelper::GetSrcRegFile(src0) != REG_FILE_A &&
1262 EncodingHelper::GetSrcAddrMode(src0) == ADDR_MODE_IMMED)
1263 {
1264 //bool repControl = EncodingHelper::GetRepControl(src0);
1265 uint32_t byteAddress = src0->getLinearizedStart();
1266
1267 //repCtrl is only set for 3src instructions
1268 //if (inst->isAligned1Inst() || repControl)
1269 //TODO: how do we understand this commented line (from original EncodeSrc0RegNum) ?
1270 // in 3src, bits 83 - 73 encode (73-75):3 subreg, and (76-83):8 bits regnum, dword aligned
1271 if (inst->isAligned1Inst())
1272 {
1273
1274 //register number: 256 bit (32 byte) aligned part of an address
1275 //sub-register number: address (5 bits encoding) within a 32 byte GRF
1276 // 9876543210
1277 // regn|subre
1278
1279 SrcOperandEncoder<T, SrcNum>::SetSourceRegisterNumber (&sourcesReg, byteAddress >> 5);
1280 if (inst->getPlatform() >= GENX_ICLLP && src0->isAccRegValid())
1281 {
1282 MUST_BE_TRUE((byteAddress & 0x1F) == 0, "subreg must be 0 for source with special accumulator");
1283 SrcOperandEncoder<T, SrcNum>::SetSourceSpecialAcc(&sourcesReg, src0->getAccRegSel());
1284 }
1285 else
1286 {
1287 SrcOperandEncoder<T, SrcNum>::SetSourceSubRegisterNumber (&sourcesReg, byteAddress & 0x1F);
1288 }
1289 } else { //align 16
1290 //register number: 256 bit (32 byte) aligned part of an address
1291 //sub-register number: first/second 16 byte part of 32 byte address. Encoded with 1 bit.
1292 // 9876543210
1293 // regn|x0000
1294
1295 SrcOperandEncoder<T, SrcNum>::SetSourceRegisterNumber (&sourcesReg, byteAddress >> 5);
1296 SrcOperandEncoder<T, SrcNum>::SetSourceSubregisterNumber44 (&sourcesReg, (byteAddress >> 4) & 0x1);
1297 }
1298 }
1299 }
1300
1301 //////////////////////////////////////////////////////////////////////////
1302 /// \brief Template based field encoder for source architecture RegNum and SubRegNum encoding
1303 ///
1304 /// essentially, this encoding is split in three parts:
1305 /// setting reg num : arch reg file + arch reg number
1306 /// setting sub-reg-num
1307 /// here, we fuse two original methods into one: EncodeDstArchRegNum and EncodeDstRegFile for ARF
EncodeSrcArchRegNum(G4_INST * inst,G4_SrcRegRegion * src,T & sourcesReg)1308 static void EncodeSrcArchRegNum(
1309 G4_INST* inst,
1310 G4_SrcRegRegion *src,
1311 T& sourcesReg)
1312 {
1313 if (EncodingHelper::GetSrcRegFile(src) == REG_FILE_A &&
1314 EncodingHelper::GetSrcAddrMode(src) == ADDR_MODE_IMMED)
1315 {
1316 if (EncodingHelper::GetSrcArchRegType(src) != ARCH_REG_FILE_NULL)
1317 {
1318 //EncodeSrc0RegFile, SetSrc0ArchRegFile- corresponding functionality
1319 bool valid;
1320
1321 unsigned short RegFile = (unsigned short)EncodingHelper::GetSrcArchRegType(src); //4 bits
1322 unsigned short RegNumValue = src->ExRegNum(valid);
1323
1324 // 7654|3210
1325 // RegF|RegNumVal
1326 unsigned short EncodedRegNum = RegFile << 4;
1327 EncodedRegNum = EncodedRegNum | (RegNumValue & 0xF);
1328
1329 //encode 'packed' arch reg file + reg number. Both for align16 and align1, immediate mode.
1330 SrcOperandEncoder<T, SrcNum>::SetSourceRegisterNumber (&sourcesReg, EncodedRegNum);
1331
1332 bool subValid;
1333 unsigned short RegSubNumValue = src->ExSubRegNum(subValid);
1334 unsigned short ElementSizeValue = EncodingHelper::GetElementSizeValue(src);
1335 uint32_t regOffset = RegSubNumValue * ElementSizeValue;
1336
1337 if (inst->isAligned1Inst())
1338 {
1339 //sub-register number: 32 byte address (5 bits encoding) within a GRF
1340 SrcOperandEncoder<T, SrcNum>::SetSourceSubRegisterNumber (&sourcesReg,regOffset);
1341 } else { //align 16
1342 //sub-register number: first/second 16 byte part of 32 byte address. Encoded with 1 bit.
1343 // 9876543210
1344 // regn|x0000
1345 SrcOperandEncoder<T, SrcNum>::SetSourceSubregisterNumber44 (&sourcesReg, (regOffset >> 4) & 0x1);
1346 }
1347 }
1348 }
1349 }
1350
1351 //////////////////////////////////////////////////////////////////////////
1352 /// \brief Template based field encoder for source indirect RegNum and SubRegNum encoding
1353 ///
1354 /// Essentially it sets address subregister number alltogether with immediate offset
EncodeSrcIndirectRegNum(G4_INST * inst,G4_SrcRegRegion * src,T & sourcesReg)1355 static void EncodeSrcIndirectRegNum(
1356 G4_INST* inst,
1357 G4_SrcRegRegion *src,
1358 T& sourcesReg)
1359 {
1360 if (EncodingHelper::GetSrcRegFile(src)==REG_FILE_R)
1361 {
1362 if (EncodingHelper::GetSrcAddrMode(src) == ADDR_MODE_INDIR)
1363 { // Indirect
1364 bool subValid;
1365 unsigned short IndAddrRegSubNumValue = 0;
1366 short IndAddrImmedValue = 0;
1367
1368 IndAddrRegSubNumValue = src->ExIndSubRegNum(subValid);
1369 IndAddrImmedValue = src->ExIndImmVal();
1370
1371 //SetSrc0IdxRegNum(mybin, IndAddrRegSubNumValue);
1372 //the same is for align16
1373 SrcOperandEncoder<T, SrcNum>::SetAddressSubregisterNumber(&sourcesReg, IndAddrRegSubNumValue);
1374
1375 /* Set the indirect address immediate value. */
1376 if (inst->isAligned1Inst())
1377 {
1378 //bits [0-8]
1379 SrcOperandEncoder<T, SrcNum>::SetSourceAddressImmediate90(&sourcesReg, IndAddrImmedValue);
1380 } else { //here we are setting align16
1381 //bits [4-8]
1382 SrcOperandEncoder<T, SrcNum>::SetSourceAddressImmediate84(&sourcesReg, IndAddrImmedValue / BYTES_PER_OWORD);
1383 }
1384 }
1385 }
1386 }
1387
1388 //////////////////////////////////////////////////////////////////////////
1389 /// \brief Template based aggregate encoder for all source related
1390 /// fields (width,stride, regnum, modifier, chan-sel) for both align1 and
1391 /// align16 modes.
EncodeEuInstructionSourcesReg(G4_INST * inst,G4_Operand * src,T & sourcesReg)1392 static void EncodeEuInstructionSourcesReg(
1393 G4_INST* inst,
1394 G4_Operand *src,
1395 T& sourcesReg)
1396 {
1397 if (src->isSrcRegRegion())
1398 {
1399 G4_SrcRegRegion *srcRegion = src->asSrcRegRegion();
1400 const RegionDesc *rd = srcRegion->getRegion();
1401
1402 SrcBuilder<T, SrcNum>::EncodeSrcAddrMode(&sourcesReg, inst, src);
1403 if (inst->isAligned16Inst())
1404 {
1405 SrcBuilder<T, SrcNum>::EncodeSrcChanSelect(&sourcesReg, inst, src, srcRegion);
1406 }
1407 SrcBuilder<T, SrcNum>::EncodeSrcModifier(inst, src, sourcesReg);
1408 if (!inst->isSend())
1409 {
1410 bool WidthValid =
1411 SrcBuilder<T, SrcNum>::EncodeSrcWidth(inst, &sourcesReg, rd, src);
1412 bool HorzStrideValid = SrcBuilder<T, SrcNum>::EncodeSrcHorzStride(inst, &sourcesReg, rd, src);
1413 SrcBuilder<T, SrcNum>::EncodeSrcVertStride(inst, &sourcesReg, rd, src, WidthValid, HorzStrideValid);
1414 }
1415 SrcBuilder<T, SrcNum>::EncodeSrcRegNum(inst, src, sourcesReg);
1416 SrcBuilder<T, SrcNum>::EncodeSrcArchRegNum(inst, src->asSrcRegRegion(), sourcesReg);
1417 SrcBuilder<T, SrcNum>::EncodeSrcIndirectRegNum(inst, src->asSrcRegRegion(), sourcesReg);
1418 } //if
1419 }
1420
1421 //////////////////////////////////////////////////////////////////////////
1422 /// \brief Template based sets NULL Register for source.
EncodeEuInstructionNullSourcesReg(G4_INST * inst,G4_Operand * src,T & sourcesReg)1423 static void EncodeEuInstructionNullSourcesReg(
1424 G4_INST* inst,
1425 G4_Operand *src,
1426 T& sourcesReg)
1427 {
1428 if (src->isSrcRegRegion())
1429 {
1430 SrcOperandEncoder<T, SrcNum>::SetSourceAddressingMode(&sourcesReg, G9HDL::ADDRMODE_DIRECT);
1431
1432 SrcOperandEncoder<T, SrcNum>::SetSourceWidth(&sourcesReg, G9HDL::WIDTH_1_ELEMENTS);
1433 SrcOperandEncoder<T, SrcNum>::SetSourceHorizontalStride(&sourcesReg, G9HDL::HORZSTRIDE_0_ELEMENTS);
1434 SrcOperandEncoder<T, SrcNum>::SetSourceVerticalStride(&sourcesReg, G9HDL::VERTSTRIDE_0_ELEMENTS);
1435 }
1436 else
1437 {
1438 ASSERT_USER(false, "Invalid NULL register source.");
1439 }
1440 }
1441
1442 //////////////////////////////////////////////////////////////////////////
1443 /// \brief Template based field encoder for encoding source immediate 32 bit data
1444 ///
EncodeSrcImmData(T & immSource,G4_Operand * src)1445 static void EncodeSrcImmData(
1446 T& immSource, G4_Operand *src)
1447 {
1448
1449 G4_Imm *isrc = (G4_Imm *)src->asImm();
1450 if ( IS_WTYPE(src->getType()))
1451 {
1452 uint32_t val = (uint32_t) isrc->getInt();
1453 uint32_t data = (val << 16) | (val & 0xffff);
1454 SrcOperandEncoder<T, SrcNum>::
1455 SetSourceImmediateData(&immSource, data);
1456 }
1457 else if (src->getType() == Type_F)
1458 {
1459 float val = (float)(isrc->getFloat());
1460 SrcOperandEncoder<T, SrcNum>::
1461 SetSourceImmediateData(&immSource, *(uint32_t*)&(val));
1462
1463 } else {
1464 SrcOperandEncoder<T, SrcNum>::
1465 SetSourceImmediateData(&immSource, (uint32_t)isrc->getInt());
1466 }
1467 }
1468 };
1469 }
EncodeSrcImm64Data(G9HDL::EU_INSTRUCTION_IMM64_SRC & imm64SourceInstruction,vISA::G4_Operand * src)1470 inline void vISA::BinaryEncodingCNL::EncodeSrcImm64Data(
1471 G9HDL::EU_INSTRUCTION_IMM64_SRC& imm64SourceInstruction, vISA::G4_Operand *src)
1472 {
1473
1474 vISA::G4_Imm *isrc = (vISA::G4_Imm *)src->asImm();
1475
1476 if (src->getType() == Type_DF)
1477 {
1478 imm64SourceInstruction.SetSource((uint64_t)isrc->getImm());
1479 }
1480 else if (src->getType() == Type_Q || src->getType() == Type_UQ)
1481 {
1482 //Q/UQ immediates must be the only source
1483 int64_t val = isrc->getInt();
1484 imm64SourceInstruction.SetSource(*(uint64_t*)&(val));
1485 }
1486 }
1487
1488 #pragma pack(pop)
1489
1490 #endif
1491