1 /*===---- cpuid.h - X86 cpu model detection --------------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10 #if !(__x86_64__ || __i386__)
11 #error this header is for x86 only
12 #endif
13
14 /* Responses identification request with %eax 0 */
15 /* AMD: "AuthenticAMD" */
16 #define signature_AMD_ebx 0x68747541
17 #define signature_AMD_edx 0x69746e65
18 #define signature_AMD_ecx 0x444d4163
19 /* CENTAUR: "CentaurHauls" */
20 #define signature_CENTAUR_ebx 0x746e6543
21 #define signature_CENTAUR_edx 0x48727561
22 #define signature_CENTAUR_ecx 0x736c7561
23 /* CYRIX: "CyrixInstead" */
24 #define signature_CYRIX_ebx 0x69727943
25 #define signature_CYRIX_edx 0x736e4978
26 #define signature_CYRIX_ecx 0x64616574
27 /* HYGON: "HygonGenuine" */
28 #define signature_HYGON_ebx 0x6f677948
29 #define signature_HYGON_edx 0x6e65476e
30 #define signature_HYGON_ecx 0x656e6975
31 /* INTEL: "GenuineIntel" */
32 #define signature_INTEL_ebx 0x756e6547
33 #define signature_INTEL_edx 0x49656e69
34 #define signature_INTEL_ecx 0x6c65746e
35 /* TM1: "TransmetaCPU" */
36 #define signature_TM1_ebx 0x6e617254
37 #define signature_TM1_edx 0x74656d73
38 #define signature_TM1_ecx 0x55504361
39 /* TM2: "GenuineTMx86" */
40 #define signature_TM2_ebx 0x756e6547
41 #define signature_TM2_edx 0x54656e69
42 #define signature_TM2_ecx 0x3638784d
43 /* NSC: "Geode by NSC" */
44 #define signature_NSC_ebx 0x646f6547
45 #define signature_NSC_edx 0x79622065
46 #define signature_NSC_ecx 0x43534e20
47 /* NEXGEN: "NexGenDriven" */
48 #define signature_NEXGEN_ebx 0x4778654e
49 #define signature_NEXGEN_edx 0x72446e65
50 #define signature_NEXGEN_ecx 0x6e657669
51 /* RISE: "RiseRiseRise" */
52 #define signature_RISE_ebx 0x65736952
53 #define signature_RISE_edx 0x65736952
54 #define signature_RISE_ecx 0x65736952
55 /* SIS: "SiS SiS SiS " */
56 #define signature_SIS_ebx 0x20536953
57 #define signature_SIS_edx 0x20536953
58 #define signature_SIS_ecx 0x20536953
59 /* UMC: "UMC UMC UMC " */
60 #define signature_UMC_ebx 0x20434d55
61 #define signature_UMC_edx 0x20434d55
62 #define signature_UMC_ecx 0x20434d55
63 /* VIA: "VIA VIA VIA " */
64 #define signature_VIA_ebx 0x20414956
65 #define signature_VIA_edx 0x20414956
66 #define signature_VIA_ecx 0x20414956
67 /* VORTEX: "Vortex86 SoC" */
68 #define signature_VORTEX_ebx 0x74726f56
69 #define signature_VORTEX_edx 0x36387865
70 #define signature_VORTEX_ecx 0x436f5320
71
72 /* Features in %ecx for leaf 1 */
73 #define bit_SSE3 0x00000001
74 #define bit_PCLMULQDQ 0x00000002
75 #define bit_PCLMUL bit_PCLMULQDQ /* for gcc compat */
76 #define bit_DTES64 0x00000004
77 #define bit_MONITOR 0x00000008
78 #define bit_DSCPL 0x00000010
79 #define bit_VMX 0x00000020
80 #define bit_SMX 0x00000040
81 #define bit_EIST 0x00000080
82 #define bit_TM2 0x00000100
83 #define bit_SSSE3 0x00000200
84 #define bit_CNXTID 0x00000400
85 #define bit_FMA 0x00001000
86 #define bit_CMPXCHG16B 0x00002000
87 #define bit_xTPR 0x00004000
88 #define bit_PDCM 0x00008000
89 #define bit_PCID 0x00020000
90 #define bit_DCA 0x00040000
91 #define bit_SSE41 0x00080000
92 #define bit_SSE4_1 bit_SSE41 /* for gcc compat */
93 #define bit_SSE42 0x00100000
94 #define bit_SSE4_2 bit_SSE42 /* for gcc compat */
95 #define bit_x2APIC 0x00200000
96 #define bit_MOVBE 0x00400000
97 #define bit_POPCNT 0x00800000
98 #define bit_TSCDeadline 0x01000000
99 #define bit_AESNI 0x02000000
100 #define bit_AES bit_AESNI /* for gcc compat */
101 #define bit_XSAVE 0x04000000
102 #define bit_OSXSAVE 0x08000000
103 #define bit_AVX 0x10000000
104 #define bit_F16C 0x20000000
105 #define bit_RDRND 0x40000000
106
107 /* Features in %edx for leaf 1 */
108 #define bit_FPU 0x00000001
109 #define bit_VME 0x00000002
110 #define bit_DE 0x00000004
111 #define bit_PSE 0x00000008
112 #define bit_TSC 0x00000010
113 #define bit_MSR 0x00000020
114 #define bit_PAE 0x00000040
115 #define bit_MCE 0x00000080
116 #define bit_CX8 0x00000100
117 #define bit_CMPXCHG8B bit_CX8 /* for gcc compat */
118 #define bit_APIC 0x00000200
119 #define bit_SEP 0x00000800
120 #define bit_MTRR 0x00001000
121 #define bit_PGE 0x00002000
122 #define bit_MCA 0x00004000
123 #define bit_CMOV 0x00008000
124 #define bit_PAT 0x00010000
125 #define bit_PSE36 0x00020000
126 #define bit_PSN 0x00040000
127 #define bit_CLFSH 0x00080000
128 #define bit_DS 0x00200000
129 #define bit_ACPI 0x00400000
130 #define bit_MMX 0x00800000
131 #define bit_FXSR 0x01000000
132 #define bit_FXSAVE bit_FXSR /* for gcc compat */
133 #define bit_SSE 0x02000000
134 #define bit_SSE2 0x04000000
135 #define bit_SS 0x08000000
136 #define bit_HTT 0x10000000
137 #define bit_TM 0x20000000
138 #define bit_PBE 0x80000000
139
140 /* Features in %ebx for leaf 7 sub-leaf 0 */
141 #define bit_FSGSBASE 0x00000001
142 #define bit_SGX 0x00000004
143 #define bit_BMI 0x00000008
144 #define bit_HLE 0x00000010
145 #define bit_AVX2 0x00000020
146 #define bit_SMEP 0x00000080
147 #define bit_BMI2 0x00000100
148 #define bit_ENH_MOVSB 0x00000200
149 #define bit_INVPCID 0x00000400
150 #define bit_RTM 0x00000800
151 #define bit_MPX 0x00004000
152 #define bit_AVX512F 0x00010000
153 #define bit_AVX512DQ 0x00020000
154 #define bit_RDSEED 0x00040000
155 #define bit_ADX 0x00080000
156 #define bit_AVX512IFMA 0x00200000
157 #define bit_CLFLUSHOPT 0x00800000
158 #define bit_CLWB 0x01000000
159 #define bit_AVX512PF 0x04000000
160 #define bit_AVX512ER 0x08000000
161 #define bit_AVX512CD 0x10000000
162 #define bit_SHA 0x20000000
163 #define bit_AVX512BW 0x40000000
164 #define bit_AVX512VL 0x80000000
165
166 /* Features in %ecx for leaf 7 sub-leaf 0 */
167 #define bit_PREFTCHWT1 0x00000001
168 #define bit_AVX512VBMI 0x00000002
169 #define bit_PKU 0x00000004
170 #define bit_OSPKE 0x00000010
171 #define bit_WAITPKG 0x00000020
172 #define bit_AVX512VBMI2 0x00000040
173 #define bit_SHSTK 0x00000080
174 #define bit_GFNI 0x00000100
175 #define bit_VAES 0x00000200
176 #define bit_VPCLMULQDQ 0x00000400
177 #define bit_AVX512VNNI 0x00000800
178 #define bit_AVX512BITALG 0x00001000
179 #define bit_AVX512VPOPCNTDQ 0x00004000
180 #define bit_RDPID 0x00400000
181 #define bit_CLDEMOTE 0x02000000
182 #define bit_MOVDIRI 0x08000000
183 #define bit_MOVDIR64B 0x10000000
184 #define bit_ENQCMD 0x20000000
185
186 /* Features in %edx for leaf 7 sub-leaf 0 */
187 #define bit_AVX5124VNNIW 0x00000004
188 #define bit_AVX5124FMAPS 0x00000008
189 #define bit_SERIALIZE 0x00004000
190 #define bit_TSXLDTRK 0x00010000
191 #define bit_PCONFIG 0x00040000
192 #define bit_IBT 0x00100000
193 #define bit_AMXBF16 0x00400000
194 #define bit_AMXTILE 0x01000000
195 #define bit_AMXINT8 0x02000000
196
197 /* Features in %eax for leaf 7 sub-leaf 1 */
198 #define bit_AVX512BF16 0x00000020
199
200 /* Features in %eax for leaf 13 sub-leaf 1 */
201 #define bit_XSAVEOPT 0x00000001
202 #define bit_XSAVEC 0x00000002
203 #define bit_XSAVES 0x00000008
204
205 /* Features in %eax for leaf 0x14 sub-leaf 0 */
206 #define bit_PTWRITE 0x00000010
207
208 /* Features in %ecx for leaf 0x80000001 */
209 #define bit_LAHF_LM 0x00000001
210 #define bit_ABM 0x00000020
211 #define bit_LZCNT bit_ABM /* for gcc compat */
212 #define bit_SSE4a 0x00000040
213 #define bit_PRFCHW 0x00000100
214 #define bit_XOP 0x00000800
215 #define bit_LWP 0x00008000
216 #define bit_FMA4 0x00010000
217 #define bit_TBM 0x00200000
218 #define bit_MWAITX 0x20000000
219
220 /* Features in %edx for leaf 0x80000001 */
221 #define bit_MMXEXT 0x00400000
222 #define bit_LM 0x20000000
223 #define bit_3DNOWP 0x40000000
224 #define bit_3DNOW 0x80000000
225
226 /* Features in %ebx for leaf 0x80000008 */
227 #define bit_CLZERO 0x00000001
228 #define bit_WBNOINVD 0x00000200
229
230
231 #if __i386__
232 #define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
233 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
234 : "0"(__leaf))
235
236 #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
237 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
238 : "0"(__leaf), "2"(__count))
239 #else
240 /* x86-64 uses %rbx as the base register, so preserve it. */
241 #define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
242 __asm(" xchgq %%rbx,%q1\n" \
243 " cpuid\n" \
244 " xchgq %%rbx,%q1" \
245 : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
246 : "0"(__leaf))
247
248 #define __cpuid_count(__leaf, __count, __eax, __ebx, __ecx, __edx) \
249 __asm(" xchgq %%rbx,%q1\n" \
250 " cpuid\n" \
251 " xchgq %%rbx,%q1" \
252 : "=a"(__eax), "=r" (__ebx), "=c"(__ecx), "=d"(__edx) \
253 : "0"(__leaf), "2"(__count))
254 #endif
255
__get_cpuid_max(unsigned int __leaf,unsigned int * __sig)256 static __inline int __get_cpuid_max (unsigned int __leaf, unsigned int *__sig)
257 {
258 unsigned int __eax, __ebx, __ecx, __edx;
259 #if __i386__
260 int __cpuid_supported;
261
262 __asm(" pushfl\n"
263 " popl %%eax\n"
264 " movl %%eax,%%ecx\n"
265 " xorl $0x00200000,%%eax\n"
266 " pushl %%eax\n"
267 " popfl\n"
268 " pushfl\n"
269 " popl %%eax\n"
270 " movl $0,%0\n"
271 " cmpl %%eax,%%ecx\n"
272 " je 1f\n"
273 " movl $1,%0\n"
274 "1:"
275 : "=r" (__cpuid_supported) : : "eax", "ecx");
276 if (!__cpuid_supported)
277 return 0;
278 #endif
279
280 __cpuid(__leaf, __eax, __ebx, __ecx, __edx);
281 if (__sig)
282 *__sig = __ebx;
283 return __eax;
284 }
285
__get_cpuid(unsigned int __leaf,unsigned int * __eax,unsigned int * __ebx,unsigned int * __ecx,unsigned int * __edx)286 static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,
287 unsigned int *__ebx, unsigned int *__ecx,
288 unsigned int *__edx)
289 {
290 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
291
292 if (__max_leaf == 0 || __max_leaf < __leaf)
293 return 0;
294
295 __cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx);
296 return 1;
297 }
298
__get_cpuid_count(unsigned int __leaf,unsigned int __subleaf,unsigned int * __eax,unsigned int * __ebx,unsigned int * __ecx,unsigned int * __edx)299 static __inline int __get_cpuid_count (unsigned int __leaf,
300 unsigned int __subleaf,
301 unsigned int *__eax, unsigned int *__ebx,
302 unsigned int *__ecx, unsigned int *__edx)
303 {
304 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, 0);
305
306 if (__max_leaf == 0 || __max_leaf < __leaf)
307 return 0;
308
309 __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
310 return 1;
311 }
312