1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s 3 4--- 5name: smed3_s32_vvv 6legalized: true 7regBankSelected: true 8 9body: | 10 bb.0: 11 liveins: $vgpr0, $vgpr1, $vgpr2 12 13 ; GFX6-LABEL: name: smed3_s32_vvv 14 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 15 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 16 ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 17 ; GFX6: [[V_MED3_I32_:%[0-9]+]]:vgpr_32 = V_MED3_I32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec 18 ; GFX6: S_ENDPGM 0, implicit [[V_MED3_I32_]] 19 %0:vgpr(s32) = COPY $vgpr0 20 %1:vgpr(s32) = COPY $vgpr1 21 %2:vgpr(s32) = COPY $vgpr2 22 %3:vgpr(s32) = G_SMAX %0, %1 23 %4:vgpr(s32) = G_SMIN %0, %1 24 %5:vgpr(s32) = G_SMAX %4, %2 25 %6:vgpr(s32) = G_SMIN %3, %5 26 S_ENDPGM 0, implicit %6 27... 28 29--- 30 31name: smed3_s32_sss 32legalized: true 33regBankSelected: true 34 35body: | 36 bb.0: 37 liveins: $sgpr0, $sgpr1, $sgpr2 38 39 ; GFX6-LABEL: name: smed3_s32_sss 40 ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 41 ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 42 ; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 43 ; GFX6: [[S_MAX_I32_:%[0-9]+]]:sreg_32 = S_MAX_I32 [[COPY]], [[COPY1]], implicit-def $scc 44 ; GFX6: [[S_MIN_I32_:%[0-9]+]]:sreg_32 = S_MIN_I32 [[COPY]], [[COPY1]], implicit-def $scc 45 ; GFX6: [[S_MAX_I32_1:%[0-9]+]]:sreg_32 = S_MAX_I32 [[S_MIN_I32_]], [[COPY2]], implicit-def $scc 46 ; GFX6: [[S_MIN_I32_1:%[0-9]+]]:sreg_32 = S_MIN_I32 [[S_MAX_I32_]], [[S_MAX_I32_1]], implicit-def $scc 47 ; GFX6: S_ENDPGM 0, implicit [[S_MIN_I32_1]] 48 %0:sgpr(s32) = COPY $sgpr0 49 %1:sgpr(s32) = COPY $sgpr1 50 %2:sgpr(s32) = COPY $sgpr2 51 %3:sgpr(s32) = G_SMAX %0, %1 52 %4:sgpr(s32) = G_SMIN %0, %1 53 %5:sgpr(s32) = G_SMAX %4, %2 54 %6:sgpr(s32) = G_SMIN %3, %5 55 S_ENDPGM 0, implicit %6 56... 57 58--- 59name: smed3_s32_vvv_multiuse0 60legalized: true 61regBankSelected: true 62 63body: | 64 bb.0: 65 liveins: $vgpr0, $vgpr1, $vgpr2 66 67 ; GFX6-LABEL: name: smed3_s32_vvv_multiuse0 68 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 69 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 70 ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 71 ; GFX6: [[V_MAX_I32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[COPY]], [[COPY1]], implicit $exec 72 ; GFX6: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec 73 ; GFX6: [[V_MAX_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[V_MIN_I32_e64_]], [[COPY2]], implicit $exec 74 ; GFX6: [[V_MIN_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[V_MAX_I32_e64_]], [[V_MAX_I32_e64_1]], implicit $exec 75 ; GFX6: S_ENDPGM 0, implicit [[V_MIN_I32_e64_1]], implicit [[V_MAX_I32_e64_]] 76 %0:vgpr(s32) = COPY $vgpr0 77 %1:vgpr(s32) = COPY $vgpr1 78 %2:vgpr(s32) = COPY $vgpr2 79 %3:vgpr(s32) = G_SMAX %0, %1 80 %4:vgpr(s32) = G_SMIN %0, %1 81 %5:vgpr(s32) = G_SMAX %4, %2 82 %6:vgpr(s32) = G_SMIN %3, %5 83 S_ENDPGM 0, implicit %6, implicit %3 84... 85 86--- 87name: smed3_s32_vvv_multiuse1 88legalized: true 89regBankSelected: true 90 91body: | 92 bb.0: 93 liveins: $vgpr0, $vgpr1, $vgpr2 94 95 ; GFX6-LABEL: name: smed3_s32_vvv_multiuse1 96 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 97 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 98 ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 99 ; GFX6: [[V_MAX_I32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[COPY]], [[COPY1]], implicit $exec 100 ; GFX6: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec 101 ; GFX6: [[V_MAX_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[V_MIN_I32_e64_]], [[COPY2]], implicit $exec 102 ; GFX6: [[V_MIN_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[V_MAX_I32_e64_]], [[V_MAX_I32_e64_1]], implicit $exec 103 ; GFX6: S_ENDPGM 0, implicit [[V_MIN_I32_e64_1]], implicit [[V_MIN_I32_e64_]] 104 %0:vgpr(s32) = COPY $vgpr0 105 %1:vgpr(s32) = COPY $vgpr1 106 %2:vgpr(s32) = COPY $vgpr2 107 %3:vgpr(s32) = G_SMAX %0, %1 108 %4:vgpr(s32) = G_SMIN %0, %1 109 %5:vgpr(s32) = G_SMAX %4, %2 110 %6:vgpr(s32) = G_SMIN %3, %5 111 S_ENDPGM 0, implicit %6, implicit %4 112... 113 114--- 115name: smed3_s32_vvv_multiuse2 116legalized: true 117regBankSelected: true 118 119body: | 120 bb.0: 121 liveins: $vgpr0, $vgpr1, $vgpr2 122 123 ; GFX6-LABEL: name: smed3_s32_vvv_multiuse2 124 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 125 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 126 ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 127 ; GFX6: [[V_MAX_I32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[COPY]], [[COPY1]], implicit $exec 128 ; GFX6: [[V_MIN_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[COPY]], [[COPY1]], implicit $exec 129 ; GFX6: [[V_MAX_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_I32_e64 [[V_MIN_I32_e64_]], [[COPY2]], implicit $exec 130 ; GFX6: [[V_MIN_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_I32_e64 [[V_MAX_I32_e64_]], [[V_MAX_I32_e64_1]], implicit $exec 131 ; GFX6: S_ENDPGM 0, implicit [[V_MIN_I32_e64_1]], implicit [[V_MAX_I32_e64_1]] 132 %0:vgpr(s32) = COPY $vgpr0 133 %1:vgpr(s32) = COPY $vgpr1 134 %2:vgpr(s32) = COPY $vgpr2 135 %3:vgpr(s32) = G_SMAX %0, %1 136 %4:vgpr(s32) = G_SMIN %0, %1 137 %5:vgpr(s32) = G_SMAX %4, %2 138 %6:vgpr(s32) = G_SMIN %3, %5 139 S_ENDPGM 0, implicit %6, implicit %5 140... 141