1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s 3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s 4# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s 5# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s 6 7--- 8name: test_load_private_s1_align1 9body: | 10 bb.0: 11 liveins: $vgpr0 12 13 ; SI-LABEL: name: test_load_private_s1_align1 14 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 15 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 16 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 17 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 18 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 19 ; SI: $vgpr0 = COPY [[AND]](s32) 20 ; CI-LABEL: name: test_load_private_s1_align1 21 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 22 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 23 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 24 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 25 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 26 ; CI: $vgpr0 = COPY [[AND]](s32) 27 ; VI-LABEL: name: test_load_private_s1_align1 28 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 29 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 30 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 31 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 32 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 33 ; VI: $vgpr0 = COPY [[AND]](s32) 34 ; GFX9-LABEL: name: test_load_private_s1_align1 35 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 36 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 37 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 38 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 39 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 40 ; GFX9: $vgpr0 = COPY [[AND]](s32) 41 %0:_(p5) = COPY $vgpr0 42 %1:_(s1) = G_LOAD %0 :: (load 1, align 1, addrspace 5) 43 %2:_(s32) = G_ZEXT %1 44 $vgpr0 = COPY %2 45... 46 47--- 48name: test_load_private_s2_align1 49body: | 50 bb.0: 51 liveins: $vgpr0 52 53 ; SI-LABEL: name: test_load_private_s2_align1 54 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 55 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 56 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 57 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 58 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 59 ; SI: $vgpr0 = COPY [[AND]](s32) 60 ; CI-LABEL: name: test_load_private_s2_align1 61 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 62 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 63 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 64 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 65 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 66 ; CI: $vgpr0 = COPY [[AND]](s32) 67 ; VI-LABEL: name: test_load_private_s2_align1 68 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 69 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 70 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 71 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 72 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 73 ; VI: $vgpr0 = COPY [[AND]](s32) 74 ; GFX9-LABEL: name: test_load_private_s2_align1 75 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 76 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 77 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 78 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 79 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 80 ; GFX9: $vgpr0 = COPY [[AND]](s32) 81 %0:_(p5) = COPY $vgpr0 82 %1:_(s2) = G_LOAD %0 :: (load 1, align 1, addrspace 5) 83 %2:_(s32) = G_ZEXT %1 84 $vgpr0 = COPY %2 85... 86 87--- 88name: test_load_private_s8_align4 89body: | 90 bb.0: 91 liveins: $vgpr0 92 93 ; SI-LABEL: name: test_load_private_s8_align4 94 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 95 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 96 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 97 ; SI: $vgpr0 = COPY [[COPY1]](s32) 98 ; CI-LABEL: name: test_load_private_s8_align4 99 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 100 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 101 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 102 ; CI: $vgpr0 = COPY [[COPY1]](s32) 103 ; VI-LABEL: name: test_load_private_s8_align4 104 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 105 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 106 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 107 ; VI: $vgpr0 = COPY [[COPY1]](s32) 108 ; GFX9-LABEL: name: test_load_private_s8_align4 109 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 110 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 111 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 112 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 113 %0:_(p5) = COPY $vgpr0 114 %1:_(s8) = G_LOAD %0 :: (load 1, align 4, addrspace 5) 115 %2:_(s32) = G_ANYEXT %1 116 $vgpr0 = COPY %2 117... 118 119--- 120name: test_load_private_s8_align1 121body: | 122 bb.0: 123 liveins: $vgpr0 124 125 ; SI-LABEL: name: test_load_private_s8_align1 126 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 127 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 128 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 129 ; SI: $vgpr0 = COPY [[COPY1]](s32) 130 ; CI-LABEL: name: test_load_private_s8_align1 131 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 132 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 133 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 134 ; CI: $vgpr0 = COPY [[COPY1]](s32) 135 ; VI-LABEL: name: test_load_private_s8_align1 136 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 137 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 138 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 139 ; VI: $vgpr0 = COPY [[COPY1]](s32) 140 ; GFX9-LABEL: name: test_load_private_s8_align1 141 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 142 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 143 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 144 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 145 %0:_(p5) = COPY $vgpr0 146 %1:_(s8) = G_LOAD %0 :: (load 1, align 1, addrspace 5) 147 %2:_(s32) = G_ANYEXT %1 148 $vgpr0 = COPY %2 149... 150 151--- 152name: test_load_private_s16_align4 153body: | 154 bb.0: 155 liveins: $vgpr0 156 157 ; SI-LABEL: name: test_load_private_s16_align4 158 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 159 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 160 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 161 ; SI: $vgpr0 = COPY [[COPY1]](s32) 162 ; CI-LABEL: name: test_load_private_s16_align4 163 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 164 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 165 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 166 ; CI: $vgpr0 = COPY [[COPY1]](s32) 167 ; VI-LABEL: name: test_load_private_s16_align4 168 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 169 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 170 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 171 ; VI: $vgpr0 = COPY [[COPY1]](s32) 172 ; GFX9-LABEL: name: test_load_private_s16_align4 173 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 174 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 175 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 176 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 177 %0:_(p5) = COPY $vgpr0 178 %1:_(s16) = G_LOAD %0 :: (load 2, align 4, addrspace 5) 179 %2:_(s32) = G_ANYEXT %1 180 $vgpr0 = COPY %2 181... 182 183--- 184name: test_load_private_s16_align2 185body: | 186 bb.0: 187 liveins: $vgpr0 188 189 ; SI-LABEL: name: test_load_private_s16_align2 190 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 191 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 192 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 193 ; SI: $vgpr0 = COPY [[COPY1]](s32) 194 ; CI-LABEL: name: test_load_private_s16_align2 195 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 196 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 197 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 198 ; CI: $vgpr0 = COPY [[COPY1]](s32) 199 ; VI-LABEL: name: test_load_private_s16_align2 200 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 201 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 202 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 203 ; VI: $vgpr0 = COPY [[COPY1]](s32) 204 ; GFX9-LABEL: name: test_load_private_s16_align2 205 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 206 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 207 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 208 ; GFX9: $vgpr0 = COPY [[COPY1]](s32) 209 %0:_(p5) = COPY $vgpr0 210 %1:_(s16) = G_LOAD %0 :: (load 2, align 2, addrspace 5) 211 %2:_(s32) = G_ANYEXT %1 212 $vgpr0 = COPY %2 213... 214 215--- 216name: test_load_private_s16_align1 217body: | 218 bb.0: 219 liveins: $vgpr0 220 221 ; SI-LABEL: name: test_load_private_s16_align1 222 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 223 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 224 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 225 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 226 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 227 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 228 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 229 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 230 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 231 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 232 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 233 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 234 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 235 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 236 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 237 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 238 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 239 ; CI-LABEL: name: test_load_private_s16_align1 240 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 241 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 242 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 243 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 244 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 245 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 246 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 247 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 248 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 249 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 250 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 251 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 252 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 253 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 254 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 255 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 256 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 257 ; VI-LABEL: name: test_load_private_s16_align1 258 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 259 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 260 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 261 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 262 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 263 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 264 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 265 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 266 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 267 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 268 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 269 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 270 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 271 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 272 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 273 ; GFX9-LABEL: name: test_load_private_s16_align1 274 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 275 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 276 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 277 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 278 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 279 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 280 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 281 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 282 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 283 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 284 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 285 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 286 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 287 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 288 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 289 %0:_(p5) = COPY $vgpr0 290 %1:_(s16) = G_LOAD %0 :: (load 2, align 1, addrspace 5) 291 %2:_(s32) = G_ANYEXT %1 292 $vgpr0 = COPY %2 293... 294 295--- 296name: test_load_private_s32_align4 297body: | 298 bb.0: 299 liveins: $vgpr0 300 301 ; SI-LABEL: name: test_load_private_s32_align4 302 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 303 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 304 ; SI: $vgpr0 = COPY [[LOAD]](s32) 305 ; CI-LABEL: name: test_load_private_s32_align4 306 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 307 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 308 ; CI: $vgpr0 = COPY [[LOAD]](s32) 309 ; VI-LABEL: name: test_load_private_s32_align4 310 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 311 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 312 ; VI: $vgpr0 = COPY [[LOAD]](s32) 313 ; GFX9-LABEL: name: test_load_private_s32_align4 314 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 315 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 316 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 317 %0:_(p5) = COPY $vgpr0 318 %1:_(s32) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 319 $vgpr0 = COPY %1 320... 321 322--- 323name: test_load_private_s32_align2 324body: | 325 bb.0: 326 liveins: $vgpr0 327 328 ; SI-LABEL: name: test_load_private_s32_align2 329 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 330 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 331 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 332 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 333 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 334 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 335 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 336 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 337 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 338 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 339 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 340 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 341 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 342 ; SI: $vgpr0 = COPY [[OR]](s32) 343 ; CI-LABEL: name: test_load_private_s32_align2 344 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 345 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 346 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 347 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 348 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 349 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 350 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 351 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 352 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 353 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 354 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 355 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 356 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 357 ; CI: $vgpr0 = COPY [[OR]](s32) 358 ; VI-LABEL: name: test_load_private_s32_align2 359 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 360 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 361 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 362 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 363 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 364 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 365 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 366 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 367 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 368 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 369 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 370 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 371 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 372 ; VI: $vgpr0 = COPY [[OR]](s32) 373 ; GFX9-LABEL: name: test_load_private_s32_align2 374 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 375 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 376 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 377 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 378 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 379 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 380 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 381 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 382 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 383 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 384 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 385 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 386 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 387 ; GFX9: $vgpr0 = COPY [[OR]](s32) 388 %0:_(p5) = COPY $vgpr0 389 %1:_(s32) = G_LOAD %0 :: (load 4, align 2, addrspace 5) 390 $vgpr0 = COPY %1 391... 392 393--- 394name: test_load_private_s32_align1 395body: | 396 bb.0: 397 liveins: $vgpr0 398 399 ; SI-LABEL: name: test_load_private_s32_align1 400 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 401 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 402 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 403 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 404 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 405 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 406 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 407 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 408 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 409 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 410 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 411 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 412 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 413 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 414 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 415 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 416 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 417 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 418 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 419 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 420 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 421 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 422 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 423 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 424 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 425 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 426 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 427 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 428 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 429 ; SI: $vgpr0 = COPY [[OR2]](s32) 430 ; CI-LABEL: name: test_load_private_s32_align1 431 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 432 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 433 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 434 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 435 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 436 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 437 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 438 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 439 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 440 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 441 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 442 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 443 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 444 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 445 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 446 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 447 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 448 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 449 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 450 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 451 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 452 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 453 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 454 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 455 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 456 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 457 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 458 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 459 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 460 ; CI: $vgpr0 = COPY [[OR2]](s32) 461 ; VI-LABEL: name: test_load_private_s32_align1 462 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 463 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 464 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 465 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 466 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 467 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 468 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 469 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 470 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 471 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 472 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 473 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 474 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 475 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 476 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 477 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 478 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 479 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 480 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 481 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 482 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 483 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 484 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 485 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 486 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 487 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 488 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 489 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 490 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 491 ; VI: $vgpr0 = COPY [[OR2]](s32) 492 ; GFX9-LABEL: name: test_load_private_s32_align1 493 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 494 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 495 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 496 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 497 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 498 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 499 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 500 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 501 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 502 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 503 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 504 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 505 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 506 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 507 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 508 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 509 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 510 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 511 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 512 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 513 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 514 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 515 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 516 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 517 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 518 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 519 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 520 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 521 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 522 ; GFX9: $vgpr0 = COPY [[OR2]](s32) 523 %0:_(p5) = COPY $vgpr0 524 %1:_(s32) = G_LOAD %0 :: (load 4, align 1, addrspace 5) 525 $vgpr0 = COPY %1 526... 527 528--- 529name: test_load_private_s48_align8 530body: | 531 bb.0: 532 liveins: $vgpr0 533 534 ; SI-LABEL: name: test_load_private_s48_align8 535 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 536 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 537 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 538 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 539 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 540 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 541 ; SI: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 542 ; SI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[DEF]](s64) 543 ; SI: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY1]], [[LOAD]](s32), 0 544 ; SI: [[COPY2:%[0-9]+]]:_(s64) = COPY [[INSERT]](s64) 545 ; SI: [[INSERT1:%[0-9]+]]:_(s64) = G_INSERT [[COPY2]], [[TRUNC]](s16), 32 546 ; SI: [[COPY3:%[0-9]+]]:_(s64) = COPY [[INSERT1]](s64) 547 ; SI: $vgpr0_vgpr1 = COPY [[COPY3]](s64) 548 ; CI-LABEL: name: test_load_private_s48_align8 549 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 550 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 551 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 552 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 553 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 554 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 555 ; CI: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 556 ; CI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[DEF]](s64) 557 ; CI: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY1]], [[LOAD]](s32), 0 558 ; CI: [[COPY2:%[0-9]+]]:_(s64) = COPY [[INSERT]](s64) 559 ; CI: [[INSERT1:%[0-9]+]]:_(s64) = G_INSERT [[COPY2]], [[TRUNC]](s16), 32 560 ; CI: [[COPY3:%[0-9]+]]:_(s64) = COPY [[INSERT1]](s64) 561 ; CI: $vgpr0_vgpr1 = COPY [[COPY3]](s64) 562 ; VI-LABEL: name: test_load_private_s48_align8 563 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 564 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 565 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 566 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 567 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 568 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 569 ; VI: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 570 ; VI: [[COPY1:%[0-9]+]]:_(s64) = COPY [[DEF]](s64) 571 ; VI: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY1]], [[LOAD]](s32), 0 572 ; VI: [[COPY2:%[0-9]+]]:_(s64) = COPY [[INSERT]](s64) 573 ; VI: [[INSERT1:%[0-9]+]]:_(s64) = G_INSERT [[COPY2]], [[TRUNC]](s16), 32 574 ; VI: [[COPY3:%[0-9]+]]:_(s64) = COPY [[INSERT1]](s64) 575 ; VI: $vgpr0_vgpr1 = COPY [[COPY3]](s64) 576 ; GFX9-LABEL: name: test_load_private_s48_align8 577 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 578 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 579 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 580 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 581 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 582 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 583 ; GFX9: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 584 ; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY [[DEF]](s64) 585 ; GFX9: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY1]], [[LOAD]](s32), 0 586 ; GFX9: [[COPY2:%[0-9]+]]:_(s64) = COPY [[INSERT]](s64) 587 ; GFX9: [[INSERT1:%[0-9]+]]:_(s64) = G_INSERT [[COPY2]], [[TRUNC]](s16), 32 588 ; GFX9: [[COPY3:%[0-9]+]]:_(s64) = COPY [[INSERT1]](s64) 589 ; GFX9: $vgpr0_vgpr1 = COPY [[COPY3]](s64) 590 %0:_(p5) = COPY $vgpr0 591 %1:_(s48) = G_LOAD %0 :: (load 6, align 8, addrspace 5) 592 %2:_(s64) = G_ANYEXT %1 593 $vgpr0_vgpr1 = COPY %2 594... 595 596--- 597name: test_load_private_s64_align8 598body: | 599 bb.0: 600 liveins: $vgpr0 601 602 ; SI-LABEL: name: test_load_private_s64_align8 603 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 604 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 605 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 606 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 607 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 608 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 609 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 610 ; CI-LABEL: name: test_load_private_s64_align8 611 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 612 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 613 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 614 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 615 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 616 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 617 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 618 ; VI-LABEL: name: test_load_private_s64_align8 619 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 620 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 621 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 622 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 623 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 624 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 625 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 626 ; GFX9-LABEL: name: test_load_private_s64_align8 627 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 628 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 629 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 630 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 631 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 632 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 633 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 634 %0:_(p5) = COPY $vgpr0 635 %1:_(s64) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 636 $vgpr0_vgpr1 = COPY %1 637... 638 639--- 640name: test_load_private_s64_align4 641body: | 642 bb.0: 643 liveins: $vgpr0 644 645 ; SI-LABEL: name: test_load_private_s64_align4 646 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 647 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 648 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 649 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 650 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 651 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 652 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 653 ; CI-LABEL: name: test_load_private_s64_align4 654 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 655 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 656 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 657 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 658 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 659 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 660 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 661 ; VI-LABEL: name: test_load_private_s64_align4 662 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 663 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 664 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 665 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 666 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 667 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 668 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 669 ; GFX9-LABEL: name: test_load_private_s64_align4 670 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 671 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 672 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 673 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 674 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 675 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 676 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 677 %0:_(p5) = COPY $vgpr0 678 %1:_(s64) = G_LOAD %0 :: (load 8, align 4, addrspace 5) 679 $vgpr0_vgpr1 = COPY %1 680... 681 682--- 683name: test_load_private_s64_align2 684body: | 685 bb.0: 686 liveins: $vgpr0 687 688 ; SI-LABEL: name: test_load_private_s64_align2 689 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 690 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 691 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 692 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 693 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 694 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 695 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 696 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 697 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 698 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 699 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 700 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 701 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 702 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 703 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 704 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 705 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 706 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 707 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 708 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 709 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 710 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 711 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 712 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 713 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 714 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 715 ; CI-LABEL: name: test_load_private_s64_align2 716 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 717 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 718 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 719 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 720 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 721 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 722 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 723 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 724 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 725 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 726 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 727 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 728 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 729 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 730 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 731 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 732 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 733 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 734 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 735 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 736 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 737 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 738 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 739 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 740 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 741 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 742 ; VI-LABEL: name: test_load_private_s64_align2 743 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 744 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 745 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 746 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 747 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 748 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 749 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 750 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 751 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 752 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 753 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 754 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 755 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 756 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 757 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 758 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 759 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 760 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 761 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 762 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 763 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 764 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 765 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 766 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 767 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 768 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 769 ; GFX9-LABEL: name: test_load_private_s64_align2 770 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 771 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 772 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 773 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 774 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 775 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 776 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 777 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 778 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 779 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 780 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 781 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 782 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 783 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 784 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 785 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 786 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 787 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 788 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 789 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 790 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 791 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 792 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 793 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 794 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 795 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 796 %0:_(p5) = COPY $vgpr0 797 %1:_(s64) = G_LOAD %0 :: (load 8, align 2, addrspace 5) 798 $vgpr0_vgpr1 = COPY %1 799... 800 801--- 802name: test_load_private_s64_align1 803body: | 804 bb.0: 805 liveins: $vgpr0 806 807 ; SI-LABEL: name: test_load_private_s64_align1 808 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 809 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 810 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 811 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 812 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 813 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 814 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 815 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 816 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 817 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 818 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 819 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 820 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 821 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 822 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 823 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 824 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 825 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 826 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 827 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 828 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 829 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 830 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 831 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 832 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 833 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 834 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 835 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 836 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 837 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 838 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 839 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 840 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 841 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 842 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 843 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 844 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 845 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 846 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 847 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 848 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 849 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 850 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 851 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 852 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 853 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 854 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 855 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 856 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 857 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 858 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 859 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 860 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 861 ; SI: $vgpr0_vgpr1 = COPY [[MV]](s64) 862 ; CI-LABEL: name: test_load_private_s64_align1 863 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 864 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 865 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 866 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 867 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 868 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 869 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 870 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 871 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 872 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 873 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 874 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 875 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 876 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 877 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 878 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 879 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 880 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 881 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 882 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 883 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 884 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 885 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 886 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 887 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 888 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 889 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 890 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 891 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 892 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 893 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 894 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 895 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 896 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 897 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 898 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 899 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 900 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 901 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 902 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 903 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 904 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 905 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 906 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 907 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 908 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 909 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 910 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 911 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 912 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 913 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 914 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 915 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 916 ; CI: $vgpr0_vgpr1 = COPY [[MV]](s64) 917 ; VI-LABEL: name: test_load_private_s64_align1 918 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 919 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 920 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 921 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 922 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 923 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 924 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 925 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 926 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 927 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 928 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 929 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 930 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 931 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 932 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 933 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 934 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 935 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 936 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 937 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 938 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 939 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 940 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 941 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 942 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 943 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 944 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 945 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 946 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 947 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 948 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 949 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 950 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 951 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 952 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 953 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 954 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 955 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 956 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 957 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 958 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 959 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 960 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 961 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 962 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 963 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 964 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 965 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 966 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 967 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 968 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 969 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 970 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 971 ; VI: $vgpr0_vgpr1 = COPY [[MV]](s64) 972 ; GFX9-LABEL: name: test_load_private_s64_align1 973 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 974 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 975 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 976 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 977 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 978 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 979 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 980 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 981 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 982 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 983 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 984 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 985 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 986 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 987 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 988 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 989 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 990 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 991 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 992 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 993 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 994 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 995 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 996 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 997 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 998 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 999 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1000 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1001 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1002 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1003 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1004 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 1005 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1006 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 1007 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1008 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 1009 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1010 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 1011 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1012 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1013 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1014 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1015 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1016 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1017 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1018 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1019 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1020 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1021 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1022 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1023 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1024 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1025 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 1026 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](s64) 1027 %0:_(p5) = COPY $vgpr0 1028 %1:_(s64) = G_LOAD %0 :: (load 8, align 1, addrspace 5) 1029 $vgpr0_vgpr1 = COPY %1 1030... 1031 1032--- 1033name: test_load_private_s96_align16 1034body: | 1035 bb.0: 1036 liveins: $vgpr0 1037 1038 ; SI-LABEL: name: test_load_private_s96_align16 1039 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1040 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 1041 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1042 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1043 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 1044 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1045 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1046 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 1047 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1048 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1049 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 1050 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1051 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1052 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1053 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1054 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1055 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1056 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1057 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1058 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1059 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1060 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1061 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1062 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1063 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1064 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1065 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1066 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1067 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1068 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1069 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1070 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 1071 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1072 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 1073 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1074 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 1075 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1076 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 1077 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1078 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1079 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1080 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1081 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1082 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1083 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1084 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1085 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1086 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1087 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1088 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1089 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1090 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1091 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1092 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 1093 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1094 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 1095 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1096 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 1097 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1098 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 1099 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1100 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1101 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1102 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1103 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1104 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1105 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1106 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1107 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1108 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1109 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1110 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1111 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1112 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1113 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1114 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1115 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1116 ; CI-LABEL: name: test_load_private_s96_align16 1117 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1118 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 1119 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1120 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1121 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 1122 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1123 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1124 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 1125 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1126 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1127 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 1128 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1129 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1130 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1131 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1132 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1133 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1134 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1135 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1136 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1137 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1138 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1139 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1140 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1141 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1142 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1143 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1144 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1145 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1146 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1147 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1148 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 1149 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1150 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 1151 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1152 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 1153 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1154 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 1155 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1156 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1157 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1158 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1159 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1160 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1161 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1162 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1163 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1164 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1165 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1166 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1167 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1168 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1169 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1170 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 1171 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1172 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 1173 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1174 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 1175 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1176 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 1177 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1178 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1179 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1180 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1181 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1182 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1183 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1184 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1185 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1186 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1187 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1188 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1189 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1190 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1191 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1192 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1193 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1194 ; VI-LABEL: name: test_load_private_s96_align16 1195 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1196 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 1197 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1198 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1199 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 1200 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1201 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1202 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 1203 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1204 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1205 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 1206 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1207 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1208 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1209 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1210 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1211 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1212 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1213 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1214 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1215 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1216 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1217 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1218 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1219 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1220 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1221 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1222 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1223 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1224 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1225 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1226 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 1227 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1228 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 1229 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1230 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 1231 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1232 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 1233 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1234 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1235 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1236 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1237 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1238 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1239 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1240 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1241 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1242 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1243 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1244 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1245 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1246 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1247 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1248 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 1249 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1250 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 1251 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1252 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 1253 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1254 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 1255 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1256 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1257 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1258 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1259 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1260 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1261 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1262 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1263 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1264 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1265 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1266 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1267 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1268 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1269 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1270 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1271 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1272 ; GFX9-LABEL: name: test_load_private_s96_align16 1273 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1274 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 1275 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1276 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1277 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 1278 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1279 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1280 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 1281 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1282 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1283 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 1284 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1285 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1286 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1287 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1288 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1289 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1290 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1291 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1292 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1293 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1294 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1295 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1296 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1297 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1298 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1299 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1300 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1301 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1302 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1303 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1304 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 1305 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1306 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 1307 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1308 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 1309 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1310 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 1311 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1312 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1313 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1314 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1315 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1316 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1317 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1318 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1319 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1320 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1321 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1322 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1323 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1324 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1325 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1326 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 1327 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1328 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 1329 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1330 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 1331 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1332 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 1333 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1334 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1335 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1336 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1337 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1338 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1339 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1340 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1341 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1342 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1343 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1344 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1345 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1346 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1347 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1348 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1349 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1350 %0:_(p5) = COPY $vgpr0 1351 %1:_(s96) = G_LOAD %0 :: (load 12, align 1, addrspace 56) 1352 $vgpr0_vgpr1_vgpr2 = COPY %1 1353... 1354 1355--- 1356name: test_load_private_s96_align8 1357body: | 1358 bb.0: 1359 liveins: $vgpr0 1360 1361 ; SI-LABEL: name: test_load_private_s96_align8 1362 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1363 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 1364 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1365 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1366 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1367 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1368 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1369 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 1370 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1371 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1372 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1373 ; CI-LABEL: name: test_load_private_s96_align8 1374 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1375 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 1376 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1377 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1378 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1379 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1380 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1381 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 1382 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1383 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1384 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1385 ; VI-LABEL: name: test_load_private_s96_align8 1386 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1387 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 1388 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1389 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1390 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1391 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1392 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1393 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 1394 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1395 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1396 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1397 ; GFX9-LABEL: name: test_load_private_s96_align8 1398 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1399 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 1400 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1401 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1402 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1403 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1404 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1405 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 1406 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1407 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1408 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1409 %0:_(p5) = COPY $vgpr0 1410 %1:_(s96) = G_LOAD %0 :: (load 12, align 8, addrspace 5) 1411 $vgpr0_vgpr1_vgpr2 = COPY %1 1412... 1413 1414--- 1415name: test_load_private_s96_align4 1416body: | 1417 bb.0: 1418 liveins: $vgpr0 1419 1420 ; SI-LABEL: name: test_load_private_s96_align4 1421 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1422 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 1423 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1424 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1425 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1426 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1427 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1428 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 1429 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1430 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1431 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1432 ; CI-LABEL: name: test_load_private_s96_align4 1433 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1434 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 1435 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1436 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1437 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1438 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1439 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1440 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 1441 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1442 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1443 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1444 ; VI-LABEL: name: test_load_private_s96_align4 1445 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1446 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 1447 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1448 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1449 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1450 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1451 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1452 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 1453 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1454 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1455 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1456 ; GFX9-LABEL: name: test_load_private_s96_align4 1457 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1458 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 1459 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1460 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1461 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 1462 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1463 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1464 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 1465 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 1466 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1467 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1468 %0:_(p5) = COPY $vgpr0 1469 %1:_(s96) = G_LOAD %0 :: (load 12, align 4, addrspace 5) 1470 $vgpr0_vgpr1_vgpr2 = COPY %1 1471... 1472 1473--- 1474name: test_load_private_s96_align2 1475body: | 1476 bb.0: 1477 liveins: $vgpr0 1478 1479 ; SI-LABEL: name: test_load_private_s96_align2 1480 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1481 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 1482 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1483 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1484 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 1485 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1486 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1487 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1488 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1489 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 1490 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1491 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 1492 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1493 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1494 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 1495 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 1496 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 1497 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 1498 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1499 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 1500 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1501 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 1502 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 1503 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1504 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1505 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1506 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 1507 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1508 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 1509 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1510 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 1511 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1512 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 1513 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 1514 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 1515 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 1516 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1517 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1518 ; CI-LABEL: name: test_load_private_s96_align2 1519 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1520 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 1521 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1522 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1523 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 1524 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1525 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1526 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1527 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1528 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 1529 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1530 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 1531 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1532 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1533 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 1534 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 1535 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 1536 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 1537 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1538 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 1539 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1540 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 1541 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 1542 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1543 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1544 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1545 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 1546 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1547 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 1548 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1549 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 1550 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1551 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 1552 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 1553 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 1554 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 1555 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1556 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1557 ; VI-LABEL: name: test_load_private_s96_align2 1558 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1559 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 1560 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1561 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1562 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 1563 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1564 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1565 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1566 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1567 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 1568 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1569 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 1570 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1571 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1572 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 1573 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 1574 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 1575 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 1576 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1577 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 1578 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1579 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 1580 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 1581 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1582 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1583 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1584 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 1585 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1586 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 1587 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1588 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 1589 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1590 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 1591 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 1592 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 1593 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 1594 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1595 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1596 ; GFX9-LABEL: name: test_load_private_s96_align2 1597 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1598 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 1599 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1600 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1601 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 1602 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1603 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1604 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1605 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1606 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 1607 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1608 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 1609 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1610 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1611 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 1612 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 1613 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 1614 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 1615 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1616 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 1617 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1618 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 1619 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 1620 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1621 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1622 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1623 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 1624 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1625 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 1626 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1627 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 1628 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1629 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 1630 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 1631 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 1632 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 1633 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1634 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1635 %0:_(p5) = COPY $vgpr0 1636 %1:_(s96) = G_LOAD %0 :: (load 12, align 2, addrspace 5) 1637 $vgpr0_vgpr1_vgpr2 = COPY %1 1638... 1639 1640--- 1641name: test_load_private_s96_align1 1642body: | 1643 bb.0: 1644 liveins: $vgpr0 1645 1646 ; SI-LABEL: name: test_load_private_s96_align1 1647 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1648 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 1649 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1650 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1651 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 1652 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1653 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1654 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 1655 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1656 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1657 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 1658 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1659 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1660 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1661 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1662 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1663 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1664 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1665 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1666 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1667 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1668 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1669 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1670 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1671 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1672 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1673 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1674 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1675 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1676 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1677 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1678 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 1679 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1680 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 1681 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1682 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 1683 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1684 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 1685 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1686 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1687 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1688 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1689 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1690 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1691 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1692 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1693 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1694 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1695 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1696 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1697 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1698 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1699 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1700 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 1701 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1702 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 1703 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1704 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 1705 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1706 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 1707 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1708 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1709 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1710 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1711 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1712 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1713 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1714 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1715 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1716 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1717 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1718 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1719 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1720 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1721 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1722 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1723 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1724 ; CI-LABEL: name: test_load_private_s96_align1 1725 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1726 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 1727 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1728 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1729 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 1730 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1731 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1732 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 1733 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1734 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1735 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 1736 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1737 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1738 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1739 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1740 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1741 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1742 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1743 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1744 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1745 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1746 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1747 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1748 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1749 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1750 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1751 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1752 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1753 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1754 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1755 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1756 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 1757 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1758 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 1759 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1760 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 1761 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1762 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 1763 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1764 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1765 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1766 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1767 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1768 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1769 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1770 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1771 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1772 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1773 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1774 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1775 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1776 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1777 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1778 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 1779 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1780 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 1781 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1782 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 1783 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1784 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 1785 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1786 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1787 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1788 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1789 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1790 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1791 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1792 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1793 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1794 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1795 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1796 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1797 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1798 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1799 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1800 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1801 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1802 ; VI-LABEL: name: test_load_private_s96_align1 1803 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1804 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 1805 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1806 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1807 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 1808 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1809 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1810 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 1811 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1812 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1813 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 1814 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1815 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1816 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1817 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1818 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1819 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1820 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1821 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1822 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1823 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1824 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1825 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1826 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1827 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1828 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1829 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1830 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1831 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1832 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1833 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1834 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 1835 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1836 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 1837 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1838 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 1839 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1840 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 1841 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1842 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1843 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1844 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1845 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1846 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1847 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1848 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1849 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1850 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1851 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1852 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1853 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1854 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1855 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1856 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 1857 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1858 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 1859 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1860 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 1861 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1862 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 1863 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1864 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1865 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1866 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1867 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1868 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1869 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1870 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1871 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1872 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1873 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1874 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1875 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1876 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1877 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1878 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1879 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1880 ; GFX9-LABEL: name: test_load_private_s96_align1 1881 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1882 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 1883 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1884 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1885 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 1886 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1887 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1888 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 1889 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1890 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1891 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 1892 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1893 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1894 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1895 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1896 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1897 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1898 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1899 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1900 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1901 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1902 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1903 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1904 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1905 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1906 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1907 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1908 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1909 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1910 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1911 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 1912 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 1913 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 1914 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 1915 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 1916 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 1917 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 1918 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 1919 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 1920 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 1921 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 1922 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 1923 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 1924 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 1925 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 1926 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 1927 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 1928 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 1929 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 1930 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 1931 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 1932 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 1933 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 1934 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 1935 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 1936 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 1937 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 1938 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 1939 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 1940 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 1941 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 1942 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 1943 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 1944 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 1945 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 1946 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 1947 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 1948 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 1949 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 1950 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 1951 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 1952 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 1953 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 1954 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 1955 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 1956 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 1957 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BITCAST]](s96) 1958 %0:_(p5) = COPY $vgpr0 1959 %1:_(s96) = G_LOAD %0 :: (load 12, align 1, addrspace 5) 1960 $vgpr0_vgpr1_vgpr2 = COPY %1 1961... 1962 1963--- 1964name: test_load_private_s128_align16 1965body: | 1966 bb.0: 1967 liveins: $vgpr0 1968 1969 ; SI-LABEL: name: test_load_private_s128_align16 1970 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 1971 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 1972 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1973 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 1974 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 1975 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1976 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 1977 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 1978 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1979 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 1980 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 1981 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 1982 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 1983 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 1984 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 1985 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 1986 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1987 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 1988 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1989 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 1990 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 1991 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1992 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 1993 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 1994 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 1995 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 1996 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1997 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 1998 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 1999 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2000 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2001 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 2002 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2003 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 2004 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2005 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 2006 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2007 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 2008 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2009 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2010 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2011 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2012 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2013 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2014 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2015 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2016 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2017 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2018 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2019 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2020 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2021 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2022 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2023 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 2024 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2025 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 2026 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2027 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 2028 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2029 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 2030 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2031 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2032 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2033 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2034 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2035 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2036 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2037 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2038 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2039 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2040 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2041 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2042 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2043 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2044 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2045 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2046 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 2047 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2048 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 2049 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2050 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 2051 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2052 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 2053 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2054 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2055 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2056 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2057 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2058 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2059 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2060 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2061 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2062 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2063 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2064 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2065 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2066 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2067 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2068 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2069 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2070 ; CI-LABEL: name: test_load_private_s128_align16 2071 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2072 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 2073 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2074 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2075 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 2076 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2077 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2078 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 2079 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2080 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2081 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 2082 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2083 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2084 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2085 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2086 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2087 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2088 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2089 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2090 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2091 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2092 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2093 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2094 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2095 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2096 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2097 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2098 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2099 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2100 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2101 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2102 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 2103 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2104 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 2105 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2106 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 2107 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2108 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 2109 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2110 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2111 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2112 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2113 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2114 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2115 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2116 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2117 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2118 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2119 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2120 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2121 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2122 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2123 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2124 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 2125 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2126 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 2127 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2128 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 2129 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2130 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 2131 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2132 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2133 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2134 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2135 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2136 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2137 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2138 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2139 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2140 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2141 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2142 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2143 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2144 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2145 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2146 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2147 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 2148 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2149 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 2150 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2151 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 2152 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2153 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 2154 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2155 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2156 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2157 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2158 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2159 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2160 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2161 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2162 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2163 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2164 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2165 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2166 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2167 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2168 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2169 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2170 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2171 ; VI-LABEL: name: test_load_private_s128_align16 2172 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2173 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 2174 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2175 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2176 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 2177 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2178 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2179 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 2180 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2181 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2182 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 2183 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2184 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2185 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2186 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2187 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2188 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2189 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2190 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2191 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2192 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2193 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2194 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2195 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2196 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2197 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2198 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2199 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2200 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2201 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2202 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2203 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 2204 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2205 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 2206 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2207 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 2208 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2209 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 2210 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2211 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2212 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2213 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2214 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2215 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2216 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2217 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2218 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2219 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2220 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2221 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2222 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2223 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2224 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2225 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 2226 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2227 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 2228 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2229 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 2230 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2231 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 2232 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2233 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2234 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2235 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2236 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2237 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2238 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2239 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2240 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2241 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2242 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2243 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2244 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2245 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2246 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2247 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2248 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 2249 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2250 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 2251 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2252 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 2253 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2254 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 2255 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2256 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2257 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2258 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2259 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2260 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2261 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2262 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2263 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2264 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2265 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2266 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2267 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2268 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2269 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2270 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2271 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2272 ; GFX9-LABEL: name: test_load_private_s128_align16 2273 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2274 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 2275 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2276 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2277 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 2278 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2279 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2280 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 2281 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2282 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2283 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 2284 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2285 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2286 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2287 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2288 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2289 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2290 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2291 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2292 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2293 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2294 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2295 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2296 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2297 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2298 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2299 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2300 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2301 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2302 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2303 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2304 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 2305 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2306 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 2307 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2308 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 2309 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2310 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 2311 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2312 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2313 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2314 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2315 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2316 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2317 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2318 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2319 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2320 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2321 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2322 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2323 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2324 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2325 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2326 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 2327 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2328 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 2329 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2330 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 2331 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2332 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 2333 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2334 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2335 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2336 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2337 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2338 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2339 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2340 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2341 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2342 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2343 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2344 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2345 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2346 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2347 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2348 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2349 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 2350 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2351 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 2352 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2353 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 2354 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2355 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 2356 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2357 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2358 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2359 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2360 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2361 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2362 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2363 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2364 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2365 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2366 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2367 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2368 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2369 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2370 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2371 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2372 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2373 %0:_(p5) = COPY $vgpr0 2374 %1:_(s128) = G_LOAD %0 :: (load 16, align 1, addrspace 56) 2375 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 2376... 2377 2378--- 2379name: test_load_private_s128_align8 2380body: | 2381 bb.0: 2382 liveins: $vgpr0 2383 2384 ; SI-LABEL: name: test_load_private_s128_align8 2385 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2386 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 2387 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2388 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2389 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2390 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2391 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2392 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 2393 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2394 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2395 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2396 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2397 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2398 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2399 ; CI-LABEL: name: test_load_private_s128_align8 2400 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2401 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 2402 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2403 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2404 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2405 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2406 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2407 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 2408 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2409 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2410 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2411 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2412 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2413 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2414 ; VI-LABEL: name: test_load_private_s128_align8 2415 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2416 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 2417 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2418 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2419 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2420 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2421 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2422 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 2423 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2424 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2425 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2426 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2427 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2428 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2429 ; GFX9-LABEL: name: test_load_private_s128_align8 2430 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2431 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 2432 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2433 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2434 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2435 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2436 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2437 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 2438 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2439 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2440 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2441 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2442 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2443 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2444 %0:_(p5) = COPY $vgpr0 2445 %1:_(s128) = G_LOAD %0 :: (load 16, align 8, addrspace 5) 2446 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 2447... 2448 2449--- 2450name: test_load_private_s128_align4 2451body: | 2452 bb.0: 2453 liveins: $vgpr0 2454 2455 ; SI-LABEL: name: test_load_private_s128_align4 2456 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2457 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 2458 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2459 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2460 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2461 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2462 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2463 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 2464 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2465 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2466 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2467 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2468 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2469 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2470 ; CI-LABEL: name: test_load_private_s128_align4 2471 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2472 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 2473 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2474 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2475 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2476 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2477 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2478 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 2479 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2480 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2481 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2482 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2483 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2484 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2485 ; VI-LABEL: name: test_load_private_s128_align4 2486 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2487 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 2488 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2489 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2490 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2491 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2492 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2493 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 2494 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2495 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2496 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2497 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2498 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2499 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2500 ; GFX9-LABEL: name: test_load_private_s128_align4 2501 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2502 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 2503 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2504 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2505 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 2506 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2507 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2508 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 2509 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2510 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2511 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 2512 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 2513 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2514 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2515 %0:_(p5) = COPY $vgpr0 2516 %1:_(s128) = G_LOAD %0 :: (load 16, align 4, addrspace 5) 2517 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 2518... 2519 2520--- 2521name: test_load_private_s128_align2 2522body: | 2523 bb.0: 2524 liveins: $vgpr0 2525 2526 ; SI-LABEL: name: test_load_private_s128_align2 2527 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2528 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 2529 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2530 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2531 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 2532 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2533 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2534 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2535 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2536 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2537 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2538 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2539 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2540 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2541 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 2542 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 2543 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2544 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 2545 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2546 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2547 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2548 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2549 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2550 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2551 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2552 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2553 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 2554 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2555 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 2556 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2557 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2558 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2559 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2560 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2561 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2562 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2563 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 2564 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 2565 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 2566 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 2567 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2568 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 2569 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2570 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 2571 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 2572 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 2573 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 2574 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2575 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2576 ; CI-LABEL: name: test_load_private_s128_align2 2577 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2578 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 2579 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2580 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2581 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 2582 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2583 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2584 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2585 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2586 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2587 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2588 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2589 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2590 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2591 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 2592 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 2593 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2594 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 2595 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2596 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2597 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2598 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2599 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2600 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2601 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2602 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2603 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 2604 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2605 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 2606 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2607 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2608 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2609 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2610 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2611 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2612 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2613 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 2614 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 2615 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 2616 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 2617 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2618 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 2619 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2620 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 2621 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 2622 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 2623 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 2624 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2625 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2626 ; VI-LABEL: name: test_load_private_s128_align2 2627 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2628 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 2629 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2630 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2631 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 2632 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2633 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2634 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2635 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2636 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2637 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2638 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2639 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2640 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2641 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 2642 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 2643 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2644 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 2645 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2646 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2647 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2648 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2649 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2650 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2651 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2652 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2653 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 2654 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2655 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 2656 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2657 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2658 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2659 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2660 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2661 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2662 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2663 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 2664 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 2665 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 2666 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 2667 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2668 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 2669 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2670 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 2671 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 2672 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 2673 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 2674 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2675 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2676 ; GFX9-LABEL: name: test_load_private_s128_align2 2677 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2678 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 2679 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2680 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2681 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 2682 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 2683 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2684 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 2685 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2686 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 2687 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2688 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 2689 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2690 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2691 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 2692 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 2693 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 2694 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 2695 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2696 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 2697 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2698 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 2699 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 2700 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 2701 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2702 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2703 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 2704 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2705 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 2706 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2707 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 2708 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2709 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 2710 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 2711 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 2712 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2713 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 2714 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 2715 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 2716 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 2717 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2718 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 2719 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2720 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 2721 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 2722 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 2723 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 2724 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2725 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2726 %0:_(p5) = COPY $vgpr0 2727 %1:_(s128) = G_LOAD %0 :: (load 16, align 2, addrspace 5) 2728 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 2729... 2730 2731--- 2732name: test_load_private_s128_align1 2733body: | 2734 bb.0: 2735 liveins: $vgpr0 2736 2737 ; SI-LABEL: name: test_load_private_s128_align1 2738 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2739 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 2740 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2741 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2742 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 2743 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2744 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2745 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 2746 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2747 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2748 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 2749 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2750 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2751 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2752 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2753 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2754 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2755 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2756 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2757 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2758 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2759 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2760 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2761 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2762 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2763 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2764 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2765 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2766 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2767 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2768 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2769 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 2770 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2771 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 2772 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2773 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 2774 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2775 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 2776 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2777 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2778 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2779 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2780 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2781 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2782 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2783 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2784 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2785 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2786 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2787 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2788 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2789 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2790 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2791 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 2792 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2793 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 2794 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2795 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 2796 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2797 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 2798 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2799 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2800 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2801 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2802 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2803 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2804 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2805 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2806 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2807 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2808 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2809 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2810 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2811 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2812 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2813 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2814 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 2815 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2816 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 2817 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2818 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 2819 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2820 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 2821 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2822 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2823 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2824 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2825 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2826 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2827 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2828 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2829 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2830 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2831 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2832 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2833 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2834 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2835 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2836 ; SI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2837 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2838 ; CI-LABEL: name: test_load_private_s128_align1 2839 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2840 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 2841 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2842 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2843 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 2844 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2845 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2846 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 2847 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2848 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2849 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 2850 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2851 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2852 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2853 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2854 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2855 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2856 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2857 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2858 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2859 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2860 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2861 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2862 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2863 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2864 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2865 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2866 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2867 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2868 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2869 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2870 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 2871 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2872 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 2873 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2874 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 2875 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2876 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 2877 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2878 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2879 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2880 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2881 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2882 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2883 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2884 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2885 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2886 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2887 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2888 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2889 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2890 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2891 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2892 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 2893 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2894 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 2895 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2896 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 2897 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2898 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 2899 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 2900 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 2901 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 2902 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 2903 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 2904 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 2905 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 2906 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 2907 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 2908 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 2909 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 2910 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 2911 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 2912 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 2913 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 2914 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 2915 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 2916 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 2917 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 2918 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 2919 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 2920 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 2921 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 2922 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 2923 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 2924 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 2925 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 2926 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 2927 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 2928 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 2929 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 2930 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 2931 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 2932 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 2933 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 2934 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 2935 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 2936 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 2937 ; CI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 2938 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 2939 ; VI-LABEL: name: test_load_private_s128_align1 2940 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 2941 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 2942 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2943 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 2944 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 2945 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 2946 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 2947 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 2948 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 2949 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 2950 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 2951 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 2952 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 2953 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 2954 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 2955 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 2956 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 2957 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 2958 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 2959 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 2960 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 2961 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 2962 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 2963 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 2964 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 2965 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 2966 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 2967 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 2968 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 2969 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 2970 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 2971 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 2972 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 2973 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 2974 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 2975 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 2976 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 2977 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 2978 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 2979 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 2980 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 2981 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 2982 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 2983 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 2984 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 2985 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 2986 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 2987 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 2988 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 2989 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 2990 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 2991 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 2992 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 2993 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 2994 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 2995 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 2996 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 2997 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 2998 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 2999 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 3000 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3001 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3002 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3003 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3004 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3005 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3006 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3007 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3008 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3009 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3010 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3011 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3012 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3013 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3014 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3015 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 3016 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 3017 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3018 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 3019 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3020 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 3021 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3022 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 3023 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3024 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3025 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3026 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3027 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3028 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3029 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3030 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3031 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3032 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3033 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3034 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3035 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3036 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3037 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3038 ; VI: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3039 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3040 ; GFX9-LABEL: name: test_load_private_s128_align1 3041 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3042 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3043 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3044 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3045 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3046 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3047 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3048 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3049 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3050 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3051 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3052 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3053 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3054 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3055 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3056 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3057 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3058 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3059 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3060 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3061 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3062 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3063 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3064 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3065 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3066 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3067 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3068 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3069 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3070 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3071 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 3072 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 3073 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3074 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 3075 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3076 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 3077 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3078 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 3079 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3080 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3081 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3082 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3083 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3084 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3085 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3086 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3087 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3088 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3089 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3090 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3091 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3092 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3093 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 3094 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 3095 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 3096 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 3097 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 3098 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 3099 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 3100 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 3101 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 3102 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 3103 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 3104 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 3105 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 3106 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 3107 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 3108 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 3109 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 3110 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 3111 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 3112 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 3113 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 3114 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 3115 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 3116 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 3117 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 3118 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 3119 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 3120 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 3121 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 3122 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 3123 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 3124 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 3125 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 3126 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 3127 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 3128 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 3129 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 3130 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 3131 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 3132 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 3133 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 3134 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 3135 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 3136 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 3137 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 3138 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 3139 ; GFX9: [[BITCAST:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<4 x s32>) 3140 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST]](s128) 3141 %0:_(p5) = COPY $vgpr0 3142 %1:_(s128) = G_LOAD %0 :: (load 16, align 1, addrspace 5) 3143 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 3144... 3145 3146--- 3147name: test_load_private_p1_align8 3148body: | 3149 bb.0: 3150 liveins: $vgpr0 3151 3152 ; SI-LABEL: name: test_load_private_p1_align8 3153 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3154 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 3155 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3156 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3157 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3158 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3159 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3160 ; CI-LABEL: name: test_load_private_p1_align8 3161 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3162 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 3163 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3164 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3165 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3166 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3167 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3168 ; VI-LABEL: name: test_load_private_p1_align8 3169 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3170 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 3171 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3172 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3173 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3174 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3175 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3176 ; GFX9-LABEL: name: test_load_private_p1_align8 3177 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3178 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 3179 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3180 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3181 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3182 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3183 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 3184 %0:_(p5) = COPY $vgpr0 3185 %1:_(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 3186 $vgpr0_vgpr1 = COPY %1 3187... 3188 3189--- 3190name: test_load_private_p1_align4 3191body: | 3192 bb.0: 3193 liveins: $vgpr0 3194 3195 ; SI-LABEL: name: test_load_private_p1_align4 3196 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3197 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3198 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3199 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3200 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3201 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3202 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3203 ; CI-LABEL: name: test_load_private_p1_align4 3204 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3205 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3206 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3207 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3208 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3209 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3210 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3211 ; VI-LABEL: name: test_load_private_p1_align4 3212 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3213 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3214 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3215 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3216 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3217 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3218 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3219 ; GFX9-LABEL: name: test_load_private_p1_align4 3220 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3221 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3222 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3223 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3224 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 3225 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 3226 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 3227 %0:_(p5) = COPY $vgpr0 3228 %1:_(p1) = G_LOAD %0 :: (load 8, align 4, addrspace 5) 3229 $vgpr0_vgpr1 = COPY %1 3230... 3231 3232--- 3233name: test_load_private_p1_align2 3234body: | 3235 bb.0: 3236 liveins: $vgpr0 3237 3238 ; SI-LABEL: name: test_load_private_p1_align2 3239 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3240 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3241 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3242 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3243 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3244 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3245 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3246 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3247 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3248 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3249 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3250 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3251 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3252 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3253 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 3254 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 3255 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3256 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 3257 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3258 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3259 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3260 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3261 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3262 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3263 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 3264 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3265 ; CI-LABEL: name: test_load_private_p1_align2 3266 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3267 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3268 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3269 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3270 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3271 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3272 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3273 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3274 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3275 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3276 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3277 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3278 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3279 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3280 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 3281 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 3282 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3283 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 3284 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3285 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3286 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3287 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3288 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3289 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3290 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 3291 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3292 ; VI-LABEL: name: test_load_private_p1_align2 3293 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3294 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3295 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3296 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3297 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3298 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3299 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3300 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3301 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3302 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3303 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3304 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3305 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3306 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3307 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 3308 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 3309 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3310 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 3311 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3312 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3313 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3314 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3315 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3316 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3317 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 3318 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3319 ; GFX9-LABEL: name: test_load_private_p1_align2 3320 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3321 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3322 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3323 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3324 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3325 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3326 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3327 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3328 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3329 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3330 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3331 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3332 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3333 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3334 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 3335 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 3336 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 3337 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 3338 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3339 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 3340 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3341 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 3342 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 3343 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 3344 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 3345 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 3346 %0:_(p5) = COPY $vgpr0 3347 %1:_(p1) = G_LOAD %0 :: (load 8, align 2, addrspace 5) 3348 $vgpr0_vgpr1 = COPY %1 3349... 3350 3351--- 3352name: test_load_private_p1_align1 3353body: | 3354 bb.0: 3355 liveins: $vgpr0 3356 3357 ; SI-LABEL: name: test_load_private_p1_align1 3358 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3359 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3360 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3361 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3362 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3363 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3364 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3365 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3366 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3367 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3368 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3369 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3370 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3371 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3372 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3373 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3374 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3375 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3376 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3377 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3378 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3379 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3380 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3381 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3382 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3383 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3384 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3385 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3386 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3387 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3388 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 3389 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 3390 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3391 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 3392 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3393 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 3394 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3395 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 3396 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3397 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3398 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3399 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3400 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3401 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3402 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3403 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3404 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3405 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3406 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3407 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3408 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3409 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3410 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 3411 ; SI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3412 ; CI-LABEL: name: test_load_private_p1_align1 3413 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3414 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3415 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3416 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3417 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3418 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3419 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3420 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3421 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3422 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3423 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3424 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3425 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3426 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3427 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3428 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3429 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3430 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3431 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3432 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3433 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3434 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3435 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3436 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3437 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3438 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3439 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3440 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3441 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3442 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3443 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 3444 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 3445 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3446 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 3447 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3448 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 3449 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3450 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 3451 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3452 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3453 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3454 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3455 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3456 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3457 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3458 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3459 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3460 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3461 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3462 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3463 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3464 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3465 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 3466 ; CI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3467 ; VI-LABEL: name: test_load_private_p1_align1 3468 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3469 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3470 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3471 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3472 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3473 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3474 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3475 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3476 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3477 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3478 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3479 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3480 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3481 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3482 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3483 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3484 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3485 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3486 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3487 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3488 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3489 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3490 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3491 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3492 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3493 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3494 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3495 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3496 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3497 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3498 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 3499 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 3500 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3501 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 3502 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3503 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 3504 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3505 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 3506 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3507 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3508 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3509 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3510 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3511 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3512 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3513 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3514 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3515 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3516 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3517 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3518 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3519 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3520 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 3521 ; VI: $vgpr0_vgpr1 = COPY [[MV]](p1) 3522 ; GFX9-LABEL: name: test_load_private_p1_align1 3523 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3524 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3525 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3526 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3527 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3528 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3529 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3530 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3531 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3532 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3533 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3534 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3535 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3536 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3537 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3538 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3539 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3540 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3541 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3542 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3543 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3544 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3545 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3546 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3547 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3548 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3549 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3550 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3551 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3552 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 3553 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 3554 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 3555 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 3556 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 3557 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 3558 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 3559 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 3560 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 3561 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 3562 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 3563 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 3564 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 3565 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 3566 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 3567 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 3568 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 3569 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 3570 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 3571 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 3572 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 3573 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 3574 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 3575 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 3576 ; GFX9: $vgpr0_vgpr1 = COPY [[MV]](p1) 3577 %0:_(p5) = COPY $vgpr0 3578 %1:_(p1) = G_LOAD %0 :: (load 8, align 1, addrspace 5) 3579 $vgpr0_vgpr1 = COPY %1 3580... 3581 3582--- 3583name: test_load_private_p3_align4 3584body: | 3585 bb.0: 3586 liveins: $vgpr0 3587 3588 ; SI-LABEL: name: test_load_private_p3_align4 3589 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3590 ; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3591 ; SI: $vgpr0 = COPY [[LOAD]](p3) 3592 ; CI-LABEL: name: test_load_private_p3_align4 3593 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3594 ; CI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3595 ; CI: $vgpr0 = COPY [[LOAD]](p3) 3596 ; VI-LABEL: name: test_load_private_p3_align4 3597 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3598 ; VI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3599 ; VI: $vgpr0 = COPY [[LOAD]](p3) 3600 ; GFX9-LABEL: name: test_load_private_p3_align4 3601 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3602 ; GFX9: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3603 ; GFX9: $vgpr0 = COPY [[LOAD]](p3) 3604 %0:_(p5) = COPY $vgpr0 3605 %1:_(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 3606 $vgpr0 = COPY %1 3607... 3608 3609--- 3610name: test_load_private_p3_align2 3611body: | 3612 bb.0: 3613 liveins: $vgpr0 3614 3615 ; SI-LABEL: name: test_load_private_p3_align2 3616 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3617 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3618 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3619 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3620 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3621 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3622 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3623 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3624 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3625 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3626 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3627 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3628 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3629 ; SI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 3630 ; SI: $vgpr0 = COPY [[INTTOPTR]](p3) 3631 ; CI-LABEL: name: test_load_private_p3_align2 3632 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3633 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3634 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3635 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3636 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3637 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3638 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3639 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3640 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3641 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3642 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3643 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3644 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3645 ; CI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 3646 ; CI: $vgpr0 = COPY [[INTTOPTR]](p3) 3647 ; VI-LABEL: name: test_load_private_p3_align2 3648 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3649 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3650 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3651 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3652 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3653 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3654 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3655 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3656 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3657 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3658 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3659 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3660 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3661 ; VI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 3662 ; VI: $vgpr0 = COPY [[INTTOPTR]](p3) 3663 ; GFX9-LABEL: name: test_load_private_p3_align2 3664 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3665 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3666 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3667 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3668 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3669 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3670 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3671 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3672 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3673 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3674 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3675 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3676 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3677 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR]](s32) 3678 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p3) 3679 %0:_(p5) = COPY $vgpr0 3680 %1:_(p3) = G_LOAD %0 :: (load 4, align 2, addrspace 5) 3681 $vgpr0 = COPY %1 3682... 3683 3684--- 3685name: test_load_private_p3_align1 3686body: | 3687 bb.0: 3688 liveins: $vgpr0 3689 3690 ; SI-LABEL: name: test_load_private_p3_align1 3691 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3692 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3693 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3694 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3695 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3696 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3697 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3698 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3699 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3700 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3701 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3702 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3703 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3704 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3705 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3706 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3707 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3708 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3709 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3710 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3711 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3712 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3713 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3714 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3715 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3716 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3717 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3718 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3719 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3720 ; SI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 3721 ; SI: $vgpr0 = COPY [[INTTOPTR]](p3) 3722 ; CI-LABEL: name: test_load_private_p3_align1 3723 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3724 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3725 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3726 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3727 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3728 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3729 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3730 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3731 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3732 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3733 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3734 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3735 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3736 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3737 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3738 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3739 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3740 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3741 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3742 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3743 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3744 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3745 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3746 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3747 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3748 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3749 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3750 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3751 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3752 ; CI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 3753 ; CI: $vgpr0 = COPY [[INTTOPTR]](p3) 3754 ; VI-LABEL: name: test_load_private_p3_align1 3755 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3756 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3757 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3758 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3759 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3760 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3761 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3762 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3763 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3764 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3765 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3766 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3767 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3768 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3769 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3770 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3771 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3772 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3773 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3774 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3775 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3776 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3777 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3778 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3779 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3780 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3781 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3782 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3783 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3784 ; VI: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 3785 ; VI: $vgpr0 = COPY [[INTTOPTR]](p3) 3786 ; GFX9-LABEL: name: test_load_private_p3_align1 3787 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3788 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3789 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3790 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3791 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3792 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3793 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3794 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3795 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3796 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3797 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3798 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3799 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3800 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3801 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3802 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3803 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3804 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3805 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3806 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3807 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3808 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3809 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3810 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3811 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3812 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3813 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3814 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3815 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3816 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[OR2]](s32) 3817 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p3) 3818 %0:_(p5) = COPY $vgpr0 3819 %1:_(p3) = G_LOAD %0 :: (load 4, align 1, addrspace 5) 3820 $vgpr0 = COPY %1 3821... 3822 3823--- 3824name: test_load_private_p5_align4 3825body: | 3826 bb.0: 3827 liveins: $vgpr0 3828 3829 ; SI-LABEL: name: test_load_private_p5_align4 3830 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3831 ; SI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3832 ; SI: $vgpr0 = COPY [[LOAD]](p5) 3833 ; CI-LABEL: name: test_load_private_p5_align4 3834 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3835 ; CI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3836 ; CI: $vgpr0 = COPY [[LOAD]](p5) 3837 ; VI-LABEL: name: test_load_private_p5_align4 3838 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3839 ; VI: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3840 ; VI: $vgpr0 = COPY [[LOAD]](p5) 3841 ; GFX9-LABEL: name: test_load_private_p5_align4 3842 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3843 ; GFX9: [[LOAD:%[0-9]+]]:_(p5) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 3844 ; GFX9: $vgpr0 = COPY [[LOAD]](p5) 3845 %0:_(p5) = COPY $vgpr0 3846 %1:_(p5) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 3847 $vgpr0 = COPY %1 3848... 3849 3850--- 3851name: test_load_private_p5_align2 3852body: | 3853 bb.0: 3854 liveins: $vgpr0 3855 3856 ; SI-LABEL: name: test_load_private_p5_align2 3857 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3858 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3859 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3860 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3861 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3862 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3863 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3864 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3865 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3866 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3867 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3868 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3869 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3870 ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 3871 ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) 3872 ; CI-LABEL: name: test_load_private_p5_align2 3873 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3874 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3875 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3876 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3877 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3878 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3879 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3880 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3881 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3882 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3883 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3884 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3885 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3886 ; CI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 3887 ; CI: $vgpr0 = COPY [[INTTOPTR]](p5) 3888 ; VI-LABEL: name: test_load_private_p5_align2 3889 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3890 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3891 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3892 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3893 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3894 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3895 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3896 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3897 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3898 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3899 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3900 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3901 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3902 ; VI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 3903 ; VI: $vgpr0 = COPY [[INTTOPTR]](p5) 3904 ; GFX9-LABEL: name: test_load_private_p5_align2 3905 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3906 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 3907 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3908 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3909 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 3910 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 3911 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3912 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 3913 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3914 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 3915 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3916 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 3917 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3918 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR]](s32) 3919 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p5) 3920 %0:_(p5) = COPY $vgpr0 3921 %1:_(p5) = G_LOAD %0 :: (load 4, align 2, addrspace 5) 3922 $vgpr0 = COPY %1 3923... 3924 3925--- 3926name: test_load_private_p5_align1 3927body: | 3928 bb.0: 3929 liveins: $vgpr0 3930 3931 ; SI-LABEL: name: test_load_private_p5_align1 3932 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3933 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3934 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3935 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3936 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3937 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3938 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3939 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3940 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3941 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3942 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3943 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3944 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3945 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3946 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3947 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3948 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3949 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3950 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3951 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3952 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3953 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3954 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3955 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3956 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3957 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3958 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3959 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3960 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3961 ; SI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 3962 ; SI: $vgpr0 = COPY [[INTTOPTR]](p5) 3963 ; CI-LABEL: name: test_load_private_p5_align1 3964 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3965 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3966 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3967 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 3968 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 3969 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 3970 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 3971 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 3972 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 3973 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 3974 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 3975 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 3976 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 3977 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 3978 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 3979 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 3980 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 3981 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 3982 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 3983 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 3984 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 3985 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 3986 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 3987 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 3988 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 3989 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 3990 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 3991 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 3992 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 3993 ; CI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 3994 ; CI: $vgpr0 = COPY [[INTTOPTR]](p5) 3995 ; VI-LABEL: name: test_load_private_p5_align1 3996 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 3997 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 3998 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 3999 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4000 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4001 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4002 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4003 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 4004 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4005 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4006 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 4007 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4008 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4009 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4010 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4011 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4012 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4013 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4014 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4015 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4016 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4017 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4018 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4019 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4020 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4021 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4022 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4023 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4024 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4025 ; VI: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 4026 ; VI: $vgpr0 = COPY [[INTTOPTR]](p5) 4027 ; GFX9-LABEL: name: test_load_private_p5_align1 4028 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4029 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4030 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4031 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4032 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4033 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4034 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4035 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 4036 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4037 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4038 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 4039 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4040 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4041 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4042 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4043 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 4044 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4045 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 4046 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4047 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4048 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4049 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4050 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 4051 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 4052 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4053 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 4054 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4055 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 4056 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 4057 ; GFX9: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[OR2]](s32) 4058 ; GFX9: $vgpr0 = COPY [[INTTOPTR]](p5) 4059 %0:_(p5) = COPY $vgpr0 4060 %1:_(p5) = G_LOAD %0 :: (load 4, align 1, addrspace 5) 4061 $vgpr0 = COPY %1 4062... 4063 4064--- 4065name: test_load_private_v2s8_align2 4066body: | 4067 bb.0: 4068 liveins: $vgpr0 4069 4070 ; SI-LABEL: name: test_load_private_v2s8_align2 4071 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4072 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4073 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4074 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4075 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4076 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4077 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4078 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4079 ; SI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4080 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4081 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 4082 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 4083 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4084 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4085 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] 4086 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 4087 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4088 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4089 ; SI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 4090 ; SI: $vgpr0 = COPY [[ANYEXT]](s32) 4091 ; CI-LABEL: name: test_load_private_v2s8_align2 4092 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4093 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4094 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4095 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4096 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4097 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4098 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4099 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4100 ; CI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4101 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4102 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 4103 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) 4104 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4105 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4106 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] 4107 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[COPY1]](s32) 4108 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4109 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4110 ; CI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 4111 ; CI: $vgpr0 = COPY [[ANYEXT]](s32) 4112 ; VI-LABEL: name: test_load_private_v2s8_align2 4113 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4114 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4115 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4116 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4117 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4118 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4119 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4120 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4121 ; VI: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4122 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4123 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 4124 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 4125 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 4126 ; VI: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 4127 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 4128 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 4129 ; VI: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 4130 ; VI: $vgpr0 = COPY [[ANYEXT]](s32) 4131 ; GFX9-LABEL: name: test_load_private_v2s8_align2 4132 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4133 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4134 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4135 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4136 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4137 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4138 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4139 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4140 ; GFX9: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4141 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4142 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 4143 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 4144 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 4145 ; GFX9: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 4146 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 4147 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 4148 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 4149 ; GFX9: $vgpr0 = COPY [[ANYEXT]](s32) 4150 %0:_(p5) = COPY $vgpr0 4151 %1:_(<2 x s8>) = G_LOAD %0 :: (load 2, align 2, addrspace 5) 4152 %2:_(s16) = G_BITCAST %1 4153 %3:_(s32) = G_ANYEXT %2 4154 $vgpr0 = COPY %3 4155... 4156 4157--- 4158name: test_load_private_v2s8_align1 4159body: | 4160 bb.0: 4161 liveins: $vgpr0 4162 4163 ; SI-LABEL: name: test_load_private_v2s8_align1 4164 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4165 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4166 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4167 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4168 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4169 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4170 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4171 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4172 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4173 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 4174 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 4175 ; CI-LABEL: name: test_load_private_v2s8_align1 4176 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4177 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4178 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4179 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4180 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4181 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4182 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4183 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4184 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4185 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 4186 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 4187 ; VI-LABEL: name: test_load_private_v2s8_align1 4188 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4189 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4190 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4191 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4192 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4193 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4194 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4195 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32) 4196 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32) 4197 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY3]](s32), [[COPY4]](s32) 4198 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 4199 ; GFX9-LABEL: name: test_load_private_v2s8_align1 4200 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4201 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4202 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4203 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4204 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4205 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4206 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4207 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32) 4208 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 4209 %0:_(p5) = COPY $vgpr0 4210 %1:_(<2 x s8>) = G_LOAD %0 :: (load 2, align 1, addrspace 5) 4211 %2:_(<2 x s32>) = G_ANYEXT %1 4212 $vgpr0_vgpr1 = COPY %2 4213... 4214 4215--- 4216name: test_load_private_v3s8_align4 4217body: | 4218 bb.0: 4219 liveins: $vgpr0 4220 4221 ; SI-LABEL: name: test_load_private_v3s8_align4 4222 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4223 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 4, addrspace 1) 4224 ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4225 ; SI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4226 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4227 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4228 ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4229 ; CI-LABEL: name: test_load_private_v3s8_align4 4230 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4231 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 4, addrspace 1) 4232 ; CI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4233 ; CI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4234 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4235 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4236 ; CI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4237 ; VI-LABEL: name: test_load_private_v3s8_align4 4238 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4239 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 4, addrspace 1) 4240 ; VI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4241 ; VI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4242 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4243 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4244 ; VI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4245 ; GFX9-LABEL: name: test_load_private_v3s8_align4 4246 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4247 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 4, addrspace 1) 4248 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4249 ; GFX9: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4250 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4251 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4252 ; GFX9: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4253 %0:_(p5) = COPY $vgpr0 4254 %1:_(<3 x s8>) = G_LOAD %0 :: (load 3, addrspace 1, align 4) 4255 %2:_(<4 x s8>) = G_IMPLICIT_DEF 4256 %3:_(<4 x s8>) = G_INSERT %2, %1, 0 4257 $vgpr0 = COPY %3 4258... 4259 4260--- 4261name: test_load_private_v3s8_align1 4262body: | 4263 bb.0: 4264 liveins: $vgpr0 4265 4266 ; SI-LABEL: name: test_load_private_v3s8_align1 4267 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4268 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 1, addrspace 5) 4269 ; SI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4270 ; SI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4271 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4272 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4273 ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4274 ; CI-LABEL: name: test_load_private_v3s8_align1 4275 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4276 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 1, addrspace 5) 4277 ; CI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4278 ; CI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4279 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4280 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4281 ; CI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4282 ; VI-LABEL: name: test_load_private_v3s8_align1 4283 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4284 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 1, addrspace 5) 4285 ; VI: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4286 ; VI: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4287 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4288 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4289 ; VI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4290 ; GFX9-LABEL: name: test_load_private_v3s8_align1 4291 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4292 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s8>) = G_LOAD [[COPY]](p5) :: (load 3, align 1, addrspace 5) 4293 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s8>) = G_IMPLICIT_DEF 4294 ; GFX9: [[ANYEXT:%[0-9]+]]:_(<4 x s16>) = G_ANYEXT [[DEF]](<4 x s8>) 4295 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[ANYEXT]], [[LOAD]](<3 x s8>), 0 4296 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[INSERT]](<4 x s16>) 4297 ; GFX9: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4298 %0:_(p5) = COPY $vgpr0 4299 %1:_(<3 x s8>) = G_LOAD %0 :: (load 3, align 1, addrspace 5) 4300 %2:_(<4 x s8>) = G_IMPLICIT_DEF 4301 %3:_(<4 x s8>) = G_INSERT %2, %1, 0 4302 $vgpr0 = COPY %3 4303... 4304 4305--- 4306name: test_load_private_v4s8_align4 4307body: | 4308 bb.0: 4309 liveins: $vgpr0 4310 4311 ; SI-LABEL: name: test_load_private_v4s8_align4 4312 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4313 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4314 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4315 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4316 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4317 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4318 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4319 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4320 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4321 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4322 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4323 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4324 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4325 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4326 ; SI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4327 ; CI-LABEL: name: test_load_private_v4s8_align4 4328 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4329 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4330 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4331 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4332 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4333 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4334 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4335 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4336 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4337 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4338 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4339 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4340 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4341 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4342 ; CI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4343 ; VI-LABEL: name: test_load_private_v4s8_align4 4344 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4345 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4346 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4347 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4348 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4349 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4350 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4351 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4352 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4353 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4354 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4355 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4356 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4357 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4358 ; VI: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4359 ; GFX9-LABEL: name: test_load_private_v4s8_align4 4360 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4361 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4362 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4363 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C]](s32) 4364 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4365 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4366 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4367 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4368 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4369 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4370 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 4371 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4372 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4373 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 4374 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 4375 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 4376 ; GFX9: $vgpr0 = COPY [[TRUNC]](<4 x s8>) 4377 %0:_(p5) = COPY $vgpr0 4378 %1:_(<4 x s8>) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 4379 $vgpr0 = COPY %1 4380... 4381 4382--- 4383name: test_load_private_v8s8_align8 4384body: | 4385 bb.0: 4386 liveins: $vgpr0 4387 4388 ; SI-LABEL: name: test_load_private_v8s8_align8 4389 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4390 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 4391 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4392 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4393 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 4394 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4395 ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4396 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4397 ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4398 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4399 ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C3]](s32) 4400 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4401 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4402 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4403 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4404 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4405 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4406 ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C1]](s32) 4407 ; SI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C2]](s32) 4408 ; SI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C3]](s32) 4409 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4410 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 4411 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 4412 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 4413 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4414 ; SI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4415 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 4416 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 4417 ; CI-LABEL: name: test_load_private_v8s8_align8 4418 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4419 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 4420 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4421 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4422 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 4423 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4424 ; CI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4425 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4426 ; CI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4427 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4428 ; CI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C3]](s32) 4429 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4430 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4431 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4432 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4433 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4434 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4435 ; CI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C1]](s32) 4436 ; CI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C2]](s32) 4437 ; CI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C3]](s32) 4438 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4439 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 4440 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 4441 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 4442 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4443 ; CI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4444 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 4445 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 4446 ; VI-LABEL: name: test_load_private_v8s8_align8 4447 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4448 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 4449 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4450 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4451 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 4452 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4453 ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4454 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4455 ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4456 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4457 ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C3]](s32) 4458 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4459 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4460 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4461 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4462 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4463 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4464 ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C1]](s32) 4465 ; VI: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C2]](s32) 4466 ; VI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C3]](s32) 4467 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4468 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 4469 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 4470 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 4471 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4472 ; VI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4473 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 4474 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<8 x s8>) 4475 ; GFX9-LABEL: name: test_load_private_v8s8_align8 4476 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4477 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 4478 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4479 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4480 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 4481 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4482 ; GFX9: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C1]](s32) 4483 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4484 ; GFX9: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C2]](s32) 4485 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 4486 ; GFX9: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[LOAD]], [[C3]](s32) 4487 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4488 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32) 4489 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 4490 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LSHR1]](s32) 4491 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LSHR2]](s32) 4492 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 4493 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 4494 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 4495 ; GFX9: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C1]](s32) 4496 ; GFX9: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C2]](s32) 4497 ; GFX9: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[LOAD1]], [[C3]](s32) 4498 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4499 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LSHR3]](s32) 4500 ; GFX9: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 4501 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LSHR4]](s32) 4502 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LSHR5]](s32) 4503 ; GFX9: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 4504 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 4505 ; GFX9: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 4506 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<8 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>) 4507 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS2]](<8 x s8>) 4508 %0:_(p5) = COPY $vgpr0 4509 %1:_(<8 x s8>) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 4510 $vgpr0_vgpr1 = COPY %1 4511... 4512 4513--- 4514name: test_load_private_v16s8_align16 4515body: | 4516 bb.0: 4517 liveins: $vgpr0 4518 4519 ; SI-LABEL: name: test_load_private_v16s8_align16 4520 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4521 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 4522 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4523 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4524 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 4525 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4526 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4527 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 4528 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4529 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4530 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 4531 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4532 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 4533 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 4534 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4535 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 4536 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4537 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 4538 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4539 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 4540 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4541 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4542 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 4543 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4544 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 4545 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4546 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 4547 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4548 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 4549 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4550 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 4551 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 4552 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4553 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 4554 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4555 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 4556 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4557 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 4558 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4559 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4560 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4561 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4562 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4563 ; SI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4564 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4565 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4566 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4567 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4568 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4569 ; SI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4570 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4571 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4572 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4573 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4574 ; SI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 4575 ; SI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 4576 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4577 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4578 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4579 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4580 ; SI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 4581 ; SI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 4582 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 4583 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 4584 ; CI-LABEL: name: test_load_private_v16s8_align16 4585 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4586 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 4587 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4588 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4589 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 4590 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4591 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4592 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 4593 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4594 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4595 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 4596 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4597 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 4598 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 4599 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4600 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 4601 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4602 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 4603 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4604 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 4605 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4606 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4607 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 4608 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4609 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 4610 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4611 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 4612 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4613 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 4614 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4615 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 4616 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 4617 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4618 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 4619 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4620 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 4621 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4622 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 4623 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4624 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4625 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4626 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4627 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4628 ; CI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4629 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4630 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4631 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4632 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4633 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4634 ; CI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4635 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4636 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4637 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4638 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4639 ; CI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 4640 ; CI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 4641 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4642 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4643 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4644 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4645 ; CI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 4646 ; CI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 4647 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 4648 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 4649 ; VI-LABEL: name: test_load_private_v16s8_align16 4650 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4651 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 4652 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4653 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4654 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 4655 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4656 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4657 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 4658 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4659 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4660 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 4661 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4662 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 4663 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 4664 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4665 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 4666 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4667 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 4668 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4669 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 4670 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4671 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4672 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 4673 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4674 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 4675 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4676 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 4677 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4678 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 4679 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4680 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 4681 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 4682 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4683 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 4684 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4685 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 4686 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4687 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 4688 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4689 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4690 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4691 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4692 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32) 4693 ; VI: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR]](<4 x s32>) 4694 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4695 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4696 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4697 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4698 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32), [[COPY8]](s32) 4699 ; VI: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR1]](<4 x s32>) 4700 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4701 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4702 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4703 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4704 ; VI: [[BUILD_VECTOR2:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY9]](s32), [[COPY10]](s32), [[COPY11]](s32), [[COPY12]](s32) 4705 ; VI: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR2]](<4 x s32>) 4706 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4707 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4708 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4709 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4710 ; VI: [[BUILD_VECTOR3:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY13]](s32), [[COPY14]](s32), [[COPY15]](s32), [[COPY16]](s32) 4711 ; VI: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[BUILD_VECTOR3]](<4 x s32>) 4712 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 4713 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<16 x s8>) 4714 ; GFX9-LABEL: name: test_load_private_v16s8_align16 4715 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4716 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 4717 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4718 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4719 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 4720 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4721 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 4722 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 4723 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 4724 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 4725 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 4726 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 4727 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 4728 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 4729 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 4730 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 4731 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 4732 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 4733 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 4734 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 4735 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4736 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4737 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 4738 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 4739 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 4740 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 4741 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 4742 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 4743 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 4744 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 4745 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 4746 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 4747 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 4748 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 4749 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 4750 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 4751 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 4752 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 4753 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4754 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4755 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 4756 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 4757 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4758 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 4759 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 4760 ; GFX9: [[TRUNC:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS]](<4 x s16>) 4761 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 4762 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 4763 ; GFX9: [[BUILD_VECTOR_TRUNC2:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY5]](s32), [[COPY6]](s32) 4764 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 4765 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 4766 ; GFX9: [[BUILD_VECTOR_TRUNC3:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY7]](s32), [[COPY8]](s32) 4767 ; GFX9: [[CONCAT_VECTORS1:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC2]](<2 x s16>), [[BUILD_VECTOR_TRUNC3]](<2 x s16>) 4768 ; GFX9: [[TRUNC1:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS1]](<4 x s16>) 4769 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 4770 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 4771 ; GFX9: [[BUILD_VECTOR_TRUNC4:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY9]](s32), [[COPY10]](s32) 4772 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 4773 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 4774 ; GFX9: [[BUILD_VECTOR_TRUNC5:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY11]](s32), [[COPY12]](s32) 4775 ; GFX9: [[CONCAT_VECTORS2:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC4]](<2 x s16>), [[BUILD_VECTOR_TRUNC5]](<2 x s16>) 4776 ; GFX9: [[TRUNC2:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS2]](<4 x s16>) 4777 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 4778 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 4779 ; GFX9: [[BUILD_VECTOR_TRUNC6:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY13]](s32), [[COPY14]](s32) 4780 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 4781 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 4782 ; GFX9: [[BUILD_VECTOR_TRUNC7:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY15]](s32), [[COPY16]](s32) 4783 ; GFX9: [[CONCAT_VECTORS3:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC6]](<2 x s16>), [[BUILD_VECTOR_TRUNC7]](<2 x s16>) 4784 ; GFX9: [[TRUNC3:%[0-9]+]]:_(<4 x s8>) = G_TRUNC [[CONCAT_VECTORS3]](<4 x s16>) 4785 ; GFX9: [[CONCAT_VECTORS4:%[0-9]+]]:_(<16 x s8>) = G_CONCAT_VECTORS [[TRUNC]](<4 x s8>), [[TRUNC1]](<4 x s8>), [[TRUNC2]](<4 x s8>), [[TRUNC3]](<4 x s8>) 4786 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS4]](<16 x s8>) 4787 %0:_(p5) = COPY $vgpr0 4788 %1:_(<16 x s8>) = G_LOAD %0 :: (load 16, align 1, addrspace 56) 4789 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 4790... 4791 4792--- 4793name: test_load_private_v2s16_align4 4794body: | 4795 bb.0: 4796 liveins: $vgpr0 4797 4798 ; SI-LABEL: name: test_load_private_v2s16_align4 4799 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4800 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4801 ; SI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 4802 ; CI-LABEL: name: test_load_private_v2s16_align4 4803 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4804 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4805 ; CI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 4806 ; VI-LABEL: name: test_load_private_v2s16_align4 4807 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4808 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4809 ; VI: $vgpr0 = COPY [[LOAD]](<2 x s16>) 4810 ; GFX9-LABEL: name: test_load_private_v2s16_align4 4811 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4812 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 4813 ; GFX9: $vgpr0 = COPY [[LOAD]](<2 x s16>) 4814 %0:_(p5) = COPY $vgpr0 4815 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 4816 $vgpr0 = COPY %1 4817... 4818 4819--- 4820name: test_load_private_v2s16_align2 4821body: | 4822 bb.0: 4823 liveins: $vgpr0 4824 4825 ; SI-LABEL: name: test_load_private_v2s16_align2 4826 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4827 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4828 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4829 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4830 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 4831 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4832 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4833 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4834 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4835 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4836 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4837 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4838 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4839 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 4840 ; SI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4841 ; CI-LABEL: name: test_load_private_v2s16_align2 4842 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4843 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4844 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4845 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4846 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 4847 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4848 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4849 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4850 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4851 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4852 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4853 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4854 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4855 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 4856 ; CI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4857 ; VI-LABEL: name: test_load_private_v2s16_align2 4858 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4859 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4860 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4861 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4862 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 4863 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 4864 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4865 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 4866 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4867 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 4868 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4869 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4870 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 4871 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 4872 ; VI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4873 ; GFX9-LABEL: name: test_load_private_v2s16_align2 4874 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4875 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 4876 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4877 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4878 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 4879 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 4880 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4881 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 4882 ; GFX9: $vgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>) 4883 %0:_(p5) = COPY $vgpr0 4884 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 2, addrspace 5) 4885 $vgpr0 = COPY %1 4886... 4887 4888--- 4889name: test_load_private_v2s16_align1 4890body: | 4891 bb.0: 4892 liveins: $vgpr0 4893 4894 ; SI-LABEL: name: test_load_private_v2s16_align1 4895 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4896 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4897 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4898 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4899 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4900 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4901 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4902 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 4903 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4904 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4905 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4906 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4907 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4908 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4909 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4910 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4911 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4912 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 4913 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 4914 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 4915 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4916 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 4917 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 4918 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4919 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4920 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 4921 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 4922 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 4923 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4924 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4925 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4926 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 4927 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 4928 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 4929 ; SI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4930 ; CI-LABEL: name: test_load_private_v2s16_align1 4931 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4932 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4933 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4934 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4935 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4936 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4937 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4938 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 4939 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 4940 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 4941 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 4942 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 4943 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 4944 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 4945 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 4946 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4947 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 4948 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 4949 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 4950 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 4951 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4952 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 4953 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 4954 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 4955 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 4956 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 4957 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 4958 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 4959 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4960 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4961 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4962 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 4963 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 4964 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 4965 ; CI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4966 ; VI-LABEL: name: test_load_private_v2s16_align1 4967 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 4968 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 4969 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 4970 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 4971 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 4972 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 4973 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 4974 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 4975 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 4976 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 4977 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 4978 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 4979 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 4980 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 4981 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 4982 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 4983 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 4984 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 4985 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 4986 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 4987 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 4988 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 4989 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 4990 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 4991 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 4992 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 4993 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 4994 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 4995 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 4996 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 4997 ; VI: $vgpr0 = COPY [[BITCAST]](<2 x s16>) 4998 ; GFX9-LABEL: name: test_load_private_v2s16_align1 4999 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5000 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5001 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5002 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5003 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5004 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5005 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5006 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5007 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5008 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 5009 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5010 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 5011 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5012 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5013 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5014 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5015 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5016 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5017 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5018 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5019 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 5020 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 5021 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 5022 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 5023 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5024 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 5025 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 5026 ; GFX9: $vgpr0 = COPY [[BUILD_VECTOR_TRUNC]](<2 x s16>) 5027 %0:_(p5) = COPY $vgpr0 5028 %1:_(<2 x s16>) = G_LOAD %0 :: (load 4, align 1, addrspace 5) 5029 $vgpr0 = COPY %1 5030... 5031 5032--- 5033name: test_load_private_v3s16_align8 5034body: | 5035 bb.0: 5036 liveins: $vgpr0 5037 5038 ; SI-LABEL: name: test_load_private_v3s16_align8 5039 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5040 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5041 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5042 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5043 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 5044 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5045 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5046 ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5047 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5048 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5049 ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[LOAD]](<2 x s16>), 0 5050 ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5051 ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5052 ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5053 ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5054 ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5055 ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5056 ; CI-LABEL: name: test_load_private_v3s16_align8 5057 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5058 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5059 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5060 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5061 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 5062 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5063 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5064 ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5065 ; CI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5066 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5067 ; CI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[LOAD]](<2 x s16>), 0 5068 ; CI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5069 ; CI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5070 ; CI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5071 ; CI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5072 ; CI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5073 ; CI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5074 ; VI-LABEL: name: test_load_private_v3s16_align8 5075 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5076 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5077 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5078 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5079 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 5080 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5081 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5082 ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5083 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5084 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5085 ; VI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[LOAD]](<2 x s16>), 0 5086 ; VI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5087 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5088 ; VI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5089 ; VI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5090 ; VI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5091 ; VI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5092 ; GFX9-LABEL: name: test_load_private_v3s16_align8 5093 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5094 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5095 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5096 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5097 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 4, align 4, addrspace 5) 5098 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5099 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5100 ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5101 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5102 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5103 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[LOAD]](<2 x s16>), 0 5104 ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5105 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5106 ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5107 ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5108 ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5109 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5110 %0:_(p5) = COPY $vgpr0 5111 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 8, addrspace 5) 5112 %2:_(<4 x s16>) = G_IMPLICIT_DEF 5113 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 5114 $vgpr0_vgpr1 = COPY %3 5115... 5116 5117--- 5118name: test_load_private_v3s16_align2 5119body: | 5120 bb.0: 5121 liveins: $vgpr0 5122 5123 ; SI-LABEL: name: test_load_private_v3s16_align2 5124 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5125 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5126 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5127 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5128 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5129 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5130 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5131 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5132 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5133 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5134 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5135 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5136 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5137 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5138 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5139 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5140 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5141 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5142 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5143 ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5144 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5145 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5146 ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5147 ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5148 ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5149 ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5150 ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5151 ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5152 ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5153 ; CI-LABEL: name: test_load_private_v3s16_align2 5154 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5155 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5156 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5157 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5158 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5159 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5160 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5161 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5162 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5163 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5164 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5165 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5166 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5167 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5168 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5169 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5170 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5171 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5172 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5173 ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5174 ; CI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5175 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5176 ; CI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5177 ; CI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5178 ; CI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5179 ; CI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5180 ; CI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5181 ; CI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5182 ; CI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5183 ; VI-LABEL: name: test_load_private_v3s16_align2 5184 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5185 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5186 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5187 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5188 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5189 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5190 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5191 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5192 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5193 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5194 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5195 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5196 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5197 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5198 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5199 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5200 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5201 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5202 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5203 ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5204 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5205 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5206 ; VI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5207 ; VI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5208 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5209 ; VI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5210 ; VI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5211 ; VI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5212 ; VI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5213 ; GFX9-LABEL: name: test_load_private_v3s16_align2 5214 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5215 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5216 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5217 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5218 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5219 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5220 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5221 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5222 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5223 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 5224 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5225 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5226 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5227 ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5228 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5229 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5230 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BUILD_VECTOR_TRUNC]](<2 x s16>), 0 5231 ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5232 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5233 ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[TRUNC]](s16), 32 5234 ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5235 ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5236 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5237 %0:_(p5) = COPY $vgpr0 5238 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 2, addrspace 5) 5239 %2:_(<4 x s16>) = G_IMPLICIT_DEF 5240 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 5241 $vgpr0_vgpr1 = COPY %3 5242... 5243 5244--- 5245name: test_load_private_v3s16_align1 5246body: | 5247 bb.0: 5248 liveins: $vgpr0 5249 5250 ; SI-LABEL: name: test_load_private_v3s16_align1 5251 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5252 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5253 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5254 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5255 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5256 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5257 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5258 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5259 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5260 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5261 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5262 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5263 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5264 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5265 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5266 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5267 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5268 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5269 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5270 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5271 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5272 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5273 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5274 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5275 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5276 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 5277 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 5278 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 5279 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5280 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5281 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5282 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 5283 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5284 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5285 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5286 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C6]](s32) 5287 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5288 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5289 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5290 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5291 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5292 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5293 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 5294 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 5295 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 5296 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 5297 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 5298 ; SI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5299 ; SI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5300 ; SI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5301 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5302 ; SI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5303 ; SI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5304 ; SI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5305 ; SI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 5306 ; SI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5307 ; SI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5308 ; SI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5309 ; CI-LABEL: name: test_load_private_v3s16_align1 5310 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5311 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5312 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5313 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5314 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5315 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5316 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5317 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5318 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5319 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5320 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5321 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5322 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5323 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5324 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5325 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5326 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5327 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5328 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5329 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5330 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5331 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5332 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5333 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5334 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5335 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 5336 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 5337 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 5338 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5339 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5340 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5341 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 5342 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5343 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5344 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5345 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C6]](s32) 5346 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5347 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5348 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5349 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5350 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5351 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5352 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 5353 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 5354 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 5355 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 5356 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 5357 ; CI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5358 ; CI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5359 ; CI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5360 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5361 ; CI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5362 ; CI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5363 ; CI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5364 ; CI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 5365 ; CI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5366 ; CI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5367 ; CI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5368 ; VI-LABEL: name: test_load_private_v3s16_align1 5369 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5370 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5371 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5372 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5373 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5374 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5375 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5376 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5377 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5378 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 5379 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5380 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 5381 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5382 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5383 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5384 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5385 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5386 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5387 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5388 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5389 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 5390 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 5391 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 5392 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 5393 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5394 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5395 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5396 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 5397 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5398 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5399 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5400 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 5401 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5402 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5403 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5404 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5405 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5406 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 5407 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 5408 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 5409 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL3]] 5410 ; VI: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5411 ; VI: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5412 ; VI: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5413 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5414 ; VI: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BITCAST]](<2 x s16>), 0 5415 ; VI: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5416 ; VI: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5417 ; VI: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR3]](s16), 32 5418 ; VI: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5419 ; VI: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5420 ; VI: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5421 ; GFX9-LABEL: name: test_load_private_v3s16_align1 5422 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5423 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5424 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5425 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5426 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5427 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5428 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5429 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5430 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5431 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 5432 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5433 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 5434 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5435 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5436 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5437 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5438 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5439 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5440 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5441 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5442 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 5443 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 5444 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 5445 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 5446 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5447 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 5448 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 5449 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5450 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5451 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5452 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5453 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5454 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5455 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5456 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 5457 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 5458 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 5459 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 5460 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5461 ; GFX9: [[EXTRACT:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[DEF]](<4 x s16>), 0 5462 ; GFX9: [[DEF1:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 5463 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT]](<3 x s16>), 0 5464 ; GFX9: [[INSERT1:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT]], [[BUILD_VECTOR_TRUNC]](<2 x s16>), 0 5465 ; GFX9: [[EXTRACT1:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT1]](<4 x s16>), 0 5466 ; GFX9: [[INSERT2:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT1]](<3 x s16>), 0 5467 ; GFX9: [[INSERT3:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[INSERT2]], [[OR2]](s16), 32 5468 ; GFX9: [[EXTRACT2:%[0-9]+]]:_(<3 x s16>) = G_EXTRACT [[INSERT3]](<4 x s16>), 0 5469 ; GFX9: [[INSERT4:%[0-9]+]]:_(<4 x s16>) = G_INSERT [[DEF1]], [[EXTRACT2]](<3 x s16>), 0 5470 ; GFX9: $vgpr0_vgpr1 = COPY [[INSERT4]](<4 x s16>) 5471 %0:_(p5) = COPY $vgpr0 5472 %1:_(<3 x s16>) = G_LOAD %0 :: (load 6, align 1, addrspace 5) 5473 %2:_(<4 x s16>) = G_IMPLICIT_DEF 5474 %3:_(<4 x s16>) = G_INSERT %2, %1, 0 5475 $vgpr0_vgpr1 = COPY %3 5476... 5477 5478--- 5479name: test_load_private_v4s16_align8 5480body: | 5481 bb.0: 5482 liveins: $vgpr0 5483 ; SI-LABEL: name: test_load_private_v4s16_align8 5484 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5485 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5486 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5487 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5488 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5489 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5490 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5491 ; CI-LABEL: name: test_load_private_v4s16_align8 5492 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5493 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5494 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5495 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5496 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5497 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5498 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5499 ; VI-LABEL: name: test_load_private_v4s16_align8 5500 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5501 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5502 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5503 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5504 ; VI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5505 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5506 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5507 ; GFX9-LABEL: name: test_load_private_v4s16_align8 5508 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5509 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5510 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5511 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5512 ; GFX9: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5513 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5514 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5515 %0:_(p5) = COPY $vgpr0 5516 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 5517 $vgpr0_vgpr1 = COPY %1 5518... 5519 5520--- 5521name: test_load_private_v4s16_align4 5522body: | 5523 bb.0: 5524 liveins: $vgpr0 5525 5526 ; SI-LABEL: name: test_load_private_v4s16_align4 5527 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5528 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5529 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5530 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5531 ; SI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5532 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5533 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5534 ; CI-LABEL: name: test_load_private_v4s16_align4 5535 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5536 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5537 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5538 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5539 ; CI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5540 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5541 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5542 ; VI-LABEL: name: test_load_private_v4s16_align4 5543 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5544 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5545 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5546 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5547 ; VI: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5548 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5549 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5550 ; GFX9-LABEL: name: test_load_private_v4s16_align4 5551 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5552 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5553 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5554 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5555 ; GFX9: [[LOAD1:%[0-9]+]]:_(<2 x s16>) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5556 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[LOAD]](<2 x s16>), [[LOAD1]](<2 x s16>) 5557 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5558 %0:_(p5) = COPY $vgpr0 5559 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 4, addrspace 5) 5560 $vgpr0_vgpr1 = COPY %1 5561... 5562 5563--- 5564name: test_load_private_v4s16_align2 5565body: | 5566 bb.0: 5567 liveins: $vgpr0 5568 ; SI-LABEL: name: test_load_private_v4s16_align2 5569 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5570 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5571 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5572 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5573 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5574 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5575 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5576 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5577 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5578 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5579 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5580 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5581 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5582 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5583 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5584 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5585 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5586 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5587 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 5588 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5589 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 5590 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5591 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 5592 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 5593 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 5594 ; SI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 5595 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5596 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5597 ; CI-LABEL: name: test_load_private_v4s16_align2 5598 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5599 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5600 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5601 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5602 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5603 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5604 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5605 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5606 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5607 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5608 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5609 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5610 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5611 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5612 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5613 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5614 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5615 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5616 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 5617 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5618 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 5619 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5620 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 5621 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 5622 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 5623 ; CI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 5624 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5625 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5626 ; VI-LABEL: name: test_load_private_v4s16_align2 5627 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5628 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5629 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5630 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5631 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5632 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 5633 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5634 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 5635 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5636 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 5637 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5638 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5639 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 5640 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 5641 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5642 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5643 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5644 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5645 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 5646 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5647 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 5648 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5649 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 5650 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 5651 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 5652 ; VI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 5653 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5654 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5655 ; GFX9-LABEL: name: test_load_private_v4s16_align2 5656 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5657 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 5658 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5659 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5660 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 5661 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 5662 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5663 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY1]](s32), [[COPY2]](s32) 5664 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5665 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 5666 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 5667 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5668 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 5669 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 5670 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5671 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY3]](s32), [[COPY4]](s32) 5672 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5673 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5674 %0:_(p5) = COPY $vgpr0 5675 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 2, addrspace 5) 5676 $vgpr0_vgpr1 = COPY %1 5677... 5678 5679--- 5680name: test_load_private_v4s16_align1 5681body: | 5682 bb.0: 5683 liveins: $vgpr0 5684 5685 ; SI-LABEL: name: test_load_private_v4s16_align1 5686 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5687 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5688 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5689 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5690 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5691 ; SI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5692 ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5693 ; SI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5694 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5695 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5696 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5697 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5698 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5699 ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5700 ; SI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5701 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5702 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5703 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5704 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5705 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5706 ; SI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5707 ; SI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5708 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5709 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5710 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5711 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 5712 ; SI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 5713 ; SI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 5714 ; SI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5715 ; SI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5716 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5717 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 5718 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5719 ; SI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5720 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5721 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C6]](s32) 5722 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5723 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5724 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5725 ; SI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5726 ; SI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5727 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5728 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 5729 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 5730 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 5731 ; SI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 5732 ; SI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 5733 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s32) 5734 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 5735 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 5736 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 5737 ; SI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 5738 ; SI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 5739 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5740 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 5741 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 5742 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) 5743 ; SI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) 5744 ; SI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 5745 ; SI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 5746 ; SI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 5747 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C5]](s32) 5748 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 5749 ; SI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 5750 ; SI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5751 ; SI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5752 ; CI-LABEL: name: test_load_private_v4s16_align1 5753 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5754 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5755 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5756 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5757 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5758 ; CI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5759 ; CI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5760 ; CI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5761 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 5762 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 5763 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 5764 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 5765 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 5766 ; CI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) 5767 ; CI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[TRUNC1]] 5768 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5769 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5770 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5771 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5772 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5773 ; CI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5774 ; CI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5775 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5776 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 5777 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 5778 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[COPY2]](s32) 5779 ; CI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32) 5780 ; CI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[TRUNC3]] 5781 ; CI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5782 ; CI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5783 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5784 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C5]](s32) 5785 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5786 ; CI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5787 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5788 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C6]](s32) 5789 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5790 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5791 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5792 ; CI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5793 ; CI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5794 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5795 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 5796 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 5797 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[COPY4]](s32) 5798 ; CI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[SHL3]](s32) 5799 ; CI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[TRUNC5]] 5800 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C4]](s32) 5801 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 5802 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 5803 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 5804 ; CI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 5805 ; CI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 5806 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32) 5807 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 5808 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 5809 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[COPY6]](s32) 5810 ; CI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[SHL4]](s32) 5811 ; CI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[TRUNC7]] 5812 ; CI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 5813 ; CI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 5814 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C5]](s32) 5815 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 5816 ; CI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 5817 ; CI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5818 ; CI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5819 ; VI-LABEL: name: test_load_private_v4s16_align1 5820 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5821 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5822 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5823 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5824 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5825 ; VI: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5826 ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5827 ; VI: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5828 ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5829 ; VI: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 5830 ; VI: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5831 ; VI: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 5832 ; VI: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5833 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5834 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5835 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5836 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5837 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5838 ; VI: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5839 ; VI: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5840 ; VI: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 5841 ; VI: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 5842 ; VI: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 5843 ; VI: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 5844 ; VI: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 5845 ; VI: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 5846 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 5847 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C4]](s32) 5848 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]] 5849 ; VI: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32) 5850 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5851 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 5852 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5853 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5854 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5855 ; VI: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5856 ; VI: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5857 ; VI: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 5858 ; VI: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 5859 ; VI: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 5860 ; VI: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL3]] 5861 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 5862 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 5863 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 5864 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 5865 ; VI: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 5866 ; VI: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 5867 ; VI: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 5868 ; VI: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C1]] 5869 ; VI: [[SHL4:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C2]](s16) 5870 ; VI: [[OR4:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL4]] 5871 ; VI: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR3]](s16) 5872 ; VI: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[OR4]](s16) 5873 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C4]](s32) 5874 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL5]] 5875 ; VI: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR5]](s32) 5876 ; VI: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[BITCAST1]](<2 x s16>) 5877 ; VI: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5878 ; GFX9-LABEL: name: test_load_private_v4s16_align1 5879 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5880 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 5881 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 5882 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5883 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 5884 ; GFX9: [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 5885 ; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32) 5886 ; GFX9: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C1]] 5887 ; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD1]](s32) 5888 ; GFX9: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C1]] 5889 ; GFX9: [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 5890 ; GFX9: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C2]](s16) 5891 ; GFX9: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 5892 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 5893 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 5894 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 5895 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 5896 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 5897 ; GFX9: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD2]](s32) 5898 ; GFX9: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C1]] 5899 ; GFX9: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD3]](s32) 5900 ; GFX9: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC3]], [[C1]] 5901 ; GFX9: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C2]](s16) 5902 ; GFX9: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 5903 ; GFX9: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[OR]](s16) 5904 ; GFX9: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[OR1]](s16) 5905 ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT]](s32), [[ANYEXT1]](s32) 5906 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5907 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 5908 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 5909 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 5910 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 5911 ; GFX9: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD4]](s32) 5912 ; GFX9: [[AND4:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C1]] 5913 ; GFX9: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD5]](s32) 5914 ; GFX9: [[AND5:%[0-9]+]]:_(s16) = G_AND [[TRUNC5]], [[C1]] 5915 ; GFX9: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND5]], [[C2]](s16) 5916 ; GFX9: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND4]], [[SHL2]] 5917 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C3]](s32) 5918 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 5919 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 5920 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 5921 ; GFX9: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD6]](s32) 5922 ; GFX9: [[AND6:%[0-9]+]]:_(s16) = G_AND [[TRUNC6]], [[C1]] 5923 ; GFX9: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD7]](s32) 5924 ; GFX9: [[AND7:%[0-9]+]]:_(s16) = G_AND [[TRUNC7]], [[C1]] 5925 ; GFX9: [[SHL3:%[0-9]+]]:_(s16) = G_SHL [[AND7]], [[C2]](s16) 5926 ; GFX9: [[OR3:%[0-9]+]]:_(s16) = G_OR [[AND6]], [[SHL3]] 5927 ; GFX9: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[OR2]](s16) 5928 ; GFX9: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[OR3]](s16) 5929 ; GFX9: [[BUILD_VECTOR_TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[ANYEXT2]](s32), [[ANYEXT3]](s32) 5930 ; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BUILD_VECTOR_TRUNC]](<2 x s16>), [[BUILD_VECTOR_TRUNC1]](<2 x s16>) 5931 ; GFX9: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 5932 %0:_(p5) = COPY $vgpr0 5933 %1:_(<4 x s16>) = G_LOAD %0 :: (load 8, align 1, addrspace 5) 5934 $vgpr0_vgpr1 = COPY %1 5935... 5936 5937--- 5938name: test_load_private_v2s32_align8 5939body: | 5940 bb.0: 5941 liveins: $vgpr0 5942 5943 ; SI-LABEL: name: test_load_private_v2s32_align8 5944 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5945 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5946 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5947 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5948 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5949 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 5950 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5951 ; CI-LABEL: name: test_load_private_v2s32_align8 5952 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5953 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5954 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5955 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5956 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5957 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 5958 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5959 ; VI-LABEL: name: test_load_private_v2s32_align8 5960 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5961 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5962 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5963 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5964 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5965 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 5966 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5967 ; GFX9-LABEL: name: test_load_private_v2s32_align8 5968 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5969 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 5970 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5971 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5972 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5973 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 5974 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5975 %0:_(p5) = COPY $vgpr0 5976 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 5977 $vgpr0_vgpr1 = COPY %1 5978... 5979 5980--- 5981name: test_load_private_v2s32_align4 5982body: | 5983 bb.0: 5984 liveins: $vgpr0 5985 5986 ; SI-LABEL: name: test_load_private_v2s32_align4 5987 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5988 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5989 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5990 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5991 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 5992 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 5993 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 5994 ; CI-LABEL: name: test_load_private_v2s32_align4 5995 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 5996 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 5997 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 5998 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 5999 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6000 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 6001 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6002 ; VI-LABEL: name: test_load_private_v2s32_align4 6003 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6004 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6005 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6006 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6007 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6008 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 6009 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6010 ; GFX9-LABEL: name: test_load_private_v2s32_align4 6011 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6012 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6013 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6014 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6015 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6016 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32) 6017 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6018 %0:_(p5) = COPY $vgpr0 6019 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 4, addrspace 5) 6020 $vgpr0_vgpr1 = COPY %1 6021... 6022 6023--- 6024name: test_load_private_v2s32_align1 6025body: | 6026 bb.0: 6027 liveins: $vgpr0 6028 6029 ; SI-LABEL: name: test_load_private_v2s32_align1 6030 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6031 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 6032 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6033 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6034 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 6035 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6036 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6037 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 6038 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6039 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6040 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 6041 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6042 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6043 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6044 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6045 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6046 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6047 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6048 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6049 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6050 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6051 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6052 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6053 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6054 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6055 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6056 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6057 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6058 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6059 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6060 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6061 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 6062 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6063 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 6064 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6065 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 6066 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6067 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 6068 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6069 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6070 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6071 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6072 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6073 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6074 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6075 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6076 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6077 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6078 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6079 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6080 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6081 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6082 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 6083 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6084 ; CI-LABEL: name: test_load_private_v2s32_align1 6085 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6086 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 6087 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6088 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6089 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 6090 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6091 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6092 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 6093 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6094 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6095 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 6096 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6097 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6098 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6099 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6100 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6101 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6102 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6103 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6104 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6105 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6106 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6107 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6108 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6109 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6110 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6111 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6112 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6113 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6114 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6115 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6116 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 6117 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6118 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 6119 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6120 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 6121 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6122 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 6123 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6124 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6125 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6126 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6127 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6128 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6129 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6130 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6131 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6132 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6133 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6134 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6135 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6136 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6137 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 6138 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6139 ; VI-LABEL: name: test_load_private_v2s32_align1 6140 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6141 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 6142 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6143 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6144 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 6145 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6146 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6147 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 6148 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6149 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6150 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 6151 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6152 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6153 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6154 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6155 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6156 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6157 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6158 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6159 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6160 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6161 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6162 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6163 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6164 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6165 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6166 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6167 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6168 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6169 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6170 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6171 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 6172 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6173 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 6174 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6175 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 6176 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6177 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 6178 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6179 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6180 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6181 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6182 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6183 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6184 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6185 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6186 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6187 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6188 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6189 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6190 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6191 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6192 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 6193 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6194 ; GFX9-LABEL: name: test_load_private_v2s32_align1 6195 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6196 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 6197 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6198 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6199 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 6200 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6201 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6202 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 6203 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6204 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6205 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 6206 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6207 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6208 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6209 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6210 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6211 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6212 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6213 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6214 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6215 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6216 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6217 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6218 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6219 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6220 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6221 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6222 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6223 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6224 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6225 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6226 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 6227 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6228 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 6229 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6230 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 6231 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6232 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 6233 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6234 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6235 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6236 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6237 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6238 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6239 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6240 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6241 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6242 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6243 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6244 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6245 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6246 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6247 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32) 6248 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 6249 %0:_(p5) = COPY $vgpr0 6250 %1:_(<2 x s32>) = G_LOAD %0 :: (load 8, align 1, addrspace 5) 6251 $vgpr0_vgpr1 = COPY %1 6252... 6253 6254--- 6255name: test_load_private_v3s32_align16 6256body: | 6257 bb.0: 6258 liveins: $vgpr0 6259 6260 ; SI-LABEL: name: test_load_private_v3s32_align16 6261 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6262 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6263 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6264 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6265 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6266 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6267 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6268 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6269 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6270 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6271 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6272 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6273 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6274 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6275 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6276 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6277 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6278 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6279 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6280 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6281 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6282 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6283 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6284 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6285 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6286 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6287 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6288 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6289 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6290 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6291 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6292 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6293 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6294 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6295 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6296 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6297 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6298 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6299 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6300 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6301 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6302 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6303 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6304 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6305 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6306 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6307 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6308 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6309 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6310 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6311 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6312 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6313 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6314 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6315 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6316 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6317 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6318 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6319 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6320 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6321 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6322 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6323 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6324 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6325 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6326 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6327 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6328 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6329 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6330 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6331 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6332 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6333 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6334 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6335 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 6336 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6337 ; CI-LABEL: name: test_load_private_v3s32_align16 6338 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6339 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6340 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6341 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6342 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6343 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6344 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6345 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6346 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6347 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6348 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6349 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6350 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6351 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6352 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6353 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6354 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6355 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6356 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6357 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6358 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6359 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6360 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6361 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6362 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6363 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6364 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6365 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6366 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6367 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6368 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6369 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6370 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6371 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6372 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6373 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6374 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6375 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6376 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6377 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6378 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6379 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6380 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6381 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6382 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6383 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6384 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6385 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6386 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6387 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6388 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6389 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6390 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6391 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6392 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6393 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6394 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6395 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6396 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6397 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6398 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6399 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6400 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6401 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6402 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6403 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6404 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6405 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6406 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6407 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6408 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6409 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6410 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6411 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6412 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 6413 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6414 ; VI-LABEL: name: test_load_private_v3s32_align16 6415 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6416 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6417 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6418 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6419 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6420 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6421 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6422 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6423 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6424 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6425 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6426 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6427 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6428 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6429 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6430 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6431 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6432 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6433 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6434 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6435 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6436 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6437 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6438 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6439 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6440 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6441 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6442 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6443 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6444 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6445 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6446 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6447 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6448 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6449 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6450 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6451 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6452 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6453 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6454 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6455 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6456 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6457 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6458 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6459 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6460 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6461 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6462 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6463 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6464 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6465 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6466 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6467 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6468 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6469 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6470 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6471 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6472 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6473 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6474 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6475 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6476 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6477 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6478 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6479 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6480 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6481 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6482 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6483 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6484 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6485 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6486 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6487 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6488 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6489 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 6490 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6491 ; GFX9-LABEL: name: test_load_private_v3s32_align16 6492 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6493 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6494 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6495 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6496 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6497 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6498 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6499 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6500 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6501 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6502 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6503 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6504 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6505 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6506 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6507 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6508 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6509 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6510 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6511 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6512 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6513 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6514 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6515 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6516 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6517 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6518 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6519 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6520 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6521 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6522 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6523 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6524 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6525 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6526 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6527 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6528 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6529 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6530 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6531 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6532 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6533 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6534 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6535 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6536 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6537 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6538 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6539 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6540 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6541 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6542 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6543 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6544 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6545 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6546 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6547 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6548 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6549 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6550 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6551 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6552 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6553 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6554 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6555 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6556 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6557 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6558 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6559 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6560 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6561 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6562 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6563 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6564 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6565 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6566 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 6567 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6568 %0:_(p5) = COPY $vgpr0 6569 %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 1, addrspace 56) 6570 $vgpr0_vgpr1_vgpr2 = COPY %1 6571... 6572 6573--- 6574name: test_load_private_v3s32_align4 6575body: | 6576 bb.0: 6577 liveins: $vgpr0 6578 6579 ; SI-LABEL: name: test_load_private_v3s32_align4 6580 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6581 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6582 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6583 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6584 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6585 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6586 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6587 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 6588 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 6589 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6590 ; CI-LABEL: name: test_load_private_v3s32_align4 6591 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6592 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6593 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6594 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6595 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6596 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6597 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6598 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 6599 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 6600 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6601 ; VI-LABEL: name: test_load_private_v3s32_align4 6602 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6603 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6604 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6605 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6606 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6607 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6608 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6609 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 6610 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 6611 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6612 ; GFX9-LABEL: name: test_load_private_v3s32_align4 6613 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6614 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 6615 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6616 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6617 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 6618 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6619 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6620 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 6621 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 6622 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 6623 %0:_(p5) = COPY $vgpr0 6624 %1:_(<3 x s32>) = G_LOAD %0 :: (load 12, align 4, addrspace 5) 6625 $vgpr0_vgpr1_vgpr2 = COPY %1 6626... 6627 6628--- 6629name: test_load_private_v4s32_align16 6630body: | 6631 bb.0: 6632 liveins: $vgpr0 6633 6634 ; SI-LABEL: name: test_load_private_v4s32_align16 6635 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6636 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6637 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6638 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6639 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6640 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6641 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6642 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6643 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6644 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6645 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6646 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6647 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6648 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6649 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6650 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6651 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6652 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6653 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6654 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6655 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6656 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6657 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6658 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6659 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6660 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6661 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6662 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6663 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6664 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6665 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6666 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6667 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6668 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6669 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6670 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6671 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6672 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6673 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6674 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6675 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6676 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6677 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6678 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6679 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6680 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6681 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6682 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6683 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6684 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6685 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6686 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6687 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6688 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6689 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6690 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6691 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6692 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6693 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6694 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6695 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6696 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6697 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6698 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6699 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6700 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6701 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6702 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6703 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6704 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6705 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6706 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6707 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6708 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6709 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6710 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 6711 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 6712 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6713 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 6714 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6715 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 6716 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6717 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 6718 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6719 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 6720 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6721 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 6722 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 6723 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 6724 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6725 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 6726 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 6727 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 6728 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6729 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 6730 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 6731 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 6732 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 6733 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 6734 ; CI-LABEL: name: test_load_private_v4s32_align16 6735 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6736 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6737 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6738 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6739 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6740 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6741 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6742 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6743 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6744 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6745 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6746 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6747 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6748 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6749 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6750 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6751 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6752 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6753 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6754 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6755 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6756 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6757 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6758 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6759 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6760 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6761 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6762 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6763 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6764 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6765 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6766 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6767 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6768 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6769 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6770 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6771 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6772 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6773 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6774 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6775 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6776 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6777 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6778 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6779 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6780 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6781 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6782 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6783 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6784 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6785 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6786 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6787 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6788 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6789 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6790 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6791 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6792 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6793 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6794 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6795 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6796 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6797 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6798 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6799 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6800 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6801 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6802 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6803 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6804 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6805 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6806 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6807 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6808 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6809 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6810 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 6811 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 6812 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6813 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 6814 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6815 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 6816 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6817 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 6818 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6819 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 6820 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6821 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 6822 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 6823 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 6824 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6825 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 6826 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 6827 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 6828 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6829 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 6830 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 6831 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 6832 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 6833 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 6834 ; VI-LABEL: name: test_load_private_v4s32_align16 6835 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6836 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6837 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6838 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6839 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6840 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6841 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6842 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6843 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6844 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6845 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6846 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6847 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6848 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6849 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6850 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6851 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6852 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6853 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6854 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6855 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6856 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6857 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6858 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6859 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6860 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6861 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6862 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6863 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6864 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6865 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6866 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6867 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6868 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6869 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6870 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6871 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6872 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6873 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6874 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6875 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6876 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6877 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6878 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6879 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6880 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6881 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6882 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6883 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6884 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6885 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6886 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6887 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6888 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6889 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6890 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6891 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6892 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6893 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6894 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6895 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6896 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6897 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6898 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6899 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 6900 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 6901 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 6902 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 6903 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 6904 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 6905 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 6906 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 6907 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 6908 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 6909 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 6910 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 6911 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 6912 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 6913 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 6914 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 6915 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 6916 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 6917 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 6918 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 6919 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 6920 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 6921 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 6922 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 6923 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 6924 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 6925 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 6926 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 6927 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 6928 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 6929 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 6930 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 6931 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 6932 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 6933 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 6934 ; GFX9-LABEL: name: test_load_private_v4s32_align16 6935 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 6936 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 56) 6937 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 6938 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 6939 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 56) 6940 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 6941 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 6942 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 56) 6943 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 6944 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 6945 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 56) 6946 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 6947 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 6948 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 6949 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 6950 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 6951 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 6952 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 6953 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 6954 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 6955 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 6956 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 6957 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 6958 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 6959 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 6960 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 6961 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 6962 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 6963 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 6964 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 6965 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 6966 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 56) 6967 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 6968 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 56) 6969 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 6970 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 56) 6971 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 6972 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 56) 6973 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 6974 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 6975 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 6976 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 6977 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 6978 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 6979 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 6980 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 6981 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 6982 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 6983 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 6984 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 6985 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 6986 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 6987 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 6988 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 56) 6989 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 6990 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 56) 6991 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 6992 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 56) 6993 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 6994 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 56) 6995 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 6996 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 6997 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 6998 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 6999 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7000 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7001 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7002 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7003 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7004 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7005 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7006 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7007 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7008 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7009 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7010 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 7011 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 56) 7012 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 7013 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 56) 7014 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 7015 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 56) 7016 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 7017 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 56) 7018 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 7019 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 7020 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 7021 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 7022 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 7023 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 7024 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 7025 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 7026 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 7027 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 7028 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 7029 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 7030 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 7031 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 7032 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 7033 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7034 %0:_(p5) = COPY $vgpr0 7035 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 1, addrspace 56) 7036 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7037... 7038 7039--- 7040name: test_load_private_v4s32_align8 7041body: | 7042 bb.0: 7043 liveins: $vgpr0 7044 7045 ; SI-LABEL: name: test_load_private_v4s32_align8 7046 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7047 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 7048 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7049 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7050 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7051 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7052 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7053 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 7054 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7055 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7056 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7057 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7058 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7059 ; CI-LABEL: name: test_load_private_v4s32_align8 7060 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7061 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 7062 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7063 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7064 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7065 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7066 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7067 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 7068 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7069 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7070 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7071 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7072 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7073 ; VI-LABEL: name: test_load_private_v4s32_align8 7074 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7075 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 7076 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7077 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7078 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7079 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7080 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7081 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 7082 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7083 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7084 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7085 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7086 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7087 ; GFX9-LABEL: name: test_load_private_v4s32_align8 7088 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7089 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 7090 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7091 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7092 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7093 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7094 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7095 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 7096 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7097 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7098 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7099 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7100 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7101 %0:_(p5) = COPY $vgpr0 7102 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 8, addrspace 5) 7103 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7104... 7105 7106--- 7107name: test_load_private_v4s32_align4 7108body: | 7109 bb.0: 7110 liveins: $vgpr0 7111 7112 ; SI-LABEL: name: test_load_private_v4s32_align4 7113 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7114 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7115 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7116 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7117 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7118 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7119 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7120 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7121 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7122 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7123 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7124 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7125 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7126 ; CI-LABEL: name: test_load_private_v4s32_align4 7127 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7128 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7129 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7130 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7131 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7132 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7133 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7134 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7135 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7136 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7137 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7138 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7139 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7140 ; VI-LABEL: name: test_load_private_v4s32_align4 7141 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7142 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7143 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7144 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7145 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7146 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7147 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7148 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7149 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7150 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7151 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7152 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7153 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7154 ; GFX9-LABEL: name: test_load_private_v4s32_align4 7155 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7156 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7157 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7158 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7159 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7160 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7161 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7162 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7163 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7164 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7165 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7166 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32), [[LOAD3]](s32) 7167 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7168 %0:_(p5) = COPY $vgpr0 7169 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 4, addrspace 5) 7170 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7171... 7172 7173--- 7174name: test_load_private_v4s32_align2 7175body: | 7176 bb.0: 7177 liveins: $vgpr0 7178 7179 ; SI-LABEL: name: test_load_private_v4s32_align2 7180 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7181 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 7182 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7183 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7184 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 7185 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7186 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7187 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7188 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7189 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7190 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7191 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7192 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7193 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7194 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 7195 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 7196 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7197 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 7198 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7199 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7200 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7201 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7202 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7203 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7204 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7205 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7206 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 7207 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7208 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 7209 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7210 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 7211 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7212 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 7213 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 7214 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 7215 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7216 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 7217 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 7218 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7219 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 7220 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7221 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 7222 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7223 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 7224 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 7225 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 7226 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 7227 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7228 ; CI-LABEL: name: test_load_private_v4s32_align2 7229 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7230 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 7231 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7232 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7233 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 7234 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7235 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7236 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7237 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7238 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7239 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7240 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7241 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7242 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7243 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 7244 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 7245 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7246 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 7247 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7248 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7249 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7250 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7251 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7252 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7253 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7254 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7255 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 7256 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7257 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 7258 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7259 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 7260 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7261 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 7262 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 7263 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 7264 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7265 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 7266 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 7267 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7268 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 7269 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7270 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 7271 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7272 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 7273 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 7274 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 7275 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 7276 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7277 ; VI-LABEL: name: test_load_private_v4s32_align2 7278 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7279 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 7280 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7281 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7282 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 7283 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7284 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7285 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7286 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7287 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7288 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7289 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7290 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7291 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7292 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 7293 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 7294 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7295 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 7296 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7297 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7298 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7299 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7300 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7301 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7302 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7303 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7304 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 7305 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7306 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 7307 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7308 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 7309 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7310 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 7311 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 7312 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 7313 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7314 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 7315 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 7316 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7317 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 7318 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7319 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 7320 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7321 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 7322 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 7323 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 7324 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 7325 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7326 ; GFX9-LABEL: name: test_load_private_v4s32_align2 7327 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7328 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 7329 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7330 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7331 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 7332 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 7333 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7334 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 7335 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7336 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 7337 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7338 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 7339 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7340 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7341 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 7342 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 7343 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7344 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 7345 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7346 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 7347 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7348 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 7349 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 7350 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 7351 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7352 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7353 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 7354 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7355 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 7356 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7357 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 7358 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7359 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 7360 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 7361 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 7362 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7363 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 7364 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 7365 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 7366 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 7367 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7368 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 7369 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7370 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 7371 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 7372 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 7373 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32), [[OR3]](s32) 7374 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7375 %0:_(p5) = COPY $vgpr0 7376 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 2, addrspace 5) 7377 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7378... 7379 7380--- 7381name: test_load_private_v4s32_align1 7382body: | 7383 bb.0: 7384 liveins: $vgpr0 7385 7386 ; SI-LABEL: name: test_load_private_v4s32_align1 7387 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7388 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 7389 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7390 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7391 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 7392 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7393 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7394 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 7395 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 7396 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7397 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 7398 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7399 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7400 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7401 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7402 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7403 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7404 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7405 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7406 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7407 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7408 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7409 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 7410 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 7411 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7412 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7413 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 7414 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 7415 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 7416 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7417 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 7418 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 7419 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7420 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 7421 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 7422 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 7423 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 7424 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 7425 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7426 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7427 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7428 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 7429 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 7430 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 7431 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7432 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7433 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 7434 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 7435 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7436 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 7437 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 7438 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 7439 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7440 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 7441 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 7442 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 7443 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 7444 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 7445 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 7446 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 7447 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 7448 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 7449 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 7450 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 7451 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7452 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7453 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7454 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7455 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7456 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7457 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7458 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7459 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7460 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7461 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7462 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 7463 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 7464 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 7465 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 7466 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 7467 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 7468 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 7469 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 7470 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 7471 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 7472 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 7473 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 7474 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 7475 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 7476 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 7477 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 7478 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 7479 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 7480 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 7481 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 7482 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 7483 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 7484 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 7485 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7486 ; CI-LABEL: name: test_load_private_v4s32_align1 7487 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7488 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 7489 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7490 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7491 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 7492 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7493 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7494 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 7495 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 7496 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7497 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 7498 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7499 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7500 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7501 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7502 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7503 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7504 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7505 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7506 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7507 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7508 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7509 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 7510 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 7511 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7512 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7513 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 7514 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 7515 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 7516 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7517 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 7518 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 7519 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7520 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 7521 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 7522 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 7523 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 7524 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 7525 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7526 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7527 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7528 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 7529 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 7530 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 7531 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7532 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7533 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 7534 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 7535 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7536 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 7537 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 7538 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 7539 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7540 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 7541 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 7542 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 7543 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 7544 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 7545 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 7546 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 7547 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 7548 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 7549 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 7550 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 7551 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7552 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7553 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7554 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7555 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7556 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7557 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7558 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7559 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7560 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7561 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7562 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 7563 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 7564 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 7565 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 7566 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 7567 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 7568 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 7569 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 7570 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 7571 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 7572 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 7573 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 7574 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 7575 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 7576 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 7577 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 7578 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 7579 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 7580 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 7581 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 7582 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 7583 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 7584 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 7585 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7586 ; VI-LABEL: name: test_load_private_v4s32_align1 7587 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7588 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 7589 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7590 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7591 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 7592 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7593 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7594 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 7595 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 7596 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7597 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 7598 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7599 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7600 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7601 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7602 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7603 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7604 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7605 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7606 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7607 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7608 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7609 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 7610 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 7611 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7612 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7613 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 7614 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 7615 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 7616 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7617 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 7618 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 7619 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7620 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 7621 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 7622 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 7623 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 7624 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 7625 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7626 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7627 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7628 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 7629 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 7630 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 7631 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7632 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7633 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 7634 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 7635 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7636 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 7637 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 7638 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 7639 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7640 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 7641 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 7642 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 7643 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 7644 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 7645 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 7646 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 7647 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 7648 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 7649 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 7650 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 7651 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7652 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7653 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7654 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7655 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7656 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7657 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7658 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7659 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7660 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7661 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7662 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 7663 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 7664 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 7665 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 7666 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 7667 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 7668 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 7669 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 7670 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 7671 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 7672 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 7673 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 7674 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 7675 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 7676 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 7677 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 7678 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 7679 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 7680 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 7681 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 7682 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 7683 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 7684 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 7685 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7686 ; GFX9-LABEL: name: test_load_private_v4s32_align1 7687 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7688 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 7689 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7690 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7691 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 7692 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7693 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7694 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 7695 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 7696 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7697 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 7698 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7699 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7700 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7701 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7702 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7703 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7704 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7705 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7706 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7707 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7708 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7709 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 7710 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 7711 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7712 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7713 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 7714 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 7715 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 7716 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7717 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 7718 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 7719 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7720 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 7721 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 7722 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 7723 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 7724 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 7725 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7726 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7727 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7728 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 7729 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 7730 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 7731 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7732 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7733 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 7734 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 7735 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7736 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 7737 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 7738 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 7739 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7740 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 7741 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 7742 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 7743 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 7744 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 7745 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 7746 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 7747 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 7748 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 7749 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 7750 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 7751 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7752 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7753 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7754 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7755 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7756 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7757 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7758 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7759 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7760 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7761 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 7762 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 7763 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 7764 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 7765 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 7766 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 7767 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 7768 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 7769 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 7770 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 7771 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 7772 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 7773 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 7774 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 7775 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 7776 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 7777 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 7778 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 7779 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 7780 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 7781 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 7782 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 7783 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 7784 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32), [[OR11]](s32) 7785 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 7786 %0:_(p5) = COPY $vgpr0 7787 %1:_(<4 x s32>) = G_LOAD %0 :: (load 16, align 1, addrspace 5) 7788 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7789... 7790 7791--- 7792name: test_load_private_v8s32_align32 7793body: | 7794 bb.0: 7795 liveins: $vgpr0 7796 7797 ; SI-LABEL: name: test_load_private_v8s32_align32 7798 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7799 ; SI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7800 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) 7801 ; CI-LABEL: name: test_load_private_v8s32_align32 7802 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7803 ; CI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7804 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) 7805 ; VI-LABEL: name: test_load_private_v8s32_align32 7806 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7807 ; VI: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7808 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) 7809 ; GFX9-LABEL: name: test_load_private_v8s32_align32 7810 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7811 ; GFX9: [[LOAD:%[0-9]+]]:_(<8 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7812 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[LOAD]](<8 x s32>) 7813 %0:_(p5) = COPY $vgpr0 7814 %1:_(<8 x s32>) = G_LOAD %0 :: (load 16, align 32, addrspace 5) 7815 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 7816... 7817 7818--- 7819name: test_load_private_v16s32_align32 7820body: | 7821 bb.0: 7822 liveins: $vgpr0 7823 7824 ; SI-LABEL: name: test_load_private_v16s32_align32 7825 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7826 ; SI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7827 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 7828 ; CI-LABEL: name: test_load_private_v16s32_align32 7829 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7830 ; CI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7831 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 7832 ; VI-LABEL: name: test_load_private_v16s32_align32 7833 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7834 ; VI: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7835 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 7836 ; GFX9-LABEL: name: test_load_private_v16s32_align32 7837 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7838 ; GFX9: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p5) :: (load 16, align 32, addrspace 5) 7839 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY [[LOAD]](<16 x s32>) 7840 %0:_(p5) = COPY $vgpr0 7841 %1:_(<16 x s32>) = G_LOAD %0 :: (load 16, align 32, addrspace 5) 7842 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY %1 7843... 7844 7845--- 7846name: test_load_private_v2s64_align4 7847body: | 7848 bb.0: 7849 liveins: $vgpr0 7850 7851 ; SI-LABEL: name: test_load_private_v2s64_align4 7852 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7853 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7854 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7855 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7856 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7857 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 7858 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7859 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7860 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7861 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7862 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7863 ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 7864 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 7865 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 7866 ; CI-LABEL: name: test_load_private_v2s64_align4 7867 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7868 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7869 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7870 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7871 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7872 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 7873 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7874 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7875 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7876 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7877 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7878 ; CI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 7879 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 7880 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 7881 ; VI-LABEL: name: test_load_private_v2s64_align4 7882 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7883 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7884 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7885 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7886 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7887 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 7888 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7889 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7890 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7891 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7892 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7893 ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 7894 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 7895 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 7896 ; GFX9-LABEL: name: test_load_private_v2s64_align4 7897 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7898 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 7899 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7900 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7901 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 7902 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 7903 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7904 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7905 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 7906 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 7907 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 7908 ; GFX9: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 7909 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 7910 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 7911 %0:_(p5) = COPY $vgpr0 7912 %1:_(<2 x s64>) = G_LOAD %0 :: (load 16, align 4, addrspace 5) 7913 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 7914... 7915 7916--- 7917name: test_load_private_v2s64_align16 7918body: | 7919 bb.0: 7920 liveins: $vgpr0 7921 7922 ; SI-LABEL: name: test_load_private_v2s64_align16 7923 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 7924 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 7925 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 7926 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 7927 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 7928 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 7929 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 7930 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 7931 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 7932 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 7933 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 7934 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 7935 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 7936 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 7937 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 7938 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 7939 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 7940 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 7941 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 7942 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 7943 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 7944 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 7945 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 7946 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 7947 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 7948 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 7949 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 7950 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 7951 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 7952 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 7953 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 7954 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 7955 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 7956 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 7957 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 7958 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 7959 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 7960 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 7961 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 7962 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 7963 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 7964 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 7965 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 7966 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 7967 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 7968 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 7969 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 7970 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 7971 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 7972 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 7973 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 7974 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 7975 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 7976 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 7977 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 7978 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 7979 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 7980 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 7981 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 7982 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 7983 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 7984 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 7985 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 7986 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 7987 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 7988 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 7989 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 7990 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 7991 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 7992 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 7993 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 7994 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 7995 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 7996 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 7997 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 7998 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 7999 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 8000 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 8001 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 8002 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 8003 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 8004 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 8005 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 8006 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 8007 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 8008 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 8009 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 8010 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 8011 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 8012 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 8013 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 8014 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 8015 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 8016 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 8017 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 8018 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 8019 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 8020 ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR8]](s32), [[OR11]](s32) 8021 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 8022 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 8023 ; CI-LABEL: name: test_load_private_v2s64_align16 8024 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8025 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 8026 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8027 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8028 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 8029 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8030 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8031 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 8032 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8033 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8034 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 8035 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8036 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8037 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8038 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8039 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8040 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8041 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8042 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8043 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8044 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8045 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8046 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8047 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8048 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8049 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8050 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8051 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8052 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8053 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8054 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 8055 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 8056 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8057 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 8058 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8059 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 8060 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8061 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 8062 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8063 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8064 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8065 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8066 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8067 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8068 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8069 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8070 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8071 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8072 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8073 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8074 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8075 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8076 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 8077 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 8078 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 8079 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8080 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 8081 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8082 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 8083 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8084 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 8085 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8086 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8087 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8088 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8089 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8090 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8091 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8092 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8093 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8094 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8095 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8096 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8097 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8098 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8099 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 8100 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 8101 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 8102 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 8103 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 8104 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 8105 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 8106 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 8107 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 8108 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 8109 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 8110 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 8111 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 8112 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 8113 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 8114 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 8115 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 8116 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 8117 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 8118 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 8119 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 8120 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 8121 ; CI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR8]](s32), [[OR11]](s32) 8122 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 8123 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 8124 ; VI-LABEL: name: test_load_private_v2s64_align16 8125 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8126 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 8127 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8128 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8129 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 8130 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8131 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8132 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 8133 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8134 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8135 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 8136 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8137 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8138 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8139 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8140 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8141 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8142 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8143 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8144 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8145 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8146 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8147 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8148 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8149 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8150 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8151 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8152 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8153 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8154 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8155 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 8156 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 8157 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8158 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 8159 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8160 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 8161 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8162 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 8163 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8164 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8165 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8166 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8167 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8168 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8169 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8170 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8171 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8172 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8173 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8174 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8175 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8176 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8177 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 8178 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 8179 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 8180 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8181 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 8182 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8183 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 8184 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8185 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 8186 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8187 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8188 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8189 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8190 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8191 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8192 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8193 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8194 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8195 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8196 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8197 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8198 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8199 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8200 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 8201 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 8202 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 8203 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 8204 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 8205 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 8206 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 8207 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 8208 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 8209 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 8210 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 8211 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 8212 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 8213 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 8214 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 8215 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 8216 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 8217 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 8218 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 8219 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 8220 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 8221 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 8222 ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR8]](s32), [[OR11]](s32) 8223 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 8224 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 8225 ; GFX9-LABEL: name: test_load_private_v2s64_align16 8226 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8227 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 8228 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 8229 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8230 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 8231 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 8232 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8233 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 8234 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 8235 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8236 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 8237 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 8238 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 8239 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 8240 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 8241 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 8242 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8243 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 8244 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 8245 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 8246 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 8247 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8248 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 8249 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 8250 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 8251 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 8252 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8253 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 8254 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 8255 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8256 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 8257 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 8258 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8259 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 8260 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 8261 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 8262 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 8263 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 8264 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 8265 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 8266 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 8267 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 8268 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 8269 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 8270 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 8271 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 8272 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 8273 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 8274 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 8275 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 8276 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 8277 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 8278 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR2]](s32), [[OR5]](s32) 8279 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 8280 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 8281 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 8282 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 8283 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 8284 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 8285 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 8286 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 8287 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 8288 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 8289 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 8290 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 8291 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 8292 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 8293 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 8294 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 8295 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 8296 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 8297 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 8298 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 8299 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 8300 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 8301 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C7]](s32) 8302 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 8303 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 8304 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 8305 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 8306 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 8307 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 8308 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 8309 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 8310 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 8311 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 8312 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 8313 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 8314 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 8315 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 8316 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 8317 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 8318 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 8319 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 8320 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 8321 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 8322 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 8323 ; GFX9: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR8]](s32), [[OR11]](s32) 8324 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64) 8325 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 8326 %0:_(p5) = COPY $vgpr0 8327 %1:_(<2 x s64>) = G_LOAD %0 :: (load 16, align 1, addrspace 5) 8328 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8329... 8330 8331--- 8332name: test_load_private_v3s64_align32 8333body: | 8334 bb.0: 8335 liveins: $vgpr0 8336 8337 ; SI-LABEL: name: test_load_private_v3s64_align32 8338 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8339 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8340 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8341 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8342 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8343 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8344 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8345 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8346 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8347 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8348 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8349 ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8350 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8351 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8352 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8353 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8354 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8355 ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8356 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) 8357 ; SI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 8358 ; SI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 8359 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 8360 ; CI-LABEL: name: test_load_private_v3s64_align32 8361 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8362 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8363 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8364 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8365 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8366 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8367 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8368 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8369 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8370 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8371 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8372 ; CI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8373 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8374 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8375 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8376 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8377 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8378 ; CI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8379 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) 8380 ; CI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 8381 ; CI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 8382 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 8383 ; VI-LABEL: name: test_load_private_v3s64_align32 8384 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8385 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8386 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8387 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8388 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8389 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8390 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8391 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8392 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8393 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8394 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8395 ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8396 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8397 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8398 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8399 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8400 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8401 ; VI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8402 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) 8403 ; VI: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 8404 ; VI: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 8405 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 8406 ; GFX9-LABEL: name: test_load_private_v3s64_align32 8407 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8408 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8409 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8410 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8411 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8412 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8413 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8414 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8415 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8416 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8417 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8418 ; GFX9: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8419 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8420 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8421 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8422 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8423 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8424 ; GFX9: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8425 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64) 8426 ; GFX9: [[DEF:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF 8427 ; GFX9: [[INSERT:%[0-9]+]]:_(<4 x s64>) = G_INSERT [[DEF]], [[BUILD_VECTOR]](<3 x s64>), 0 8428 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[INSERT]](<4 x s64>) 8429 %0:_(p5) = COPY $vgpr0 8430 %1:_(<3 x s64>) = G_LOAD %0 :: (load 24, align 32, addrspace 5) 8431 %2:_(<4 x s64>) = G_IMPLICIT_DEF 8432 %3:_(<4 x s64>) = G_INSERT %2, %1, 0 8433 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %3 8434... 8435 8436--- 8437name: test_load_private_v4s64_align32 8438body: | 8439 bb.0: 8440 liveins: $vgpr0 8441 8442 ; SI-LABEL: name: test_load_private_v4s64_align32 8443 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8444 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8445 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8446 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8447 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8448 ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8449 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8450 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8451 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8452 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8453 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8454 ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8455 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8456 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8457 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8458 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8459 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8460 ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8461 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8462 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8463 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8464 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8465 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8466 ; SI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8467 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64) 8468 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 8469 ; CI-LABEL: name: test_load_private_v4s64_align32 8470 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8471 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8472 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8473 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8474 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8475 ; CI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8476 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8477 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8478 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8479 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8480 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8481 ; CI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8482 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8483 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8484 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8485 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8486 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8487 ; CI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8488 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8489 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8490 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8491 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8492 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8493 ; CI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8494 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64) 8495 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 8496 ; VI-LABEL: name: test_load_private_v4s64_align32 8497 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8498 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8499 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8500 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8501 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8502 ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8503 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8504 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8505 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8506 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8507 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8508 ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8509 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8510 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8511 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8512 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8513 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8514 ; VI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8515 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8516 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8517 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8518 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8519 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8520 ; VI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8521 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64) 8522 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 8523 ; GFX9-LABEL: name: test_load_private_v4s64_align32 8524 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8525 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 32, addrspace 5) 8526 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8527 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8528 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8529 ; GFX9: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8530 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8531 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8532 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8533 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8534 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8535 ; GFX9: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8536 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8537 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8538 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 16, addrspace 5) 8539 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8540 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8541 ; GFX9: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8542 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8543 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8544 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8545 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8546 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8547 ; GFX9: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8548 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[MV]](s64), [[MV1]](s64), [[MV2]](s64), [[MV3]](s64) 8549 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 8550 %0:_(p5) = COPY $vgpr0 8551 %1:_(<4 x s64>) = G_LOAD %0 :: (load 32, align 32, addrspace 5) 8552 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 8553... 8554 8555--- 8556name: test_load_private_v2p1_align4 8557body: | 8558 bb.0: 8559 liveins: $vgpr0 8560 8561 ; SI-LABEL: name: test_load_private_v2p1_align4 8562 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8563 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8564 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8565 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8566 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8567 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8568 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8569 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8570 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 8571 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8572 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8573 ; SI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8574 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 8575 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>) 8576 ; CI-LABEL: name: test_load_private_v2p1_align4 8577 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8578 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8579 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8580 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8581 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8582 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8583 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8584 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8585 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 8586 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8587 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8588 ; CI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8589 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 8590 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>) 8591 ; VI-LABEL: name: test_load_private_v2p1_align4 8592 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8593 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8594 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8595 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8596 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8597 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8598 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8599 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8600 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 8601 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8602 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8603 ; VI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8604 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 8605 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>) 8606 ; GFX9-LABEL: name: test_load_private_v2p1_align4 8607 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8608 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8609 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8610 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8611 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8612 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8613 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8614 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8615 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 8616 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8617 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8618 ; GFX9: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8619 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1) 8620 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p1>) 8621 %0:_(p5) = COPY $vgpr0 8622 %1:_(<2 x p1>) = G_LOAD %0 :: (load 16, align 4, addrspace 5) 8623 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8624... 8625 8626--- 8627name: test_load_private_v4p1_align8 8628body: | 8629 bb.0: 8630 liveins: $vgpr0 8631 8632 ; SI-LABEL: name: test_load_private_v4p1_align8 8633 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8634 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8635 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8636 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8637 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8638 ; SI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8639 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8640 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8641 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8642 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8643 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8644 ; SI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8645 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8646 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8647 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 8, addrspace 5) 8648 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8649 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8650 ; SI: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8651 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8652 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8653 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8654 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8655 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8656 ; SI: [[MV3:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8657 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1), [[MV2]](p1), [[MV3]](p1) 8658 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p1>) 8659 ; CI-LABEL: name: test_load_private_v4p1_align8 8660 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8661 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8662 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8663 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8664 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8665 ; CI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8666 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8667 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8668 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8669 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8670 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8671 ; CI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8672 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8673 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8674 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 8, addrspace 5) 8675 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8676 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8677 ; CI: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8678 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8679 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8680 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8681 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8682 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8683 ; CI: [[MV3:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8684 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1), [[MV2]](p1), [[MV3]](p1) 8685 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p1>) 8686 ; VI-LABEL: name: test_load_private_v4p1_align8 8687 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8688 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8689 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8690 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8691 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8692 ; VI: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8693 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8694 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8695 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8696 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8697 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8698 ; VI: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8699 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8700 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8701 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 8, addrspace 5) 8702 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8703 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8704 ; VI: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8705 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8706 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8707 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8708 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8709 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8710 ; VI: [[MV3:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8711 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1), [[MV2]](p1), [[MV3]](p1) 8712 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p1>) 8713 ; GFX9-LABEL: name: test_load_private_v4p1_align8 8714 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8715 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8716 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8717 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8718 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8719 ; GFX9: [[MV:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32) 8720 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 8721 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 8722 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 8723 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 8724 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 8725 ; GFX9: [[MV1:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32) 8726 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 8727 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 8728 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, align 8, addrspace 5) 8729 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 8730 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 8731 ; GFX9: [[MV2:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32) 8732 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 8733 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 8734 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 4 + 24, align 8, addrspace 5) 8735 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 8736 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 4 + 28, addrspace 5) 8737 ; GFX9: [[MV3:%[0-9]+]]:_(p1) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32) 8738 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x p1>) = G_BUILD_VECTOR [[MV]](p1), [[MV1]](p1), [[MV2]](p1), [[MV3]](p1) 8739 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x p1>) 8740 %0:_(p5) = COPY $vgpr0 8741 %1:_(<4 x p1>) = G_LOAD %0 :: (load 32, align 8, addrspace 5) 8742 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 8743... 8744 8745--- 8746name: test_load_private_v2p3_align8 8747body: | 8748 bb.0: 8749 liveins: $vgpr0 8750 8751 ; SI-LABEL: name: test_load_private_v2p3_align8 8752 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8753 ; SI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8754 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8755 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8756 ; SI: [[LOAD1:%[0-9]+]]:_(p3) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8757 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[LOAD]](p3), [[LOAD1]](p3) 8758 ; SI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>) 8759 ; CI-LABEL: name: test_load_private_v2p3_align8 8760 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8761 ; CI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8762 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8763 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8764 ; CI: [[LOAD1:%[0-9]+]]:_(p3) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8765 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[LOAD]](p3), [[LOAD1]](p3) 8766 ; CI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>) 8767 ; VI-LABEL: name: test_load_private_v2p3_align8 8768 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8769 ; VI: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8770 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8771 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8772 ; VI: [[LOAD1:%[0-9]+]]:_(p3) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8773 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[LOAD]](p3), [[LOAD1]](p3) 8774 ; VI: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>) 8775 ; GFX9-LABEL: name: test_load_private_v2p3_align8 8776 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8777 ; GFX9: [[LOAD:%[0-9]+]]:_(p3) = G_LOAD [[COPY]](p5) :: (load 4, align 8, addrspace 5) 8778 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 8779 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 8780 ; GFX9: [[LOAD1:%[0-9]+]]:_(p3) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 8781 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p3>) = G_BUILD_VECTOR [[LOAD]](p3), [[LOAD1]](p3) 8782 ; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x p3>) 8783 %0:_(p5) = COPY $vgpr0 8784 %1:_(<2 x p3>) = G_LOAD %0 :: (load 8, align 8, addrspace 5) 8785 $vgpr0_vgpr1 = COPY %1 8786... 8787 8788--- 8789name: test_ext_load_private_s32_from_1_align4 8790body: | 8791 bb.0: 8792 liveins: $vgpr0 8793 8794 ; SI-LABEL: name: test_ext_load_private_s32_from_1_align4 8795 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8796 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8797 ; SI: $vgpr0 = COPY [[LOAD]](s32) 8798 ; CI-LABEL: name: test_ext_load_private_s32_from_1_align4 8799 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8800 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8801 ; CI: $vgpr0 = COPY [[LOAD]](s32) 8802 ; VI-LABEL: name: test_ext_load_private_s32_from_1_align4 8803 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8804 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8805 ; VI: $vgpr0 = COPY [[LOAD]](s32) 8806 ; GFX9-LABEL: name: test_ext_load_private_s32_from_1_align4 8807 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8808 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8809 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 8810 %0:_(p5) = COPY $vgpr0 8811 %1:_(s32) = G_LOAD %0 :: (load 1, align 4, addrspace 5) 8812 $vgpr0 = COPY %1 8813... 8814 8815--- 8816name: test_ext_load_private_s32_from_2_align4 8817body: | 8818 bb.0: 8819 liveins: $vgpr0 8820 8821 ; SI-LABEL: name: test_ext_load_private_s32_from_2_align4 8822 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8823 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8824 ; SI: $vgpr0 = COPY [[LOAD]](s32) 8825 ; CI-LABEL: name: test_ext_load_private_s32_from_2_align4 8826 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8827 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8828 ; CI: $vgpr0 = COPY [[LOAD]](s32) 8829 ; VI-LABEL: name: test_ext_load_private_s32_from_2_align4 8830 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8831 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8832 ; VI: $vgpr0 = COPY [[LOAD]](s32) 8833 ; GFX9-LABEL: name: test_ext_load_private_s32_from_2_align4 8834 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8835 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8836 ; GFX9: $vgpr0 = COPY [[LOAD]](s32) 8837 %0:_(p5) = COPY $vgpr0 8838 %1:_(s32) = G_LOAD %0 :: (load 2, align 4, addrspace 5) 8839 $vgpr0 = COPY %1 8840... 8841 8842--- 8843name: test_ext_load_private_s64_from_1_align4 8844body: | 8845 bb.0: 8846 liveins: $vgpr0 8847 8848 8849 ; SI-LABEL: name: test_ext_load_private_s64_from_1_align4 8850 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8851 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8852 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8853 ; CI-LABEL: name: test_ext_load_private_s64_from_1_align4 8854 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8855 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8856 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8857 ; VI-LABEL: name: test_ext_load_private_s64_from_1_align4 8858 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8859 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8860 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8861 ; GFX9-LABEL: name: test_ext_load_private_s64_from_1_align4 8862 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8863 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8864 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8865 %0:_(p5) = COPY $vgpr0 8866 %1:_(s64) = G_LOAD %0 :: (load 1, align 4, addrspace 5) 8867 $vgpr0_vgpr1 = COPY %1 8868... 8869 8870--- 8871name: test_ext_load_private_s64_from_2_align4 8872body: | 8873 bb.0: 8874 liveins: $vgpr0 8875 8876 ; SI-LABEL: name: test_ext_load_private_s64_from_2_align4 8877 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8878 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8879 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8880 ; CI-LABEL: name: test_ext_load_private_s64_from_2_align4 8881 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8882 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8883 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8884 ; VI-LABEL: name: test_ext_load_private_s64_from_2_align4 8885 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8886 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8887 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8888 ; GFX9-LABEL: name: test_ext_load_private_s64_from_2_align4 8889 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8890 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8891 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8892 %0:_(p5) = COPY $vgpr0 8893 %1:_(s64) = G_LOAD %0 :: (load 2, align 4, addrspace 5) 8894 $vgpr0_vgpr1 = COPY %1 8895... 8896 8897--- 8898name: test_ext_load_private_s64_from_4_align4 8899body: | 8900 bb.0: 8901 liveins: $vgpr0 8902 8903 ; SI-LABEL: name: test_ext_load_private_s64_from_4_align4 8904 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8905 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8906 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8907 ; CI-LABEL: name: test_ext_load_private_s64_from_4_align4 8908 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8909 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8910 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8911 ; VI-LABEL: name: test_ext_load_private_s64_from_4_align4 8912 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8913 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8914 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8915 ; GFX9-LABEL: name: test_ext_load_private_s64_from_4_align4 8916 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8917 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8918 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8919 %0:_(p5) = COPY $vgpr0 8920 %1:_(s64) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 8921 $vgpr0_vgpr1 = COPY %1 8922... 8923 8924--- 8925name: test_ext_load_private_s128_from_4_align4 8926body: | 8927 bb.0: 8928 liveins: $vgpr0 8929 8930 ; SI-LABEL: name: test_ext_load_private_s128_from_4_align4 8931 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8932 ; SI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8933 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) 8934 ; CI-LABEL: name: test_ext_load_private_s128_from_4_align4 8935 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8936 ; CI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8937 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) 8938 ; VI-LABEL: name: test_ext_load_private_s128_from_4_align4 8939 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8940 ; VI: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8941 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) 8942 ; GFX9-LABEL: name: test_ext_load_private_s128_from_4_align4 8943 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8944 ; GFX9: [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 8945 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](s128) 8946 %0:_(p5) = COPY $vgpr0 8947 %1:_(s128) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 8948 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 8949... 8950 8951--- 8952name: test_ext_load_private_s64_from_2_align2 8953body: | 8954 bb.0: 8955 liveins: $vgpr0 8956 8957 ; SI-LABEL: name: test_ext_load_private_s64_from_2_align2 8958 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8959 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8960 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8961 ; CI-LABEL: name: test_ext_load_private_s64_from_2_align2 8962 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8963 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8964 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8965 ; VI-LABEL: name: test_ext_load_private_s64_from_2_align2 8966 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8967 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8968 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8969 ; GFX9-LABEL: name: test_ext_load_private_s64_from_2_align2 8970 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8971 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 2, align 4, addrspace 5) 8972 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8973 %0:_(p5) = COPY $vgpr0 8974 %1:_(s64) = G_LOAD %0 :: (load 2, align 4, addrspace 5) 8975 $vgpr0_vgpr1 = COPY %1 8976... 8977 8978--- 8979name: test_ext_load_private_s64_from_1_align1 8980body: | 8981 bb.0: 8982 liveins: $vgpr0 8983 8984 ; SI-LABEL: name: test_ext_load_private_s64_from_1_align1 8985 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8986 ; SI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8987 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8988 ; CI-LABEL: name: test_ext_load_private_s64_from_1_align1 8989 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8990 ; CI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8991 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8992 ; VI-LABEL: name: test_ext_load_private_s64_from_1_align1 8993 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8994 ; VI: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8995 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 8996 ; GFX9-LABEL: name: test_ext_load_private_s64_from_1_align1 8997 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 8998 ; GFX9: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p5) :: (load 1, align 4, addrspace 5) 8999 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](s64) 9000 %0:_(p5) = COPY $vgpr0 9001 %1:_(s64) = G_LOAD %0 :: (load 1, align 4, addrspace 5) 9002 $vgpr0_vgpr1 = COPY %1 9003... 9004 9005--- 9006name: test_extload_private_v2s32_from_4_align1 9007body: | 9008 bb.0: 9009 liveins: $vgpr0 9010 9011 ; SI-LABEL: name: test_extload_private_v2s32_from_4_align1 9012 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9013 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 1, addrspace 5) 9014 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9015 ; CI-LABEL: name: test_extload_private_v2s32_from_4_align1 9016 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9017 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 1, addrspace 5) 9018 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9019 ; VI-LABEL: name: test_extload_private_v2s32_from_4_align1 9020 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9021 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 1, addrspace 5) 9022 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9023 ; GFX9-LABEL: name: test_extload_private_v2s32_from_4_align1 9024 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9025 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 1, addrspace 5) 9026 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9027 %0:_(p5) = COPY $vgpr0 9028 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 1, addrspace 5) 9029 $vgpr0_vgpr1 = COPY %1 9030... 9031 9032--- 9033name: test_extload_private_v2s32_from_4_align2 9034body: | 9035 bb.0: 9036 liveins: $vgpr0 9037 9038 ; SI-LABEL: name: test_extload_private_v2s32_from_4_align2 9039 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9040 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 2, addrspace 5) 9041 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9042 ; CI-LABEL: name: test_extload_private_v2s32_from_4_align2 9043 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9044 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 2, addrspace 5) 9045 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9046 ; VI-LABEL: name: test_extload_private_v2s32_from_4_align2 9047 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9048 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 2, addrspace 5) 9049 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9050 ; GFX9-LABEL: name: test_extload_private_v2s32_from_4_align2 9051 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9052 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, align 2, addrspace 5) 9053 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9054 %0:_(p5) = COPY $vgpr0 9055 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 2, addrspace 5) 9056 $vgpr0_vgpr1 = COPY %1 9057... 9058 9059--- 9060name: test_extload_private_v2s32_from_4_align4 9061body: | 9062 bb.0: 9063 liveins: $vgpr0 9064 9065 ; SI-LABEL: name: test_extload_private_v2s32_from_4_align4 9066 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9067 ; SI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 9068 ; SI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9069 ; CI-LABEL: name: test_extload_private_v2s32_from_4_align4 9070 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9071 ; CI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 9072 ; CI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9073 ; VI-LABEL: name: test_extload_private_v2s32_from_4_align4 9074 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9075 ; VI: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 9076 ; VI: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9077 ; GFX9-LABEL: name: test_extload_private_v2s32_from_4_align4 9078 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9079 ; GFX9: [[LOAD:%[0-9]+]]:_(<2 x s32>) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 9080 ; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](<2 x s32>) 9081 %0:_(p5) = COPY $vgpr0 9082 %1:_(<2 x s32>) = G_LOAD %0 :: (load 4, align 4, addrspace 5) 9083 $vgpr0_vgpr1 = COPY %1 9084... 9085 9086--- 9087name: test_extload_private_v3s32_from_6_align4 9088body: | 9089 bb.0: 9090 liveins: $vgpr0 9091 9092 ; SI-LABEL: name: test_extload_private_v3s32_from_6_align4 9093 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9094 ; SI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p5) :: (load 6, align 4, addrspace 5) 9095 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 9096 ; CI-LABEL: name: test_extload_private_v3s32_from_6_align4 9097 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9098 ; CI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p5) :: (load 6, align 4, addrspace 5) 9099 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 9100 ; VI-LABEL: name: test_extload_private_v3s32_from_6_align4 9101 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9102 ; VI: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p5) :: (load 6, align 4, addrspace 5) 9103 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 9104 ; GFX9-LABEL: name: test_extload_private_v3s32_from_6_align4 9105 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9106 ; GFX9: [[LOAD:%[0-9]+]]:_(<3 x s32>) = G_LOAD [[COPY]](p5) :: (load 6, align 4, addrspace 5) 9107 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>) 9108 %0:_(p5) = COPY $vgpr0 9109 %1:_(<3 x s32>) = G_LOAD %0 :: (load 6, align 4, addrspace 5) 9110 $vgpr0_vgpr1_vgpr2 = COPY %1 9111... 9112 9113--- 9114name: test_extload_private_v4s32_from_8_align4 9115body: | 9116 bb.0: 9117 liveins: $vgpr0 9118 9119 ; SI-LABEL: name: test_extload_private_v4s32_from_8_align4 9120 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9121 ; SI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p5) :: (load 8, align 4, addrspace 5) 9122 ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9123 ; CI-LABEL: name: test_extload_private_v4s32_from_8_align4 9124 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9125 ; CI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p5) :: (load 8, align 4, addrspace 5) 9126 ; CI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9127 ; VI-LABEL: name: test_extload_private_v4s32_from_8_align4 9128 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9129 ; VI: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p5) :: (load 8, align 4, addrspace 5) 9130 ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9131 ; GFX9-LABEL: name: test_extload_private_v4s32_from_8_align4 9132 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9133 ; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p5) :: (load 8, align 4, addrspace 5) 9134 ; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[LOAD]](<4 x s32>) 9135 %0:_(p5) = COPY $vgpr0 9136 %1:_(<4 x s32>) = G_LOAD %0 :: (load 8, align 4, addrspace 5) 9137 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 9138... 9139 9140--- 9141name: test_extload_private_v2s96_from_24_align1 9142body: | 9143 bb.0: 9144 liveins: $vgpr0 9145 9146 ; SI-LABEL: name: test_extload_private_v2s96_from_24_align1 9147 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9148 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 9149 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9150 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9151 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 9152 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9153 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 9154 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 9155 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9156 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 9157 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 9158 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9159 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9160 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9161 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9162 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9163 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9164 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9165 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9166 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9167 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9168 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9169 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9170 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9171 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9172 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9173 ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9174 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9175 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9176 ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9177 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 9178 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 9179 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9180 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 9181 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9182 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 9183 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9184 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 9185 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9186 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9187 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9188 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9189 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9190 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9191 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9192 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9193 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9194 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9195 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9196 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9197 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9198 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9199 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9200 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 9201 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9202 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 9203 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9204 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 9205 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9206 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 9207 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9208 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9209 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9210 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9211 ; SI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9212 ; SI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9213 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9214 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9215 ; SI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9216 ; SI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9217 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9218 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9219 ; SI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9220 ; SI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9221 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 9222 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9223 ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9224 ; SI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 9225 ; SI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 9226 ; SI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9227 ; SI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 9228 ; SI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9229 ; SI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 9230 ; SI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9231 ; SI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 9232 ; SI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9233 ; SI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9234 ; SI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9235 ; SI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9236 ; SI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9237 ; SI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9238 ; SI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9239 ; SI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9240 ; SI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9241 ; SI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9242 ; SI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9243 ; SI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9244 ; SI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9245 ; SI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9246 ; SI: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 9247 ; SI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 1 + 16, addrspace 5) 9248 ; SI: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 9249 ; SI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 1 + 17, addrspace 5) 9250 ; SI: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 9251 ; SI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 1 + 18, addrspace 5) 9252 ; SI: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 9253 ; SI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 1 + 19, addrspace 5) 9254 ; SI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 9255 ; SI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 9256 ; SI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 9257 ; SI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 9258 ; SI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 9259 ; SI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 9260 ; SI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 9261 ; SI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 9262 ; SI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 9263 ; SI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 9264 ; SI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 9265 ; SI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 9266 ; SI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 9267 ; SI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 9268 ; SI: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 9269 ; SI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 1 + 20, addrspace 5) 9270 ; SI: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 9271 ; SI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 1 + 21, addrspace 5) 9272 ; SI: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 9273 ; SI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 1 + 22, addrspace 5) 9274 ; SI: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 9275 ; SI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 1 + 23, addrspace 5) 9276 ; SI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 9277 ; SI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 9278 ; SI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 9279 ; SI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 9280 ; SI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 9281 ; SI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 9282 ; SI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 9283 ; SI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 9284 ; SI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 9285 ; SI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 9286 ; SI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 9287 ; SI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 9288 ; SI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 9289 ; SI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 9290 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32), [[OR17]](s32) 9291 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9292 ; SI: [[COPY25:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9293 ; SI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9294 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY25]](s96) 9295 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY26]](s96) 9296 ; CI-LABEL: name: test_extload_private_v2s96_from_24_align1 9297 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9298 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 9299 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9300 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9301 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 9302 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9303 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 9304 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 9305 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9306 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 9307 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 9308 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9309 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9310 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9311 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9312 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9313 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9314 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9315 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9316 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9317 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9318 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9319 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9320 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9321 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9322 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9323 ; CI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9324 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9325 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9326 ; CI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9327 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 9328 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 9329 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9330 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 9331 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9332 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 9333 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9334 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 9335 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9336 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9337 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9338 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9339 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9340 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9341 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9342 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9343 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9344 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9345 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9346 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9347 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9348 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9349 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9350 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 9351 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9352 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 9353 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9354 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 9355 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9356 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 9357 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9358 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9359 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9360 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9361 ; CI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9362 ; CI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9363 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9364 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9365 ; CI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9366 ; CI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9367 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9368 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9369 ; CI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9370 ; CI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9371 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 9372 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9373 ; CI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9374 ; CI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 9375 ; CI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 9376 ; CI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9377 ; CI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 9378 ; CI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9379 ; CI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 9380 ; CI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9381 ; CI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 9382 ; CI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9383 ; CI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9384 ; CI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9385 ; CI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9386 ; CI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9387 ; CI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9388 ; CI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9389 ; CI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9390 ; CI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9391 ; CI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9392 ; CI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9393 ; CI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9394 ; CI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9395 ; CI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9396 ; CI: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 9397 ; CI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 1 + 16, addrspace 5) 9398 ; CI: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 9399 ; CI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 1 + 17, addrspace 5) 9400 ; CI: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 9401 ; CI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 1 + 18, addrspace 5) 9402 ; CI: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 9403 ; CI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 1 + 19, addrspace 5) 9404 ; CI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 9405 ; CI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 9406 ; CI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 9407 ; CI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 9408 ; CI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 9409 ; CI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 9410 ; CI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 9411 ; CI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 9412 ; CI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 9413 ; CI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 9414 ; CI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 9415 ; CI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 9416 ; CI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 9417 ; CI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 9418 ; CI: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 9419 ; CI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 1 + 20, addrspace 5) 9420 ; CI: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 9421 ; CI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 1 + 21, addrspace 5) 9422 ; CI: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 9423 ; CI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 1 + 22, addrspace 5) 9424 ; CI: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 9425 ; CI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 1 + 23, addrspace 5) 9426 ; CI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 9427 ; CI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 9428 ; CI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 9429 ; CI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 9430 ; CI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 9431 ; CI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 9432 ; CI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 9433 ; CI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 9434 ; CI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 9435 ; CI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 9436 ; CI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 9437 ; CI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 9438 ; CI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 9439 ; CI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 9440 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32), [[OR17]](s32) 9441 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9442 ; CI: [[COPY25:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9443 ; CI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9444 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY25]](s96) 9445 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY26]](s96) 9446 ; VI-LABEL: name: test_extload_private_v2s96_from_24_align1 9447 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9448 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 9449 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9450 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9451 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 9452 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9453 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 9454 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 9455 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9456 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 9457 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 9458 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9459 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9460 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9461 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9462 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9463 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9464 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9465 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9466 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9467 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9468 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9469 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9470 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9471 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9472 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9473 ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9474 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9475 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9476 ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9477 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 9478 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 9479 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9480 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 9481 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9482 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 9483 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9484 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 9485 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9486 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9487 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9488 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9489 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9490 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9491 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9492 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9493 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9494 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9495 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9496 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9497 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9498 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9499 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9500 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 9501 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9502 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 9503 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9504 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 9505 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9506 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 9507 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9508 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9509 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9510 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9511 ; VI: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9512 ; VI: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9513 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9514 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9515 ; VI: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9516 ; VI: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9517 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9518 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9519 ; VI: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9520 ; VI: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9521 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 9522 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9523 ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9524 ; VI: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 9525 ; VI: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 9526 ; VI: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9527 ; VI: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 9528 ; VI: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9529 ; VI: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 9530 ; VI: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9531 ; VI: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 9532 ; VI: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9533 ; VI: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9534 ; VI: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9535 ; VI: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9536 ; VI: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9537 ; VI: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9538 ; VI: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9539 ; VI: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9540 ; VI: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9541 ; VI: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9542 ; VI: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9543 ; VI: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9544 ; VI: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9545 ; VI: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9546 ; VI: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 9547 ; VI: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 1 + 16, addrspace 5) 9548 ; VI: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 9549 ; VI: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 1 + 17, addrspace 5) 9550 ; VI: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 9551 ; VI: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 1 + 18, addrspace 5) 9552 ; VI: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 9553 ; VI: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 1 + 19, addrspace 5) 9554 ; VI: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 9555 ; VI: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 9556 ; VI: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 9557 ; VI: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 9558 ; VI: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 9559 ; VI: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 9560 ; VI: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 9561 ; VI: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 9562 ; VI: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 9563 ; VI: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 9564 ; VI: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 9565 ; VI: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 9566 ; VI: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 9567 ; VI: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 9568 ; VI: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 9569 ; VI: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 1 + 20, addrspace 5) 9570 ; VI: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 9571 ; VI: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 1 + 21, addrspace 5) 9572 ; VI: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 9573 ; VI: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 1 + 22, addrspace 5) 9574 ; VI: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 9575 ; VI: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 1 + 23, addrspace 5) 9576 ; VI: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 9577 ; VI: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 9578 ; VI: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 9579 ; VI: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 9580 ; VI: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 9581 ; VI: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 9582 ; VI: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 9583 ; VI: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 9584 ; VI: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 9585 ; VI: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 9586 ; VI: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 9587 ; VI: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 9588 ; VI: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 9589 ; VI: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 9590 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32), [[OR17]](s32) 9591 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9592 ; VI: [[COPY25:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9593 ; VI: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9594 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY25]](s96) 9595 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY26]](s96) 9596 ; GFX9-LABEL: name: test_extload_private_v2s96_from_24_align1 9597 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9598 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 1, addrspace 5) 9599 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 9600 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9601 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 1 + 1, addrspace 5) 9602 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9603 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 9604 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 1 + 2, addrspace 5) 9605 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 9606 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 9607 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 1 + 3, addrspace 5) 9608 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 9609 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9610 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C3]] 9611 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9612 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]] 9613 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9614 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C4]](s32) 9615 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9616 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9617 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C3]] 9618 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9619 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C5]](s32) 9620 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] 9621 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9622 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C3]] 9623 ; GFX9: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 9624 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C6]](s32) 9625 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] 9626 ; GFX9: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9627 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C7]](s32) 9628 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 1 + 4, addrspace 5) 9629 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9630 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 1 + 5, addrspace 5) 9631 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C1]](s32) 9632 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 1 + 6, addrspace 5) 9633 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C2]](s32) 9634 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 1 + 7, addrspace 5) 9635 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9636 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C3]] 9637 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9638 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C3]] 9639 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C4]](s32) 9640 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL3]] 9641 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9642 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C3]] 9643 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND6]], [[C5]](s32) 9644 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[OR3]], [[SHL4]] 9645 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9646 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C3]] 9647 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C6]](s32) 9648 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[OR4]], [[SHL5]] 9649 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9650 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 1 + 8, addrspace 5) 9651 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9652 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 1 + 9, addrspace 5) 9653 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C1]](s32) 9654 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 1 + 10, addrspace 5) 9655 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C2]](s32) 9656 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 1 + 11, addrspace 5) 9657 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9658 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C3]] 9659 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9660 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C3]] 9661 ; GFX9: [[SHL6:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C4]](s32) 9662 ; GFX9: [[OR6:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL6]] 9663 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9664 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C3]] 9665 ; GFX9: [[SHL7:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[C5]](s32) 9666 ; GFX9: [[OR7:%[0-9]+]]:_(s32) = G_OR [[OR6]], [[SHL7]] 9667 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9668 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C3]] 9669 ; GFX9: [[SHL8:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C6]](s32) 9670 ; GFX9: [[OR8:%[0-9]+]]:_(s32) = G_OR [[OR7]], [[SHL8]] 9671 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR2]](s32), [[OR5]](s32), [[OR8]](s32) 9672 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9673 ; GFX9: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9674 ; GFX9: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C8]](s32) 9675 ; GFX9: [[LOAD12:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD11]](p5) :: (load 1 + 12, addrspace 5) 9676 ; GFX9: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C]](s32) 9677 ; GFX9: [[LOAD13:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD12]](p5) :: (load 1 + 13, addrspace 5) 9678 ; GFX9: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C1]](s32) 9679 ; GFX9: [[LOAD14:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD13]](p5) :: (load 1 + 14, addrspace 5) 9680 ; GFX9: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C2]](s32) 9681 ; GFX9: [[LOAD15:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD14]](p5) :: (load 1 + 15, addrspace 5) 9682 ; GFX9: [[COPY13:%[0-9]+]]:_(s32) = COPY [[LOAD12]](s32) 9683 ; GFX9: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C3]] 9684 ; GFX9: [[COPY14:%[0-9]+]]:_(s32) = COPY [[LOAD13]](s32) 9685 ; GFX9: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C3]] 9686 ; GFX9: [[SHL9:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[C4]](s32) 9687 ; GFX9: [[OR9:%[0-9]+]]:_(s32) = G_OR [[AND12]], [[SHL9]] 9688 ; GFX9: [[COPY15:%[0-9]+]]:_(s32) = COPY [[LOAD14]](s32) 9689 ; GFX9: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY15]], [[C3]] 9690 ; GFX9: [[SHL10:%[0-9]+]]:_(s32) = G_SHL [[AND14]], [[C5]](s32) 9691 ; GFX9: [[OR10:%[0-9]+]]:_(s32) = G_OR [[OR9]], [[SHL10]] 9692 ; GFX9: [[COPY16:%[0-9]+]]:_(s32) = COPY [[LOAD15]](s32) 9693 ; GFX9: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C3]] 9694 ; GFX9: [[SHL11:%[0-9]+]]:_(s32) = G_SHL [[AND15]], [[C6]](s32) 9695 ; GFX9: [[OR11:%[0-9]+]]:_(s32) = G_OR [[OR10]], [[SHL11]] 9696 ; GFX9: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C7]](s32) 9697 ; GFX9: [[LOAD16:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD15]](p5) :: (load 1 + 16, addrspace 5) 9698 ; GFX9: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C]](s32) 9699 ; GFX9: [[LOAD17:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD16]](p5) :: (load 1 + 17, addrspace 5) 9700 ; GFX9: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C1]](s32) 9701 ; GFX9: [[LOAD18:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD17]](p5) :: (load 1 + 18, addrspace 5) 9702 ; GFX9: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD15]], [[C2]](s32) 9703 ; GFX9: [[LOAD19:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD18]](p5) :: (load 1 + 19, addrspace 5) 9704 ; GFX9: [[COPY17:%[0-9]+]]:_(s32) = COPY [[LOAD16]](s32) 9705 ; GFX9: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C3]] 9706 ; GFX9: [[COPY18:%[0-9]+]]:_(s32) = COPY [[LOAD17]](s32) 9707 ; GFX9: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C3]] 9708 ; GFX9: [[SHL12:%[0-9]+]]:_(s32) = G_SHL [[AND17]], [[C4]](s32) 9709 ; GFX9: [[OR12:%[0-9]+]]:_(s32) = G_OR [[AND16]], [[SHL12]] 9710 ; GFX9: [[COPY19:%[0-9]+]]:_(s32) = COPY [[LOAD18]](s32) 9711 ; GFX9: [[AND18:%[0-9]+]]:_(s32) = G_AND [[COPY19]], [[C3]] 9712 ; GFX9: [[SHL13:%[0-9]+]]:_(s32) = G_SHL [[AND18]], [[C5]](s32) 9713 ; GFX9: [[OR13:%[0-9]+]]:_(s32) = G_OR [[OR12]], [[SHL13]] 9714 ; GFX9: [[COPY20:%[0-9]+]]:_(s32) = COPY [[LOAD19]](s32) 9715 ; GFX9: [[AND19:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C3]] 9716 ; GFX9: [[SHL14:%[0-9]+]]:_(s32) = G_SHL [[AND19]], [[C6]](s32) 9717 ; GFX9: [[OR14:%[0-9]+]]:_(s32) = G_OR [[OR13]], [[SHL14]] 9718 ; GFX9: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD11]], [[C4]](s32) 9719 ; GFX9: [[LOAD20:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD19]](p5) :: (load 1 + 20, addrspace 5) 9720 ; GFX9: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C]](s32) 9721 ; GFX9: [[LOAD21:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD20]](p5) :: (load 1 + 21, addrspace 5) 9722 ; GFX9: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C1]](s32) 9723 ; GFX9: [[LOAD22:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD21]](p5) :: (load 1 + 22, addrspace 5) 9724 ; GFX9: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD19]], [[C2]](s32) 9725 ; GFX9: [[LOAD23:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD22]](p5) :: (load 1 + 23, addrspace 5) 9726 ; GFX9: [[COPY21:%[0-9]+]]:_(s32) = COPY [[LOAD20]](s32) 9727 ; GFX9: [[AND20:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C3]] 9728 ; GFX9: [[COPY22:%[0-9]+]]:_(s32) = COPY [[LOAD21]](s32) 9729 ; GFX9: [[AND21:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C3]] 9730 ; GFX9: [[SHL15:%[0-9]+]]:_(s32) = G_SHL [[AND21]], [[C4]](s32) 9731 ; GFX9: [[OR15:%[0-9]+]]:_(s32) = G_OR [[AND20]], [[SHL15]] 9732 ; GFX9: [[COPY23:%[0-9]+]]:_(s32) = COPY [[LOAD22]](s32) 9733 ; GFX9: [[AND22:%[0-9]+]]:_(s32) = G_AND [[COPY23]], [[C3]] 9734 ; GFX9: [[SHL16:%[0-9]+]]:_(s32) = G_SHL [[AND22]], [[C5]](s32) 9735 ; GFX9: [[OR16:%[0-9]+]]:_(s32) = G_OR [[OR15]], [[SHL16]] 9736 ; GFX9: [[COPY24:%[0-9]+]]:_(s32) = COPY [[LOAD23]](s32) 9737 ; GFX9: [[AND23:%[0-9]+]]:_(s32) = G_AND [[COPY24]], [[C3]] 9738 ; GFX9: [[SHL17:%[0-9]+]]:_(s32) = G_SHL [[AND23]], [[C6]](s32) 9739 ; GFX9: [[OR17:%[0-9]+]]:_(s32) = G_OR [[OR16]], [[SHL17]] 9740 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR11]](s32), [[OR14]](s32), [[OR17]](s32) 9741 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9742 ; GFX9: [[COPY25:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9743 ; GFX9: [[COPY26:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9744 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY25]](s96) 9745 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY26]](s96) 9746 %0:_(p5) = COPY $vgpr0 9747 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 1, addrspace 5) 9748 %2:_(s96) = G_EXTRACT %1, 0 9749 %3:_(s96) = G_EXTRACT %1, 96 9750 $vgpr0_vgpr1_vgpr2 = COPY %2 9751 $vgpr3_vgpr4_vgpr5 = COPY %3 9752... 9753 9754--- 9755name: test_extload_private_v2s96_from_24_align2 9756body: | 9757 bb.0: 9758 liveins: $vgpr0 9759 9760 ; SI-LABEL: name: test_extload_private_v2s96_from_24_align2 9761 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9762 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 9763 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9764 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9765 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 9766 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9767 ; SI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9768 ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9769 ; SI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9770 ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9771 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9772 ; SI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9773 ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9774 ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9775 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 9776 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 9777 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9778 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 9779 ; SI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9780 ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9781 ; SI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9782 ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9783 ; SI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9784 ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9785 ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9786 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9787 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 9788 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9789 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 9790 ; SI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9791 ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9792 ; SI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9793 ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9794 ; SI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9795 ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9796 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 9797 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9798 ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9799 ; SI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 9800 ; SI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 9801 ; SI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9802 ; SI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 9803 ; SI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9804 ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9805 ; SI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9806 ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9807 ; SI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9808 ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9809 ; SI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 9810 ; SI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 2 + 16, addrspace 5) 9811 ; SI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9812 ; SI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 2 + 18, addrspace 5) 9813 ; SI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9814 ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 9815 ; SI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9816 ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 9817 ; SI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 9818 ; SI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 9819 ; SI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 9820 ; SI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 2 + 20, addrspace 5) 9821 ; SI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 9822 ; SI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 2 + 22, addrspace 5) 9823 ; SI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9824 ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 9825 ; SI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9826 ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 9827 ; SI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 9828 ; SI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 9829 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32), [[OR5]](s32) 9830 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9831 ; SI: [[COPY13:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9832 ; SI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9833 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY13]](s96) 9834 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) 9835 ; CI-LABEL: name: test_extload_private_v2s96_from_24_align2 9836 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9837 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 9838 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9839 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9840 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 9841 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9842 ; CI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9843 ; CI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9844 ; CI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9845 ; CI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9846 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9847 ; CI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9848 ; CI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9849 ; CI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9850 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 9851 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 9852 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9853 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 9854 ; CI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9855 ; CI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9856 ; CI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9857 ; CI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9858 ; CI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9859 ; CI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9860 ; CI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9861 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9862 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 9863 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9864 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 9865 ; CI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9866 ; CI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9867 ; CI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9868 ; CI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9869 ; CI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9870 ; CI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9871 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 9872 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9873 ; CI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9874 ; CI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 9875 ; CI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 9876 ; CI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9877 ; CI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 9878 ; CI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9879 ; CI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9880 ; CI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9881 ; CI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9882 ; CI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9883 ; CI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9884 ; CI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 9885 ; CI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 2 + 16, addrspace 5) 9886 ; CI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9887 ; CI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 2 + 18, addrspace 5) 9888 ; CI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9889 ; CI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 9890 ; CI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9891 ; CI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 9892 ; CI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 9893 ; CI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 9894 ; CI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 9895 ; CI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 2 + 20, addrspace 5) 9896 ; CI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 9897 ; CI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 2 + 22, addrspace 5) 9898 ; CI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9899 ; CI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 9900 ; CI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9901 ; CI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 9902 ; CI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 9903 ; CI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 9904 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32), [[OR5]](s32) 9905 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9906 ; CI: [[COPY13:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9907 ; CI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9908 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY13]](s96) 9909 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) 9910 ; VI-LABEL: name: test_extload_private_v2s96_from_24_align2 9911 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9912 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 9913 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9914 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9915 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 9916 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9917 ; VI: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9918 ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9919 ; VI: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9920 ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9921 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9922 ; VI: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9923 ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9924 ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 9925 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 9926 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 9927 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 9928 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 9929 ; VI: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 9930 ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 9931 ; VI: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 9932 ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 9933 ; VI: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 9934 ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 9935 ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 9936 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 9937 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 9938 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 9939 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 9940 ; VI: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 9941 ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 9942 ; VI: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 9943 ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 9944 ; VI: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 9945 ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 9946 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 9947 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 9948 ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 9949 ; VI: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 9950 ; VI: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 9951 ; VI: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 9952 ; VI: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 9953 ; VI: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 9954 ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 9955 ; VI: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 9956 ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 9957 ; VI: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 9958 ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 9959 ; VI: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 9960 ; VI: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 2 + 16, addrspace 5) 9961 ; VI: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 9962 ; VI: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 2 + 18, addrspace 5) 9963 ; VI: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 9964 ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 9965 ; VI: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 9966 ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 9967 ; VI: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 9968 ; VI: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 9969 ; VI: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 9970 ; VI: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 2 + 20, addrspace 5) 9971 ; VI: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 9972 ; VI: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 2 + 22, addrspace 5) 9973 ; VI: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 9974 ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 9975 ; VI: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 9976 ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 9977 ; VI: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 9978 ; VI: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 9979 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32), [[OR5]](s32) 9980 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 9981 ; VI: [[COPY13:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 9982 ; VI: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 9983 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY13]](s96) 9984 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) 9985 ; GFX9-LABEL: name: test_extload_private_v2s96_from_24_align2 9986 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 9987 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 2, addrspace 5) 9988 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 9989 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 9990 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 2 + 2, addrspace 5) 9991 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 9992 ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[LOAD]](s32) 9993 ; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 9994 ; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LOAD1]](s32) 9995 ; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]] 9996 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 9997 ; GFX9: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C2]](s32) 9998 ; GFX9: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 9999 ; GFX9: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10000 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C3]](s32) 10001 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 2 + 4, addrspace 5) 10002 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD1]], [[C]](s32) 10003 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 2 + 6, addrspace 5) 10004 ; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[LOAD2]](s32) 10005 ; GFX9: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C1]] 10006 ; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[LOAD3]](s32) 10007 ; GFX9: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C1]] 10008 ; GFX9: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C2]](s32) 10009 ; GFX9: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 10010 ; GFX9: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10011 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C4]](s32) 10012 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 2 + 8, addrspace 5) 10013 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD3]], [[C]](s32) 10014 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 2 + 10, addrspace 5) 10015 ; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[LOAD4]](s32) 10016 ; GFX9: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C1]] 10017 ; GFX9: [[COPY6:%[0-9]+]]:_(s32) = COPY [[LOAD5]](s32) 10018 ; GFX9: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C1]] 10019 ; GFX9: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND5]], [[C2]](s32) 10020 ; GFX9: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND4]], [[SHL2]] 10021 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR]](s32), [[OR1]](s32), [[OR2]](s32) 10022 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10023 ; GFX9: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10024 ; GFX9: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C5]](s32) 10025 ; GFX9: [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD5]](p5) :: (load 2 + 12, addrspace 5) 10026 ; GFX9: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C]](s32) 10027 ; GFX9: [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD6]](p5) :: (load 2 + 14, addrspace 5) 10028 ; GFX9: [[COPY7:%[0-9]+]]:_(s32) = COPY [[LOAD6]](s32) 10029 ; GFX9: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY7]], [[C1]] 10030 ; GFX9: [[COPY8:%[0-9]+]]:_(s32) = COPY [[LOAD7]](s32) 10031 ; GFX9: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C1]] 10032 ; GFX9: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[C2]](s32) 10033 ; GFX9: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND6]], [[SHL3]] 10034 ; GFX9: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C3]](s32) 10035 ; GFX9: [[LOAD8:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD7]](p5) :: (load 2 + 16, addrspace 5) 10036 ; GFX9: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD7]], [[C]](s32) 10037 ; GFX9: [[LOAD9:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD8]](p5) :: (load 2 + 18, addrspace 5) 10038 ; GFX9: [[COPY9:%[0-9]+]]:_(s32) = COPY [[LOAD8]](s32) 10039 ; GFX9: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C1]] 10040 ; GFX9: [[COPY10:%[0-9]+]]:_(s32) = COPY [[LOAD9]](s32) 10041 ; GFX9: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C1]] 10042 ; GFX9: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND9]], [[C2]](s32) 10043 ; GFX9: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[SHL4]] 10044 ; GFX9: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD5]], [[C4]](s32) 10045 ; GFX9: [[LOAD10:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD9]](p5) :: (load 2 + 20, addrspace 5) 10046 ; GFX9: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD9]], [[C]](s32) 10047 ; GFX9: [[LOAD11:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD10]](p5) :: (load 2 + 22, addrspace 5) 10048 ; GFX9: [[COPY11:%[0-9]+]]:_(s32) = COPY [[LOAD10]](s32) 10049 ; GFX9: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY11]], [[C1]] 10050 ; GFX9: [[COPY12:%[0-9]+]]:_(s32) = COPY [[LOAD11]](s32) 10051 ; GFX9: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C1]] 10052 ; GFX9: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND11]], [[C2]](s32) 10053 ; GFX9: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND10]], [[SHL5]] 10054 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[OR3]](s32), [[OR4]](s32), [[OR5]](s32) 10055 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10056 ; GFX9: [[COPY13:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10057 ; GFX9: [[COPY14:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10058 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY13]](s96) 10059 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY14]](s96) 10060 %0:_(p5) = COPY $vgpr0 10061 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 2, addrspace 5) 10062 %2:_(s96) = G_EXTRACT %1, 0 10063 %3:_(s96) = G_EXTRACT %1, 96 10064 $vgpr0_vgpr1_vgpr2 = COPY %2 10065 $vgpr3_vgpr4_vgpr5 = COPY %3 10066... 10067 10068--- 10069name: test_extload_private_v2s96_from_24_align4 10070body: | 10071 bb.0: 10072 liveins: $vgpr0 10073 10074 ; SI-LABEL: name: test_extload_private_v2s96_from_24_align4 10075 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10076 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 10077 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10078 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10079 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10080 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10081 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10082 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 10083 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10084 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10085 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10086 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10087 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10088 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10089 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10090 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10091 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10092 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10093 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10094 ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10095 ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10096 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10097 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10098 ; CI-LABEL: name: test_extload_private_v2s96_from_24_align4 10099 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10100 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 10101 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10102 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10103 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10104 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10105 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10106 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 10107 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10108 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10109 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10110 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10111 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10112 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10113 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10114 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10115 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10116 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10117 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10118 ; CI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10119 ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10120 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10121 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10122 ; VI-LABEL: name: test_extload_private_v2s96_from_24_align4 10123 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10124 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 10125 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10126 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10127 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10128 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10129 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10130 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 10131 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10132 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10133 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10134 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10135 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10136 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10137 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10138 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10139 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10140 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10141 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10142 ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10143 ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10144 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10145 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10146 ; GFX9-LABEL: name: test_extload_private_v2s96_from_24_align4 10147 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10148 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, addrspace 5) 10149 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10150 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10151 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10152 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10153 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10154 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, addrspace 5) 10155 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10156 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10157 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10158 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10159 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10160 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10161 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10162 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10163 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10164 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10165 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10166 ; GFX9: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10167 ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10168 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10169 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10170 %0:_(p5) = COPY $vgpr0 10171 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 4, addrspace 5) 10172 %2:_(s96) = G_EXTRACT %1, 0 10173 %3:_(s96) = G_EXTRACT %1, 96 10174 $vgpr0_vgpr1_vgpr2 = COPY %2 10175 $vgpr3_vgpr4_vgpr5 = COPY %3 10176... 10177 10178--- 10179name: test_extload_private_v2s96_from_24_align16 10180body: | 10181 bb.0: 10182 liveins: $vgpr0 10183 10184 ; SI-LABEL: name: test_extload_private_v2s96_from_24_align16 10185 ; SI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10186 ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 16, addrspace 5) 10187 ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10188 ; SI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10189 ; SI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10190 ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10191 ; SI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10192 ; SI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 10193 ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10194 ; SI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10195 ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10196 ; SI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10197 ; SI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10198 ; SI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10199 ; SI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10200 ; SI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10201 ; SI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10202 ; SI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10203 ; SI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10204 ; SI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10205 ; SI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10206 ; SI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10207 ; SI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10208 ; CI-LABEL: name: test_extload_private_v2s96_from_24_align16 10209 ; CI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10210 ; CI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 16, addrspace 5) 10211 ; CI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10212 ; CI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10213 ; CI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10214 ; CI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10215 ; CI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10216 ; CI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 10217 ; CI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10218 ; CI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10219 ; CI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10220 ; CI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10221 ; CI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10222 ; CI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10223 ; CI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10224 ; CI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10225 ; CI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10226 ; CI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10227 ; CI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10228 ; CI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10229 ; CI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10230 ; CI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10231 ; CI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10232 ; VI-LABEL: name: test_extload_private_v2s96_from_24_align16 10233 ; VI: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10234 ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 16, addrspace 5) 10235 ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10236 ; VI: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10237 ; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10238 ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10239 ; VI: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10240 ; VI: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 10241 ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10242 ; VI: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10243 ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10244 ; VI: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10245 ; VI: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10246 ; VI: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10247 ; VI: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10248 ; VI: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10249 ; VI: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10250 ; VI: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10251 ; VI: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10252 ; VI: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10253 ; VI: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10254 ; VI: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10255 ; VI: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10256 ; GFX9-LABEL: name: test_extload_private_v2s96_from_24_align16 10257 ; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0 10258 ; GFX9: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p5) :: (load 4, align 16, addrspace 5) 10259 ; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 10260 ; GFX9: [[PTR_ADD:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C]](s32) 10261 ; GFX9: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p5) :: (load 4 + 4, addrspace 5) 10262 ; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 10263 ; GFX9: [[PTR_ADD1:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C1]](s32) 10264 ; GFX9: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD1]](p5) :: (load 4 + 8, align 8, addrspace 5) 10265 ; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD]](s32), [[LOAD1]](s32), [[LOAD2]](s32) 10266 ; GFX9: [[BITCAST:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR]](<3 x s32>) 10267 ; GFX9: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 10268 ; GFX9: [[PTR_ADD2:%[0-9]+]]:_(p5) = G_PTR_ADD [[COPY]], [[C2]](s32) 10269 ; GFX9: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p5) :: (load 4 + 12, addrspace 5) 10270 ; GFX9: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C]](s32) 10271 ; GFX9: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD3]](p5) :: (load 4 + 16, addrspace 5) 10272 ; GFX9: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[PTR_ADD2]], [[C1]](s32) 10273 ; GFX9: [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD4]](p5) :: (load 4 + 20, addrspace 5) 10274 ; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[LOAD3]](s32), [[LOAD4]](s32), [[LOAD5]](s32) 10275 ; GFX9: [[BITCAST1:%[0-9]+]]:_(s96) = G_BITCAST [[BUILD_VECTOR1]](<3 x s32>) 10276 ; GFX9: [[COPY1:%[0-9]+]]:_(s96) = COPY [[BITCAST]](s96) 10277 ; GFX9: [[COPY2:%[0-9]+]]:_(s96) = COPY [[BITCAST1]](s96) 10278 ; GFX9: $vgpr0_vgpr1_vgpr2 = COPY [[COPY1]](s96) 10279 ; GFX9: $vgpr3_vgpr4_vgpr5 = COPY [[COPY2]](s96) 10280 %0:_(p5) = COPY $vgpr0 10281 %1:_(<2 x s96>) = G_LOAD %0 :: (load 24, align 16, addrspace 5) 10282 %2:_(s96) = G_EXTRACT %1, 0 10283 %3:_(s96) = G_EXTRACT %1, 96 10284 $vgpr0_vgpr1_vgpr2 = COPY %2 10285 $vgpr3_vgpr4_vgpr5 = COPY %3 10286... 10287