1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,SIMPLIFYCFG 3; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINEONLY 4; RUN: opt -instcombine -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGONLY 5; RUN: opt -instcombine -simplifycfg -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGINSTCOMBINE 6; RUN: opt -instcombine -simplifycfg -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYONLY 7; RUN: opt -instcombine -simplifycfg -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE 8 9target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 10target triple = "x86_64-pc-linux-gnu" 11 12; #include <limits> 13; #include <cstdint> 14; 15; using size_type = std::size_t; 16; bool will_not_overflow(size_type size, size_type nmemb) { 17; return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size)); 18; } 19 20define i1 @will_not_overflow(i64 %arg, i64 %arg1) { 21; SIMPLIFYCFG-LABEL: @will_not_overflow( 22; SIMPLIFYCFG-NEXT: bb: 23; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 24; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 25; SIMPLIFYCFG: bb2: 26; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 27; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 28; SIMPLIFYCFG-NEXT: br label [[BB5]] 29; SIMPLIFYCFG: bb5: 30; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 31; SIMPLIFYCFG-NEXT: ret i1 [[T6]] 32; 33; INSTCOMBINEONLY-LABEL: @will_not_overflow( 34; INSTCOMBINEONLY-NEXT: bb: 35; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 36; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 37; INSTCOMBINEONLY: bb2: 38; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 39; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 40; INSTCOMBINEONLY-NEXT: br label [[BB5]] 41; INSTCOMBINEONLY: bb5: 42; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[UMUL_OV]], [[BB2]] ] 43; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 44; 45; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_not_overflow( 46; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 47; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 48; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 49; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 50; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[UMUL_OV]] 51; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 52; 53; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_not_overflow( 54; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 55; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 56; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 57; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]] 58; 59; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-LABEL: @will_not_overflow( 60; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: bb: 61; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 62; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 63; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 64; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 false, i1 [[UMUL_OV]] 65; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: ret i1 [[T6]] 66; 67; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-LABEL: @will_not_overflow( 68; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: bb: 69; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 70; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 71; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: ret i1 [[UMUL_OV]] 72; 73bb: 74 %t0 = icmp eq i64 %arg, 0 75 br i1 %t0, label %bb5, label %bb2 76 77bb2: ; preds = %bb 78 %t3 = udiv i64 -1, %arg 79 %t4 = icmp ult i64 %t3, %arg1 80 br label %bb5 81 82bb5: ; preds = %bb2, %bb 83 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 84 ret i1 %t6 85} 86 87; Same as @will_not_overflow, but inverting return value. 88 89define i1 @will_overflow(i64 %arg, i64 %arg1) { 90; SIMPLIFYCFG-LABEL: @will_overflow( 91; SIMPLIFYCFG-NEXT: bb: 92; SIMPLIFYCFG-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 93; SIMPLIFYCFG-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 94; SIMPLIFYCFG: bb2: 95; SIMPLIFYCFG-NEXT: [[T3:%.*]] = udiv i64 -1, [[ARG]] 96; SIMPLIFYCFG-NEXT: [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]] 97; SIMPLIFYCFG-NEXT: br label [[BB5]] 98; SIMPLIFYCFG: bb5: 99; SIMPLIFYCFG-NEXT: [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ] 100; SIMPLIFYCFG-NEXT: [[T7:%.*]] = xor i1 [[T6]], true 101; SIMPLIFYCFG-NEXT: ret i1 [[T7]] 102; 103; INSTCOMBINEONLY-LABEL: @will_overflow( 104; INSTCOMBINEONLY-NEXT: bb: 105; INSTCOMBINEONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 106; INSTCOMBINEONLY-NEXT: br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]] 107; INSTCOMBINEONLY: bb2: 108; INSTCOMBINEONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 109; INSTCOMBINEONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 110; INSTCOMBINEONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 111; INSTCOMBINEONLY-NEXT: br label [[BB5]] 112; INSTCOMBINEONLY: bb5: 113; INSTCOMBINEONLY-NEXT: [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[PHITMP]], [[BB2]] ] 114; INSTCOMBINEONLY-NEXT: ret i1 [[T6]] 115; 116; INSTCOMBINESIMPLIFYCFGONLY-LABEL: @will_overflow( 117; INSTCOMBINESIMPLIFYCFGONLY-NEXT: bb: 118; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 119; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 120; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 121; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 122; INSTCOMBINESIMPLIFYCFGONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHITMP]] 123; INSTCOMBINESIMPLIFYCFGONLY-NEXT: ret i1 [[T6]] 124; 125; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-LABEL: @will_overflow( 126; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: bb: 127; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 128; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 129; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 130; INSTCOMBINESIMPLIFYCFGINSTCOMBINE-NEXT: ret i1 [[PHITMP]] 131; 132; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-LABEL: @will_overflow( 133; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: bb: 134; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0 135; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG]], i64 [[ARG1:%.*]]) 136; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 137; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 138; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: [[T6:%.*]] = select i1 [[T0]], i1 true, i1 [[PHITMP]] 139; INSTCOMBINESIMPLIFYCFGCOSTLYONLY-NEXT: ret i1 [[T6]] 140; 141; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-LABEL: @will_overflow( 142; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: bb: 143; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[ARG:%.*]], i64 [[ARG1:%.*]]) 144; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1 145; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: [[PHITMP:%.*]] = xor i1 [[UMUL_OV]], true 146; INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE-NEXT: ret i1 [[PHITMP]] 147; 148bb: 149 %t0 = icmp eq i64 %arg, 0 150 br i1 %t0, label %bb5, label %bb2 151 152bb2: ; preds = %bb 153 %t3 = udiv i64 -1, %arg 154 %t4 = icmp ult i64 %t3, %arg1 155 br label %bb5 156 157bb5: ; preds = %bb2, %bb 158 %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ] 159 %t7 = xor i1 %t6, true 160 ret i1 %t7 161} 162