1 //===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements a target parser to recognise AArch64 hardware features
10 // such as FPU/CPU/ARCH and extension names.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "llvm/Support/AArch64TargetParser.h"
15 #include "llvm/ADT/StringSwitch.h"
16 #include "llvm/ADT/Triple.h"
17 #include <cctype>
18
19 using namespace llvm;
20
checkArchVersion(llvm::StringRef Arch)21 static unsigned checkArchVersion(llvm::StringRef Arch) {
22 if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
23 return (Arch[1] - 48);
24 return 0;
25 }
26
getDefaultFPU(StringRef CPU,AArch64::ArchKind AK)27 unsigned AArch64::getDefaultFPU(StringRef CPU, AArch64::ArchKind AK) {
28 if (CPU == "generic")
29 return AArch64ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
30
31 return StringSwitch<unsigned>(CPU)
32 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
33 .Case(NAME, ARM::DEFAULT_FPU)
34 #include "../../include/llvm/Support/AArch64TargetParser.def"
35 .Default(ARM::FK_INVALID);
36 }
37
getDefaultExtensions(StringRef CPU,AArch64::ArchKind AK)38 uint64_t AArch64::getDefaultExtensions(StringRef CPU, AArch64::ArchKind AK) {
39 if (CPU == "generic")
40 return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
41
42 return StringSwitch<uint64_t>(CPU)
43 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
44 .Case(NAME, AArch64ARCHNames[static_cast<unsigned>(ArchKind::ID)] \
45 .ArchBaseExtensions | \
46 DEFAULT_EXT)
47 #include "../../include/llvm/Support/AArch64TargetParser.def"
48 .Default(AArch64::AEK_INVALID);
49 }
50
getCPUArchKind(StringRef CPU)51 AArch64::ArchKind AArch64::getCPUArchKind(StringRef CPU) {
52 if (CPU == "generic")
53 return ArchKind::ARMV8A;
54
55 return StringSwitch<AArch64::ArchKind>(CPU)
56 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
57 .Case(NAME, ArchKind::ID)
58 #include "../../include/llvm/Support/AArch64TargetParser.def"
59 .Default(ArchKind::INVALID);
60 }
61
getExtensionFeatures(uint64_t Extensions,std::vector<StringRef> & Features)62 bool AArch64::getExtensionFeatures(uint64_t Extensions,
63 std::vector<StringRef> &Features) {
64 if (Extensions == AArch64::AEK_INVALID)
65 return false;
66
67 if (Extensions & AEK_FP)
68 Features.push_back("+fp-armv8");
69 if (Extensions & AEK_SIMD)
70 Features.push_back("+neon");
71 if (Extensions & AEK_CRC)
72 Features.push_back("+crc");
73 if (Extensions & AEK_CRYPTO)
74 Features.push_back("+crypto");
75 if (Extensions & AEK_DOTPROD)
76 Features.push_back("+dotprod");
77 if (Extensions & AEK_FP16FML)
78 Features.push_back("+fp16fml");
79 if (Extensions & AEK_FP16)
80 Features.push_back("+fullfp16");
81 if (Extensions & AEK_PROFILE)
82 Features.push_back("+spe");
83 if (Extensions & AEK_RAS)
84 Features.push_back("+ras");
85 if (Extensions & AEK_LSE)
86 Features.push_back("+lse");
87 if (Extensions & AEK_RDM)
88 Features.push_back("+rdm");
89 if (Extensions & AEK_SVE)
90 Features.push_back("+sve");
91 if (Extensions & AEK_SVE2)
92 Features.push_back("+sve2");
93 if (Extensions & AEK_SVE2AES)
94 Features.push_back("+sve2-aes");
95 if (Extensions & AEK_SVE2SM4)
96 Features.push_back("+sve2-sm4");
97 if (Extensions & AEK_SVE2SHA3)
98 Features.push_back("+sve2-sha3");
99 if (Extensions & AEK_SVE2BITPERM)
100 Features.push_back("+sve2-bitperm");
101 if (Extensions & AArch64::AEK_TME)
102 Features.push_back("+tme");
103 if (Extensions & AEK_RCPC)
104 Features.push_back("+rcpc");
105 if (Extensions & AEK_BRBE)
106 Features.push_back("+brbe");
107 if (Extensions & AEK_PAUTH)
108 Features.push_back("+pauth");
109 if (Extensions & AEK_FLAGM)
110 Features.push_back("+flagm");
111 if (Extensions & AArch64::AEK_SME)
112 Features.push_back("+sme");
113 if (Extensions & AArch64::AEK_SMEF64)
114 Features.push_back("+sme-f64");
115 if (Extensions & AArch64::AEK_SMEI64)
116 Features.push_back("+sme-i64");
117
118 return true;
119 }
120
getArchFeatures(AArch64::ArchKind AK,std::vector<StringRef> & Features)121 bool AArch64::getArchFeatures(AArch64::ArchKind AK,
122 std::vector<StringRef> &Features) {
123 if (AK == ArchKind::ARMV8_1A)
124 Features.push_back("+v8.1a");
125 if (AK == ArchKind::ARMV8_2A)
126 Features.push_back("+v8.2a");
127 if (AK == ArchKind::ARMV8_3A)
128 Features.push_back("+v8.3a");
129 if (AK == ArchKind::ARMV8_4A)
130 Features.push_back("+v8.4a");
131 if (AK == ArchKind::ARMV8_5A)
132 Features.push_back("+v8.5a");
133 if (AK == AArch64::ArchKind::ARMV8_6A)
134 Features.push_back("+v8.6a");
135 if (AK == AArch64::ArchKind::ARMV8_7A)
136 Features.push_back("+v8.7a");
137 if (AK == AArch64::ArchKind::ARMV9A)
138 Features.push_back("+v9a");
139 if (AK == AArch64::ArchKind::ARMV9_1A)
140 Features.push_back("+v9.1a");
141 if (AK == AArch64::ArchKind::ARMV9_2A)
142 Features.push_back("+v9.2a");
143 if(AK == AArch64::ArchKind::ARMV8R)
144 Features.push_back("+v8r");
145
146 return AK != ArchKind::INVALID;
147 }
148
getArchName(AArch64::ArchKind AK)149 StringRef AArch64::getArchName(AArch64::ArchKind AK) {
150 return AArch64ARCHNames[static_cast<unsigned>(AK)].getName();
151 }
152
getCPUAttr(AArch64::ArchKind AK)153 StringRef AArch64::getCPUAttr(AArch64::ArchKind AK) {
154 return AArch64ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
155 }
156
getSubArch(AArch64::ArchKind AK)157 StringRef AArch64::getSubArch(AArch64::ArchKind AK) {
158 return AArch64ARCHNames[static_cast<unsigned>(AK)].getSubArch();
159 }
160
getArchAttr(AArch64::ArchKind AK)161 unsigned AArch64::getArchAttr(AArch64::ArchKind AK) {
162 return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
163 }
164
getArchExtName(unsigned ArchExtKind)165 StringRef AArch64::getArchExtName(unsigned ArchExtKind) {
166 for (const auto &AE : AArch64ARCHExtNames)
167 if (ArchExtKind == AE.ID)
168 return AE.getName();
169 return StringRef();
170 }
171
getArchExtFeature(StringRef ArchExt)172 StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
173 if (ArchExt.startswith("no")) {
174 StringRef ArchExtBase(ArchExt.substr(2));
175 for (const auto &AE : AArch64ARCHExtNames) {
176 if (AE.NegFeature && ArchExtBase == AE.getName())
177 return StringRef(AE.NegFeature);
178 }
179 }
180
181 for (const auto &AE : AArch64ARCHExtNames)
182 if (AE.Feature && ArchExt == AE.getName())
183 return StringRef(AE.Feature);
184 return StringRef();
185 }
186
getDefaultCPU(StringRef Arch)187 StringRef AArch64::getDefaultCPU(StringRef Arch) {
188 ArchKind AK = parseArch(Arch);
189 if (AK == ArchKind::INVALID)
190 return StringRef();
191
192 // Look for multiple AKs to find the default for pair AK+Name.
193 for (const auto &CPU : AArch64CPUNames)
194 if (CPU.ArchID == AK && CPU.Default)
195 return CPU.getName();
196
197 // If we can't find a default then target the architecture instead
198 return "generic";
199 }
200
fillValidCPUArchList(SmallVectorImpl<StringRef> & Values)201 void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
202 for (const auto &Arch : AArch64CPUNames) {
203 if (Arch.ArchID != ArchKind::INVALID)
204 Values.push_back(Arch.getName());
205 }
206 }
207
isX18ReservedByDefault(const Triple & TT)208 bool AArch64::isX18ReservedByDefault(const Triple &TT) {
209 return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
210 TT.isOSWindows();
211 }
212
213 // Allows partial match, ex. "v8a" matches "armv8a".
parseArch(StringRef Arch)214 AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
215 Arch = ARM::getCanonicalArchName(Arch);
216 if (checkArchVersion(Arch) < 8)
217 return ArchKind::INVALID;
218
219 StringRef Syn = ARM::getArchSynonym(Arch);
220 for (const auto &A : AArch64ARCHNames) {
221 if (A.getName().endswith(Syn))
222 return A.ID;
223 }
224 return ArchKind::INVALID;
225 }
226
parseArchExt(StringRef ArchExt)227 AArch64::ArchExtKind AArch64::parseArchExt(StringRef ArchExt) {
228 for (const auto &A : AArch64ARCHExtNames) {
229 if (ArchExt == A.getName())
230 return static_cast<ArchExtKind>(A.ID);
231 }
232 return AArch64::AEK_INVALID;
233 }
234
parseCPUArch(StringRef CPU)235 AArch64::ArchKind AArch64::parseCPUArch(StringRef CPU) {
236 for (const auto &C : AArch64CPUNames) {
237 if (CPU == C.getName())
238 return C.ArchID;
239 }
240 return ArchKind::INVALID;
241 }
242
243 // Parse a branch protection specification, which has the form
244 // standard | none | [bti,pac-ret[+b-key,+leaf]*]
245 // Returns true on success, with individual elements of the specification
246 // returned in `PBP`. Returns false in error, with `Err` containing
247 // an erroneous part of the spec.
parseBranchProtection(StringRef Spec,ParsedBranchProtection & PBP,StringRef & Err)248 bool AArch64::parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,
249 StringRef &Err) {
250 PBP = {"none", "a_key", false};
251 if (Spec == "none")
252 return true; // defaults are ok
253
254 if (Spec == "standard") {
255 PBP.Scope = "non-leaf";
256 PBP.BranchTargetEnforcement = true;
257 return true;
258 }
259
260 SmallVector<StringRef, 4> Opts;
261 Spec.split(Opts, "+");
262 for (int I = 0, E = Opts.size(); I != E; ++I) {
263 StringRef Opt = Opts[I].trim();
264 if (Opt == "bti") {
265 PBP.BranchTargetEnforcement = true;
266 continue;
267 }
268 if (Opt == "pac-ret") {
269 PBP.Scope = "non-leaf";
270 for (; I + 1 != E; ++I) {
271 StringRef PACOpt = Opts[I + 1].trim();
272 if (PACOpt == "leaf")
273 PBP.Scope = "all";
274 else if (PACOpt == "b-key")
275 PBP.Key = "b_key";
276 else
277 break;
278 }
279 continue;
280 }
281 if (Opt == "")
282 Err = "<empty>";
283 else
284 Err = Opt;
285 return false;
286 }
287
288 return true;
289 }
290