1 //===-- AArch64SelectionDAGInfo.cpp - AArch64 SelectionDAG Info -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the AArch64SelectionDAGInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "AArch64TargetMachine.h"
14 using namespace llvm;
15
16 #define DEBUG_TYPE "aarch64-selectiondag-info"
17
EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo) const18 SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset(
19 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
20 SDValue Size, Align Alignment, bool isVolatile,
21 MachinePointerInfo DstPtrInfo) const {
22 // Check to see if there is a specialized entry-point for memory zeroing.
23 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
24 ConstantSDNode *SizeValue = dyn_cast<ConstantSDNode>(Size);
25 const AArch64Subtarget &STI =
26 DAG.getMachineFunction().getSubtarget<AArch64Subtarget>();
27 const char *bzeroName =
28 (V && V->isZero())
29 ? DAG.getTargetLoweringInfo().getLibcallName(RTLIB::BZERO)
30 : nullptr;
31 // For small size (< 256), it is not beneficial to use bzero
32 // instead of memset.
33 if (bzeroName && (!SizeValue || SizeValue->getZExtValue() > 256)) {
34 const AArch64TargetLowering &TLI = *STI.getTargetLowering();
35
36 EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
37 Type *IntPtrTy = Type::getInt8PtrTy(*DAG.getContext());
38 TargetLowering::ArgListTy Args;
39 TargetLowering::ArgListEntry Entry;
40 Entry.Node = Dst;
41 Entry.Ty = IntPtrTy;
42 Args.push_back(Entry);
43 Entry.Node = Size;
44 Args.push_back(Entry);
45 TargetLowering::CallLoweringInfo CLI(DAG);
46 CLI.setDebugLoc(dl)
47 .setChain(Chain)
48 .setLibCallee(CallingConv::C, Type::getVoidTy(*DAG.getContext()),
49 DAG.getExternalSymbol(bzeroName, IntPtr),
50 std::move(Args))
51 .setDiscardResult();
52 std::pair<SDValue, SDValue> CallResult = TLI.LowerCallTo(CLI);
53 return CallResult.second;
54 }
55 return SDValue();
56 }
57
58 static const int kSetTagLoopThreshold = 176;
59
EmitUnrolledSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Ptr,uint64_t ObjSize,const MachineMemOperand * BaseMemOperand,bool ZeroData)60 static SDValue EmitUnrolledSetTag(SelectionDAG &DAG, const SDLoc &dl,
61 SDValue Chain, SDValue Ptr, uint64_t ObjSize,
62 const MachineMemOperand *BaseMemOperand,
63 bool ZeroData) {
64 MachineFunction &MF = DAG.getMachineFunction();
65 unsigned ObjSizeScaled = ObjSize / 16;
66
67 SDValue TagSrc = Ptr;
68 if (Ptr.getOpcode() == ISD::FrameIndex) {
69 int FI = cast<FrameIndexSDNode>(Ptr)->getIndex();
70 Ptr = DAG.getTargetFrameIndex(FI, MVT::i64);
71 // A frame index operand may end up as [SP + offset] => it is fine to use SP
72 // register as the tag source.
73 TagSrc = DAG.getRegister(AArch64::SP, MVT::i64);
74 }
75
76 const unsigned OpCode1 = ZeroData ? AArch64ISD::STZG : AArch64ISD::STG;
77 const unsigned OpCode2 = ZeroData ? AArch64ISD::STZ2G : AArch64ISD::ST2G;
78
79 SmallVector<SDValue, 8> OutChains;
80 unsigned OffsetScaled = 0;
81 while (OffsetScaled < ObjSizeScaled) {
82 if (ObjSizeScaled - OffsetScaled >= 2) {
83 SDValue AddrNode =
84 DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
85 SDValue St = DAG.getMemIntrinsicNode(
86 OpCode2, dl, DAG.getVTList(MVT::Other),
87 {Chain, TagSrc, AddrNode},
88 MVT::v4i64,
89 MF.getMachineMemOperand(BaseMemOperand, OffsetScaled * 16, 16 * 2));
90 OffsetScaled += 2;
91 OutChains.push_back(St);
92 continue;
93 }
94
95 if (ObjSizeScaled - OffsetScaled > 0) {
96 SDValue AddrNode =
97 DAG.getMemBasePlusOffset(Ptr, TypeSize::Fixed(OffsetScaled * 16), dl);
98 SDValue St = DAG.getMemIntrinsicNode(
99 OpCode1, dl, DAG.getVTList(MVT::Other),
100 {Chain, TagSrc, AddrNode},
101 MVT::v2i64,
102 MF.getMachineMemOperand(BaseMemOperand, OffsetScaled * 16, 16));
103 OffsetScaled += 1;
104 OutChains.push_back(St);
105 }
106 }
107
108 SDValue Res = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
109 return Res;
110 }
111
EmitTargetCodeForSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Addr,SDValue Size,MachinePointerInfo DstPtrInfo,bool ZeroData) const112 SDValue AArch64SelectionDAGInfo::EmitTargetCodeForSetTag(
113 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Addr,
114 SDValue Size, MachinePointerInfo DstPtrInfo, bool ZeroData) const {
115 uint64_t ObjSize = cast<ConstantSDNode>(Size)->getZExtValue();
116 assert(ObjSize % 16 == 0);
117
118 MachineFunction &MF = DAG.getMachineFunction();
119 MachineMemOperand *BaseMemOperand = MF.getMachineMemOperand(
120 DstPtrInfo, MachineMemOperand::MOStore, ObjSize, Align(16));
121
122 bool UseSetTagRangeLoop =
123 kSetTagLoopThreshold >= 0 && (int)ObjSize >= kSetTagLoopThreshold;
124 if (!UseSetTagRangeLoop)
125 return EmitUnrolledSetTag(DAG, dl, Chain, Addr, ObjSize, BaseMemOperand,
126 ZeroData);
127
128 const EVT ResTys[] = {MVT::i64, MVT::i64, MVT::Other};
129
130 unsigned Opcode;
131 if (Addr.getOpcode() == ISD::FrameIndex) {
132 int FI = cast<FrameIndexSDNode>(Addr)->getIndex();
133 Addr = DAG.getTargetFrameIndex(FI, MVT::i64);
134 Opcode = ZeroData ? AArch64::STZGloop : AArch64::STGloop;
135 } else {
136 Opcode = ZeroData ? AArch64::STZGloop_wback : AArch64::STGloop_wback;
137 }
138 SDValue Ops[] = {DAG.getTargetConstant(ObjSize, dl, MVT::i64), Addr, Chain};
139 SDNode *St = DAG.getMachineNode(Opcode, dl, ResTys, Ops);
140
141 DAG.setNodeMemRefs(cast<MachineSDNode>(St), {BaseMemOperand});
142 return SDValue(St, 2);
143 }
144