1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s 3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii < %s | FileCheck -check-prefix=GFX6 %s 4; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s 5 6define float @v_test_fmax_legacy_ogt_f32(float %a, float %b) { 7; GFX6-LABEL: v_test_fmax_legacy_ogt_f32: 8; GFX6: ; %bb.0: 9; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10; GFX6-NEXT: v_max_legacy_f32_e32 v0, v0, v1 11; GFX6-NEXT: s_setpc_b64 s[30:31] 12; 13; GFX8-LABEL: v_test_fmax_legacy_ogt_f32: 14; GFX8: ; %bb.0: 15; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 16; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v0, v1 17; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 18; GFX8-NEXT: s_setpc_b64 s[30:31] 19 %cmp = fcmp ogt float %a, %b 20 %val = select i1 %cmp, float %a, float %b 21 ret float %val 22} 23 24define float @v_test_fmax_legacy_oge_f32(float %a, float %b) { 25; GFX6-LABEL: v_test_fmax_legacy_oge_f32: 26; GFX6: ; %bb.0: 27; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 28; GFX6-NEXT: v_max_legacy_f32_e32 v0, v0, v1 29; GFX6-NEXT: s_setpc_b64 s[30:31] 30; 31; GFX8-LABEL: v_test_fmax_legacy_oge_f32: 32; GFX8: ; %bb.0: 33; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 34; GFX8-NEXT: v_cmp_ge_f32_e32 vcc, v0, v1 35; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 36; GFX8-NEXT: s_setpc_b64 s[30:31] 37 %cmp = fcmp oge float %a, %b 38 %val = select i1 %cmp, float %a, float %b 39 ret float %val 40} 41 42define float @v_test_fmax_legacy_uge_f32(float %a, float %b) { 43; GFX6-LABEL: v_test_fmax_legacy_uge_f32: 44; GFX6: ; %bb.0: 45; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 46; GFX6-NEXT: v_max_legacy_f32_e32 v0, v1, v0 47; GFX6-NEXT: s_setpc_b64 s[30:31] 48; 49; GFX8-LABEL: v_test_fmax_legacy_uge_f32: 50; GFX8: ; %bb.0: 51; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 52; GFX8-NEXT: v_cmp_nlt_f32_e32 vcc, v0, v1 53; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 54; GFX8-NEXT: s_setpc_b64 s[30:31] 55 %cmp = fcmp uge float %a, %b 56 %val = select i1 %cmp, float %a, float %b 57 ret float %val 58} 59 60define float @v_test_fmax_legacy_ugt_f32(float %a, float %b) { 61; GFX6-LABEL: v_test_fmax_legacy_ugt_f32: 62; GFX6: ; %bb.0: 63; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 64; GFX6-NEXT: v_max_legacy_f32_e32 v0, v1, v0 65; GFX6-NEXT: s_setpc_b64 s[30:31] 66; 67; GFX8-LABEL: v_test_fmax_legacy_ugt_f32: 68; GFX8: ; %bb.0: 69; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 70; GFX8-NEXT: v_cmp_nle_f32_e32 vcc, v0, v1 71; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 72; GFX8-NEXT: s_setpc_b64 s[30:31] 73 %cmp = fcmp ugt float %a, %b 74 %val = select i1 %cmp, float %a, float %b 75 ret float %val 76} 77 78define float @v_test_fmax_legacy_ole_f32(float %a, float %b) { 79; GFX6-LABEL: v_test_fmax_legacy_ole_f32: 80; GFX6: ; %bb.0: 81; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 82; GFX6-NEXT: v_max_legacy_f32_e32 v0, v1, v0 83; GFX6-NEXT: s_setpc_b64 s[30:31] 84; 85; GFX8-LABEL: v_test_fmax_legacy_ole_f32: 86; GFX8: ; %bb.0: 87; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 88; GFX8-NEXT: v_cmp_le_f32_e32 vcc, v0, v1 89; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 90; GFX8-NEXT: s_setpc_b64 s[30:31] 91 %cmp = fcmp ole float %a, %b 92 %val = select i1 %cmp, float %b, float %a 93 ret float %val 94} 95 96define float @v_test_fmax_legacy_olt_f32(float %a, float %b) { 97; GFX6-LABEL: v_test_fmax_legacy_olt_f32: 98; GFX6: ; %bb.0: 99; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 100; GFX6-NEXT: v_max_legacy_f32_e32 v0, v1, v0 101; GFX6-NEXT: s_setpc_b64 s[30:31] 102; 103; GFX8-LABEL: v_test_fmax_legacy_olt_f32: 104; GFX8: ; %bb.0: 105; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 106; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1 107; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 108; GFX8-NEXT: s_setpc_b64 s[30:31] 109 %cmp = fcmp olt float %a, %b 110 %val = select i1 %cmp, float %b, float %a 111 ret float %val 112} 113 114define float @v_test_fmax_legacy_ule_f32(float %a, float %b) { 115; GFX6-LABEL: v_test_fmax_legacy_ule_f32: 116; GFX6: ; %bb.0: 117; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 118; GFX6-NEXT: v_max_legacy_f32_e32 v0, v0, v1 119; GFX6-NEXT: s_setpc_b64 s[30:31] 120; 121; GFX8-LABEL: v_test_fmax_legacy_ule_f32: 122; GFX8: ; %bb.0: 123; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 124; GFX8-NEXT: v_cmp_ngt_f32_e32 vcc, v0, v1 125; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 126; GFX8-NEXT: s_setpc_b64 s[30:31] 127 %cmp = fcmp ule float %a, %b 128 %val = select i1 %cmp, float %b, float %a 129 ret float %val 130} 131 132define float @v_test_fmax_legacy_ult_f32(float %a, float %b) { 133; GFX6-LABEL: v_test_fmax_legacy_ult_f32: 134; GFX6: ; %bb.0: 135; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 136; GFX6-NEXT: v_max_legacy_f32_e32 v0, v0, v1 137; GFX6-NEXT: s_setpc_b64 s[30:31] 138; 139; GFX8-LABEL: v_test_fmax_legacy_ult_f32: 140; GFX8: ; %bb.0: 141; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 142; GFX8-NEXT: v_cmp_nge_f32_e32 vcc, v0, v1 143; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 144; GFX8-NEXT: s_setpc_b64 s[30:31] 145 %cmp = fcmp ult float %a, %b 146 %val = select i1 %cmp, float %b, float %a 147 ret float %val 148} 149 150define float @v_test_fmax_legacy_oge_f32_fneg_lhs(float %a, float %b) { 151; GFX6-LABEL: v_test_fmax_legacy_oge_f32_fneg_lhs: 152; GFX6: ; %bb.0: 153; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 154; GFX6-NEXT: v_max_legacy_f32_e64 v0, -v0, v1 155; GFX6-NEXT: s_setpc_b64 s[30:31] 156; 157; GFX8-LABEL: v_test_fmax_legacy_oge_f32_fneg_lhs: 158; GFX8: ; %bb.0: 159; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 160; GFX8-NEXT: v_cmp_ge_f32_e64 s[4:5], -v0, v1 161; GFX8-NEXT: v_cndmask_b32_e64 v0, v1, -v0, s[4:5] 162; GFX8-NEXT: s_setpc_b64 s[30:31] 163 %a.neg = fneg float %a 164 %cmp = fcmp oge float %a.neg, %b 165 %val = select i1 %cmp, float %a.neg, float %b 166 ret float %val 167} 168 169define float @v_test_fmax_legacy_oge_f32_fneg_rhs(float %a, float %b) { 170; GFX6-LABEL: v_test_fmax_legacy_oge_f32_fneg_rhs: 171; GFX6: ; %bb.0: 172; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 173; GFX6-NEXT: v_max_legacy_f32_e64 v0, v0, -v1 174; GFX6-NEXT: s_setpc_b64 s[30:31] 175; 176; GFX8-LABEL: v_test_fmax_legacy_oge_f32_fneg_rhs: 177; GFX8: ; %bb.0: 178; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 179; GFX8-NEXT: v_cmp_ge_f32_e64 s[4:5], v0, -v1 180; GFX8-NEXT: v_cndmask_b32_e64 v0, -v1, v0, s[4:5] 181; GFX8-NEXT: s_setpc_b64 s[30:31] 182 %b.neg = fneg float %b 183 %cmp = fcmp oge float %a, %b.neg 184 %val = select i1 %cmp, float %a, float %b.neg 185 ret float %val 186} 187 188define float @v_test_fcmp_select_ord(float %a, float %b) { 189; GFX6-LABEL: v_test_fcmp_select_ord: 190; GFX6: ; %bb.0: 191; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 192; GFX6-NEXT: v_cmp_o_f32_e32 vcc, v0, v1 193; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 194; GFX6-NEXT: s_setpc_b64 s[30:31] 195; 196; GFX8-LABEL: v_test_fcmp_select_ord: 197; GFX8: ; %bb.0: 198; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 199; GFX8-NEXT: v_cmp_o_f32_e32 vcc, v0, v1 200; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 201; GFX8-NEXT: s_setpc_b64 s[30:31] 202 %cmp = fcmp ord float %a, %b 203 %val = select i1 %cmp, float %a, float %b 204 ret float %val 205} 206 207define float @v_test_fmax_legacy_ule_f32_multi_use(float %a, float %b) { 208; GFX6-LABEL: v_test_fmax_legacy_ule_f32_multi_use: 209; GFX6: ; %bb.0: 210; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 211; GFX6-NEXT: v_cmp_gt_f32_e32 vcc, v0, v1 212; GFX6-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 213; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 214; GFX6-NEXT: s_mov_b32 m0, -1 215; GFX6-NEXT: ds_write_b32 v0, v1 216; GFX6-NEXT: s_waitcnt lgkmcnt(0) 217; GFX6-NEXT: s_setpc_b64 s[30:31] 218; 219; GFX8-LABEL: v_test_fmax_legacy_ule_f32_multi_use: 220; GFX8: ; %bb.0: 221; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 222; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v0, v1 223; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 224; GFX8-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 225; GFX8-NEXT: s_mov_b32 m0, -1 226; GFX8-NEXT: ds_write_b32 v0, v1 227; GFX8-NEXT: s_waitcnt lgkmcnt(0) 228; GFX8-NEXT: s_setpc_b64 s[30:31] 229 %cmp = fcmp ogt float %a, %b 230 %val0 = select i1 %cmp, float %a, float %b 231 %val1 = zext i1 %cmp to i32 232 store i32 %val1, i32 addrspace(3)* undef 233 ret float %val0 234} 235 236define double @v_test_fmax_legacy_ult_f64(double %a, double %b) { 237; GFX6-LABEL: v_test_fmax_legacy_ult_f64: 238; GFX6: ; %bb.0: 239; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 240; GFX6-NEXT: v_cmp_nge_f64_e32 vcc, v[0:1], v[2:3] 241; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 242; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc 243; GFX6-NEXT: s_setpc_b64 s[30:31] 244; 245; GFX8-LABEL: v_test_fmax_legacy_ult_f64: 246; GFX8: ; %bb.0: 247; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 248; GFX8-NEXT: v_cmp_nge_f64_e32 vcc, v[0:1], v[2:3] 249; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 250; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc 251; GFX8-NEXT: s_setpc_b64 s[30:31] 252 %cmp = fcmp ult double %a, %b 253 %val = select i1 %cmp, double %b, double %a 254 ret double %val 255} 256 257define <2 x float> @v_test_fmax_legacy_ogt_v2f32(<2 x float> %a, <2 x float> %b) { 258; GFX6-LABEL: v_test_fmax_legacy_ogt_v2f32: 259; GFX6: ; %bb.0: 260; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 261; GFX6-NEXT: v_max_legacy_f32_e32 v0, v0, v2 262; GFX6-NEXT: v_max_legacy_f32_e32 v1, v1, v3 263; GFX6-NEXT: s_setpc_b64 s[30:31] 264; 265; GFX8-LABEL: v_test_fmax_legacy_ogt_v2f32: 266; GFX8: ; %bb.0: 267; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 268; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v0, v2 269; GFX8-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc 270; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v1, v3 271; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc 272; GFX8-NEXT: s_setpc_b64 s[30:31] 273 %cmp = fcmp ogt <2 x float> %a, %b 274 %val = select <2 x i1> %cmp, <2 x float> %a, <2 x float> %b 275 ret <2 x float> %val 276} 277