1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN %s 3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN %s 4 5@external_constant = external addrspace(4) constant i32, align 4 6@external_constant32 = external addrspace(6) constant i32, align 4 7@external_global = external addrspace(1) global i32, align 4 8@external_other = external addrspace(999) global i32, align 4 9 10@internal_constant = internal addrspace(4) constant i32 9, align 4 11@internal_constant32 = internal addrspace(6) constant i32 9, align 4 12@internal_global = internal addrspace(1) global i32 9, align 4 13@internal_other = internal addrspace(999) global i32 9, align 4 14 15 16define i32 addrspace(4)* @external_constant_got() { 17 ; GCN-LABEL: name: external_constant_got 18 ; GCN: bb.1 (%ir-block.0): 19 ; GCN: liveins: $sgpr30_sgpr31 20 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 21 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant + 4, target-flags(amdgpu-gotprel32-hi) @external_constant + 12, implicit-def $scc 22 ; GCN: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4) 23 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p4) 24 ; GCN: $vgpr0 = COPY [[UV]](s32) 25 ; GCN: $vgpr1 = COPY [[UV1]](s32) 26 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 27 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 28 ret i32 addrspace(4)* @external_constant 29} 30 31define i32 addrspace(1)* @external_global_got() { 32 ; GCN-LABEL: name: external_global_got 33 ; GCN: bb.1 (%ir-block.0): 34 ; GCN: liveins: $sgpr30_sgpr31 35 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 36 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_global + 4, target-flags(amdgpu-gotprel32-hi) @external_global + 12, implicit-def $scc 37 ; GCN: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p1) from got, addrspace 4) 38 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p1) 39 ; GCN: $vgpr0 = COPY [[UV]](s32) 40 ; GCN: $vgpr1 = COPY [[UV1]](s32) 41 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 42 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 43 ret i32 addrspace(1)* @external_global 44} 45 46define i32 addrspace(999)* @external_other_got() { 47 ; GCN-LABEL: name: external_other_got 48 ; GCN: bb.1 (%ir-block.0): 49 ; GCN: liveins: $sgpr30_sgpr31 50 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 51 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_other + 4, target-flags(amdgpu-gotprel32-hi) @external_other + 12, implicit-def $scc 52 ; GCN: [[LOAD:%[0-9]+]]:_(p999) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p999) from got, addrspace 4) 53 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p999) 54 ; GCN: $vgpr0 = COPY [[UV]](s32) 55 ; GCN: $vgpr1 = COPY [[UV1]](s32) 56 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 57 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 58 ret i32 addrspace(999)* @external_other 59} 60 61define i32 addrspace(4)* @internal_constant_pcrel() { 62 ; GCN-LABEL: name: internal_constant_pcrel 63 ; GCN: bb.1 (%ir-block.0): 64 ; GCN: liveins: $sgpr30_sgpr31 65 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 66 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant + 4, target-flags(amdgpu-rel32-hi) @internal_constant + 12, implicit-def $scc 67 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p4) 68 ; GCN: $vgpr0 = COPY [[UV]](s32) 69 ; GCN: $vgpr1 = COPY [[UV1]](s32) 70 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 71 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 72 ret i32 addrspace(4)* @internal_constant 73} 74 75define i32 addrspace(1)* @internal_global_pcrel() { 76 ; GCN-LABEL: name: internal_global_pcrel 77 ; GCN: bb.1 (%ir-block.0): 78 ; GCN: liveins: $sgpr30_sgpr31 79 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 80 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p1) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_global + 4, target-flags(amdgpu-rel32-hi) @internal_global + 12, implicit-def $scc 81 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p1) 82 ; GCN: $vgpr0 = COPY [[UV]](s32) 83 ; GCN: $vgpr1 = COPY [[UV1]](s32) 84 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 85 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 86 ret i32 addrspace(1)* @internal_global 87} 88 89define i32 addrspace(999)* @internal_other_pcrel() { 90 ; GCN-LABEL: name: internal_other_pcrel 91 ; GCN: bb.1 (%ir-block.0): 92 ; GCN: liveins: $sgpr30_sgpr31 93 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 94 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p999) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_other + 4, target-flags(amdgpu-rel32-hi) @internal_other + 12, implicit-def $scc 95 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p999) 96 ; GCN: $vgpr0 = COPY [[UV]](s32) 97 ; GCN: $vgpr1 = COPY [[UV1]](s32) 98 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 99 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0, implicit $vgpr1 100 ret i32 addrspace(999)* @internal_other 101} 102 103define i32 addrspace(6)* @external_constant32_got() { 104 ; GCN-LABEL: name: external_constant32_got 105 ; GCN: bb.1 (%ir-block.0): 106 ; GCN: liveins: $sgpr30_sgpr31 107 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 108 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant32 + 4, target-flags(amdgpu-gotprel32-hi) @external_constant32 + 12, implicit-def $scc 109 ; GCN: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4) 110 ; GCN: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[LOAD]](p4), 0 111 ; GCN: $vgpr0 = COPY [[EXTRACT]](p6) 112 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 113 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0 114 ret i32 addrspace(6)* @external_constant32 115} 116 117define i32 addrspace(6)* @internal_constant32_pcrel() { 118 ; GCN-LABEL: name: internal_constant32_pcrel 119 ; GCN: bb.1 (%ir-block.0): 120 ; GCN: liveins: $sgpr30_sgpr31 121 ; GCN: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr30_sgpr31 122 ; GCN: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant32 + 4, target-flags(amdgpu-rel32-hi) @internal_constant32 + 12, implicit-def $scc 123 ; GCN: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[SI_PC_ADD_REL_OFFSET]](p4), 0 124 ; GCN: $vgpr0 = COPY [[EXTRACT]](p6) 125 ; GCN: [[COPY1:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]] 126 ; GCN: S_SETPC_B64_return [[COPY1]], implicit $vgpr0 127 ret i32 addrspace(6)* @internal_constant32 128} 129