1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
3
4---
5
6name:            ffbl_b32_s32_s_s
7legalized:       true
8regBankSelected: true
9tracksRegLiveness: true
10
11body: |
12  bb.0:
13    liveins: $sgpr0
14
15    ; CHECK-LABEL: name: ffbl_b32_s32_s_s
16    ; CHECK: liveins: $sgpr0
17    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; CHECK: [[S_FF1_I32_B32_:%[0-9]+]]:sreg_32 = S_FF1_I32_B32 [[COPY]]
19    ; CHECK: S_ENDPGM 0, implicit [[S_FF1_I32_B32_]]
20  %0:sgpr(s32) = COPY $sgpr0
21  %1:sgpr(s32) = G_AMDGPU_FFBL_B32 %0
22  S_ENDPGM 0, implicit %1
23
24...
25
26---
27
28name:            ffbl_b32_s32_v_v
29legalized:       true
30regBankSelected: true
31tracksRegLiveness: true
32
33body: |
34  bb.0:
35    liveins: $vgpr0
36
37    ; CHECK-LABEL: name: ffbl_b32_s32_v_v
38    ; CHECK: liveins: $vgpr0
39    ; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
40    ; CHECK: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec
41    ; CHECK: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]
42  %0:vgpr(s32) = COPY $vgpr0
43  %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0
44  S_ENDPGM 0, implicit %1
45
46...
47
48---
49
50name:            ffbl_b32_v_s
51legalized:       true
52regBankSelected: true
53tracksRegLiveness: true
54
55body: |
56  bb.0:
57    liveins: $sgpr0
58
59    ; CHECK-LABEL: name: ffbl_b32_v_s
60    ; CHECK: liveins: $sgpr0
61    ; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
62    ; CHECK: [[V_FFBL_B32_e64_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e64 [[COPY]], implicit $exec
63    ; CHECK: S_ENDPGM 0, implicit [[V_FFBL_B32_e64_]]
64  %0:sgpr(s32) = COPY $sgpr0
65  %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0
66  S_ENDPGM 0, implicit %1
67
68...
69