1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
5
6---
7
8name:            add_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: add_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
24    ; GFX9-LABEL: name: add_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_ADD_I32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_ADD_I32_1]]
32    %0:sgpr(s32) = COPY $sgpr0
33    %1:sgpr(s32) = COPY $sgpr1
34    %2:sgpr(s32) = COPY $sgpr2
35    %3:sgpr(s32) = G_ADD %0, %1
36    %4:sgpr(s32) = G_ADD %3, %2
37    S_ENDPGM 0, implicit %4
38...
39
40---
41
42name:            add_s32_vgpr_vgpr_vgpr
43legalized:       true
44regBankSelected: true
45tracksRegLiveness: true
46
47body: |
48  bb.0:
49    liveins: $vgpr0, $vgpr1, $vgpr2
50    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr
51    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
52    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
53    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
54    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
55    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
56    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
57    ; GFX8: S_ENDPGM 0, implicit %4
58    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr
59    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
60    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
61    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
62    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
63    ; GFX9: [[V_ADD3_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
64    ; GFX9: S_ENDPGM 0, implicit [[V_ADD3_U32_e64_]]
65    %0:vgpr(s32) = COPY $vgpr0
66    %1:vgpr(s32) = COPY $vgpr1
67    %2:vgpr(s32) = COPY $vgpr2
68    %3:vgpr(s32) = G_ADD %0, %1
69    %4:vgpr(s32) = G_ADD %3, %2
70    S_ENDPGM 0, implicit %4
71...
72
73---
74
75name:            add_s32_vgpr_vgpr_vgpr_multi_use
76legalized:       true
77regBankSelected: true
78tracksRegLiveness: true
79
80body: |
81  bb.0:
82    liveins: $vgpr0, $vgpr1, $vgpr2
83    ; GFX8-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
84    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
85    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
86    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
87    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
88    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
89    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
90    ; GFX8: S_ENDPGM 0, implicit %4, implicit %3
91    ; GFX9-LABEL: name: add_s32_vgpr_vgpr_vgpr_multi_use
92    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
93    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
94    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
95    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
96    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
97    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
98    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_]]
99    %0:vgpr(s32) = COPY $vgpr0
100    %1:vgpr(s32) = COPY $vgpr1
101    %2:vgpr(s32) = COPY $vgpr2
102    %3:vgpr(s32) = G_ADD %0, %1
103    %4:vgpr(s32) = G_ADD %3, %2
104    S_ENDPGM 0, implicit %4, implicit %3
105...
106
107---
108
109name:            add_p3_vgpr_vgpr_vgpr
110legalized:       true
111regBankSelected: true
112tracksRegLiveness: true
113
114body: |
115  bb.0:
116    liveins: $vgpr0, $vgpr1, $vgpr2
117
118    ; GFX8-LABEL: name: add_p3_vgpr_vgpr_vgpr
119    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
120    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
121    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
122    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
123    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
124    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
125    ; GFX8: S_ENDPGM 0, implicit %4
126    ; GFX9-LABEL: name: add_p3_vgpr_vgpr_vgpr
127    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
128    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
129    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
130    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
131    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
132    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
133    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
134    %0:vgpr(p3) = COPY $vgpr0
135    %1:vgpr(s32) = COPY $vgpr1
136    %2:vgpr(s32) = COPY $vgpr2
137    %3:vgpr(p3) = G_PTR_ADD %0, %1
138    %4:vgpr(p3) = G_PTR_ADD %3, %2
139    S_ENDPGM 0, implicit %4
140...
141
142---
143
144name:            add_p5_vgpr_vgpr_vgpr
145legalized:       true
146regBankSelected: true
147tracksRegLiveness: true
148
149body: |
150  bb.0:
151    liveins: $vgpr0, $vgpr1, $vgpr2
152
153    ; GFX8-LABEL: name: add_p5_vgpr_vgpr_vgpr
154    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
155    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
156    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
157    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
158    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
159    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 %3, [[COPY2]], 0, implicit $exec
160    ; GFX8: S_ENDPGM 0, implicit %4
161    ; GFX9-LABEL: name: add_p5_vgpr_vgpr_vgpr
162    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
163    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
164    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
165    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
166    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
167    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], [[COPY2]], 0, implicit $exec
168    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
169    %0:vgpr(p5) = COPY $vgpr0
170    %1:vgpr(s32) = COPY $vgpr1
171    %2:vgpr(s32) = COPY $vgpr2
172    %3:vgpr(p5) = G_PTR_ADD %0, %1
173    %4:vgpr(p5) = G_PTR_ADD %3, %2
174    S_ENDPGM 0, implicit %4
175...
176
177---
178
179name:            add_p3_s32_vgpr_vgpr_vgpr
180legalized:       true
181regBankSelected: true
182tracksRegLiveness: true
183
184body: |
185  bb.0:
186    liveins: $vgpr0, $vgpr1, $vgpr2
187
188    ; GFX8-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
189    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
190    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
191    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
192    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
193    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
194    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
195    ; GFX8: S_ENDPGM 0, implicit %4
196    ; GFX9-LABEL: name: add_p3_s32_vgpr_vgpr_vgpr
197    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
198    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
199    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
200    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
201    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
202    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
203    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
204    %0:vgpr(s32) = COPY $vgpr0
205    %1:vgpr(s32) = COPY $vgpr1
206    %2:vgpr(p3) = COPY $vgpr2
207    %3:vgpr(s32) = G_ADD %0, %1
208    %4:vgpr(p3) = G_PTR_ADD %2, %3
209    S_ENDPGM 0, implicit %4
210...
211
212---
213
214name:            add_p5_s32_vgpr_vgpr_vgpr
215legalized:       true
216regBankSelected: true
217tracksRegLiveness: true
218
219body: |
220  bb.0:
221    liveins: $vgpr0, $vgpr1, $vgpr2
222
223    ; GFX8-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
224    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
225    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
226    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
227    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
228    ; GFX8: %3:vgpr_32, dead %6:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
229    ; GFX8: %4:vgpr_32, dead %5:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY2]], %3, 0, implicit $exec
230    ; GFX8: S_ENDPGM 0, implicit %4
231    ; GFX9-LABEL: name: add_p5_s32_vgpr_vgpr_vgpr
232    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
233    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
234    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
235    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
236    ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
237    ; GFX9: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY2]], [[V_ADD_U32_e64_]], 0, implicit $exec
238    ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_1]]
239    %0:vgpr(s32) = COPY $vgpr0
240    %1:vgpr(s32) = COPY $vgpr1
241    %2:vgpr(p5) = COPY $vgpr2
242    %3:vgpr(s32) = G_ADD %0, %1
243    %4:vgpr(p5) = G_PTR_ADD %2, %3
244    S_ENDPGM 0, implicit %4
245...
246