1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=SI
3# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -o - %s | FileCheck %s --check-prefix=VI
4---
5name: test_zextload_flat_i32_i8
6body: |
7  bb.0:
8    liveins: $vgpr0_vgpr1
9
10    ; SI-LABEL: name: test_zextload_flat_i32_i8
11    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
12    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
13    ; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
14    ; VI-LABEL: name: test_zextload_flat_i32_i8
15    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
16    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
17    ; VI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
18    %0:_(p0) = COPY $vgpr0_vgpr1
19    %1:_(s32) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
20    $vgpr0 = COPY %1
21...
22---
23name: test_zextload_flat_i32_i16
24body: |
25  bb.0:
26    liveins: $vgpr0_vgpr1
27
28    ; SI-LABEL: name: test_zextload_flat_i32_i16
29    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
30    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
31    ; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
32    ; VI-LABEL: name: test_zextload_flat_i32_i16
33    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
34    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
35    ; VI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
36     %0:_(p0) = COPY $vgpr0_vgpr1
37    %1:_(s32) = G_ZEXTLOAD %0 :: (load (s16), addrspace 0)
38    $vgpr0 = COPY %1
39...
40---
41name: test_zextload_flat_i31_i8
42body: |
43  bb.0:
44    liveins: $vgpr0_vgpr1
45
46    ; SI-LABEL: name: test_zextload_flat_i31_i8
47    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
48    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
49    ; SI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
50    ; VI-LABEL: name: test_zextload_flat_i31_i8
51    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
52    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
53    ; VI: $vgpr0 = COPY [[ZEXTLOAD]](s32)
54    %0:_(p0) = COPY $vgpr0_vgpr1
55    %1:_(s31) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
56    %2:_(s32) = G_ANYEXT %1
57    $vgpr0 = COPY %2
58...
59---
60name: test_zextload_flat_i64_i8
61body: |
62  bb.0:
63    liveins: $vgpr0_vgpr1
64
65    ; SI-LABEL: name: test_zextload_flat_i64_i8
66    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
67    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
68    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
69    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
70    ; VI-LABEL: name: test_zextload_flat_i64_i8
71    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
72    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8))
73    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
74    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
75    %0:_(p0) = COPY $vgpr0_vgpr1
76    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s8), addrspace 0)
77    $vgpr0_vgpr1 = COPY %1
78...
79---
80name: test_zextload_flat_i64_i16
81body: |
82  bb.0:
83    liveins: $vgpr0_vgpr1
84
85    ; SI-LABEL: name: test_zextload_flat_i64_i16
86    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
87    ; SI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
88    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
89    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
90    ; VI-LABEL: name: test_zextload_flat_i64_i16
91    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
92    ; VI: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16))
93    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ZEXTLOAD]](s32)
94    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
95    %0:_(p0) = COPY $vgpr0_vgpr1
96    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s16), addrspace 0)
97    $vgpr0_vgpr1 = COPY %1
98...
99---
100name: test_zextload_flat_i64_i32
101body: |
102  bb.0:
103    liveins: $vgpr0_vgpr1
104
105    ; SI-LABEL: name: test_zextload_flat_i64_i32
106    ; SI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
107    ; SI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
108    ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
109    ; SI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
110    ; VI-LABEL: name: test_zextload_flat_i64_i32
111    ; VI: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
112    ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load (s32))
113    ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[LOAD]](s32)
114    ; VI: $vgpr0_vgpr1 = COPY [[ZEXT]](s64)
115    %0:_(p0) = COPY $vgpr0_vgpr1
116    %1:_(s64) = G_ZEXTLOAD %0 :: (load (s32), addrspace 0)
117    $vgpr0_vgpr1 = COPY %1
118...
119