1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck --check-prefix=GCN %s 3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck --check-prefix=GCN %s 4 5--- 6name: bfe_sext_inreg_ashr_s32 7legalized: true 8tracksRegLiveness: true 9 10body: | 11 bb.0.entry: 12 liveins: $vgpr0 13 14 ; GCN-LABEL: name: bfe_sext_inreg_ashr_s32 15 ; GCN: liveins: $vgpr0 16 ; GCN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 17 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 18 ; GCN: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 19 ; GCN: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY]], [[C]](s32), [[C1]] 20 ; GCN: $vgpr0 = COPY [[SBFX]](s32) 21 %0:_(s32) = COPY $vgpr0 22 %1:_(s32) = G_CONSTANT i32 4 23 %2:_(s32) = G_ASHR %0, %1(s32) 24 %3:_(s32) = COPY %2(s32) 25 %4:_(s32) = G_SEXT_INREG %3, 16 26 $vgpr0 = COPY %4(s32) 27... 28 29--- 30name: bfe_sext_inreg_lshr_s32 31legalized: true 32tracksRegLiveness: true 33 34body: | 35 bb.0.entry: 36 liveins: $vgpr0 37 38 ; GCN-LABEL: name: bfe_sext_inreg_lshr_s32 39 ; GCN: liveins: $vgpr0 40 ; GCN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 41 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 42 ; GCN: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 43 ; GCN: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY]], [[C]](s32), [[C1]] 44 ; GCN: $vgpr0 = COPY [[SBFX]](s32) 45 %0:_(s32) = COPY $vgpr0 46 %1:_(s32) = G_CONSTANT i32 4 47 %2:_(s32) = G_LSHR %0, %1(s32) 48 %3:_(s32) = COPY %2(s32) 49 %4:_(s32) = G_SEXT_INREG %3, 16 50 $vgpr0 = COPY %4(s32) 51... 52 53--- 54name: bfe_sext_inreg_ashr_s64 55legalized: true 56tracksRegLiveness: true 57 58body: | 59 bb.0.entry: 60 liveins: $vgpr0_vgpr1 61 62 ; GCN-LABEL: name: bfe_sext_inreg_ashr_s64 63 ; GCN: liveins: $vgpr0_vgpr1 64 ; GCN: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 65 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 66 ; GCN: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 67 ; GCN: [[SBFX:%[0-9]+]]:_(s64) = G_SBFX [[COPY]], [[C]](s32), [[C1]] 68 ; GCN: $vgpr0_vgpr1 = COPY [[SBFX]](s64) 69 %0:_(s64) = COPY $vgpr0_vgpr1 70 %1:_(s32) = G_CONSTANT i32 4 71 %2:_(s64) = G_ASHR %0, %1(s32) 72 %3:_(s64) = COPY %2(s64) 73 %4:_(s64) = G_SEXT_INREG %3, 16 74 $vgpr0_vgpr1 = COPY %4(s64) 75... 76 77--- 78name: toobig_sext_inreg_ashr_s32 79legalized: true 80tracksRegLiveness: true 81 82body: | 83 bb.0.entry: 84 liveins: $vgpr0 85 86 ; GCN-LABEL: name: toobig_sext_inreg_ashr_s32 87 ; GCN: liveins: $vgpr0 88 ; GCN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 89 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 90 ; GCN: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32) 91 ; GCN: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ASHR]], 20 92 ; GCN: $vgpr0 = COPY [[SEXT_INREG]](s32) 93 %0:_(s32) = COPY $vgpr0 94 %1:_(s32) = G_CONSTANT i32 16 95 %2:_(s32) = G_ASHR %0, %1(s32) 96 %3:_(s32) = COPY %2(s32) 97 %4:_(s32) = G_SEXT_INREG %3, 20 98 $vgpr0 = COPY %4(s32) 99... 100 101--- 102name: toobig_sext_inreg_ashr_s64 103legalized: true 104tracksRegLiveness: true 105 106body: | 107 bb.0.entry: 108 liveins: $vgpr0_vgpr1 109 110 ; GCN-LABEL: name: toobig_sext_inreg_ashr_s64 111 ; GCN: liveins: $vgpr0_vgpr1 112 ; GCN: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 113 ; GCN: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 114 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 115 ; GCN: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[UV1]], [[C]](s32) 116 ; GCN: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 117 ; GCN: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[UV1]], [[C1]](s32) 118 ; GCN: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[ASHR1]](s32), [[ASHR]](s32) 119 ; GCN: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[MV]], 32 120 ; GCN: $vgpr0_vgpr1 = COPY [[SEXT_INREG]](s64) 121 %0:_(s64) = COPY $vgpr0_vgpr1 122 %1:_(s32) = G_CONSTANT i32 40 123 %2:_(s64) = G_ASHR %0, %1(s32) 124 %3:_(s64) = COPY %2(s64) 125 %4:_(s64) = G_SEXT_INREG %3, 32 126 $vgpr0_vgpr1 = COPY %4(s64) 127... 128 129--- 130name: var_sext_inreg_ashr_s32 131legalized: true 132tracksRegLiveness: true 133 134body: | 135 bb.0.entry: 136 liveins: $vgpr0, $vgpr1 137 138 ; GCN-LABEL: name: var_sext_inreg_ashr_s32 139 ; GCN: liveins: $vgpr0, $vgpr1 140 ; GCN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 141 ; GCN: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 142 ; GCN: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32) 143 ; GCN: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[ASHR]], 10 144 ; GCN: $vgpr0 = COPY [[SEXT_INREG]](s32) 145 %0:_(s32) = COPY $vgpr0 146 %1:_(s32) = COPY $vgpr1 147 %2:_(s32) = G_ASHR %0, %1(s32) 148 %3:_(s32) = COPY %2(s32) 149 %4:_(s32) = G_SEXT_INREG %3, 10 150 $vgpr0 = COPY %4(s32) 151... 152