1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,GISEL %s
3; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,CGP %s
4
5; The same 32-bit expansion is implemented in the legalizer and in AMDGPUCodeGenPrepare.
6
7define i64 @v_sdiv_i64(i64 %num, i64 %den) {
8; CHECK-LABEL: v_sdiv_i64:
9; CHECK:       ; %bb.0:
10; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
11; CHECK-NEXT:    v_mov_b32_e32 v5, v1
12; CHECK-NEXT:    v_mov_b32_e32 v4, v0
13; CHECK-NEXT:    v_or_b32_e32 v1, v5, v3
14; CHECK-NEXT:    v_mov_b32_e32 v0, 0
15; CHECK-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
16; CHECK-NEXT:    ; implicit-def: $vgpr0_vgpr1
17; CHECK-NEXT:    s_and_saveexec_b64 s[4:5], vcc
18; CHECK-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
19; CHECK-NEXT:    s_cbranch_execz BB0_2
20; CHECK-NEXT:  ; %bb.1:
21; CHECK-NEXT:    v_ashrrev_i32_e32 v0, 31, v3
22; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v2, v0
23; CHECK-NEXT:    v_addc_u32_e32 v2, vcc, v3, v0, vcc
24; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v0
25; CHECK-NEXT:    v_xor_b32_e32 v2, v2, v0
26; CHECK-NEXT:    v_cvt_f32_u32_e32 v3, v1
27; CHECK-NEXT:    v_cvt_f32_u32_e32 v6, v2
28; CHECK-NEXT:    v_ashrrev_i32_e32 v7, 31, v5
29; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
30; CHECK-NEXT:    v_mac_f32_e32 v3, 0x4f800000, v6
31; CHECK-NEXT:    v_rcp_iflag_f32_e32 v3, v3
32; CHECK-NEXT:    v_addc_u32_e32 v5, vcc, v5, v7, vcc
33; CHECK-NEXT:    v_sub_i32_e32 v8, vcc, 0, v1
34; CHECK-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
35; CHECK-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v3
36; CHECK-NEXT:    v_trunc_f32_e32 v6, v6
37; CHECK-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v6
38; CHECK-NEXT:    v_cvt_u32_f32_e32 v3, v3
39; CHECK-NEXT:    v_cvt_u32_f32_e32 v6, v6
40; CHECK-NEXT:    v_subb_u32_e32 v9, vcc, 0, v2, vcc
41; CHECK-NEXT:    v_mul_lo_u32 v10, v9, v3
42; CHECK-NEXT:    v_mul_lo_u32 v11, v8, v6
43; CHECK-NEXT:    v_mul_hi_u32 v13, v8, v3
44; CHECK-NEXT:    v_mul_lo_u32 v12, v8, v3
45; CHECK-NEXT:    v_xor_b32_e32 v4, v4, v7
46; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
47; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
48; CHECK-NEXT:    v_mul_lo_u32 v11, v6, v12
49; CHECK-NEXT:    v_mul_lo_u32 v13, v3, v10
50; CHECK-NEXT:    v_mul_hi_u32 v14, v3, v12
51; CHECK-NEXT:    v_mul_hi_u32 v12, v6, v12
52; CHECK-NEXT:    v_xor_b32_e32 v5, v5, v7
53; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v11, v13
54; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
55; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v11, v14
56; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
57; CHECK-NEXT:    v_mul_lo_u32 v14, v6, v10
58; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
59; CHECK-NEXT:    v_mul_hi_u32 v13, v3, v10
60; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v14, v12
61; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
62; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
63; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
64; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
65; CHECK-NEXT:    v_mul_hi_u32 v10, v6, v10
66; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
67; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
68; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
69; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
70; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v11
71; CHECK-NEXT:    v_addc_u32_e64 v11, s[4:5], v6, v10, vcc
72; CHECK-NEXT:    v_mul_lo_u32 v9, v9, v3
73; CHECK-NEXT:    v_mul_lo_u32 v12, v8, v11
74; CHECK-NEXT:    v_mul_lo_u32 v13, v8, v3
75; CHECK-NEXT:    v_mul_hi_u32 v8, v8, v3
76; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v10
77; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
78; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
79; CHECK-NEXT:    v_mul_lo_u32 v9, v11, v13
80; CHECK-NEXT:    v_mul_lo_u32 v12, v3, v8
81; CHECK-NEXT:    v_mul_hi_u32 v10, v3, v13
82; CHECK-NEXT:    v_mul_hi_u32 v13, v11, v13
83; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
84; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
85; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
86; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
87; CHECK-NEXT:    v_mul_lo_u32 v10, v11, v8
88; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
89; CHECK-NEXT:    v_mul_hi_u32 v12, v3, v8
90; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
91; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
92; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
93; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
94; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
95; CHECK-NEXT:    v_mul_hi_u32 v8, v11, v8
96; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v10, v9
97; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
98; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v10
99; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
100; CHECK-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
101; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v9
102; CHECK-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
103; CHECK-NEXT:    v_mul_lo_u32 v8, v5, v3
104; CHECK-NEXT:    v_mul_lo_u32 v9, v4, v6
105; CHECK-NEXT:    v_mul_hi_u32 v10, v4, v3
106; CHECK-NEXT:    v_mul_hi_u32 v3, v5, v3
107; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
108; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
109; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
110; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
111; CHECK-NEXT:    v_mul_lo_u32 v10, v5, v6
112; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
113; CHECK-NEXT:    v_mul_hi_u32 v9, v4, v6
114; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v10, v3
115; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
116; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v9
117; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
118; CHECK-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
119; CHECK-NEXT:    v_mul_hi_u32 v6, v5, v6
120; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v8
121; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
122; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
123; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
124; CHECK-NEXT:    v_mul_lo_u32 v8, v2, v3
125; CHECK-NEXT:    v_mul_lo_u32 v9, v1, v6
126; CHECK-NEXT:    v_mul_hi_u32 v11, v1, v3
127; CHECK-NEXT:    v_mul_lo_u32 v10, v1, v3
128; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
129; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
130; CHECK-NEXT:    v_sub_i32_e32 v4, vcc, v4, v10
131; CHECK-NEXT:    v_subb_u32_e64 v9, s[4:5], v5, v8, vcc
132; CHECK-NEXT:    v_sub_i32_e64 v5, s[4:5], v5, v8
133; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v2
134; CHECK-NEXT:    v_subb_u32_e32 v5, vcc, v5, v2, vcc
135; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[4:5]
136; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v4, v1
137; CHECK-NEXT:    v_sub_i32_e32 v4, vcc, v4, v1
138; CHECK-NEXT:    v_subbrev_u32_e32 v5, vcc, 0, v5, vcc
139; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
140; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], v9, v2
141; CHECK-NEXT:    v_add_i32_e32 v9, vcc, 1, v3
142; CHECK-NEXT:    v_cndmask_b32_e64 v8, v8, v10, s[4:5]
143; CHECK-NEXT:    v_addc_u32_e32 v10, vcc, 0, v6, vcc
144; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v2
145; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
146; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v1
147; CHECK-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
148; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, v5, v2
149; CHECK-NEXT:    v_cndmask_b32_e32 v1, v11, v1, vcc
150; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v9
151; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, 0, v10, vcc
152; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
153; CHECK-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc
154; CHECK-NEXT:    v_cndmask_b32_e32 v2, v10, v4, vcc
155; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
156; CHECK-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
157; CHECK-NEXT:    v_xor_b32_e32 v3, v7, v0
158; CHECK-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc
159; CHECK-NEXT:    v_xor_b32_e32 v0, v1, v3
160; CHECK-NEXT:    v_xor_b32_e32 v1, v2, v3
161; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
162; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
163; CHECK-NEXT:    ; implicit-def: $vgpr2
164; CHECK-NEXT:    ; implicit-def: $vgpr4
165; CHECK-NEXT:  BB0_2: ; %Flow
166; CHECK-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
167; CHECK-NEXT:    s_xor_b64 exec, exec, s[6:7]
168; CHECK-NEXT:    s_cbranch_execz BB0_4
169; CHECK-NEXT:  ; %bb.3:
170; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, v2
171; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, 0, v2
172; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
173; CHECK-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
174; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
175; CHECK-NEXT:    v_mul_lo_u32 v1, v1, v0
176; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
177; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
178; CHECK-NEXT:    v_mul_hi_u32 v0, v4, v0
179; CHECK-NEXT:    v_mul_lo_u32 v1, v0, v2
180; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
181; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, v4, v1
182; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
183; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
184; CHECK-NEXT:    v_sub_i32_e64 v3, s[4:5], v1, v2
185; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc
186; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
187; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
188; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
189; CHECK-NEXT:    v_mov_b32_e32 v1, 0
190; CHECK-NEXT:  BB0_4:
191; CHECK-NEXT:    s_or_b64 exec, exec, s[6:7]
192; CHECK-NEXT:    s_setpc_b64 s[30:31]
193  %result = sdiv i64 %num, %den
194  ret i64 %result
195}
196
197; FIXME: This is a workaround for not handling uniform VGPR case.
198declare i32 @llvm.amdgcn.readfirstlane(i32)
199
200define amdgpu_ps i64 @s_sdiv_i64(i64 inreg %num, i64 inreg %den) {
201; CHECK-LABEL: s_sdiv_i64:
202; CHECK:       ; %bb.0:
203; CHECK-NEXT:    s_or_b64 s[6:7], s[2:3], s[4:5]
204; CHECK-NEXT:    s_mov_b32 s0, 0
205; CHECK-NEXT:    s_mov_b32 s1, -1
206; CHECK-NEXT:    s_and_b64 s[6:7], s[6:7], s[0:1]
207; CHECK-NEXT:    v_cmp_ne_u64_e64 vcc, s[6:7], 0
208; CHECK-NEXT:    s_cbranch_vccz BB1_2
209; CHECK-NEXT:  ; %bb.1:
210; CHECK-NEXT:    s_ashr_i32 s6, s3, 31
211; CHECK-NEXT:    s_ashr_i32 s8, s5, 31
212; CHECK-NEXT:    s_add_u32 s0, s2, s6
213; CHECK-NEXT:    s_cselect_b32 s1, 1, 0
214; CHECK-NEXT:    s_and_b32 s1, s1, 1
215; CHECK-NEXT:    s_cmp_lg_u32 s1, 0
216; CHECK-NEXT:    s_addc_u32 s1, s3, s6
217; CHECK-NEXT:    s_add_u32 s10, s4, s8
218; CHECK-NEXT:    s_cselect_b32 s3, 1, 0
219; CHECK-NEXT:    s_and_b32 s3, s3, 1
220; CHECK-NEXT:    s_cmp_lg_u32 s3, 0
221; CHECK-NEXT:    s_mov_b32 s9, s8
222; CHECK-NEXT:    s_addc_u32 s11, s5, s8
223; CHECK-NEXT:    s_xor_b64 s[10:11], s[10:11], s[8:9]
224; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, s10
225; CHECK-NEXT:    v_cvt_f32_u32_e32 v1, s11
226; CHECK-NEXT:    s_mov_b32 s7, s6
227; CHECK-NEXT:    s_xor_b64 s[12:13], s[0:1], s[6:7]
228; CHECK-NEXT:    s_sub_u32 s3, 0, s10
229; CHECK-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
230; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
231; CHECK-NEXT:    s_cselect_b32 s0, 1, 0
232; CHECK-NEXT:    s_and_b32 s0, s0, 1
233; CHECK-NEXT:    s_cmp_lg_u32 s0, 0
234; CHECK-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
235; CHECK-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
236; CHECK-NEXT:    v_trunc_f32_e32 v1, v1
237; CHECK-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
238; CHECK-NEXT:    v_cvt_u32_f32_e32 v1, v1
239; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
240; CHECK-NEXT:    s_subb_u32 s5, 0, s11
241; CHECK-NEXT:    v_mov_b32_e32 v6, s11
242; CHECK-NEXT:    v_mul_lo_u32 v3, s3, v1
243; CHECK-NEXT:    v_mul_lo_u32 v2, s5, v0
244; CHECK-NEXT:    v_mul_hi_u32 v5, s3, v0
245; CHECK-NEXT:    v_mul_lo_u32 v4, s3, v0
246; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
247; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
248; CHECK-NEXT:    v_mul_lo_u32 v3, v1, v4
249; CHECK-NEXT:    v_mul_lo_u32 v5, v0, v2
250; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v4
251; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
252; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
253; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
254; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
255; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
256; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v2
257; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
258; CHECK-NEXT:    v_mul_hi_u32 v5, v0, v2
259; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
260; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
261; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
262; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
263; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
264; CHECK-NEXT:    v_mul_hi_u32 v2, v1, v2
265; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
266; CHECK-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
267; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
268; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
269; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
270; CHECK-NEXT:    v_addc_u32_e64 v3, s[0:1], v1, v2, vcc
271; CHECK-NEXT:    v_mul_lo_u32 v4, s5, v0
272; CHECK-NEXT:    v_mul_lo_u32 v5, s3, v3
273; CHECK-NEXT:    v_mul_hi_u32 v8, s3, v0
274; CHECK-NEXT:    v_mul_lo_u32 v7, s3, v0
275; CHECK-NEXT:    v_add_i32_e64 v1, s[0:1], v1, v2
276; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v4, v5
277; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v4, v8
278; CHECK-NEXT:    v_mul_lo_u32 v5, v3, v7
279; CHECK-NEXT:    v_mul_lo_u32 v8, v0, v4
280; CHECK-NEXT:    v_mul_hi_u32 v2, v0, v7
281; CHECK-NEXT:    v_mul_hi_u32 v7, v3, v7
282; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v8
283; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[0:1]
284; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v5, v2
285; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
286; CHECK-NEXT:    v_mul_lo_u32 v5, v3, v4
287; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v8, v2
288; CHECK-NEXT:    v_mul_hi_u32 v8, v0, v4
289; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v7
290; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[0:1]
291; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v8
292; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[0:1]
293; CHECK-NEXT:    v_add_i32_e64 v7, s[0:1], v7, v8
294; CHECK-NEXT:    v_mul_hi_u32 v3, v3, v4
295; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v5, v2
296; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[0:1]
297; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v7, v5
298; CHECK-NEXT:    v_add_i32_e64 v3, s[0:1], v3, v4
299; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v3, vcc
300; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
301; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
302; CHECK-NEXT:    v_mul_lo_u32 v2, s13, v0
303; CHECK-NEXT:    v_mul_lo_u32 v3, s12, v1
304; CHECK-NEXT:    v_mul_hi_u32 v5, s12, v0
305; CHECK-NEXT:    v_mul_hi_u32 v0, s13, v0
306; CHECK-NEXT:    v_mov_b32_e32 v4, s13
307; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
308; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
309; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
310; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
311; CHECK-NEXT:    v_mul_lo_u32 v5, s13, v1
312; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
313; CHECK-NEXT:    v_mul_hi_u32 v3, s12, v1
314; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
315; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
316; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
317; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
318; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
319; CHECK-NEXT:    v_mul_hi_u32 v1, s13, v1
320; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
321; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
322; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
323; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v2
324; CHECK-NEXT:    v_mul_lo_u32 v2, s11, v0
325; CHECK-NEXT:    v_mul_lo_u32 v1, s10, v1
326; CHECK-NEXT:    v_mul_hi_u32 v5, s10, v0
327; CHECK-NEXT:    v_mul_lo_u32 v3, s10, v0
328; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
329; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v5
330; CHECK-NEXT:    v_sub_i32_e32 v2, vcc, s12, v3
331; CHECK-NEXT:    v_subb_u32_e64 v3, s[0:1], v4, v1, vcc
332; CHECK-NEXT:    v_sub_i32_e64 v1, s[0:1], s13, v1
333; CHECK-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v3
334; CHECK-NEXT:    v_cndmask_b32_e64 v4, 0, -1, s[0:1]
335; CHECK-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v2
336; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v6, vcc
337; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[0:1]
338; CHECK-NEXT:    v_cmp_eq_u32_e64 s[0:1], s11, v3
339; CHECK-NEXT:    v_subrev_i32_e32 v2, vcc, s10, v2
340; CHECK-NEXT:    v_cndmask_b32_e64 v3, v4, v5, s[0:1]
341; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
342; CHECK-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
343; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s11, v1
344; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
345; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s10, v2
346; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
347; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v1
348; CHECK-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc
349; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v4
350; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
351; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v2, vcc
352; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
353; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
354; CHECK-NEXT:    s_xor_b64 s[0:1], s[6:7], s[8:9]
355; CHECK-NEXT:    v_xor_b32_e32 v0, s0, v0
356; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s0, v0
357; CHECK-NEXT:    s_mov_b32 s1, 0
358; CHECK-NEXT:    s_branch BB1_3
359; CHECK-NEXT:  BB1_2:
360; CHECK-NEXT:    ; implicit-def: $vgpr0_vgpr1
361; CHECK-NEXT:  BB1_3: ; %Flow
362; CHECK-NEXT:    s_xor_b32 s0, s1, -1
363; CHECK-NEXT:    s_and_b32 s0, s0, 1
364; CHECK-NEXT:    s_cmp_lg_u32 s0, 0
365; CHECK-NEXT:    s_cbranch_scc1 BB1_5
366; CHECK-NEXT:  ; %bb.4:
367; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, s4
368; CHECK-NEXT:    s_sub_i32 s0, 0, s4
369; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
370; CHECK-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
371; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
372; CHECK-NEXT:    v_mul_lo_u32 v1, s0, v0
373; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
374; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
375; CHECK-NEXT:    v_mul_hi_u32 v0, s2, v0
376; CHECK-NEXT:    v_mul_lo_u32 v1, v0, s4
377; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
378; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, s2, v1
379; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s4, v1
380; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
381; CHECK-NEXT:    v_subrev_i32_e64 v2, s[0:1], s4, v1
382; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
383; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
384; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s4, v1
385; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
386; CHECK-NEXT:  BB1_5:
387; CHECK-NEXT:    v_readfirstlane_b32 s0, v0
388; CHECK-NEXT:    s_mov_b32 s1, s0
389; CHECK-NEXT:    ; return to shader part epilog
390  %result = sdiv i64 %num, %den
391  %cast = bitcast i64 %result to <2 x i32>
392  %elt.0 = extractelement <2 x i32> %cast, i32 0
393  %elt.1 = extractelement <2 x i32> %cast, i32 1
394  %res.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.0)
395  %res.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.1)
396  %ins.0 = insertelement <2 x i32> undef, i32 %res.0, i32 0
397  %ins.1 = insertelement <2 x i32> %ins.0, i32 %res.0, i32 1
398  %cast.back = bitcast <2 x i32> %ins.1 to i64
399  ret i64 %cast.back
400}
401
402define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) {
403; GISEL-LABEL: v_sdiv_v2i64:
404; GISEL:       ; %bb.0:
405; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
406; GISEL-NEXT:    v_ashrrev_i32_e32 v8, 31, v5
407; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
408; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
409; GISEL-NEXT:    v_xor_b32_e32 v4, v4, v8
410; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v8
411; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v4
412; GISEL-NEXT:    v_cvt_f32_u32_e32 v10, v5
413; GISEL-NEXT:    v_ashrrev_i32_e32 v11, 31, v1
414; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v11
415; GISEL-NEXT:    v_mac_f32_e32 v9, 0x4f800000, v10
416; GISEL-NEXT:    v_rcp_iflag_f32_e32 v9, v9
417; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v11, vcc
418; GISEL-NEXT:    v_sub_i32_e32 v12, vcc, 0, v4
419; GISEL-NEXT:    v_mul_f32_e32 v9, 0x5f7ffffc, v9
420; GISEL-NEXT:    v_mul_f32_e32 v10, 0x2f800000, v9
421; GISEL-NEXT:    v_trunc_f32_e32 v10, v10
422; GISEL-NEXT:    v_mac_f32_e32 v9, 0xcf800000, v10
423; GISEL-NEXT:    v_cvt_u32_f32_e32 v9, v9
424; GISEL-NEXT:    v_cvt_u32_f32_e32 v10, v10
425; GISEL-NEXT:    v_subb_u32_e32 v13, vcc, 0, v5, vcc
426; GISEL-NEXT:    v_mul_lo_u32 v14, v13, v9
427; GISEL-NEXT:    v_mul_lo_u32 v15, v12, v10
428; GISEL-NEXT:    v_mul_hi_u32 v17, v12, v9
429; GISEL-NEXT:    v_mul_lo_u32 v16, v12, v9
430; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v11
431; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
432; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
433; GISEL-NEXT:    v_mul_lo_u32 v15, v10, v16
434; GISEL-NEXT:    v_mul_lo_u32 v17, v9, v14
435; GISEL-NEXT:    v_mul_hi_u32 v18, v9, v16
436; GISEL-NEXT:    v_mul_hi_u32 v16, v10, v16
437; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v11
438; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
439; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
440; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
441; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
442; GISEL-NEXT:    v_mul_lo_u32 v18, v10, v14
443; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
444; GISEL-NEXT:    v_mul_hi_u32 v17, v9, v14
445; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
446; GISEL-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
447; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
448; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
449; GISEL-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
450; GISEL-NEXT:    v_mul_hi_u32 v14, v10, v14
451; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
452; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
453; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
454; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
455; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v15
456; GISEL-NEXT:    v_addc_u32_e64 v15, s[4:5], v10, v14, vcc
457; GISEL-NEXT:    v_mul_lo_u32 v13, v13, v9
458; GISEL-NEXT:    v_mul_lo_u32 v16, v12, v15
459; GISEL-NEXT:    v_mul_lo_u32 v17, v12, v9
460; GISEL-NEXT:    v_mul_hi_u32 v12, v12, v9
461; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v14
462; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
463; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
464; GISEL-NEXT:    v_mul_lo_u32 v13, v15, v17
465; GISEL-NEXT:    v_mul_lo_u32 v16, v9, v12
466; GISEL-NEXT:    v_mul_hi_u32 v14, v9, v17
467; GISEL-NEXT:    v_mul_hi_u32 v17, v15, v17
468; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
469; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
470; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
471; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
472; GISEL-NEXT:    v_mul_lo_u32 v14, v15, v12
473; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
474; GISEL-NEXT:    v_mul_hi_u32 v16, v9, v12
475; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
476; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
477; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
478; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
479; GISEL-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
480; GISEL-NEXT:    v_mul_hi_u32 v12, v15, v12
481; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
482; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
483; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
484; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
485; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, v10, v12, vcc
486; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
487; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v10, vcc
488; GISEL-NEXT:    v_mul_lo_u32 v12, v1, v9
489; GISEL-NEXT:    v_mul_lo_u32 v13, v0, v10
490; GISEL-NEXT:    v_mul_hi_u32 v14, v0, v9
491; GISEL-NEXT:    v_mul_hi_u32 v9, v1, v9
492; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
493; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
494; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
495; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
496; GISEL-NEXT:    v_mul_lo_u32 v14, v1, v10
497; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
498; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v10
499; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v14, v9
500; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
501; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
502; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
503; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
504; GISEL-NEXT:    v_mul_hi_u32 v10, v1, v10
505; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
506; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
507; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
508; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
509; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
510; GISEL-NEXT:    v_mul_lo_u32 v13, v4, v10
511; GISEL-NEXT:    v_mul_hi_u32 v15, v4, v9
512; GISEL-NEXT:    v_mul_lo_u32 v14, v4, v9
513; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
514; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
515; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v14
516; GISEL-NEXT:    v_subb_u32_e64 v13, s[4:5], v1, v12, vcc
517; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v12
518; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v5
519; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
520; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
521; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v0, v4
522; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
523; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
524; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
525; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v5
526; GISEL-NEXT:    v_add_i32_e32 v13, vcc, 1, v9
527; GISEL-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
528; GISEL-NEXT:    v_addc_u32_e32 v14, vcc, 0, v10, vcc
529; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
530; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
531; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
532; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
533; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v1, v5
534; GISEL-NEXT:    v_cndmask_b32_e32 v0, v15, v0, vcc
535; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v13
536; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, 0, v14, vcc
537; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
538; GISEL-NEXT:    v_cndmask_b32_e32 v0, v13, v1, vcc
539; GISEL-NEXT:    v_cndmask_b32_e32 v1, v14, v4, vcc
540; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
541; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v7
542; GISEL-NEXT:    v_cndmask_b32_e32 v0, v9, v0, vcc
543; GISEL-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
544; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v4
545; GISEL-NEXT:    v_addc_u32_e32 v7, vcc, v7, v4, vcc
546; GISEL-NEXT:    v_xor_b32_e32 v6, v6, v4
547; GISEL-NEXT:    v_xor_b32_e32 v7, v7, v4
548; GISEL-NEXT:    v_xor_b32_e32 v5, v11, v8
549; GISEL-NEXT:    v_cvt_f32_u32_e32 v8, v6
550; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v7
551; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
552; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v10
553; GISEL-NEXT:    v_mac_f32_e32 v8, 0x4f800000, v9
554; GISEL-NEXT:    v_rcp_iflag_f32_e32 v8, v8
555; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v10, vcc
556; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v6
557; GISEL-NEXT:    v_mul_f32_e32 v8, 0x5f7ffffc, v8
558; GISEL-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v8
559; GISEL-NEXT:    v_trunc_f32_e32 v9, v9
560; GISEL-NEXT:    v_mac_f32_e32 v8, 0xcf800000, v9
561; GISEL-NEXT:    v_cvt_u32_f32_e32 v8, v8
562; GISEL-NEXT:    v_cvt_u32_f32_e32 v9, v9
563; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v7, vcc
564; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v8
565; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v9
566; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v8
567; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v8
568; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v5
569; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
570; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
571; GISEL-NEXT:    v_mul_lo_u32 v14, v9, v15
572; GISEL-NEXT:    v_mul_lo_u32 v16, v8, v13
573; GISEL-NEXT:    v_mul_hi_u32 v17, v8, v15
574; GISEL-NEXT:    v_mul_hi_u32 v15, v9, v15
575; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v10
576; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
577; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
578; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
579; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
580; GISEL-NEXT:    v_mul_lo_u32 v17, v9, v13
581; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
582; GISEL-NEXT:    v_mul_hi_u32 v16, v8, v13
583; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
584; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
585; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
586; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
587; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
588; GISEL-NEXT:    v_mul_hi_u32 v13, v9, v13
589; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
590; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
591; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
592; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
593; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v14
594; GISEL-NEXT:    v_addc_u32_e64 v14, s[4:5], v9, v13, vcc
595; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v8
596; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v14
597; GISEL-NEXT:    v_mul_lo_u32 v16, v11, v8
598; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v8
599; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v13
600; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
601; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
602; GISEL-NEXT:    v_mul_lo_u32 v12, v14, v16
603; GISEL-NEXT:    v_mul_lo_u32 v15, v8, v11
604; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v16
605; GISEL-NEXT:    v_mul_hi_u32 v16, v14, v16
606; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v10
607; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
608; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
609; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
610; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
611; GISEL-NEXT:    v_mul_lo_u32 v13, v14, v11
612; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v15, v12
613; GISEL-NEXT:    v_mul_hi_u32 v15, v8, v11
614; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
615; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
616; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
617; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
618; GISEL-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
619; GISEL-NEXT:    v_mul_hi_u32 v11, v14, v11
620; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
621; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
622; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v15, v13
623; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
624; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, v9, v11, vcc
625; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v12
626; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
627; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v5
628; GISEL-NEXT:    v_mul_lo_u32 v11, v3, v8
629; GISEL-NEXT:    v_mul_lo_u32 v12, v2, v9
630; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v5
631; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
632; GISEL-NEXT:    v_mul_hi_u32 v5, v2, v8
633; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
634; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
635; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
636; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
637; GISEL-NEXT:    v_mul_lo_u32 v11, v3, v9
638; GISEL-NEXT:    v_mul_hi_u32 v8, v3, v8
639; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v12, v5
640; GISEL-NEXT:    v_mul_hi_u32 v12, v2, v9
641; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
642; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
643; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v12
644; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
645; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
646; GISEL-NEXT:    v_mul_hi_u32 v9, v3, v9
647; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
648; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
649; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
650; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
651; GISEL-NEXT:    v_mul_lo_u32 v9, v7, v5
652; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v8
653; GISEL-NEXT:    v_mul_hi_u32 v13, v6, v5
654; GISEL-NEXT:    v_mul_lo_u32 v12, v6, v5
655; GISEL-NEXT:    v_xor_b32_e32 v4, v10, v4
656; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
657; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
658; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v12
659; GISEL-NEXT:    v_subb_u32_e64 v11, s[4:5], v3, v9, vcc
660; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v9
661; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v7
662; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v7, vcc
663; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
664; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
665; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
666; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
667; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
668; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v7
669; GISEL-NEXT:    v_add_i32_e32 v11, vcc, 1, v5
670; GISEL-NEXT:    v_cndmask_b32_e64 v9, v9, v12, s[4:5]
671; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v8, vcc
672; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
673; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
674; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
675; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
676; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v7
677; GISEL-NEXT:    v_cndmask_b32_e32 v2, v13, v2, vcc
678; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
679; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v12, vcc
680; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
681; GISEL-NEXT:    v_cndmask_b32_e32 v2, v11, v3, vcc
682; GISEL-NEXT:    v_cndmask_b32_e32 v3, v12, v6, vcc
683; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
684; GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
685; GISEL-NEXT:    v_cndmask_b32_e32 v3, v8, v3, vcc
686; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
687; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
688; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
689; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
690; GISEL-NEXT:    s_setpc_b64 s[30:31]
691;
692; CGP-LABEL: v_sdiv_v2i64:
693; CGP:       ; %bb.0:
694; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
695; CGP-NEXT:    v_mov_b32_e32 v11, v1
696; CGP-NEXT:    v_mov_b32_e32 v10, v0
697; CGP-NEXT:    v_or_b32_e32 v1, v11, v5
698; CGP-NEXT:    v_mov_b32_e32 v0, 0
699; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
700; CGP-NEXT:    v_mov_b32_e32 v8, v2
701; CGP-NEXT:    v_mov_b32_e32 v9, v3
702; CGP-NEXT:    ; implicit-def: $vgpr0_vgpr1
703; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
704; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
705; CGP-NEXT:    s_cbranch_execz BB2_2
706; CGP-NEXT:  ; %bb.1:
707; CGP-NEXT:    v_ashrrev_i32_e32 v0, 31, v5
708; CGP-NEXT:    v_add_i32_e32 v1, vcc, v4, v0
709; CGP-NEXT:    v_addc_u32_e32 v2, vcc, v5, v0, vcc
710; CGP-NEXT:    v_xor_b32_e32 v1, v1, v0
711; CGP-NEXT:    v_xor_b32_e32 v2, v2, v0
712; CGP-NEXT:    v_cvt_f32_u32_e32 v3, v1
713; CGP-NEXT:    v_cvt_f32_u32_e32 v4, v2
714; CGP-NEXT:    v_ashrrev_i32_e32 v5, 31, v11
715; CGP-NEXT:    v_mac_f32_e32 v3, 0x4f800000, v4
716; CGP-NEXT:    v_rcp_iflag_f32_e32 v3, v3
717; CGP-NEXT:    v_add_i32_e32 v4, vcc, v10, v5
718; CGP-NEXT:    v_addc_u32_e32 v10, vcc, v11, v5, vcc
719; CGP-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
720; CGP-NEXT:    v_mul_f32_e32 v11, 0x2f800000, v3
721; CGP-NEXT:    v_trunc_f32_e32 v11, v11
722; CGP-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v11
723; CGP-NEXT:    v_cvt_u32_f32_e32 v3, v3
724; CGP-NEXT:    v_cvt_u32_f32_e32 v11, v11
725; CGP-NEXT:    v_sub_i32_e32 v12, vcc, 0, v1
726; CGP-NEXT:    v_subb_u32_e32 v13, vcc, 0, v2, vcc
727; CGP-NEXT:    v_mul_lo_u32 v14, v13, v3
728; CGP-NEXT:    v_mul_lo_u32 v15, v12, v11
729; CGP-NEXT:    v_mul_hi_u32 v17, v12, v3
730; CGP-NEXT:    v_mul_lo_u32 v16, v12, v3
731; CGP-NEXT:    v_xor_b32_e32 v4, v4, v5
732; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
733; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
734; CGP-NEXT:    v_mul_lo_u32 v15, v11, v16
735; CGP-NEXT:    v_mul_lo_u32 v17, v3, v14
736; CGP-NEXT:    v_mul_hi_u32 v18, v3, v16
737; CGP-NEXT:    v_mul_hi_u32 v16, v11, v16
738; CGP-NEXT:    v_xor_b32_e32 v10, v10, v5
739; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
740; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
741; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
742; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
743; CGP-NEXT:    v_mul_lo_u32 v18, v11, v14
744; CGP-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
745; CGP-NEXT:    v_mul_hi_u32 v17, v3, v14
746; CGP-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
747; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
748; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
749; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
750; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
751; CGP-NEXT:    v_mul_hi_u32 v14, v11, v14
752; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
753; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
754; CGP-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
755; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
756; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v15
757; CGP-NEXT:    v_addc_u32_e64 v15, s[4:5], v11, v14, vcc
758; CGP-NEXT:    v_mul_lo_u32 v13, v13, v3
759; CGP-NEXT:    v_mul_lo_u32 v16, v12, v15
760; CGP-NEXT:    v_mul_lo_u32 v17, v12, v3
761; CGP-NEXT:    v_mul_hi_u32 v12, v12, v3
762; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
763; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
764; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
765; CGP-NEXT:    v_mul_lo_u32 v13, v15, v17
766; CGP-NEXT:    v_mul_lo_u32 v16, v3, v12
767; CGP-NEXT:    v_mul_hi_u32 v14, v3, v17
768; CGP-NEXT:    v_mul_hi_u32 v17, v15, v17
769; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
770; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
771; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
772; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
773; CGP-NEXT:    v_mul_lo_u32 v14, v15, v12
774; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
775; CGP-NEXT:    v_mul_hi_u32 v16, v3, v12
776; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
777; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
778; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
779; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
780; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
781; CGP-NEXT:    v_mul_hi_u32 v12, v15, v12
782; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
783; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
784; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
785; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
786; CGP-NEXT:    v_addc_u32_e32 v11, vcc, v11, v12, vcc
787; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v13
788; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
789; CGP-NEXT:    v_mul_lo_u32 v12, v10, v3
790; CGP-NEXT:    v_mul_lo_u32 v13, v4, v11
791; CGP-NEXT:    v_mul_hi_u32 v14, v4, v3
792; CGP-NEXT:    v_mul_hi_u32 v3, v10, v3
793; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
794; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
795; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
796; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
797; CGP-NEXT:    v_mul_lo_u32 v14, v10, v11
798; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
799; CGP-NEXT:    v_mul_hi_u32 v13, v4, v11
800; CGP-NEXT:    v_add_i32_e32 v3, vcc, v14, v3
801; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
802; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v13
803; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
804; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
805; CGP-NEXT:    v_mul_hi_u32 v11, v10, v11
806; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v12
807; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
808; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
809; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
810; CGP-NEXT:    v_mul_lo_u32 v12, v2, v3
811; CGP-NEXT:    v_mul_lo_u32 v13, v1, v11
812; CGP-NEXT:    v_mul_hi_u32 v15, v1, v3
813; CGP-NEXT:    v_mul_lo_u32 v14, v1, v3
814; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
815; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
816; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v4, v14
817; CGP-NEXT:    v_subb_u32_e64 v13, s[4:5], v10, v12, vcc
818; CGP-NEXT:    v_sub_i32_e64 v10, s[4:5], v10, v12
819; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v2
820; CGP-NEXT:    v_subb_u32_e32 v10, vcc, v10, v2, vcc
821; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
822; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v4, v1
823; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v4, v1
824; CGP-NEXT:    v_subbrev_u32_e32 v10, vcc, 0, v10, vcc
825; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
826; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v2
827; CGP-NEXT:    v_add_i32_e32 v13, vcc, 1, v3
828; CGP-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
829; CGP-NEXT:    v_addc_u32_e32 v14, vcc, 0, v11, vcc
830; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v10, v2
831; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
832; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v1
833; CGP-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
834; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v10, v2
835; CGP-NEXT:    v_cndmask_b32_e32 v1, v15, v1, vcc
836; CGP-NEXT:    v_add_i32_e32 v2, vcc, 1, v13
837; CGP-NEXT:    v_addc_u32_e32 v4, vcc, 0, v14, vcc
838; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
839; CGP-NEXT:    v_cndmask_b32_e32 v1, v13, v2, vcc
840; CGP-NEXT:    v_cndmask_b32_e32 v2, v14, v4, vcc
841; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
842; CGP-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
843; CGP-NEXT:    v_xor_b32_e32 v3, v5, v0
844; CGP-NEXT:    v_cndmask_b32_e32 v2, v11, v2, vcc
845; CGP-NEXT:    v_xor_b32_e32 v0, v1, v3
846; CGP-NEXT:    v_xor_b32_e32 v1, v2, v3
847; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
848; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
849; CGP-NEXT:    ; implicit-def: $vgpr4
850; CGP-NEXT:    ; implicit-def: $vgpr10
851; CGP-NEXT:  BB2_2: ; %Flow2
852; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
853; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
854; CGP-NEXT:    s_cbranch_execz BB2_4
855; CGP-NEXT:  ; %bb.3:
856; CGP-NEXT:    v_cvt_f32_u32_e32 v0, v4
857; CGP-NEXT:    v_sub_i32_e32 v1, vcc, 0, v4
858; CGP-NEXT:    v_rcp_iflag_f32_e32 v0, v0
859; CGP-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
860; CGP-NEXT:    v_cvt_u32_f32_e32 v0, v0
861; CGP-NEXT:    v_mul_lo_u32 v1, v1, v0
862; CGP-NEXT:    v_mul_hi_u32 v1, v0, v1
863; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
864; CGP-NEXT:    v_mul_hi_u32 v0, v10, v0
865; CGP-NEXT:    v_mul_lo_u32 v1, v0, v4
866; CGP-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
867; CGP-NEXT:    v_sub_i32_e32 v1, vcc, v10, v1
868; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v4
869; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
870; CGP-NEXT:    v_sub_i32_e64 v2, s[4:5], v1, v4
871; CGP-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
872; CGP-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
873; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v4
874; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
875; CGP-NEXT:    v_mov_b32_e32 v1, 0
876; CGP-NEXT:  BB2_4:
877; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
878; CGP-NEXT:    v_or_b32_e32 v3, v9, v7
879; CGP-NEXT:    v_mov_b32_e32 v2, 0
880; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[2:3]
881; CGP-NEXT:    ; implicit-def: $vgpr2_vgpr3
882; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
883; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
884; CGP-NEXT:    s_cbranch_execz BB2_6
885; CGP-NEXT:  ; %bb.5:
886; CGP-NEXT:    v_ashrrev_i32_e32 v2, 31, v7
887; CGP-NEXT:    v_add_i32_e32 v3, vcc, v6, v2
888; CGP-NEXT:    v_addc_u32_e32 v4, vcc, v7, v2, vcc
889; CGP-NEXT:    v_xor_b32_e32 v3, v3, v2
890; CGP-NEXT:    v_xor_b32_e32 v4, v4, v2
891; CGP-NEXT:    v_cvt_f32_u32_e32 v5, v3
892; CGP-NEXT:    v_cvt_f32_u32_e32 v6, v4
893; CGP-NEXT:    v_ashrrev_i32_e32 v7, 31, v9
894; CGP-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
895; CGP-NEXT:    v_rcp_iflag_f32_e32 v5, v5
896; CGP-NEXT:    v_add_i32_e32 v6, vcc, v8, v7
897; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v9, v7, vcc
898; CGP-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
899; CGP-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v5
900; CGP-NEXT:    v_trunc_f32_e32 v9, v9
901; CGP-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v9
902; CGP-NEXT:    v_cvt_u32_f32_e32 v5, v5
903; CGP-NEXT:    v_cvt_u32_f32_e32 v9, v9
904; CGP-NEXT:    v_sub_i32_e32 v10, vcc, 0, v3
905; CGP-NEXT:    v_subb_u32_e32 v11, vcc, 0, v4, vcc
906; CGP-NEXT:    v_mul_lo_u32 v12, v11, v5
907; CGP-NEXT:    v_mul_lo_u32 v13, v10, v9
908; CGP-NEXT:    v_mul_hi_u32 v15, v10, v5
909; CGP-NEXT:    v_mul_lo_u32 v14, v10, v5
910; CGP-NEXT:    v_xor_b32_e32 v6, v6, v7
911; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
912; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
913; CGP-NEXT:    v_mul_lo_u32 v13, v9, v14
914; CGP-NEXT:    v_mul_lo_u32 v15, v5, v12
915; CGP-NEXT:    v_mul_hi_u32 v16, v5, v14
916; CGP-NEXT:    v_mul_hi_u32 v14, v9, v14
917; CGP-NEXT:    v_xor_b32_e32 v8, v8, v7
918; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
919; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
920; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
921; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
922; CGP-NEXT:    v_mul_lo_u32 v16, v9, v12
923; CGP-NEXT:    v_add_i32_e32 v13, vcc, v15, v13
924; CGP-NEXT:    v_mul_hi_u32 v15, v5, v12
925; CGP-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
926; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
927; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
928; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
929; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
930; CGP-NEXT:    v_mul_hi_u32 v12, v9, v12
931; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
932; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
933; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
934; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
935; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v13
936; CGP-NEXT:    v_addc_u32_e64 v13, s[4:5], v9, v12, vcc
937; CGP-NEXT:    v_mul_lo_u32 v11, v11, v5
938; CGP-NEXT:    v_mul_lo_u32 v14, v10, v13
939; CGP-NEXT:    v_mul_lo_u32 v15, v10, v5
940; CGP-NEXT:    v_mul_hi_u32 v10, v10, v5
941; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
942; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
943; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v11, v10
944; CGP-NEXT:    v_mul_lo_u32 v11, v13, v15
945; CGP-NEXT:    v_mul_lo_u32 v14, v5, v10
946; CGP-NEXT:    v_mul_hi_u32 v12, v5, v15
947; CGP-NEXT:    v_mul_hi_u32 v15, v13, v15
948; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
949; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
950; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
951; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
952; CGP-NEXT:    v_mul_lo_u32 v12, v13, v10
953; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v11
954; CGP-NEXT:    v_mul_hi_u32 v14, v5, v10
955; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
956; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
957; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
958; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
959; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
960; CGP-NEXT:    v_mul_hi_u32 v10, v13, v10
961; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
962; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
963; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
964; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
965; CGP-NEXT:    v_addc_u32_e32 v9, vcc, v9, v10, vcc
966; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
967; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
968; CGP-NEXT:    v_mul_lo_u32 v10, v8, v5
969; CGP-NEXT:    v_mul_lo_u32 v11, v6, v9
970; CGP-NEXT:    v_mul_hi_u32 v12, v6, v5
971; CGP-NEXT:    v_mul_hi_u32 v5, v8, v5
972; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
973; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
974; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
975; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
976; CGP-NEXT:    v_mul_lo_u32 v12, v8, v9
977; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
978; CGP-NEXT:    v_mul_hi_u32 v11, v6, v9
979; CGP-NEXT:    v_add_i32_e32 v5, vcc, v12, v5
980; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
981; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
982; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
983; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
984; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
985; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
986; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
987; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
988; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
989; CGP-NEXT:    v_mul_lo_u32 v10, v4, v5
990; CGP-NEXT:    v_mul_lo_u32 v11, v3, v9
991; CGP-NEXT:    v_mul_hi_u32 v13, v3, v5
992; CGP-NEXT:    v_mul_lo_u32 v12, v3, v5
993; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
994; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
995; CGP-NEXT:    v_sub_i32_e32 v6, vcc, v6, v12
996; CGP-NEXT:    v_subb_u32_e64 v11, s[4:5], v8, v10, vcc
997; CGP-NEXT:    v_sub_i32_e64 v8, s[4:5], v8, v10
998; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v4
999; CGP-NEXT:    v_subb_u32_e32 v8, vcc, v8, v4, vcc
1000; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
1001; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v6, v3
1002; CGP-NEXT:    v_sub_i32_e32 v6, vcc, v6, v3
1003; CGP-NEXT:    v_subbrev_u32_e32 v8, vcc, 0, v8, vcc
1004; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
1005; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v4
1006; CGP-NEXT:    v_add_i32_e32 v11, vcc, 1, v5
1007; CGP-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
1008; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v9, vcc
1009; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v8, v4
1010; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
1011; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v6, v3
1012; CGP-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
1013; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v8, v4
1014; CGP-NEXT:    v_cndmask_b32_e32 v3, v13, v3, vcc
1015; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v11
1016; CGP-NEXT:    v_addc_u32_e32 v6, vcc, 0, v12, vcc
1017; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
1018; CGP-NEXT:    v_cndmask_b32_e32 v3, v11, v4, vcc
1019; CGP-NEXT:    v_cndmask_b32_e32 v4, v12, v6, vcc
1020; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v10
1021; CGP-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
1022; CGP-NEXT:    v_xor_b32_e32 v5, v7, v2
1023; CGP-NEXT:    v_cndmask_b32_e32 v4, v9, v4, vcc
1024; CGP-NEXT:    v_xor_b32_e32 v2, v3, v5
1025; CGP-NEXT:    v_xor_b32_e32 v3, v4, v5
1026; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v5
1027; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v5, vcc
1028; CGP-NEXT:    ; implicit-def: $vgpr6
1029; CGP-NEXT:    ; implicit-def: $vgpr8
1030; CGP-NEXT:  BB2_6: ; %Flow
1031; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
1032; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
1033; CGP-NEXT:    s_cbranch_execz BB2_8
1034; CGP-NEXT:  ; %bb.7:
1035; CGP-NEXT:    v_cvt_f32_u32_e32 v2, v6
1036; CGP-NEXT:    v_sub_i32_e32 v3, vcc, 0, v6
1037; CGP-NEXT:    v_rcp_iflag_f32_e32 v2, v2
1038; CGP-NEXT:    v_mul_f32_e32 v2, 0x4f7ffffe, v2
1039; CGP-NEXT:    v_cvt_u32_f32_e32 v2, v2
1040; CGP-NEXT:    v_mul_lo_u32 v3, v3, v2
1041; CGP-NEXT:    v_mul_hi_u32 v3, v2, v3
1042; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
1043; CGP-NEXT:    v_mul_hi_u32 v2, v8, v2
1044; CGP-NEXT:    v_mul_lo_u32 v3, v2, v6
1045; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
1046; CGP-NEXT:    v_sub_i32_e32 v3, vcc, v8, v3
1047; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v6
1048; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
1049; CGP-NEXT:    v_sub_i32_e64 v4, s[4:5], v3, v6
1050; CGP-NEXT:    v_cndmask_b32_e32 v3, v3, v4, vcc
1051; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
1052; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v6
1053; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
1054; CGP-NEXT:    v_mov_b32_e32 v3, 0
1055; CGP-NEXT:  BB2_8:
1056; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
1057; CGP-NEXT:    s_setpc_b64 s[30:31]
1058  %result = sdiv <2 x i64> %num, %den
1059  ret <2 x i64> %result
1060}
1061
1062define i64 @v_sdiv_i64_pow2k_denom(i64 %num) {
1063; CHECK-LABEL: v_sdiv_i64_pow2k_denom:
1064; CHECK:       ; %bb.0:
1065; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1066; CHECK-NEXT:    v_cvt_f32_u32_e32 v3, 0x1000
1067; CHECK-NEXT:    v_cvt_f32_ubyte0_e32 v4, 0
1068; CHECK-NEXT:    s_movk_i32 s6, 0xf000
1069; CHECK-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
1070; CHECK-NEXT:    v_mac_f32_e32 v3, 0x4f800000, v4
1071; CHECK-NEXT:    v_rcp_iflag_f32_e32 v3, v3
1072; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
1073; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v2, vcc
1074; CHECK-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
1075; CHECK-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v3
1076; CHECK-NEXT:    v_trunc_f32_e32 v4, v4
1077; CHECK-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
1078; CHECK-NEXT:    v_cvt_u32_f32_e32 v3, v3
1079; CHECK-NEXT:    v_cvt_u32_f32_e32 v4, v4
1080; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v2
1081; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v2
1082; CHECK-NEXT:    v_mul_lo_u32 v5, -1, v3
1083; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1084; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v3
1085; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v3
1086; CHECK-NEXT:    s_bfe_i32 s7, -1, 0x10000
1087; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1088; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1089; CHECK-NEXT:    v_mul_lo_u32 v6, v4, v7
1090; CHECK-NEXT:    v_mul_lo_u32 v8, v3, v5
1091; CHECK-NEXT:    v_mul_hi_u32 v9, v3, v7
1092; CHECK-NEXT:    v_mul_hi_u32 v7, v4, v7
1093; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
1094; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1095; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
1096; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1097; CHECK-NEXT:    v_mul_lo_u32 v9, v4, v5
1098; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
1099; CHECK-NEXT:    v_mul_hi_u32 v8, v3, v5
1100; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
1101; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1102; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1103; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1104; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1105; CHECK-NEXT:    v_mul_hi_u32 v5, v4, v5
1106; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1107; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1108; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1109; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1110; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
1111; CHECK-NEXT:    v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1112; CHECK-NEXT:    v_mul_lo_u32 v7, -1, v3
1113; CHECK-NEXT:    v_mul_lo_u32 v8, s6, v6
1114; CHECK-NEXT:    v_mul_hi_u32 v10, s6, v3
1115; CHECK-NEXT:    v_mul_lo_u32 v9, s6, v3
1116; CHECK-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v5
1117; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1118; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v10
1119; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v9
1120; CHECK-NEXT:    v_mul_lo_u32 v10, v3, v7
1121; CHECK-NEXT:    v_mul_hi_u32 v5, v3, v9
1122; CHECK-NEXT:    v_mul_hi_u32 v9, v6, v9
1123; CHECK-NEXT:    s_movk_i32 s6, 0x1000
1124; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1125; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1126; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1127; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[4:5]
1128; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v7
1129; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v10, v5
1130; CHECK-NEXT:    v_mul_hi_u32 v10, v3, v7
1131; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1132; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1133; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1134; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1135; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1136; CHECK-NEXT:    v_mul_hi_u32 v6, v6, v7
1137; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1138; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1139; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v9, v8
1140; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1141; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, v4, v6, vcc
1142; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
1143; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
1144; CHECK-NEXT:    v_mul_lo_u32 v5, v1, v3
1145; CHECK-NEXT:    v_mul_lo_u32 v6, v0, v4
1146; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v3
1147; CHECK-NEXT:    v_mul_hi_u32 v3, v1, v3
1148; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1149; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1150; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1151; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1152; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v4
1153; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1154; CHECK-NEXT:    v_mul_hi_u32 v6, v0, v4
1155; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
1156; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1157; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
1158; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1159; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1160; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
1161; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
1162; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1163; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1164; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
1165; CHECK-NEXT:    v_mul_lo_u32 v5, 0, v3
1166; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1167; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v3
1168; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v3
1169; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1170; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1171; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v7
1172; CHECK-NEXT:    v_subb_u32_e64 v6, s[4:5], v1, v5, vcc
1173; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v5
1174; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1175; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v0
1176; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
1177; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1178; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[4:5]
1179; CHECK-NEXT:    v_mov_b32_e32 v7, s7
1180; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
1181; CHECK-NEXT:    v_add_i32_e32 v6, vcc, 1, v3
1182; CHECK-NEXT:    v_cndmask_b32_e64 v5, v7, v5, s[4:5]
1183; CHECK-NEXT:    v_addc_u32_e32 v7, vcc, 0, v4, vcc
1184; CHECK-NEXT:    s_bfe_i32 s4, -1, 0x10000
1185; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s6, v0
1186; CHECK-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1187; CHECK-NEXT:    v_mov_b32_e32 v8, s4
1188; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1189; CHECK-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
1190; CHECK-NEXT:    v_add_i32_e32 v1, vcc, 1, v6
1191; CHECK-NEXT:    v_addc_u32_e32 v8, vcc, 0, v7, vcc
1192; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1193; CHECK-NEXT:    v_cndmask_b32_e32 v0, v6, v1, vcc
1194; CHECK-NEXT:    v_cndmask_b32_e32 v1, v7, v8, vcc
1195; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
1196; CHECK-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
1197; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
1198; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v2
1199; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v2
1200; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
1201; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v2, vcc
1202; CHECK-NEXT:    s_setpc_b64 s[30:31]
1203  %result = sdiv i64 %num, 4096
1204  ret i64 %result
1205}
1206
1207define <2 x i64> @v_sdiv_v2i64_pow2k_denom(<2 x i64> %num) {
1208; GISEL-LABEL: v_sdiv_v2i64_pow2k_denom:
1209; GISEL:       ; %bb.0:
1210; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1211; GISEL-NEXT:    s_movk_i32 s10, 0x1000
1212; GISEL-NEXT:    s_add_u32 s4, s10, 0
1213; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1214; GISEL-NEXT:    s_and_b32 s5, s5, 1
1215; GISEL-NEXT:    s_mov_b32 s6, 0
1216; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1217; GISEL-NEXT:    s_mov_b32 s7, s6
1218; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1219; GISEL-NEXT:    s_xor_b64 s[8:9], s[4:5], s[6:7]
1220; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s8
1221; GISEL-NEXT:    v_cvt_f32_u32_e32 v6, s9
1222; GISEL-NEXT:    s_sub_u32 s11, 0, s8
1223; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1224; GISEL-NEXT:    s_and_b32 s4, s4, 1
1225; GISEL-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
1226; GISEL-NEXT:    v_rcp_iflag_f32_e32 v5, v5
1227; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1228; GISEL-NEXT:    s_subb_u32 s12, 0, s9
1229; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v1
1230; GISEL-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
1231; GISEL-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v5
1232; GISEL-NEXT:    v_trunc_f32_e32 v6, v6
1233; GISEL-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v6
1234; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1235; GISEL-NEXT:    v_cvt_u32_f32_e32 v6, v6
1236; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
1237; GISEL-NEXT:    v_mul_lo_u32 v7, s12, v5
1238; GISEL-NEXT:    v_mul_lo_u32 v8, s11, v6
1239; GISEL-NEXT:    v_mul_hi_u32 v10, s11, v5
1240; GISEL-NEXT:    v_mul_lo_u32 v9, s11, v5
1241; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v4, vcc
1242; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1243; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1244; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v9
1245; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v7
1246; GISEL-NEXT:    v_mul_hi_u32 v11, v5, v9
1247; GISEL-NEXT:    v_mul_hi_u32 v9, v6, v9
1248; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v4
1249; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1250; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1251; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1252; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1253; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v7
1254; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1255; GISEL-NEXT:    v_mul_hi_u32 v10, v5, v7
1256; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1257; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1258; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1259; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1260; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1261; GISEL-NEXT:    v_mul_hi_u32 v7, v6, v7
1262; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1263; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1264; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1265; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1266; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1267; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v6, v7, vcc
1268; GISEL-NEXT:    v_mul_lo_u32 v9, s12, v5
1269; GISEL-NEXT:    v_mul_lo_u32 v10, s11, v8
1270; GISEL-NEXT:    v_mul_hi_u32 v12, s11, v5
1271; GISEL-NEXT:    v_mul_lo_u32 v11, s11, v5
1272; GISEL-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1273; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1274; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1275; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1276; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
1277; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v11
1278; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
1279; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v4
1280; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1281; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1282; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1283; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
1284; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
1285; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
1286; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v9
1287; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1288; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1289; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1290; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1291; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1292; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
1293; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1294; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1295; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
1296; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1297; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
1298; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1299; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
1300; GISEL-NEXT:    v_mul_lo_u32 v7, v1, v5
1301; GISEL-NEXT:    v_mul_lo_u32 v8, v0, v6
1302; GISEL-NEXT:    v_mul_hi_u32 v10, v0, v5
1303; GISEL-NEXT:    v_mul_hi_u32 v5, v1, v5
1304; GISEL-NEXT:    v_mov_b32_e32 v9, s9
1305; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1306; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1307; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1308; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1309; GISEL-NEXT:    v_mul_lo_u32 v10, v1, v6
1310; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1311; GISEL-NEXT:    v_mul_hi_u32 v8, v0, v6
1312; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
1313; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1314; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1315; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1316; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1317; GISEL-NEXT:    v_mul_hi_u32 v6, v1, v6
1318; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1319; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1320; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1321; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
1322; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v5
1323; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v6
1324; GISEL-NEXT:    v_mul_hi_u32 v11, s8, v5
1325; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v5
1326; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1327; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
1328; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v10
1329; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v1, v7, vcc
1330; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v7
1331; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s9, v8
1332; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
1333; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1334; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s8, v0
1335; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
1336; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1337; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
1338; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s9, v8
1339; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v5
1340; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v6, vcc
1341; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
1342; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
1343; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
1344; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
1345; GISEL-NEXT:    s_add_u32 s4, s10, 0
1346; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1347; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
1348; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1349; GISEL-NEXT:    v_cndmask_b32_e32 v0, v10, v0, vcc
1350; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v8
1351; GISEL-NEXT:    s_and_b32 s5, s5, 1
1352; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1353; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1354; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1355; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1356; GISEL-NEXT:    v_cndmask_b32_e32 v0, v8, v1, vcc
1357; GISEL-NEXT:    v_cndmask_b32_e32 v1, v9, v10, vcc
1358; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1359; GISEL-NEXT:    s_xor_b64 s[6:7], s[4:5], s[6:7]
1360; GISEL-NEXT:    v_cndmask_b32_e32 v0, v5, v0, vcc
1361; GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
1362; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s6
1363; GISEL-NEXT:    v_cvt_f32_u32_e32 v6, s7
1364; GISEL-NEXT:    s_sub_u32 s8, 0, s6
1365; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1366; GISEL-NEXT:    s_and_b32 s4, s4, 1
1367; GISEL-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
1368; GISEL-NEXT:    v_rcp_iflag_f32_e32 v5, v5
1369; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1370; GISEL-NEXT:    s_subb_u32 s9, 0, s7
1371; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v4
1372; GISEL-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
1373; GISEL-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v5
1374; GISEL-NEXT:    v_trunc_f32_e32 v6, v6
1375; GISEL-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v6
1376; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1377; GISEL-NEXT:    v_cvt_u32_f32_e32 v6, v6
1378; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v4
1379; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
1380; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v5
1381; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v6
1382; GISEL-NEXT:    v_mul_hi_u32 v10, s8, v5
1383; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v4, vcc
1384; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
1385; GISEL-NEXT:    v_mul_lo_u32 v9, s8, v5
1386; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
1387; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
1388; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1389; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1390; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v9
1391; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v7
1392; GISEL-NEXT:    v_mul_hi_u32 v11, v5, v9
1393; GISEL-NEXT:    v_mul_hi_u32 v9, v6, v9
1394; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
1395; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1396; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1397; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1398; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1399; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v7
1400; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1401; GISEL-NEXT:    v_mul_hi_u32 v10, v5, v7
1402; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1403; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1404; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1405; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1406; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1407; GISEL-NEXT:    v_mul_hi_u32 v7, v6, v7
1408; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1409; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1410; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1411; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1412; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1413; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v6, v7, vcc
1414; GISEL-NEXT:    v_mul_lo_u32 v9, s9, v5
1415; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v8
1416; GISEL-NEXT:    v_mul_hi_u32 v12, s8, v5
1417; GISEL-NEXT:    v_mul_lo_u32 v11, s8, v5
1418; GISEL-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1419; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1420; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1421; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1422; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
1423; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v11
1424; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
1425; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
1426; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1427; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1428; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1429; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
1430; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
1431; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
1432; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v9
1433; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1434; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1435; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1436; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1437; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1438; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
1439; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1440; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1441; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
1442; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1443; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
1444; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1445; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
1446; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v5
1447; GISEL-NEXT:    v_mul_lo_u32 v8, v2, v6
1448; GISEL-NEXT:    v_mul_hi_u32 v10, v2, v5
1449; GISEL-NEXT:    v_mul_hi_u32 v5, v3, v5
1450; GISEL-NEXT:    v_mov_b32_e32 v9, s7
1451; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1452; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1453; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1454; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1455; GISEL-NEXT:    v_mul_lo_u32 v10, v3, v6
1456; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1457; GISEL-NEXT:    v_mul_hi_u32 v8, v2, v6
1458; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
1459; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1460; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1461; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1462; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1463; GISEL-NEXT:    v_mul_hi_u32 v6, v3, v6
1464; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1465; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1466; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1467; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
1468; GISEL-NEXT:    v_mul_lo_u32 v7, s7, v5
1469; GISEL-NEXT:    v_mul_lo_u32 v8, s6, v6
1470; GISEL-NEXT:    v_mul_hi_u32 v11, s6, v5
1471; GISEL-NEXT:    v_mul_lo_u32 v10, s6, v5
1472; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1473; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
1474; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v10
1475; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
1476; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
1477; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v8
1478; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v9, vcc
1479; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1480; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v2
1481; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
1482; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1483; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
1484; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s7, v8
1485; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v5
1486; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v6, vcc
1487; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s7, v3
1488; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
1489; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
1490; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s6, v2
1491; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
1492; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s7, v3
1493; GISEL-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
1494; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
1495; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1496; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
1497; GISEL-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
1498; GISEL-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
1499; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1500; GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
1501; GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
1502; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
1503; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
1504; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
1505; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
1506; GISEL-NEXT:    s_setpc_b64 s[30:31]
1507;
1508; CGP-LABEL: v_sdiv_v2i64_pow2k_denom:
1509; CGP:       ; %bb.0:
1510; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1511; CGP-NEXT:    v_cvt_f32_u32_e32 v5, 0x1000
1512; CGP-NEXT:    v_cvt_f32_ubyte0_e32 v6, 0
1513; CGP-NEXT:    s_movk_i32 s6, 0xf000
1514; CGP-NEXT:    v_ashrrev_i32_e32 v4, 31, v1
1515; CGP-NEXT:    v_mov_b32_e32 v7, v5
1516; CGP-NEXT:    v_mac_f32_e32 v7, 0x4f800000, v6
1517; CGP-NEXT:    v_rcp_iflag_f32_e32 v7, v7
1518; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
1519; CGP-NEXT:    v_addc_u32_e32 v1, vcc, v1, v4, vcc
1520; CGP-NEXT:    v_mul_f32_e32 v7, 0x5f7ffffc, v7
1521; CGP-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v7
1522; CGP-NEXT:    v_trunc_f32_e32 v8, v8
1523; CGP-NEXT:    v_mac_f32_e32 v7, 0xcf800000, v8
1524; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
1525; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
1526; CGP-NEXT:    v_xor_b32_e32 v0, v0, v4
1527; CGP-NEXT:    v_xor_b32_e32 v1, v1, v4
1528; CGP-NEXT:    v_mul_lo_u32 v9, -1, v7
1529; CGP-NEXT:    v_mul_lo_u32 v10, s6, v8
1530; CGP-NEXT:    v_mul_hi_u32 v12, s6, v7
1531; CGP-NEXT:    v_mul_lo_u32 v11, s6, v7
1532; CGP-NEXT:    s_movk_i32 s7, 0x1000
1533; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1534; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1535; CGP-NEXT:    v_mul_lo_u32 v10, v8, v11
1536; CGP-NEXT:    v_mul_lo_u32 v12, v7, v9
1537; CGP-NEXT:    v_mul_hi_u32 v13, v7, v11
1538; CGP-NEXT:    v_mul_hi_u32 v11, v8, v11
1539; CGP-NEXT:    s_bfe_i32 s8, -1, 0x10000
1540; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
1541; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1542; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
1543; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1544; CGP-NEXT:    v_mul_lo_u32 v13, v8, v9
1545; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
1546; CGP-NEXT:    v_mul_hi_u32 v12, v7, v9
1547; CGP-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
1548; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
1549; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
1550; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1551; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
1552; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
1553; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1554; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1555; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
1556; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1557; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1558; CGP-NEXT:    v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
1559; CGP-NEXT:    v_mul_lo_u32 v11, -1, v7
1560; CGP-NEXT:    v_mul_lo_u32 v12, s6, v10
1561; CGP-NEXT:    v_mul_hi_u32 v14, s6, v7
1562; CGP-NEXT:    v_mul_lo_u32 v13, s6, v7
1563; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1564; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1565; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
1566; CGP-NEXT:    v_mul_lo_u32 v12, v10, v13
1567; CGP-NEXT:    v_mul_lo_u32 v14, v7, v11
1568; CGP-NEXT:    v_mul_hi_u32 v9, v7, v13
1569; CGP-NEXT:    v_mul_hi_u32 v13, v10, v13
1570; CGP-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
1571; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
1572; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
1573; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
1574; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1575; CGP-NEXT:    v_mul_lo_u32 v12, v10, v11
1576; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v14, v9
1577; CGP-NEXT:    v_mul_hi_u32 v14, v7, v11
1578; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
1579; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1580; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
1581; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
1582; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
1583; CGP-NEXT:    v_mul_hi_u32 v10, v10, v11
1584; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
1585; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1586; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v13, v12
1587; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1588; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v8, v10, vcc
1589; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1590; CGP-NEXT:    v_addc_u32_e32 v8, vcc, 0, v8, vcc
1591; CGP-NEXT:    v_mul_lo_u32 v9, v1, v7
1592; CGP-NEXT:    v_mul_lo_u32 v10, v0, v8
1593; CGP-NEXT:    v_mul_hi_u32 v11, v0, v7
1594; CGP-NEXT:    v_mul_hi_u32 v7, v1, v7
1595; CGP-NEXT:    v_rcp_iflag_f32_e32 v5, v5
1596; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1597; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1598; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1599; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1600; CGP-NEXT:    v_mul_lo_u32 v11, v1, v8
1601; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1602; CGP-NEXT:    v_mul_hi_u32 v10, v0, v8
1603; CGP-NEXT:    v_add_i32_e32 v7, vcc, v11, v7
1604; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1605; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1606; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1607; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1608; CGP-NEXT:    v_mul_hi_u32 v8, v1, v8
1609; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1610; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1611; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1612; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1613; CGP-NEXT:    v_mul_lo_u32 v9, 0, v7
1614; CGP-NEXT:    v_mul_lo_u32 v10, s7, v8
1615; CGP-NEXT:    v_mul_hi_u32 v12, s7, v7
1616; CGP-NEXT:    v_mul_lo_u32 v11, s7, v7
1617; CGP-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
1618; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1619; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1620; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
1621; CGP-NEXT:    v_subb_u32_e64 v10, s[4:5], v1, v9, vcc
1622; CGP-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v9
1623; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1624; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v0
1625; CGP-NEXT:    v_subrev_i32_e32 v0, vcc, s7, v0
1626; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1627; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
1628; CGP-NEXT:    v_mov_b32_e32 v11, s8
1629; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v10
1630; CGP-NEXT:    v_add_i32_e32 v10, vcc, 1, v7
1631; CGP-NEXT:    v_cndmask_b32_e64 v9, v11, v9, s[4:5]
1632; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v8, vcc
1633; CGP-NEXT:    s_bfe_i32 s4, -1, 0x10000
1634; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v0
1635; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1636; CGP-NEXT:    v_mov_b32_e32 v12, s4
1637; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1638; CGP-NEXT:    v_cndmask_b32_e32 v0, v12, v0, vcc
1639; CGP-NEXT:    v_add_i32_e32 v1, vcc, 1, v10
1640; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v11, vcc
1641; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1642; CGP-NEXT:    v_cndmask_b32_e32 v0, v10, v1, vcc
1643; CGP-NEXT:    v_cndmask_b32_e32 v1, v11, v12, vcc
1644; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
1645; CGP-NEXT:    v_cndmask_b32_e32 v0, v7, v0, vcc
1646; CGP-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v5
1647; CGP-NEXT:    v_trunc_f32_e32 v7, v7
1648; CGP-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v7
1649; CGP-NEXT:    v_cvt_u32_f32_e32 v5, v5
1650; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
1651; CGP-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
1652; CGP-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
1653; CGP-NEXT:    v_mul_lo_u32 v8, -1, v5
1654; CGP-NEXT:    v_mul_lo_u32 v9, s6, v7
1655; CGP-NEXT:    v_mul_hi_u32 v11, s6, v5
1656; CGP-NEXT:    v_mul_lo_u32 v10, s6, v5
1657; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1658; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
1659; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1660; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1661; CGP-NEXT:    v_mul_lo_u32 v9, v7, v10
1662; CGP-NEXT:    v_mul_lo_u32 v11, v5, v8
1663; CGP-NEXT:    v_mul_hi_u32 v12, v5, v10
1664; CGP-NEXT:    v_mul_hi_u32 v10, v7, v10
1665; CGP-NEXT:    v_xor_b32_e32 v0, v0, v4
1666; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1667; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1668; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1669; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1670; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
1671; CGP-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1672; CGP-NEXT:    v_mul_hi_u32 v11, v5, v8
1673; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
1674; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1675; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
1676; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1677; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
1678; CGP-NEXT:    v_mul_hi_u32 v8, v7, v8
1679; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1680; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1681; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1682; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1683; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
1684; CGP-NEXT:    v_addc_u32_e64 v9, s[4:5], v7, v8, vcc
1685; CGP-NEXT:    v_mul_lo_u32 v10, -1, v5
1686; CGP-NEXT:    v_mul_lo_u32 v11, s6, v9
1687; CGP-NEXT:    v_mul_hi_u32 v13, s6, v5
1688; CGP-NEXT:    v_mul_lo_u32 v12, s6, v5
1689; CGP-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1690; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1691; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
1692; CGP-NEXT:    v_mul_lo_u32 v11, v9, v12
1693; CGP-NEXT:    v_mul_lo_u32 v13, v5, v10
1694; CGP-NEXT:    v_mul_hi_u32 v8, v5, v12
1695; CGP-NEXT:    v_mul_hi_u32 v12, v9, v12
1696; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
1697; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
1698; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1699; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
1700; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1701; CGP-NEXT:    v_mul_lo_u32 v11, v9, v10
1702; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v13, v8
1703; CGP-NEXT:    v_mul_hi_u32 v13, v5, v10
1704; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1705; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1706; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
1707; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1708; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
1709; CGP-NEXT:    v_mul_hi_u32 v9, v9, v10
1710; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
1711; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1712; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v11
1713; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1714; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
1715; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1716; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
1717; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
1718; CGP-NEXT:    v_xor_b32_e32 v1, v1, v4
1719; CGP-NEXT:    v_mul_lo_u32 v8, v3, v5
1720; CGP-NEXT:    v_mul_lo_u32 v9, v2, v7
1721; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
1722; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v4, vcc
1723; CGP-NEXT:    v_mul_hi_u32 v4, v2, v5
1724; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1725; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1726; CGP-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
1727; CGP-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
1728; CGP-NEXT:    v_mul_lo_u32 v8, v3, v7
1729; CGP-NEXT:    v_mul_hi_u32 v5, v3, v5
1730; CGP-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
1731; CGP-NEXT:    v_mul_hi_u32 v9, v2, v7
1732; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
1733; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1734; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
1735; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1736; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1737; CGP-NEXT:    v_mul_hi_u32 v7, v3, v7
1738; CGP-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
1739; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1740; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
1741; CGP-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
1742; CGP-NEXT:    v_mul_lo_u32 v7, 0, v4
1743; CGP-NEXT:    v_mul_lo_u32 v8, s7, v5
1744; CGP-NEXT:    v_mul_hi_u32 v10, s7, v4
1745; CGP-NEXT:    v_mul_lo_u32 v9, s7, v4
1746; CGP-NEXT:    s_bfe_i32 s6, -1, 0x10000
1747; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1748; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1749; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v9
1750; CGP-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
1751; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
1752; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1753; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v2
1754; CGP-NEXT:    v_subrev_i32_e32 v2, vcc, s7, v2
1755; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1756; CGP-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1757; CGP-NEXT:    v_mov_b32_e32 v9, s6
1758; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v8
1759; CGP-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
1760; CGP-NEXT:    v_cndmask_b32_e64 v7, v9, v7, s[4:5]
1761; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
1762; CGP-NEXT:    s_bfe_i32 s4, -1, 0x10000
1763; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v2
1764; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
1765; CGP-NEXT:    v_mov_b32_e32 v10, s4
1766; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v3
1767; CGP-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
1768; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
1769; CGP-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1770; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
1771; CGP-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
1772; CGP-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
1773; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1774; CGP-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
1775; CGP-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
1776; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
1777; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
1778; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
1779; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
1780; CGP-NEXT:    s_setpc_b64 s[30:31]
1781  %result = sdiv <2 x i64> %num, <i64 4096, i64 4096>
1782  ret <2 x i64> %result
1783}
1784
1785define i64 @v_sdiv_i64_oddk_denom(i64 %num) {
1786; CHECK-LABEL: v_sdiv_i64_oddk_denom:
1787; CHECK:       ; %bb.0:
1788; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1789; CHECK-NEXT:    v_cvt_f32_u32_e32 v3, 0x12d8fb
1790; CHECK-NEXT:    v_cvt_f32_ubyte0_e32 v4, 0
1791; CHECK-NEXT:    s_mov_b32 s6, 0xffed2705
1792; CHECK-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
1793; CHECK-NEXT:    v_mac_f32_e32 v3, 0x4f800000, v4
1794; CHECK-NEXT:    v_rcp_iflag_f32_e32 v3, v3
1795; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
1796; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v2, vcc
1797; CHECK-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
1798; CHECK-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v3
1799; CHECK-NEXT:    v_trunc_f32_e32 v4, v4
1800; CHECK-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
1801; CHECK-NEXT:    v_cvt_u32_f32_e32 v3, v3
1802; CHECK-NEXT:    v_cvt_u32_f32_e32 v4, v4
1803; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v2
1804; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v2
1805; CHECK-NEXT:    v_mul_lo_u32 v5, -1, v3
1806; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1807; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v3
1808; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v3
1809; CHECK-NEXT:    s_bfe_i32 s7, -1, 0x10000
1810; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1811; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1812; CHECK-NEXT:    v_mul_lo_u32 v6, v4, v7
1813; CHECK-NEXT:    v_mul_lo_u32 v8, v3, v5
1814; CHECK-NEXT:    v_mul_hi_u32 v9, v3, v7
1815; CHECK-NEXT:    v_mul_hi_u32 v7, v4, v7
1816; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
1817; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1818; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
1819; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1820; CHECK-NEXT:    v_mul_lo_u32 v9, v4, v5
1821; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
1822; CHECK-NEXT:    v_mul_hi_u32 v8, v3, v5
1823; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
1824; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1825; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1826; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1827; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1828; CHECK-NEXT:    v_mul_hi_u32 v5, v4, v5
1829; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1830; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1831; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1832; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1833; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
1834; CHECK-NEXT:    v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1835; CHECK-NEXT:    v_mul_lo_u32 v7, -1, v3
1836; CHECK-NEXT:    v_mul_lo_u32 v8, s6, v6
1837; CHECK-NEXT:    v_mul_hi_u32 v10, s6, v3
1838; CHECK-NEXT:    v_mul_lo_u32 v9, s6, v3
1839; CHECK-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v5
1840; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1841; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v10
1842; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v9
1843; CHECK-NEXT:    v_mul_lo_u32 v10, v3, v7
1844; CHECK-NEXT:    v_mul_hi_u32 v5, v3, v9
1845; CHECK-NEXT:    v_mul_hi_u32 v9, v6, v9
1846; CHECK-NEXT:    s_mov_b32 s6, 0x12d8fb
1847; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1848; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1849; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1850; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[4:5]
1851; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v7
1852; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v10, v5
1853; CHECK-NEXT:    v_mul_hi_u32 v10, v3, v7
1854; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1855; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1856; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1857; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1858; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1859; CHECK-NEXT:    v_mul_hi_u32 v6, v6, v7
1860; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1861; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1862; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v9, v8
1863; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1864; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, v4, v6, vcc
1865; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
1866; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
1867; CHECK-NEXT:    v_mul_lo_u32 v5, v1, v3
1868; CHECK-NEXT:    v_mul_lo_u32 v6, v0, v4
1869; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v3
1870; CHECK-NEXT:    v_mul_hi_u32 v3, v1, v3
1871; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1872; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1873; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1874; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1875; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v4
1876; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1877; CHECK-NEXT:    v_mul_hi_u32 v6, v0, v4
1878; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
1879; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1880; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
1881; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1882; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1883; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
1884; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
1885; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1886; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1887; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
1888; CHECK-NEXT:    v_mul_lo_u32 v5, 0, v3
1889; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1890; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v3
1891; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v3
1892; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1893; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1894; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v7
1895; CHECK-NEXT:    v_subb_u32_e64 v6, s[4:5], v1, v5, vcc
1896; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v5
1897; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1898; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v0
1899; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
1900; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1901; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[4:5]
1902; CHECK-NEXT:    v_mov_b32_e32 v7, s7
1903; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
1904; CHECK-NEXT:    v_add_i32_e32 v6, vcc, 1, v3
1905; CHECK-NEXT:    v_cndmask_b32_e64 v5, v7, v5, s[4:5]
1906; CHECK-NEXT:    v_addc_u32_e32 v7, vcc, 0, v4, vcc
1907; CHECK-NEXT:    s_bfe_i32 s4, -1, 0x10000
1908; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s6, v0
1909; CHECK-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1910; CHECK-NEXT:    v_mov_b32_e32 v8, s4
1911; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1912; CHECK-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
1913; CHECK-NEXT:    v_add_i32_e32 v1, vcc, 1, v6
1914; CHECK-NEXT:    v_addc_u32_e32 v8, vcc, 0, v7, vcc
1915; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1916; CHECK-NEXT:    v_cndmask_b32_e32 v0, v6, v1, vcc
1917; CHECK-NEXT:    v_cndmask_b32_e32 v1, v7, v8, vcc
1918; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
1919; CHECK-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
1920; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
1921; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v2
1922; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v2
1923; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
1924; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v2, vcc
1925; CHECK-NEXT:    s_setpc_b64 s[30:31]
1926  %result = sdiv i64 %num, 1235195
1927  ret i64 %result
1928}
1929
1930define <2 x i64> @v_sdiv_v2i64_oddk_denom(<2 x i64> %num) {
1931; GISEL-LABEL: v_sdiv_v2i64_oddk_denom:
1932; GISEL:       ; %bb.0:
1933; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1934; GISEL-NEXT:    s_mov_b32 s10, 0x12d8fb
1935; GISEL-NEXT:    s_add_u32 s4, s10, 0
1936; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1937; GISEL-NEXT:    s_and_b32 s5, s5, 1
1938; GISEL-NEXT:    s_mov_b32 s6, 0
1939; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1940; GISEL-NEXT:    s_mov_b32 s7, s6
1941; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1942; GISEL-NEXT:    s_xor_b64 s[8:9], s[4:5], s[6:7]
1943; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s8
1944; GISEL-NEXT:    v_cvt_f32_u32_e32 v6, s9
1945; GISEL-NEXT:    s_sub_u32 s11, 0, s8
1946; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1947; GISEL-NEXT:    s_and_b32 s4, s4, 1
1948; GISEL-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
1949; GISEL-NEXT:    v_rcp_iflag_f32_e32 v5, v5
1950; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1951; GISEL-NEXT:    s_subb_u32 s12, 0, s9
1952; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v1
1953; GISEL-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
1954; GISEL-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v5
1955; GISEL-NEXT:    v_trunc_f32_e32 v6, v6
1956; GISEL-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v6
1957; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1958; GISEL-NEXT:    v_cvt_u32_f32_e32 v6, v6
1959; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
1960; GISEL-NEXT:    v_mul_lo_u32 v7, s12, v5
1961; GISEL-NEXT:    v_mul_lo_u32 v8, s11, v6
1962; GISEL-NEXT:    v_mul_hi_u32 v10, s11, v5
1963; GISEL-NEXT:    v_mul_lo_u32 v9, s11, v5
1964; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v4, vcc
1965; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1966; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1967; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v9
1968; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v7
1969; GISEL-NEXT:    v_mul_hi_u32 v11, v5, v9
1970; GISEL-NEXT:    v_mul_hi_u32 v9, v6, v9
1971; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v4
1972; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1973; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1974; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1975; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1976; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v7
1977; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1978; GISEL-NEXT:    v_mul_hi_u32 v10, v5, v7
1979; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1980; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1981; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1982; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1983; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1984; GISEL-NEXT:    v_mul_hi_u32 v7, v6, v7
1985; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1986; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1987; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1988; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1989; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1990; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v6, v7, vcc
1991; GISEL-NEXT:    v_mul_lo_u32 v9, s12, v5
1992; GISEL-NEXT:    v_mul_lo_u32 v10, s11, v8
1993; GISEL-NEXT:    v_mul_hi_u32 v12, s11, v5
1994; GISEL-NEXT:    v_mul_lo_u32 v11, s11, v5
1995; GISEL-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1996; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1997; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1998; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1999; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
2000; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v11
2001; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
2002; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v4
2003; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2004; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2005; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2006; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
2007; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
2008; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
2009; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v9
2010; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2011; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2012; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2013; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2014; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2015; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
2016; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2017; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
2018; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
2019; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2020; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
2021; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2022; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
2023; GISEL-NEXT:    v_mul_lo_u32 v7, v1, v5
2024; GISEL-NEXT:    v_mul_lo_u32 v8, v0, v6
2025; GISEL-NEXT:    v_mul_hi_u32 v10, v0, v5
2026; GISEL-NEXT:    v_mul_hi_u32 v5, v1, v5
2027; GISEL-NEXT:    v_mov_b32_e32 v9, s9
2028; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2029; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2030; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2031; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2032; GISEL-NEXT:    v_mul_lo_u32 v10, v1, v6
2033; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2034; GISEL-NEXT:    v_mul_hi_u32 v8, v0, v6
2035; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
2036; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2037; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
2038; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2039; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2040; GISEL-NEXT:    v_mul_hi_u32 v6, v1, v6
2041; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2042; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2043; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2044; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
2045; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v5
2046; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v6
2047; GISEL-NEXT:    v_mul_hi_u32 v11, s8, v5
2048; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v5
2049; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2050; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
2051; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v10
2052; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v1, v7, vcc
2053; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v7
2054; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s9, v8
2055; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
2056; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2057; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s8, v0
2058; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
2059; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2060; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2061; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s9, v8
2062; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v5
2063; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v6, vcc
2064; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
2065; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
2066; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
2067; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
2068; GISEL-NEXT:    s_add_u32 s4, s10, 0
2069; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
2070; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
2071; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
2072; GISEL-NEXT:    v_cndmask_b32_e32 v0, v10, v0, vcc
2073; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v8
2074; GISEL-NEXT:    s_and_b32 s5, s5, 1
2075; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2076; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
2077; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
2078; GISEL-NEXT:    s_addc_u32 s5, 0, 0
2079; GISEL-NEXT:    v_cndmask_b32_e32 v0, v8, v1, vcc
2080; GISEL-NEXT:    v_cndmask_b32_e32 v1, v9, v10, vcc
2081; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2082; GISEL-NEXT:    s_xor_b64 s[6:7], s[4:5], s[6:7]
2083; GISEL-NEXT:    v_cndmask_b32_e32 v0, v5, v0, vcc
2084; GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
2085; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s6
2086; GISEL-NEXT:    v_cvt_f32_u32_e32 v6, s7
2087; GISEL-NEXT:    s_sub_u32 s8, 0, s6
2088; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
2089; GISEL-NEXT:    s_and_b32 s4, s4, 1
2090; GISEL-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
2091; GISEL-NEXT:    v_rcp_iflag_f32_e32 v5, v5
2092; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
2093; GISEL-NEXT:    s_subb_u32 s9, 0, s7
2094; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v4
2095; GISEL-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
2096; GISEL-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v5
2097; GISEL-NEXT:    v_trunc_f32_e32 v6, v6
2098; GISEL-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v6
2099; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
2100; GISEL-NEXT:    v_cvt_u32_f32_e32 v6, v6
2101; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v4
2102; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
2103; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v5
2104; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v6
2105; GISEL-NEXT:    v_mul_hi_u32 v10, s8, v5
2106; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v4, vcc
2107; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
2108; GISEL-NEXT:    v_mul_lo_u32 v9, s8, v5
2109; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
2110; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
2111; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2112; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2113; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v9
2114; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v7
2115; GISEL-NEXT:    v_mul_hi_u32 v11, v5, v9
2116; GISEL-NEXT:    v_mul_hi_u32 v9, v6, v9
2117; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
2118; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
2119; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2120; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
2121; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2122; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v7
2123; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2124; GISEL-NEXT:    v_mul_hi_u32 v10, v5, v7
2125; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
2126; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2127; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2128; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2129; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2130; GISEL-NEXT:    v_mul_hi_u32 v7, v6, v7
2131; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
2132; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2133; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2134; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2135; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
2136; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v6, v7, vcc
2137; GISEL-NEXT:    v_mul_lo_u32 v9, s9, v5
2138; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v8
2139; GISEL-NEXT:    v_mul_hi_u32 v12, s8, v5
2140; GISEL-NEXT:    v_mul_lo_u32 v11, s8, v5
2141; GISEL-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
2142; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
2143; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
2144; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
2145; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
2146; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v11
2147; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
2148; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
2149; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2150; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2151; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2152; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
2153; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
2154; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
2155; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v9
2156; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2157; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2158; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2159; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2160; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2161; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
2162; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2163; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
2164; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
2165; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2166; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
2167; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2168; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
2169; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v5
2170; GISEL-NEXT:    v_mul_lo_u32 v8, v2, v6
2171; GISEL-NEXT:    v_mul_hi_u32 v10, v2, v5
2172; GISEL-NEXT:    v_mul_hi_u32 v5, v3, v5
2173; GISEL-NEXT:    v_mov_b32_e32 v9, s7
2174; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2175; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2176; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2177; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2178; GISEL-NEXT:    v_mul_lo_u32 v10, v3, v6
2179; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2180; GISEL-NEXT:    v_mul_hi_u32 v8, v2, v6
2181; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
2182; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2183; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
2184; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2185; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2186; GISEL-NEXT:    v_mul_hi_u32 v6, v3, v6
2187; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2188; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2189; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2190; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
2191; GISEL-NEXT:    v_mul_lo_u32 v7, s7, v5
2192; GISEL-NEXT:    v_mul_lo_u32 v8, s6, v6
2193; GISEL-NEXT:    v_mul_hi_u32 v11, s6, v5
2194; GISEL-NEXT:    v_mul_lo_u32 v10, s6, v5
2195; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2196; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
2197; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v10
2198; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
2199; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
2200; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v8
2201; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v9, vcc
2202; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2203; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v2
2204; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
2205; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2206; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2207; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s7, v8
2208; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v5
2209; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v6, vcc
2210; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s7, v3
2211; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
2212; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
2213; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s6, v2
2214; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
2215; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s7, v3
2216; GISEL-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
2217; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
2218; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2219; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2220; GISEL-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
2221; GISEL-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
2222; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2223; GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
2224; GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
2225; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
2226; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
2227; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
2228; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
2229; GISEL-NEXT:    s_setpc_b64 s[30:31]
2230;
2231; CGP-LABEL: v_sdiv_v2i64_oddk_denom:
2232; CGP:       ; %bb.0:
2233; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2234; CGP-NEXT:    v_cvt_f32_u32_e32 v5, 0x12d8fb
2235; CGP-NEXT:    v_cvt_f32_ubyte0_e32 v6, 0
2236; CGP-NEXT:    s_mov_b32 s6, 0xffed2705
2237; CGP-NEXT:    v_ashrrev_i32_e32 v4, 31, v1
2238; CGP-NEXT:    v_mov_b32_e32 v7, v5
2239; CGP-NEXT:    v_mac_f32_e32 v7, 0x4f800000, v6
2240; CGP-NEXT:    v_rcp_iflag_f32_e32 v7, v7
2241; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
2242; CGP-NEXT:    v_addc_u32_e32 v1, vcc, v1, v4, vcc
2243; CGP-NEXT:    v_mul_f32_e32 v7, 0x5f7ffffc, v7
2244; CGP-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v7
2245; CGP-NEXT:    v_trunc_f32_e32 v8, v8
2246; CGP-NEXT:    v_mac_f32_e32 v7, 0xcf800000, v8
2247; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
2248; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
2249; CGP-NEXT:    v_xor_b32_e32 v0, v0, v4
2250; CGP-NEXT:    v_xor_b32_e32 v1, v1, v4
2251; CGP-NEXT:    v_mul_lo_u32 v9, -1, v7
2252; CGP-NEXT:    v_mul_lo_u32 v10, s6, v8
2253; CGP-NEXT:    v_mul_hi_u32 v12, s6, v7
2254; CGP-NEXT:    v_mul_lo_u32 v11, s6, v7
2255; CGP-NEXT:    s_mov_b32 s7, 0x12d8fb
2256; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2257; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2258; CGP-NEXT:    v_mul_lo_u32 v10, v8, v11
2259; CGP-NEXT:    v_mul_lo_u32 v12, v7, v9
2260; CGP-NEXT:    v_mul_hi_u32 v13, v7, v11
2261; CGP-NEXT:    v_mul_hi_u32 v11, v8, v11
2262; CGP-NEXT:    s_bfe_i32 s8, -1, 0x10000
2263; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
2264; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2265; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
2266; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2267; CGP-NEXT:    v_mul_lo_u32 v13, v8, v9
2268; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
2269; CGP-NEXT:    v_mul_hi_u32 v12, v7, v9
2270; CGP-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
2271; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2272; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
2273; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2274; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
2275; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
2276; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2277; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2278; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2279; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2280; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2281; CGP-NEXT:    v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
2282; CGP-NEXT:    v_mul_lo_u32 v11, -1, v7
2283; CGP-NEXT:    v_mul_lo_u32 v12, s6, v10
2284; CGP-NEXT:    v_mul_hi_u32 v14, s6, v7
2285; CGP-NEXT:    v_mul_lo_u32 v13, s6, v7
2286; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2287; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2288; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
2289; CGP-NEXT:    v_mul_lo_u32 v12, v10, v13
2290; CGP-NEXT:    v_mul_lo_u32 v14, v7, v11
2291; CGP-NEXT:    v_mul_hi_u32 v9, v7, v13
2292; CGP-NEXT:    v_mul_hi_u32 v13, v10, v13
2293; CGP-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
2294; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2295; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2296; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
2297; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
2298; CGP-NEXT:    v_mul_lo_u32 v12, v10, v11
2299; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v14, v9
2300; CGP-NEXT:    v_mul_hi_u32 v14, v7, v11
2301; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2302; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2303; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2304; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2305; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
2306; CGP-NEXT:    v_mul_hi_u32 v10, v10, v11
2307; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
2308; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2309; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v13, v12
2310; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2311; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v8, v10, vcc
2312; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2313; CGP-NEXT:    v_addc_u32_e32 v8, vcc, 0, v8, vcc
2314; CGP-NEXT:    v_mul_lo_u32 v9, v1, v7
2315; CGP-NEXT:    v_mul_lo_u32 v10, v0, v8
2316; CGP-NEXT:    v_mul_hi_u32 v11, v0, v7
2317; CGP-NEXT:    v_mul_hi_u32 v7, v1, v7
2318; CGP-NEXT:    v_rcp_iflag_f32_e32 v5, v5
2319; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2320; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2321; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2322; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2323; CGP-NEXT:    v_mul_lo_u32 v11, v1, v8
2324; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2325; CGP-NEXT:    v_mul_hi_u32 v10, v0, v8
2326; CGP-NEXT:    v_add_i32_e32 v7, vcc, v11, v7
2327; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2328; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2329; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2330; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2331; CGP-NEXT:    v_mul_hi_u32 v8, v1, v8
2332; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2333; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2334; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2335; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2336; CGP-NEXT:    v_mul_lo_u32 v9, 0, v7
2337; CGP-NEXT:    v_mul_lo_u32 v10, s7, v8
2338; CGP-NEXT:    v_mul_hi_u32 v12, s7, v7
2339; CGP-NEXT:    v_mul_lo_u32 v11, s7, v7
2340; CGP-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
2341; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2342; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2343; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
2344; CGP-NEXT:    v_subb_u32_e64 v10, s[4:5], v1, v9, vcc
2345; CGP-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v9
2346; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2347; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v0
2348; CGP-NEXT:    v_subrev_i32_e32 v0, vcc, s7, v0
2349; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2350; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
2351; CGP-NEXT:    v_mov_b32_e32 v11, s8
2352; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v10
2353; CGP-NEXT:    v_add_i32_e32 v10, vcc, 1, v7
2354; CGP-NEXT:    v_cndmask_b32_e64 v9, v11, v9, s[4:5]
2355; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v8, vcc
2356; CGP-NEXT:    s_bfe_i32 s4, -1, 0x10000
2357; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v0
2358; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
2359; CGP-NEXT:    v_mov_b32_e32 v12, s4
2360; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
2361; CGP-NEXT:    v_cndmask_b32_e32 v0, v12, v0, vcc
2362; CGP-NEXT:    v_add_i32_e32 v1, vcc, 1, v10
2363; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v11, vcc
2364; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
2365; CGP-NEXT:    v_cndmask_b32_e32 v0, v10, v1, vcc
2366; CGP-NEXT:    v_cndmask_b32_e32 v1, v11, v12, vcc
2367; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
2368; CGP-NEXT:    v_cndmask_b32_e32 v0, v7, v0, vcc
2369; CGP-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v5
2370; CGP-NEXT:    v_trunc_f32_e32 v7, v7
2371; CGP-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v7
2372; CGP-NEXT:    v_cvt_u32_f32_e32 v5, v5
2373; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
2374; CGP-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
2375; CGP-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
2376; CGP-NEXT:    v_mul_lo_u32 v8, -1, v5
2377; CGP-NEXT:    v_mul_lo_u32 v9, s6, v7
2378; CGP-NEXT:    v_mul_hi_u32 v11, s6, v5
2379; CGP-NEXT:    v_mul_lo_u32 v10, s6, v5
2380; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
2381; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
2382; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2383; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
2384; CGP-NEXT:    v_mul_lo_u32 v9, v7, v10
2385; CGP-NEXT:    v_mul_lo_u32 v11, v5, v8
2386; CGP-NEXT:    v_mul_hi_u32 v12, v5, v10
2387; CGP-NEXT:    v_mul_hi_u32 v10, v7, v10
2388; CGP-NEXT:    v_xor_b32_e32 v0, v0, v4
2389; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2390; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2391; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2392; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2393; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
2394; CGP-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
2395; CGP-NEXT:    v_mul_hi_u32 v11, v5, v8
2396; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
2397; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2398; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
2399; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2400; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2401; CGP-NEXT:    v_mul_hi_u32 v8, v7, v8
2402; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2403; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2404; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2405; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
2406; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
2407; CGP-NEXT:    v_addc_u32_e64 v9, s[4:5], v7, v8, vcc
2408; CGP-NEXT:    v_mul_lo_u32 v10, -1, v5
2409; CGP-NEXT:    v_mul_lo_u32 v11, s6, v9
2410; CGP-NEXT:    v_mul_hi_u32 v13, s6, v5
2411; CGP-NEXT:    v_mul_lo_u32 v12, s6, v5
2412; CGP-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
2413; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2414; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
2415; CGP-NEXT:    v_mul_lo_u32 v11, v9, v12
2416; CGP-NEXT:    v_mul_lo_u32 v13, v5, v10
2417; CGP-NEXT:    v_mul_hi_u32 v8, v5, v12
2418; CGP-NEXT:    v_mul_hi_u32 v12, v9, v12
2419; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
2420; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2421; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2422; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
2423; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
2424; CGP-NEXT:    v_mul_lo_u32 v11, v9, v10
2425; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v13, v8
2426; CGP-NEXT:    v_mul_hi_u32 v13, v5, v10
2427; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2428; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2429; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2430; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2431; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2432; CGP-NEXT:    v_mul_hi_u32 v9, v9, v10
2433; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
2434; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2435; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v11
2436; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
2437; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
2438; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
2439; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
2440; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
2441; CGP-NEXT:    v_xor_b32_e32 v1, v1, v4
2442; CGP-NEXT:    v_mul_lo_u32 v8, v3, v5
2443; CGP-NEXT:    v_mul_lo_u32 v9, v2, v7
2444; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
2445; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v4, vcc
2446; CGP-NEXT:    v_mul_hi_u32 v4, v2, v5
2447; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2448; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2449; CGP-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
2450; CGP-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
2451; CGP-NEXT:    v_mul_lo_u32 v8, v3, v7
2452; CGP-NEXT:    v_mul_hi_u32 v5, v3, v5
2453; CGP-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
2454; CGP-NEXT:    v_mul_hi_u32 v9, v2, v7
2455; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
2456; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2457; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
2458; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2459; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2460; CGP-NEXT:    v_mul_hi_u32 v7, v3, v7
2461; CGP-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
2462; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
2463; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
2464; CGP-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
2465; CGP-NEXT:    v_mul_lo_u32 v7, 0, v4
2466; CGP-NEXT:    v_mul_lo_u32 v8, s7, v5
2467; CGP-NEXT:    v_mul_hi_u32 v10, s7, v4
2468; CGP-NEXT:    v_mul_lo_u32 v9, s7, v4
2469; CGP-NEXT:    s_bfe_i32 s6, -1, 0x10000
2470; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2471; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2472; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v9
2473; CGP-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
2474; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
2475; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2476; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v2
2477; CGP-NEXT:    v_subrev_i32_e32 v2, vcc, s7, v2
2478; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2479; CGP-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2480; CGP-NEXT:    v_mov_b32_e32 v9, s6
2481; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v8
2482; CGP-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
2483; CGP-NEXT:    v_cndmask_b32_e64 v7, v9, v7, s[4:5]
2484; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
2485; CGP-NEXT:    s_bfe_i32 s4, -1, 0x10000
2486; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v2
2487; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
2488; CGP-NEXT:    v_mov_b32_e32 v10, s4
2489; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v3
2490; CGP-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
2491; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
2492; CGP-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2493; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2494; CGP-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
2495; CGP-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
2496; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2497; CGP-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
2498; CGP-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
2499; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
2500; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
2501; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
2502; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
2503; CGP-NEXT:    s_setpc_b64 s[30:31]
2504  %result = sdiv <2 x i64> %num, <i64 1235195, i64 1235195>
2505  ret <2 x i64> %result
2506}
2507
2508define i64 @v_sdiv_i64_pow2_shl_denom(i64 %x, i64 %y) {
2509; CHECK-LABEL: v_sdiv_i64_pow2_shl_denom:
2510; CHECK:       ; %bb.0:
2511; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2512; CHECK-NEXT:    s_mov_b64 s[4:5], 0x1000
2513; CHECK-NEXT:    v_lshl_b64 v[5:6], s[4:5], v2
2514; CHECK-NEXT:    v_mov_b32_e32 v4, v1
2515; CHECK-NEXT:    v_mov_b32_e32 v3, v0
2516; CHECK-NEXT:    v_or_b32_e32 v1, v4, v6
2517; CHECK-NEXT:    v_mov_b32_e32 v0, 0
2518; CHECK-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
2519; CHECK-NEXT:    ; implicit-def: $vgpr0_vgpr1
2520; CHECK-NEXT:    s_and_saveexec_b64 s[4:5], vcc
2521; CHECK-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
2522; CHECK-NEXT:    s_cbranch_execz BB7_2
2523; CHECK-NEXT:  ; %bb.1:
2524; CHECK-NEXT:    v_ashrrev_i32_e32 v0, 31, v6
2525; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v5, v0
2526; CHECK-NEXT:    v_addc_u32_e32 v2, vcc, v6, v0, vcc
2527; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v0
2528; CHECK-NEXT:    v_xor_b32_e32 v2, v2, v0
2529; CHECK-NEXT:    v_cvt_f32_u32_e32 v5, v1
2530; CHECK-NEXT:    v_cvt_f32_u32_e32 v6, v2
2531; CHECK-NEXT:    v_ashrrev_i32_e32 v7, 31, v4
2532; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
2533; CHECK-NEXT:    v_mac_f32_e32 v5, 0x4f800000, v6
2534; CHECK-NEXT:    v_rcp_iflag_f32_e32 v5, v5
2535; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, v4, v7, vcc
2536; CHECK-NEXT:    v_sub_i32_e32 v8, vcc, 0, v1
2537; CHECK-NEXT:    v_mul_f32_e32 v5, 0x5f7ffffc, v5
2538; CHECK-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v5
2539; CHECK-NEXT:    v_trunc_f32_e32 v6, v6
2540; CHECK-NEXT:    v_mac_f32_e32 v5, 0xcf800000, v6
2541; CHECK-NEXT:    v_cvt_u32_f32_e32 v5, v5
2542; CHECK-NEXT:    v_cvt_u32_f32_e32 v6, v6
2543; CHECK-NEXT:    v_subb_u32_e32 v9, vcc, 0, v2, vcc
2544; CHECK-NEXT:    v_mul_lo_u32 v10, v9, v5
2545; CHECK-NEXT:    v_mul_lo_u32 v11, v8, v6
2546; CHECK-NEXT:    v_mul_hi_u32 v13, v8, v5
2547; CHECK-NEXT:    v_mul_lo_u32 v12, v8, v5
2548; CHECK-NEXT:    v_xor_b32_e32 v3, v3, v7
2549; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
2550; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
2551; CHECK-NEXT:    v_mul_lo_u32 v11, v6, v12
2552; CHECK-NEXT:    v_mul_lo_u32 v13, v5, v10
2553; CHECK-NEXT:    v_mul_hi_u32 v14, v5, v12
2554; CHECK-NEXT:    v_mul_hi_u32 v12, v6, v12
2555; CHECK-NEXT:    v_xor_b32_e32 v4, v4, v7
2556; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v11, v13
2557; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2558; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v11, v14
2559; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2560; CHECK-NEXT:    v_mul_lo_u32 v14, v6, v10
2561; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
2562; CHECK-NEXT:    v_mul_hi_u32 v13, v5, v10
2563; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v14, v12
2564; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2565; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2566; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2567; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
2568; CHECK-NEXT:    v_mul_hi_u32 v10, v6, v10
2569; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2570; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2571; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
2572; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
2573; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
2574; CHECK-NEXT:    v_addc_u32_e64 v11, s[4:5], v6, v10, vcc
2575; CHECK-NEXT:    v_mul_lo_u32 v9, v9, v5
2576; CHECK-NEXT:    v_mul_lo_u32 v12, v8, v11
2577; CHECK-NEXT:    v_mul_lo_u32 v13, v8, v5
2578; CHECK-NEXT:    v_mul_hi_u32 v8, v8, v5
2579; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v10
2580; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
2581; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
2582; CHECK-NEXT:    v_mul_lo_u32 v9, v11, v13
2583; CHECK-NEXT:    v_mul_lo_u32 v12, v5, v8
2584; CHECK-NEXT:    v_mul_hi_u32 v10, v5, v13
2585; CHECK-NEXT:    v_mul_hi_u32 v13, v11, v13
2586; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
2587; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2588; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
2589; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
2590; CHECK-NEXT:    v_mul_lo_u32 v10, v11, v8
2591; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
2592; CHECK-NEXT:    v_mul_hi_u32 v12, v5, v8
2593; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
2594; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2595; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2596; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2597; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
2598; CHECK-NEXT:    v_mul_hi_u32 v8, v11, v8
2599; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v10, v9
2600; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
2601; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v10
2602; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
2603; CHECK-NEXT:    v_addc_u32_e32 v6, vcc, v6, v8, vcc
2604; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
2605; CHECK-NEXT:    v_addc_u32_e32 v6, vcc, 0, v6, vcc
2606; CHECK-NEXT:    v_mul_lo_u32 v8, v4, v5
2607; CHECK-NEXT:    v_mul_lo_u32 v9, v3, v6
2608; CHECK-NEXT:    v_mul_hi_u32 v10, v3, v5
2609; CHECK-NEXT:    v_mul_hi_u32 v5, v4, v5
2610; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2611; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2612; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
2613; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2614; CHECK-NEXT:    v_mul_lo_u32 v10, v4, v6
2615; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
2616; CHECK-NEXT:    v_mul_hi_u32 v9, v3, v6
2617; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
2618; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2619; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
2620; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2621; CHECK-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2622; CHECK-NEXT:    v_mul_hi_u32 v6, v4, v6
2623; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
2624; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2625; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
2626; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
2627; CHECK-NEXT:    v_mul_lo_u32 v8, v2, v5
2628; CHECK-NEXT:    v_mul_lo_u32 v9, v1, v6
2629; CHECK-NEXT:    v_mul_hi_u32 v11, v1, v5
2630; CHECK-NEXT:    v_mul_lo_u32 v10, v1, v5
2631; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2632; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
2633; CHECK-NEXT:    v_sub_i32_e32 v3, vcc, v3, v10
2634; CHECK-NEXT:    v_subb_u32_e64 v9, s[4:5], v4, v8, vcc
2635; CHECK-NEXT:    v_sub_i32_e64 v4, s[4:5], v4, v8
2636; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v2
2637; CHECK-NEXT:    v_subb_u32_e32 v4, vcc, v4, v2, vcc
2638; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[4:5]
2639; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v1
2640; CHECK-NEXT:    v_sub_i32_e32 v3, vcc, v3, v1
2641; CHECK-NEXT:    v_subbrev_u32_e32 v4, vcc, 0, v4, vcc
2642; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2643; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], v9, v2
2644; CHECK-NEXT:    v_add_i32_e32 v9, vcc, 1, v5
2645; CHECK-NEXT:    v_cndmask_b32_e64 v8, v8, v10, s[4:5]
2646; CHECK-NEXT:    v_addc_u32_e32 v10, vcc, 0, v6, vcc
2647; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v2
2648; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
2649; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v1
2650; CHECK-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
2651; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, v4, v2
2652; CHECK-NEXT:    v_cndmask_b32_e32 v1, v11, v1, vcc
2653; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v9
2654; CHECK-NEXT:    v_addc_u32_e32 v3, vcc, 0, v10, vcc
2655; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
2656; CHECK-NEXT:    v_cndmask_b32_e32 v1, v9, v2, vcc
2657; CHECK-NEXT:    v_cndmask_b32_e32 v2, v10, v3, vcc
2658; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
2659; CHECK-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
2660; CHECK-NEXT:    v_xor_b32_e32 v3, v7, v0
2661; CHECK-NEXT:    v_cndmask_b32_e32 v2, v6, v2, vcc
2662; CHECK-NEXT:    v_xor_b32_e32 v0, v1, v3
2663; CHECK-NEXT:    v_xor_b32_e32 v1, v2, v3
2664; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
2665; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
2666; CHECK-NEXT:    ; implicit-def: $vgpr5_vgpr6
2667; CHECK-NEXT:    ; implicit-def: $vgpr3
2668; CHECK-NEXT:  BB7_2: ; %Flow
2669; CHECK-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
2670; CHECK-NEXT:    s_xor_b64 exec, exec, s[6:7]
2671; CHECK-NEXT:    s_cbranch_execz BB7_4
2672; CHECK-NEXT:  ; %bb.3:
2673; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, v5
2674; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, 0, v5
2675; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
2676; CHECK-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
2677; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
2678; CHECK-NEXT:    v_mul_lo_u32 v1, v1, v0
2679; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
2680; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
2681; CHECK-NEXT:    v_mul_hi_u32 v0, v3, v0
2682; CHECK-NEXT:    v_mul_lo_u32 v1, v0, v5
2683; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
2684; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, v3, v1
2685; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
2686; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
2687; CHECK-NEXT:    v_sub_i32_e64 v2, s[4:5], v1, v5
2688; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
2689; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
2690; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
2691; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
2692; CHECK-NEXT:    v_mov_b32_e32 v1, 0
2693; CHECK-NEXT:  BB7_4:
2694; CHECK-NEXT:    s_or_b64 exec, exec, s[6:7]
2695; CHECK-NEXT:    s_setpc_b64 s[30:31]
2696  %shl.y = shl i64 4096, %y
2697  %r = sdiv i64 %x, %shl.y
2698  ret i64 %r
2699}
2700
2701define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) {
2702; GISEL-LABEL: v_sdiv_v2i64_pow2_shl_denom:
2703; GISEL:       ; %bb.0:
2704; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2705; GISEL-NEXT:    s_mov_b64 s[6:7], 0x1000
2706; GISEL-NEXT:    v_lshl_b64 v[7:8], s[6:7], v4
2707; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
2708; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v8
2709; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v7, v4
2710; GISEL-NEXT:    v_addc_u32_e32 v7, vcc, v8, v4, vcc
2711; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v4
2712; GISEL-NEXT:    v_xor_b32_e32 v7, v7, v4
2713; GISEL-NEXT:    v_cvt_f32_u32_e32 v8, v5
2714; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v7
2715; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v10
2716; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v10, vcc
2717; GISEL-NEXT:    v_mac_f32_e32 v8, 0x4f800000, v9
2718; GISEL-NEXT:    v_rcp_iflag_f32_e32 v8, v8
2719; GISEL-NEXT:    v_xor_b32_e32 v9, v0, v10
2720; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v5
2721; GISEL-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v8
2722; GISEL-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v0
2723; GISEL-NEXT:    v_trunc_f32_e32 v8, v8
2724; GISEL-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v8
2725; GISEL-NEXT:    v_cvt_u32_f32_e32 v0, v0
2726; GISEL-NEXT:    v_cvt_u32_f32_e32 v8, v8
2727; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v7, vcc
2728; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v0
2729; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v8
2730; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v0
2731; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2732; GISEL-NEXT:    v_xor_b32_e32 v17, v1, v10
2733; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2734; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
2735; GISEL-NEXT:    v_mul_lo_u32 v14, v8, v15
2736; GISEL-NEXT:    v_mul_lo_u32 v16, v0, v13
2737; GISEL-NEXT:    v_mul_hi_u32 v1, v0, v15
2738; GISEL-NEXT:    v_mul_hi_u32 v15, v8, v15
2739; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2740; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2741; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v14, v1
2742; GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2743; GISEL-NEXT:    v_mul_lo_u32 v14, v8, v13
2744; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v16, v1
2745; GISEL-NEXT:    v_mul_hi_u32 v16, v0, v13
2746; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
2747; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2748; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2749; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2750; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
2751; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v13
2752; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v14, v1
2753; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2754; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
2755; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2756; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
2757; GISEL-NEXT:    v_addc_u32_e64 v1, s[4:5], v8, v13, vcc
2758; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v0
2759; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v1
2760; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2761; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v0
2762; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v13
2763; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2764; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
2765; GISEL-NEXT:    v_mul_lo_u32 v12, v1, v15
2766; GISEL-NEXT:    v_mul_lo_u32 v14, v0, v11
2767; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v15
2768; GISEL-NEXT:    v_mul_hi_u32 v15, v1, v15
2769; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2770; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2771; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2772; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2773; GISEL-NEXT:    v_mul_lo_u32 v13, v1, v11
2774; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
2775; GISEL-NEXT:    v_mul_hi_u32 v14, v0, v11
2776; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
2777; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2778; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
2779; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2780; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
2781; GISEL-NEXT:    v_mul_hi_u32 v1, v1, v11
2782; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
2783; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2784; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v13
2785; GISEL-NEXT:    v_add_i32_e64 v1, s[4:5], v1, v11
2786; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v8, v1, vcc
2787; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v0, v12
2788; GISEL-NEXT:    v_addc_u32_e32 v11, vcc, 0, v1, vcc
2789; GISEL-NEXT:    v_mul_lo_u32 v12, v17, v8
2790; GISEL-NEXT:    v_mul_lo_u32 v13, v9, v11
2791; GISEL-NEXT:    v_lshl_b64 v[0:1], s[6:7], v6
2792; GISEL-NEXT:    v_mul_hi_u32 v6, v9, v8
2793; GISEL-NEXT:    v_mul_hi_u32 v8, v17, v8
2794; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2795; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2796; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v12, v6
2797; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
2798; GISEL-NEXT:    v_mul_lo_u32 v12, v17, v11
2799; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
2800; GISEL-NEXT:    v_mul_hi_u32 v13, v9, v11
2801; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v12, v8
2802; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2803; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v13
2804; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2805; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2806; GISEL-NEXT:    v_mul_hi_u32 v11, v17, v11
2807; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
2808; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2809; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v12, v8
2810; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
2811; GISEL-NEXT:    v_mul_lo_u32 v11, v7, v6
2812; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v8
2813; GISEL-NEXT:    v_mul_hi_u32 v14, v5, v6
2814; GISEL-NEXT:    v_mul_lo_u32 v13, v5, v6
2815; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
2816; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v14
2817; GISEL-NEXT:    v_sub_i32_e32 v9, vcc, v9, v13
2818; GISEL-NEXT:    v_subb_u32_e64 v12, s[4:5], v17, v11, vcc
2819; GISEL-NEXT:    v_sub_i32_e64 v11, s[4:5], v17, v11
2820; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v12, v7
2821; GISEL-NEXT:    v_subb_u32_e32 v11, vcc, v11, v7, vcc
2822; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, s[4:5]
2823; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v5
2824; GISEL-NEXT:    v_sub_i32_e32 v9, vcc, v9, v5
2825; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
2826; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v12, v7
2827; GISEL-NEXT:    v_subbrev_u32_e32 v11, vcc, 0, v11, vcc
2828; GISEL-NEXT:    v_cndmask_b32_e64 v12, v13, v14, s[4:5]
2829; GISEL-NEXT:    v_add_i32_e32 v13, vcc, 1, v6
2830; GISEL-NEXT:    v_addc_u32_e32 v14, vcc, 0, v8, vcc
2831; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v11, v7
2832; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
2833; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v9, v5
2834; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
2835; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v11, v7
2836; GISEL-NEXT:    v_cndmask_b32_e32 v5, v15, v5, vcc
2837; GISEL-NEXT:    v_add_i32_e32 v7, vcc, 1, v13
2838; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v14, vcc
2839; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
2840; GISEL-NEXT:    v_cndmask_b32_e32 v5, v13, v7, vcc
2841; GISEL-NEXT:    v_cndmask_b32_e32 v7, v14, v9, vcc
2842; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
2843; GISEL-NEXT:    v_cndmask_b32_e32 v5, v6, v5, vcc
2844; GISEL-NEXT:    v_cndmask_b32_e32 v6, v8, v7, vcc
2845; GISEL-NEXT:    v_xor_b32_e32 v7, v10, v4
2846; GISEL-NEXT:    v_ashrrev_i32_e32 v4, 31, v1
2847; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
2848; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v4, vcc
2849; GISEL-NEXT:    v_xor_b32_e32 v8, v0, v4
2850; GISEL-NEXT:    v_xor_b32_e32 v9, v1, v4
2851; GISEL-NEXT:    v_cvt_f32_u32_e32 v0, v8
2852; GISEL-NEXT:    v_cvt_f32_u32_e32 v1, v9
2853; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
2854; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v7
2855; GISEL-NEXT:    v_xor_b32_e32 v6, v6, v7
2856; GISEL-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
2857; GISEL-NEXT:    v_rcp_iflag_f32_e32 v0, v0
2858; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v2, v10
2859; GISEL-NEXT:    v_addc_u32_e32 v2, vcc, v3, v10, vcc
2860; GISEL-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
2861; GISEL-NEXT:    v_xor_b32_e32 v3, v1, v10
2862; GISEL-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
2863; GISEL-NEXT:    v_trunc_f32_e32 v1, v1
2864; GISEL-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
2865; GISEL-NEXT:    v_cvt_u32_f32_e32 v0, v0
2866; GISEL-NEXT:    v_cvt_u32_f32_e32 v1, v1
2867; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v8
2868; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v9, vcc
2869; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v0
2870; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v1
2871; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v0
2872; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2873; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v10
2874; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2875; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
2876; GISEL-NEXT:    v_mul_lo_u32 v14, v1, v15
2877; GISEL-NEXT:    v_mul_lo_u32 v16, v0, v13
2878; GISEL-NEXT:    v_mul_hi_u32 v17, v0, v15
2879; GISEL-NEXT:    v_mul_hi_u32 v15, v1, v15
2880; GISEL-NEXT:    v_xor_b32_e32 v4, v10, v4
2881; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2882; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2883; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
2884; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2885; GISEL-NEXT:    v_mul_lo_u32 v17, v1, v13
2886; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
2887; GISEL-NEXT:    v_mul_hi_u32 v16, v0, v13
2888; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
2889; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
2890; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
2891; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2892; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
2893; GISEL-NEXT:    v_mul_hi_u32 v13, v1, v13
2894; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
2895; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2896; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
2897; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
2898; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v14
2899; GISEL-NEXT:    v_addc_u32_e64 v14, s[4:5], v1, v13, vcc
2900; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v0
2901; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v14
2902; GISEL-NEXT:    v_mul_lo_u32 v16, v11, v0
2903; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v0
2904; GISEL-NEXT:    v_add_i32_e64 v1, s[4:5], v1, v13
2905; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
2906; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
2907; GISEL-NEXT:    v_mul_lo_u32 v12, v14, v16
2908; GISEL-NEXT:    v_mul_lo_u32 v15, v0, v11
2909; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v16
2910; GISEL-NEXT:    v_mul_hi_u32 v16, v14, v16
2911; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
2912; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2913; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2914; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2915; GISEL-NEXT:    v_mul_lo_u32 v13, v14, v11
2916; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v15, v12
2917; GISEL-NEXT:    v_mul_hi_u32 v15, v0, v11
2918; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
2919; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
2920; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
2921; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2922; GISEL-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
2923; GISEL-NEXT:    v_mul_hi_u32 v11, v14, v11
2924; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
2925; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2926; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v15, v13
2927; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2928; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v11, vcc
2929; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v0, v12
2930; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v1, vcc
2931; GISEL-NEXT:    v_mul_lo_u32 v13, v2, v11
2932; GISEL-NEXT:    v_mul_lo_u32 v14, v3, v12
2933; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v5, v7
2934; GISEL-NEXT:    v_mul_hi_u32 v5, v3, v11
2935; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v6, v7, vcc
2936; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v13, v14
2937; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2938; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
2939; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
2940; GISEL-NEXT:    v_mul_lo_u32 v6, v2, v12
2941; GISEL-NEXT:    v_mul_hi_u32 v11, v2, v11
2942; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
2943; GISEL-NEXT:    v_mul_hi_u32 v7, v3, v12
2944; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
2945; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2946; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
2947; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2948; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v11, v7
2949; GISEL-NEXT:    v_mul_hi_u32 v11, v2, v12
2950; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
2951; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
2952; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
2953; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v11, v6
2954; GISEL-NEXT:    v_mul_lo_u32 v7, v9, v5
2955; GISEL-NEXT:    v_mul_lo_u32 v11, v8, v6
2956; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v5
2957; GISEL-NEXT:    v_mul_lo_u32 v12, v8, v5
2958; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
2959; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v13
2960; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, v3, v12
2961; GISEL-NEXT:    v_subb_u32_e64 v11, s[4:5], v2, v7, vcc
2962; GISEL-NEXT:    v_sub_i32_e64 v2, s[4:5], v2, v7
2963; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v9
2964; GISEL-NEXT:    v_subb_u32_e32 v2, vcc, v2, v9, vcc
2965; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2966; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v8
2967; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, v3, v8
2968; GISEL-NEXT:    v_subbrev_u32_e32 v2, vcc, 0, v2, vcc
2969; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
2970; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v9
2971; GISEL-NEXT:    v_add_i32_e32 v11, vcc, 1, v5
2972; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v12, s[4:5]
2973; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v6, vcc
2974; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v9
2975; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
2976; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v8
2977; GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
2978; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v2, v9
2979; GISEL-NEXT:    v_cndmask_b32_e32 v2, v13, v3, vcc
2980; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
2981; GISEL-NEXT:    v_addc_u32_e32 v8, vcc, 0, v12, vcc
2982; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2983; GISEL-NEXT:    v_cndmask_b32_e32 v2, v11, v3, vcc
2984; GISEL-NEXT:    v_cndmask_b32_e32 v3, v12, v8, vcc
2985; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2986; GISEL-NEXT:    v_cndmask_b32_e32 v2, v5, v2, vcc
2987; GISEL-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
2988; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
2989; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
2990; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
2991; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
2992; GISEL-NEXT:    s_setpc_b64 s[30:31]
2993;
2994; CGP-LABEL: v_sdiv_v2i64_pow2_shl_denom:
2995; CGP:       ; %bb.0:
2996; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2997; CGP-NEXT:    s_mov_b64 s[4:5], 0x1000
2998; CGP-NEXT:    v_mov_b32_e32 v5, v2
2999; CGP-NEXT:    v_mov_b32_e32 v7, v3
3000; CGP-NEXT:    v_lshl_b64 v[2:3], s[4:5], v4
3001; CGP-NEXT:    v_mov_b32_e32 v9, v1
3002; CGP-NEXT:    v_mov_b32_e32 v8, v0
3003; CGP-NEXT:    v_or_b32_e32 v1, v9, v3
3004; CGP-NEXT:    v_mov_b32_e32 v0, 0
3005; CGP-NEXT:    v_lshl_b64 v[10:11], s[4:5], v6
3006; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
3007; CGP-NEXT:    ; implicit-def: $vgpr0_vgpr1
3008; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
3009; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
3010; CGP-NEXT:    s_cbranch_execz BB8_2
3011; CGP-NEXT:  ; %bb.1:
3012; CGP-NEXT:    v_ashrrev_i32_e32 v0, 31, v3
3013; CGP-NEXT:    v_add_i32_e32 v1, vcc, v2, v0
3014; CGP-NEXT:    v_addc_u32_e32 v2, vcc, v3, v0, vcc
3015; CGP-NEXT:    v_xor_b32_e32 v1, v1, v0
3016; CGP-NEXT:    v_xor_b32_e32 v2, v2, v0
3017; CGP-NEXT:    v_cvt_f32_u32_e32 v3, v1
3018; CGP-NEXT:    v_cvt_f32_u32_e32 v4, v2
3019; CGP-NEXT:    v_ashrrev_i32_e32 v6, 31, v9
3020; CGP-NEXT:    v_mac_f32_e32 v3, 0x4f800000, v4
3021; CGP-NEXT:    v_rcp_iflag_f32_e32 v3, v3
3022; CGP-NEXT:    v_add_i32_e32 v4, vcc, v8, v6
3023; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v9, v6, vcc
3024; CGP-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
3025; CGP-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v3
3026; CGP-NEXT:    v_trunc_f32_e32 v9, v9
3027; CGP-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v9
3028; CGP-NEXT:    v_cvt_u32_f32_e32 v3, v3
3029; CGP-NEXT:    v_cvt_u32_f32_e32 v9, v9
3030; CGP-NEXT:    v_sub_i32_e32 v12, vcc, 0, v1
3031; CGP-NEXT:    v_subb_u32_e32 v13, vcc, 0, v2, vcc
3032; CGP-NEXT:    v_mul_lo_u32 v14, v13, v3
3033; CGP-NEXT:    v_mul_lo_u32 v15, v12, v9
3034; CGP-NEXT:    v_mul_hi_u32 v17, v12, v3
3035; CGP-NEXT:    v_mul_lo_u32 v16, v12, v3
3036; CGP-NEXT:    v_xor_b32_e32 v4, v4, v6
3037; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
3038; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
3039; CGP-NEXT:    v_mul_lo_u32 v15, v9, v16
3040; CGP-NEXT:    v_mul_lo_u32 v17, v3, v14
3041; CGP-NEXT:    v_mul_hi_u32 v18, v3, v16
3042; CGP-NEXT:    v_mul_hi_u32 v16, v9, v16
3043; CGP-NEXT:    v_xor_b32_e32 v8, v8, v6
3044; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
3045; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
3046; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
3047; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3048; CGP-NEXT:    v_mul_lo_u32 v18, v9, v14
3049; CGP-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
3050; CGP-NEXT:    v_mul_hi_u32 v17, v3, v14
3051; CGP-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
3052; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
3053; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
3054; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
3055; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
3056; CGP-NEXT:    v_mul_hi_u32 v14, v9, v14
3057; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
3058; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
3059; CGP-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
3060; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
3061; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v15
3062; CGP-NEXT:    v_addc_u32_e64 v15, s[4:5], v9, v14, vcc
3063; CGP-NEXT:    v_mul_lo_u32 v13, v13, v3
3064; CGP-NEXT:    v_mul_lo_u32 v16, v12, v15
3065; CGP-NEXT:    v_mul_lo_u32 v17, v12, v3
3066; CGP-NEXT:    v_mul_hi_u32 v12, v12, v3
3067; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v14
3068; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
3069; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
3070; CGP-NEXT:    v_mul_lo_u32 v13, v15, v17
3071; CGP-NEXT:    v_mul_lo_u32 v16, v3, v12
3072; CGP-NEXT:    v_mul_hi_u32 v14, v3, v17
3073; CGP-NEXT:    v_mul_hi_u32 v17, v15, v17
3074; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
3075; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
3076; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
3077; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
3078; CGP-NEXT:    v_mul_lo_u32 v14, v15, v12
3079; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
3080; CGP-NEXT:    v_mul_hi_u32 v16, v3, v12
3081; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
3082; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
3083; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
3084; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
3085; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
3086; CGP-NEXT:    v_mul_hi_u32 v12, v15, v12
3087; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
3088; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
3089; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
3090; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
3091; CGP-NEXT:    v_addc_u32_e32 v9, vcc, v9, v12, vcc
3092; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v13
3093; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
3094; CGP-NEXT:    v_mul_lo_u32 v12, v8, v3
3095; CGP-NEXT:    v_mul_lo_u32 v13, v4, v9
3096; CGP-NEXT:    v_mul_hi_u32 v14, v4, v3
3097; CGP-NEXT:    v_mul_hi_u32 v3, v8, v3
3098; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
3099; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
3100; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
3101; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3102; CGP-NEXT:    v_mul_lo_u32 v14, v8, v9
3103; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
3104; CGP-NEXT:    v_mul_hi_u32 v13, v4, v9
3105; CGP-NEXT:    v_add_i32_e32 v3, vcc, v14, v3
3106; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3107; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v13
3108; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
3109; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
3110; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
3111; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v12
3112; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3113; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
3114; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
3115; CGP-NEXT:    v_mul_lo_u32 v12, v2, v3
3116; CGP-NEXT:    v_mul_lo_u32 v13, v1, v9
3117; CGP-NEXT:    v_mul_hi_u32 v15, v1, v3
3118; CGP-NEXT:    v_mul_lo_u32 v14, v1, v3
3119; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
3120; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
3121; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v4, v14
3122; CGP-NEXT:    v_subb_u32_e64 v13, s[4:5], v8, v12, vcc
3123; CGP-NEXT:    v_sub_i32_e64 v8, s[4:5], v8, v12
3124; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v2
3125; CGP-NEXT:    v_subb_u32_e32 v8, vcc, v8, v2, vcc
3126; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
3127; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v4, v1
3128; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v4, v1
3129; CGP-NEXT:    v_subbrev_u32_e32 v8, vcc, 0, v8, vcc
3130; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
3131; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v2
3132; CGP-NEXT:    v_add_i32_e32 v13, vcc, 1, v3
3133; CGP-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
3134; CGP-NEXT:    v_addc_u32_e32 v14, vcc, 0, v9, vcc
3135; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v8, v2
3136; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
3137; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v1
3138; CGP-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
3139; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v8, v2
3140; CGP-NEXT:    v_cndmask_b32_e32 v1, v15, v1, vcc
3141; CGP-NEXT:    v_add_i32_e32 v2, vcc, 1, v13
3142; CGP-NEXT:    v_addc_u32_e32 v4, vcc, 0, v14, vcc
3143; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
3144; CGP-NEXT:    v_cndmask_b32_e32 v1, v13, v2, vcc
3145; CGP-NEXT:    v_cndmask_b32_e32 v2, v14, v4, vcc
3146; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
3147; CGP-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
3148; CGP-NEXT:    v_xor_b32_e32 v3, v6, v0
3149; CGP-NEXT:    v_cndmask_b32_e32 v2, v9, v2, vcc
3150; CGP-NEXT:    v_xor_b32_e32 v0, v1, v3
3151; CGP-NEXT:    v_xor_b32_e32 v1, v2, v3
3152; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
3153; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
3154; CGP-NEXT:    ; implicit-def: $vgpr2_vgpr3
3155; CGP-NEXT:    ; implicit-def: $vgpr8
3156; CGP-NEXT:  BB8_2: ; %Flow2
3157; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
3158; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
3159; CGP-NEXT:    s_cbranch_execz BB8_4
3160; CGP-NEXT:  ; %bb.3:
3161; CGP-NEXT:    v_cvt_f32_u32_e32 v0, v2
3162; CGP-NEXT:    v_sub_i32_e32 v1, vcc, 0, v2
3163; CGP-NEXT:    v_rcp_iflag_f32_e32 v0, v0
3164; CGP-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
3165; CGP-NEXT:    v_cvt_u32_f32_e32 v0, v0
3166; CGP-NEXT:    v_mul_lo_u32 v1, v1, v0
3167; CGP-NEXT:    v_mul_hi_u32 v1, v0, v1
3168; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
3169; CGP-NEXT:    v_mul_hi_u32 v0, v8, v0
3170; CGP-NEXT:    v_mul_lo_u32 v1, v0, v2
3171; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
3172; CGP-NEXT:    v_sub_i32_e32 v1, vcc, v8, v1
3173; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
3174; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
3175; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v1, v2
3176; CGP-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc
3177; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
3178; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v2
3179; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
3180; CGP-NEXT:    v_mov_b32_e32 v1, 0
3181; CGP-NEXT:  BB8_4:
3182; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
3183; CGP-NEXT:    v_or_b32_e32 v3, v7, v11
3184; CGP-NEXT:    v_mov_b32_e32 v2, 0
3185; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[2:3]
3186; CGP-NEXT:    ; implicit-def: $vgpr2_vgpr3
3187; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
3188; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
3189; CGP-NEXT:    s_cbranch_execz BB8_6
3190; CGP-NEXT:  ; %bb.5:
3191; CGP-NEXT:    v_ashrrev_i32_e32 v2, 31, v11
3192; CGP-NEXT:    v_add_i32_e32 v3, vcc, v10, v2
3193; CGP-NEXT:    v_addc_u32_e32 v4, vcc, v11, v2, vcc
3194; CGP-NEXT:    v_xor_b32_e32 v3, v3, v2
3195; CGP-NEXT:    v_xor_b32_e32 v4, v4, v2
3196; CGP-NEXT:    v_cvt_f32_u32_e32 v6, v3
3197; CGP-NEXT:    v_cvt_f32_u32_e32 v8, v4
3198; CGP-NEXT:    v_ashrrev_i32_e32 v9, 31, v7
3199; CGP-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
3200; CGP-NEXT:    v_mac_f32_e32 v6, 0x4f800000, v8
3201; CGP-NEXT:    v_rcp_iflag_f32_e32 v6, v6
3202; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
3203; CGP-NEXT:    v_sub_i32_e32 v10, vcc, 0, v3
3204; CGP-NEXT:    v_mul_f32_e32 v6, 0x5f7ffffc, v6
3205; CGP-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v6
3206; CGP-NEXT:    v_trunc_f32_e32 v8, v8
3207; CGP-NEXT:    v_mac_f32_e32 v6, 0xcf800000, v8
3208; CGP-NEXT:    v_cvt_u32_f32_e32 v6, v6
3209; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
3210; CGP-NEXT:    v_subb_u32_e32 v11, vcc, 0, v4, vcc
3211; CGP-NEXT:    v_mul_lo_u32 v12, v11, v6
3212; CGP-NEXT:    v_mul_lo_u32 v13, v10, v8
3213; CGP-NEXT:    v_mul_hi_u32 v15, v10, v6
3214; CGP-NEXT:    v_mul_lo_u32 v14, v10, v6
3215; CGP-NEXT:    v_xor_b32_e32 v5, v5, v9
3216; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
3217; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
3218; CGP-NEXT:    v_mul_lo_u32 v13, v8, v14
3219; CGP-NEXT:    v_mul_lo_u32 v15, v6, v12
3220; CGP-NEXT:    v_mul_hi_u32 v16, v6, v14
3221; CGP-NEXT:    v_mul_hi_u32 v14, v8, v14
3222; CGP-NEXT:    v_xor_b32_e32 v7, v7, v9
3223; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
3224; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3225; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
3226; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
3227; CGP-NEXT:    v_mul_lo_u32 v16, v8, v12
3228; CGP-NEXT:    v_add_i32_e32 v13, vcc, v15, v13
3229; CGP-NEXT:    v_mul_hi_u32 v15, v6, v12
3230; CGP-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
3231; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
3232; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
3233; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3234; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
3235; CGP-NEXT:    v_mul_hi_u32 v12, v8, v12
3236; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
3237; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3238; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
3239; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
3240; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v13
3241; CGP-NEXT:    v_addc_u32_e64 v13, s[4:5], v8, v12, vcc
3242; CGP-NEXT:    v_mul_lo_u32 v11, v11, v6
3243; CGP-NEXT:    v_mul_lo_u32 v14, v10, v13
3244; CGP-NEXT:    v_mul_lo_u32 v15, v10, v6
3245; CGP-NEXT:    v_mul_hi_u32 v10, v10, v6
3246; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v12
3247; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
3248; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v11, v10
3249; CGP-NEXT:    v_mul_lo_u32 v11, v13, v15
3250; CGP-NEXT:    v_mul_lo_u32 v14, v6, v10
3251; CGP-NEXT:    v_mul_hi_u32 v12, v6, v15
3252; CGP-NEXT:    v_mul_hi_u32 v15, v13, v15
3253; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
3254; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
3255; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
3256; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3257; CGP-NEXT:    v_mul_lo_u32 v12, v13, v10
3258; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v11
3259; CGP-NEXT:    v_mul_hi_u32 v14, v6, v10
3260; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
3261; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
3262; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
3263; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
3264; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
3265; CGP-NEXT:    v_mul_hi_u32 v10, v13, v10
3266; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
3267; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
3268; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
3269; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
3270; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v8, v10, vcc
3271; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
3272; CGP-NEXT:    v_addc_u32_e32 v8, vcc, 0, v8, vcc
3273; CGP-NEXT:    v_mul_lo_u32 v10, v7, v6
3274; CGP-NEXT:    v_mul_lo_u32 v11, v5, v8
3275; CGP-NEXT:    v_mul_hi_u32 v12, v5, v6
3276; CGP-NEXT:    v_mul_hi_u32 v6, v7, v6
3277; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
3278; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3279; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3280; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3281; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
3282; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3283; CGP-NEXT:    v_mul_hi_u32 v11, v5, v8
3284; CGP-NEXT:    v_add_i32_e32 v6, vcc, v12, v6
3285; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3286; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
3287; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3288; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
3289; CGP-NEXT:    v_mul_hi_u32 v8, v7, v8
3290; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v10
3291; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3292; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3293; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
3294; CGP-NEXT:    v_mul_lo_u32 v10, v4, v6
3295; CGP-NEXT:    v_mul_lo_u32 v11, v3, v8
3296; CGP-NEXT:    v_mul_hi_u32 v13, v3, v6
3297; CGP-NEXT:    v_mul_lo_u32 v12, v3, v6
3298; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
3299; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
3300; CGP-NEXT:    v_sub_i32_e32 v5, vcc, v5, v12
3301; CGP-NEXT:    v_subb_u32_e64 v11, s[4:5], v7, v10, vcc
3302; CGP-NEXT:    v_sub_i32_e64 v7, s[4:5], v7, v10
3303; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v4
3304; CGP-NEXT:    v_subb_u32_e32 v7, vcc, v7, v4, vcc
3305; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
3306; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v5, v3
3307; CGP-NEXT:    v_sub_i32_e32 v5, vcc, v5, v3
3308; CGP-NEXT:    v_subbrev_u32_e32 v7, vcc, 0, v7, vcc
3309; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
3310; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v4
3311; CGP-NEXT:    v_add_i32_e32 v11, vcc, 1, v6
3312; CGP-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
3313; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v8, vcc
3314; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v4
3315; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
3316; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v3
3317; CGP-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
3318; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v7, v4
3319; CGP-NEXT:    v_cndmask_b32_e32 v3, v13, v3, vcc
3320; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v11
3321; CGP-NEXT:    v_addc_u32_e32 v5, vcc, 0, v12, vcc
3322; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
3323; CGP-NEXT:    v_cndmask_b32_e32 v3, v11, v4, vcc
3324; CGP-NEXT:    v_cndmask_b32_e32 v4, v12, v5, vcc
3325; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v10
3326; CGP-NEXT:    v_cndmask_b32_e32 v3, v6, v3, vcc
3327; CGP-NEXT:    v_xor_b32_e32 v5, v9, v2
3328; CGP-NEXT:    v_cndmask_b32_e32 v4, v8, v4, vcc
3329; CGP-NEXT:    v_xor_b32_e32 v2, v3, v5
3330; CGP-NEXT:    v_xor_b32_e32 v3, v4, v5
3331; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v5
3332; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v5, vcc
3333; CGP-NEXT:    ; implicit-def: $vgpr10_vgpr11
3334; CGP-NEXT:    ; implicit-def: $vgpr5
3335; CGP-NEXT:  BB8_6: ; %Flow
3336; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
3337; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
3338; CGP-NEXT:    s_cbranch_execz BB8_8
3339; CGP-NEXT:  ; %bb.7:
3340; CGP-NEXT:    v_cvt_f32_u32_e32 v2, v10
3341; CGP-NEXT:    v_sub_i32_e32 v3, vcc, 0, v10
3342; CGP-NEXT:    v_rcp_iflag_f32_e32 v2, v2
3343; CGP-NEXT:    v_mul_f32_e32 v2, 0x4f7ffffe, v2
3344; CGP-NEXT:    v_cvt_u32_f32_e32 v2, v2
3345; CGP-NEXT:    v_mul_lo_u32 v3, v3, v2
3346; CGP-NEXT:    v_mul_hi_u32 v3, v2, v3
3347; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
3348; CGP-NEXT:    v_mul_hi_u32 v2, v5, v2
3349; CGP-NEXT:    v_mul_lo_u32 v3, v2, v10
3350; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
3351; CGP-NEXT:    v_sub_i32_e32 v3, vcc, v5, v3
3352; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v10
3353; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3354; CGP-NEXT:    v_sub_i32_e64 v4, s[4:5], v3, v10
3355; CGP-NEXT:    v_cndmask_b32_e32 v3, v3, v4, vcc
3356; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
3357; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v10
3358; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3359; CGP-NEXT:    v_mov_b32_e32 v3, 0
3360; CGP-NEXT:  BB8_8:
3361; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
3362; CGP-NEXT:    s_setpc_b64 s[30:31]
3363  %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y
3364  %r = sdiv <2 x i64> %x, %shl.y
3365  ret <2 x i64> %r
3366}
3367
3368define i64 @v_sdiv_i64_24bit(i64 %num, i64 %den) {
3369; GISEL-LABEL: v_sdiv_i64_24bit:
3370; GISEL:       ; %bb.0:
3371; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3372; GISEL-NEXT:    s_mov_b32 s4, 0xffffff
3373; GISEL-NEXT:    v_and_b32_e32 v1, s4, v2
3374; GISEL-NEXT:    v_cvt_f32_u32_e32 v2, v1
3375; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
3376; GISEL-NEXT:    v_and_b32_e32 v0, s4, v0
3377; GISEL-NEXT:    v_rcp_iflag_f32_e32 v2, v2
3378; GISEL-NEXT:    v_mul_f32_e32 v2, 0x4f7ffffe, v2
3379; GISEL-NEXT:    v_cvt_u32_f32_e32 v2, v2
3380; GISEL-NEXT:    v_mul_lo_u32 v3, v3, v2
3381; GISEL-NEXT:    v_mul_hi_u32 v3, v2, v3
3382; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
3383; GISEL-NEXT:    v_mul_hi_u32 v2, v0, v2
3384; GISEL-NEXT:    v_mul_lo_u32 v3, v2, v1
3385; GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
3386; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
3387; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
3388; GISEL-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3389; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v0, v1
3390; GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
3391; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v2
3392; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
3393; GISEL-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc
3394; GISEL-NEXT:    v_mov_b32_e32 v1, 0
3395; GISEL-NEXT:    s_setpc_b64 s[30:31]
3396;
3397; CGP-LABEL: v_sdiv_i64_24bit:
3398; CGP:       ; %bb.0:
3399; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3400; CGP-NEXT:    s_mov_b32 s4, 0xffffff
3401; CGP-NEXT:    v_and_b32_e32 v1, s4, v2
3402; CGP-NEXT:    v_cvt_f32_i32_e32 v1, v1
3403; CGP-NEXT:    v_and_b32_e32 v0, s4, v0
3404; CGP-NEXT:    v_cvt_f32_i32_e32 v0, v0
3405; CGP-NEXT:    v_rcp_f32_e32 v2, v1
3406; CGP-NEXT:    v_mul_f32_e32 v2, v0, v2
3407; CGP-NEXT:    v_trunc_f32_e32 v2, v2
3408; CGP-NEXT:    v_mad_f32 v0, -v2, v1, v0
3409; CGP-NEXT:    v_cvt_i32_f32_e32 v2, v2
3410; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v0|, |v1|
3411; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
3412; CGP-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
3413; CGP-NEXT:    v_bfe_i32 v0, v0, 0, 25
3414; CGP-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
3415; CGP-NEXT:    s_setpc_b64 s[30:31]
3416  %num.mask = and i64 %num, 16777215
3417  %den.mask = and i64 %den, 16777215
3418  %result = sdiv i64 %num.mask, %den.mask
3419  ret i64 %result
3420}
3421
3422define <2 x i64> @v_sdiv_v2i64_24bit(<2 x i64> %num, <2 x i64> %den) {
3423; GISEL-LABEL: v_sdiv_v2i64_24bit:
3424; GISEL:       ; %bb.0:
3425; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3426; GISEL-NEXT:    s_mov_b32 s6, 0xffffff
3427; GISEL-NEXT:    v_and_b32_e32 v1, s6, v4
3428; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 0, v1
3429; GISEL-NEXT:    v_addc_u32_e64 v3, s[4:5], 0, 0, vcc
3430; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, v1
3431; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, v3
3432; GISEL-NEXT:    v_sub_i32_e32 v7, vcc, 0, v1
3433; GISEL-NEXT:    v_subb_u32_e32 v8, vcc, 0, v3, vcc
3434; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
3435; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
3436; GISEL-NEXT:    v_and_b32_e32 v5, s6, v0
3437; GISEL-NEXT:    v_and_b32_e32 v0, s6, v2
3438; GISEL-NEXT:    v_and_b32_e32 v6, s6, v6
3439; GISEL-NEXT:    v_mul_f32_e32 v2, 0x5f7ffffc, v4
3440; GISEL-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v2
3441; GISEL-NEXT:    v_trunc_f32_e32 v4, v4
3442; GISEL-NEXT:    v_mac_f32_e32 v2, 0xcf800000, v4
3443; GISEL-NEXT:    v_cvt_u32_f32_e32 v2, v2
3444; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
3445; GISEL-NEXT:    v_mul_lo_u32 v9, v8, v2
3446; GISEL-NEXT:    v_mul_lo_u32 v10, v7, v4
3447; GISEL-NEXT:    v_mul_hi_u32 v12, v7, v2
3448; GISEL-NEXT:    v_mul_lo_u32 v11, v7, v2
3449; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
3450; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
3451; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v11
3452; GISEL-NEXT:    v_mul_lo_u32 v12, v2, v9
3453; GISEL-NEXT:    v_mul_hi_u32 v14, v2, v11
3454; GISEL-NEXT:    v_add_i32_e32 v5, vcc, 0, v5
3455; GISEL-NEXT:    v_addc_u32_e64 v13, s[4:5], 0, 0, vcc
3456; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3457; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3458; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v14
3459; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3460; GISEL-NEXT:    v_mul_lo_u32 v14, v4, v9
3461; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v11
3462; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
3463; GISEL-NEXT:    v_mul_hi_u32 v12, v2, v9
3464; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v14, v11
3465; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3466; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
3467; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3468; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v14, v12
3469; GISEL-NEXT:    v_mul_hi_u32 v9, v4, v9
3470; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3471; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3472; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
3473; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
3474; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v10
3475; GISEL-NEXT:    v_addc_u32_e64 v10, s[4:5], v4, v9, vcc
3476; GISEL-NEXT:    v_mul_lo_u32 v8, v8, v2
3477; GISEL-NEXT:    v_mul_lo_u32 v11, v7, v10
3478; GISEL-NEXT:    v_mul_lo_u32 v12, v7, v2
3479; GISEL-NEXT:    v_mul_hi_u32 v7, v7, v2
3480; GISEL-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v9
3481; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3482; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v8, v7
3483; GISEL-NEXT:    v_mul_lo_u32 v8, v10, v12
3484; GISEL-NEXT:    v_mul_lo_u32 v11, v2, v7
3485; GISEL-NEXT:    v_mul_hi_u32 v9, v2, v12
3486; GISEL-NEXT:    v_mul_hi_u32 v12, v10, v12
3487; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3488; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3489; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
3490; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
3491; GISEL-NEXT:    v_mul_lo_u32 v9, v10, v7
3492; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
3493; GISEL-NEXT:    v_mul_hi_u32 v11, v2, v7
3494; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
3495; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
3496; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v11
3497; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3498; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
3499; GISEL-NEXT:    v_mul_hi_u32 v7, v10, v7
3500; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
3501; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
3502; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v9
3503; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v9
3504; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, v4, v7, vcc
3505; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
3506; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
3507; GISEL-NEXT:    v_mul_lo_u32 v7, v13, v2
3508; GISEL-NEXT:    v_mul_lo_u32 v8, v5, v4
3509; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v2
3510; GISEL-NEXT:    v_mul_hi_u32 v2, v13, v2
3511; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
3512; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3513; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
3514; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
3515; GISEL-NEXT:    v_mul_lo_u32 v9, v13, v4
3516; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
3517; GISEL-NEXT:    v_mul_hi_u32 v8, v5, v4
3518; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v9, v2
3519; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
3520; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
3521; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3522; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
3523; GISEL-NEXT:    v_mul_hi_u32 v4, v13, v4
3524; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v7
3525; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
3526; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
3527; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
3528; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v2
3529; GISEL-NEXT:    v_mul_lo_u32 v8, v1, v4
3530; GISEL-NEXT:    v_mul_hi_u32 v10, v1, v2
3531; GISEL-NEXT:    v_mul_lo_u32 v9, v1, v2
3532; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
3533; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
3534; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, v5, v9
3535; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v13, v7, vcc
3536; GISEL-NEXT:    v_sub_i32_e64 v7, s[4:5], v13, v7
3537; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v3
3538; GISEL-NEXT:    v_subb_u32_e32 v7, vcc, v7, v3, vcc
3539; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
3540; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v5, v1
3541; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, v5, v1
3542; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
3543; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v8, v3
3544; GISEL-NEXT:    v_subbrev_u32_e32 v7, vcc, 0, v7, vcc
3545; GISEL-NEXT:    v_cndmask_b32_e64 v8, v9, v10, s[4:5]
3546; GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v2
3547; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v4, vcc
3548; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v3
3549; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
3550; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v1
3551; GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
3552; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v7, v3
3553; GISEL-NEXT:    v_cndmask_b32_e32 v1, v11, v1, vcc
3554; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v9
3555; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v10, vcc
3556; GISEL-NEXT:    v_add_i32_e32 v6, vcc, 0, v6
3557; GISEL-NEXT:    v_addc_u32_e64 v7, s[4:5], 0, 0, vcc
3558; GISEL-NEXT:    v_cvt_f32_u32_e32 v11, v6
3559; GISEL-NEXT:    v_cvt_f32_u32_e32 v12, v7
3560; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
3561; GISEL-NEXT:    v_cndmask_b32_e32 v1, v9, v3, vcc
3562; GISEL-NEXT:    v_cndmask_b32_e32 v3, v10, v5, vcc
3563; GISEL-NEXT:    v_mac_f32_e32 v11, 0x4f800000, v12
3564; GISEL-NEXT:    v_rcp_iflag_f32_e32 v5, v11
3565; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
3566; GISEL-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc
3567; GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v3, vcc
3568; GISEL-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v5
3569; GISEL-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v3
3570; GISEL-NEXT:    v_trunc_f32_e32 v4, v4
3571; GISEL-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
3572; GISEL-NEXT:    v_cvt_u32_f32_e32 v3, v3
3573; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
3574; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, 0, v6
3575; GISEL-NEXT:    v_subb_u32_e32 v8, vcc, 0, v7, vcc
3576; GISEL-NEXT:    v_mul_lo_u32 v9, v8, v3
3577; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v4
3578; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v3
3579; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v3
3580; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
3581; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
3582; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v11
3583; GISEL-NEXT:    v_mul_lo_u32 v12, v3, v9
3584; GISEL-NEXT:    v_add_i32_e32 v13, vcc, 0, v0
3585; GISEL-NEXT:    v_mul_hi_u32 v0, v3, v11
3586; GISEL-NEXT:    v_addc_u32_e64 v14, s[4:5], 0, 0, vcc
3587; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3588; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3589; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v10, v0
3590; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
3591; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v9
3592; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v11
3593; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v12, v0
3594; GISEL-NEXT:    v_mul_hi_u32 v12, v3, v9
3595; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
3596; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3597; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3598; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3599; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
3600; GISEL-NEXT:    v_mul_hi_u32 v9, v4, v9
3601; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v10, v0
3602; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3603; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3604; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
3605; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
3606; GISEL-NEXT:    v_addc_u32_e64 v3, s[4:5], v4, v9, vcc
3607; GISEL-NEXT:    v_mul_lo_u32 v8, v8, v0
3608; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v3
3609; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v0
3610; GISEL-NEXT:    v_mul_hi_u32 v5, v5, v0
3611; GISEL-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v9
3612; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
3613; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
3614; GISEL-NEXT:    v_mul_lo_u32 v8, v3, v11
3615; GISEL-NEXT:    v_mul_lo_u32 v10, v0, v5
3616; GISEL-NEXT:    v_mul_hi_u32 v9, v0, v11
3617; GISEL-NEXT:    v_mul_hi_u32 v11, v3, v11
3618; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
3619; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
3620; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
3621; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
3622; GISEL-NEXT:    v_mul_lo_u32 v9, v3, v5
3623; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v10, v8
3624; GISEL-NEXT:    v_mul_hi_u32 v10, v0, v5
3625; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v11
3626; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3627; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
3628; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
3629; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v11, v10
3630; GISEL-NEXT:    v_mul_hi_u32 v3, v3, v5
3631; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
3632; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
3633; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v10, v9
3634; GISEL-NEXT:    v_add_i32_e64 v3, s[4:5], v3, v5
3635; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v4, v3, vcc
3636; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v0, v8
3637; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
3638; GISEL-NEXT:    v_mul_lo_u32 v5, v14, v4
3639; GISEL-NEXT:    v_mul_lo_u32 v8, v13, v3
3640; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, 0, v1
3641; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v2, vcc
3642; GISEL-NEXT:    v_mul_hi_u32 v2, v13, v4
3643; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
3644; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3645; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
3646; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3647; GISEL-NEXT:    v_mul_lo_u32 v5, v14, v3
3648; GISEL-NEXT:    v_mul_hi_u32 v4, v14, v4
3649; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v8, v2
3650; GISEL-NEXT:    v_mul_hi_u32 v8, v13, v3
3651; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
3652; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
3653; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
3654; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3655; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
3656; GISEL-NEXT:    v_mul_hi_u32 v3, v14, v3
3657; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
3658; GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
3659; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
3660; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
3661; GISEL-NEXT:    v_mul_lo_u32 v4, v7, v2
3662; GISEL-NEXT:    v_mul_lo_u32 v5, v6, v3
3663; GISEL-NEXT:    v_mul_hi_u32 v9, v6, v2
3664; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v2
3665; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
3666; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
3667; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, v13, v8
3668; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v14, v4, vcc
3669; GISEL-NEXT:    v_sub_i32_e64 v4, s[4:5], v14, v4
3670; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v7
3671; GISEL-NEXT:    v_subb_u32_e32 v4, vcc, v4, v7, vcc
3672; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
3673; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v5, v6
3674; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, v5, v6
3675; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
3676; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v8, v7
3677; GISEL-NEXT:    v_subbrev_u32_e32 v4, vcc, 0, v4, vcc
3678; GISEL-NEXT:    v_cndmask_b32_e64 v8, v9, v10, s[4:5]
3679; GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v2
3680; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v3, vcc
3681; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v7
3682; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
3683; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v6
3684; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
3685; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v4, v7
3686; GISEL-NEXT:    v_cndmask_b32_e32 v4, v11, v5, vcc
3687; GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v9
3688; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v10, vcc
3689; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v4
3690; GISEL-NEXT:    v_cndmask_b32_e32 v4, v9, v5, vcc
3691; GISEL-NEXT:    v_cndmask_b32_e32 v5, v10, v6, vcc
3692; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
3693; GISEL-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3694; GISEL-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
3695; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, 0, v2
3696; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
3697; GISEL-NEXT:    s_setpc_b64 s[30:31]
3698;
3699; CGP-LABEL: v_sdiv_v2i64_24bit:
3700; CGP:       ; %bb.0:
3701; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3702; CGP-NEXT:    s_mov_b32 s4, 0xffffff
3703; CGP-NEXT:    v_and_b32_e32 v1, s4, v4
3704; CGP-NEXT:    v_cvt_f32_i32_e32 v1, v1
3705; CGP-NEXT:    v_and_b32_e32 v0, s4, v0
3706; CGP-NEXT:    v_cvt_f32_i32_e32 v0, v0
3707; CGP-NEXT:    v_and_b32_e32 v4, s4, v6
3708; CGP-NEXT:    v_rcp_f32_e32 v3, v1
3709; CGP-NEXT:    v_cvt_f32_i32_e32 v4, v4
3710; CGP-NEXT:    v_and_b32_e32 v2, s4, v2
3711; CGP-NEXT:    v_cvt_f32_i32_e32 v2, v2
3712; CGP-NEXT:    v_mul_f32_e32 v3, v0, v3
3713; CGP-NEXT:    v_trunc_f32_e32 v3, v3
3714; CGP-NEXT:    v_mad_f32 v0, -v3, v1, v0
3715; CGP-NEXT:    v_cvt_i32_f32_e32 v3, v3
3716; CGP-NEXT:    v_rcp_f32_e32 v5, v4
3717; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v0|, |v1|
3718; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
3719; CGP-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
3720; CGP-NEXT:    v_mul_f32_e32 v3, v2, v5
3721; CGP-NEXT:    v_trunc_f32_e32 v3, v3
3722; CGP-NEXT:    v_mad_f32 v2, -v3, v4, v2
3723; CGP-NEXT:    v_cvt_i32_f32_e32 v3, v3
3724; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v2|, |v4|
3725; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[4:5]
3726; CGP-NEXT:    v_bfe_i32 v0, v0, 0, 25
3727; CGP-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
3728; CGP-NEXT:    v_bfe_i32 v2, v2, 0, 25
3729; CGP-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
3730; CGP-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
3731; CGP-NEXT:    s_setpc_b64 s[30:31]
3732  %num.mask = and <2 x i64> %num, <i64 16777215, i64 16777215>
3733  %den.mask = and <2 x i64> %den, <i64 16777215, i64 16777215>
3734  %result = sdiv <2 x i64> %num.mask, %den.mask
3735  ret <2 x i64> %result
3736}
3737