1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,GISEL %s 3; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,CGP %s 4 5; The same 32-bit expansion is implemented in the legalizer and in AMDGPUCodeGenPrepare. 6 7define i64 @v_srem_i64(i64 %num, i64 %den) { 8; CHECK-LABEL: v_srem_i64: 9; CHECK: ; %bb.0: 10; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 11; CHECK-NEXT: v_mov_b32_e32 v5, v1 12; CHECK-NEXT: v_mov_b32_e32 v4, v0 13; CHECK-NEXT: v_or_b32_e32 v1, v5, v3 14; CHECK-NEXT: v_mov_b32_e32 v0, 0 15; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 16; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 17; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 18; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 19; CHECK-NEXT: s_cbranch_execz BB0_2 20; CHECK-NEXT: ; %bb.1: 21; CHECK-NEXT: v_ashrrev_i32_e32 v0, 31, v3 22; CHECK-NEXT: v_add_i32_e32 v1, vcc, v2, v0 23; CHECK-NEXT: v_addc_u32_e32 v2, vcc, v3, v0, vcc 24; CHECK-NEXT: v_xor_b32_e32 v3, v1, v0 25; CHECK-NEXT: v_xor_b32_e32 v0, v2, v0 26; CHECK-NEXT: v_cvt_f32_u32_e32 v2, v3 27; CHECK-NEXT: v_cvt_f32_u32_e32 v6, v0 28; CHECK-NEXT: v_ashrrev_i32_e32 v1, 31, v5 29; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v1 30; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v6 31; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 32; CHECK-NEXT: v_addc_u32_e32 v5, vcc, v5, v1, vcc 33; CHECK-NEXT: v_sub_i32_e32 v7, vcc, 0, v3 34; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 35; CHECK-NEXT: v_mul_f32_e32 v6, 0x2f800000, v2 36; CHECK-NEXT: v_trunc_f32_e32 v6, v6 37; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v6 38; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 39; CHECK-NEXT: v_cvt_u32_f32_e32 v6, v6 40; CHECK-NEXT: v_subb_u32_e32 v8, vcc, 0, v0, vcc 41; CHECK-NEXT: v_mul_lo_u32 v9, v8, v2 42; CHECK-NEXT: v_mul_lo_u32 v10, v7, v6 43; CHECK-NEXT: v_mul_hi_u32 v12, v7, v2 44; CHECK-NEXT: v_mul_lo_u32 v11, v7, v2 45; CHECK-NEXT: v_xor_b32_e32 v4, v4, v1 46; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 47; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v12 48; CHECK-NEXT: v_mul_lo_u32 v10, v6, v11 49; CHECK-NEXT: v_mul_lo_u32 v12, v2, v9 50; CHECK-NEXT: v_mul_hi_u32 v13, v2, v11 51; CHECK-NEXT: v_mul_hi_u32 v11, v6, v11 52; CHECK-NEXT: v_xor_b32_e32 v5, v5, v1 53; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v12 54; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 55; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v13 56; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 57; CHECK-NEXT: v_mul_lo_u32 v13, v6, v9 58; CHECK-NEXT: v_add_i32_e32 v10, vcc, v12, v10 59; CHECK-NEXT: v_mul_hi_u32 v12, v2, v9 60; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v11 61; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 62; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v12 63; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 64; CHECK-NEXT: v_add_i32_e32 v12, vcc, v13, v12 65; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 66; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 67; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 68; CHECK-NEXT: v_add_i32_e32 v11, vcc, v12, v11 69; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v11 70; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v10 71; CHECK-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v9, vcc 72; CHECK-NEXT: v_mul_lo_u32 v8, v8, v2 73; CHECK-NEXT: v_mul_lo_u32 v11, v7, v10 74; CHECK-NEXT: v_mul_lo_u32 v12, v7, v2 75; CHECK-NEXT: v_mul_hi_u32 v7, v7, v2 76; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v9 77; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 78; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 79; CHECK-NEXT: v_mul_lo_u32 v8, v10, v12 80; CHECK-NEXT: v_mul_lo_u32 v11, v2, v7 81; CHECK-NEXT: v_mul_hi_u32 v9, v2, v12 82; CHECK-NEXT: v_mul_hi_u32 v12, v10, v12 83; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 84; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 85; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 86; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 87; CHECK-NEXT: v_mul_lo_u32 v9, v10, v7 88; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 89; CHECK-NEXT: v_mul_hi_u32 v11, v2, v7 90; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 91; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 92; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 93; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 94; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 95; CHECK-NEXT: v_mul_hi_u32 v7, v10, v7 96; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 97; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 98; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 99; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v9 100; CHECK-NEXT: v_addc_u32_e32 v6, vcc, v6, v7, vcc 101; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 102; CHECK-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 103; CHECK-NEXT: v_mul_lo_u32 v7, v5, v2 104; CHECK-NEXT: v_mul_lo_u32 v8, v4, v6 105; CHECK-NEXT: v_mul_hi_u32 v9, v4, v2 106; CHECK-NEXT: v_mul_hi_u32 v2, v5, v2 107; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 108; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 109; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v9 110; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 111; CHECK-NEXT: v_mul_lo_u32 v9, v5, v6 112; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 113; CHECK-NEXT: v_mul_hi_u32 v8, v4, v6 114; CHECK-NEXT: v_add_i32_e32 v2, vcc, v9, v2 115; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 116; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 117; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 118; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 119; CHECK-NEXT: v_mul_hi_u32 v6, v5, v6 120; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v7 121; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 122; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 123; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 124; CHECK-NEXT: v_mul_lo_u32 v7, v0, v2 125; CHECK-NEXT: v_mul_lo_u32 v6, v3, v6 126; CHECK-NEXT: v_mul_lo_u32 v8, v3, v2 127; CHECK-NEXT: v_mul_hi_u32 v2, v3, v2 128; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 129; CHECK-NEXT: v_add_i32_e32 v2, vcc, v6, v2 130; CHECK-NEXT: v_sub_i32_e32 v4, vcc, v4, v8 131; CHECK-NEXT: v_subb_u32_e64 v6, s[4:5], v5, v2, vcc 132; CHECK-NEXT: v_sub_i32_e64 v2, s[4:5], v5, v2 133; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v0 134; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 135; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 136; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 137; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v6, v0 138; CHECK-NEXT: v_subb_u32_e32 v2, vcc, v2, v0, vcc 139; CHECK-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[4:5] 140; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v4, v3 141; CHECK-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v2, vcc 142; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v0 143; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 144; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v3 145; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 146; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v0 147; CHECK-NEXT: v_subb_u32_e32 v0, vcc, v2, v0, vcc 148; CHECK-NEXT: v_sub_i32_e32 v2, vcc, v7, v3 149; CHECK-NEXT: v_cndmask_b32_e64 v9, v9, v10, s[4:5] 150; CHECK-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 151; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v9 152; CHECK-NEXT: v_cndmask_b32_e32 v2, v7, v2, vcc 153; CHECK-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc 154; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 155; CHECK-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc 156; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc 157; CHECK-NEXT: v_xor_b32_e32 v2, v2, v1 158; CHECK-NEXT: v_xor_b32_e32 v3, v0, v1 159; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v2, v1 160; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc 161; CHECK-NEXT: ; implicit-def: $vgpr2 162; CHECK-NEXT: ; implicit-def: $vgpr4 163; CHECK-NEXT: BB0_2: ; %Flow 164; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 165; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5] 166; CHECK-NEXT: s_cbranch_execz BB0_4 167; CHECK-NEXT: ; %bb.3: 168; CHECK-NEXT: v_cvt_f32_u32_e32 v0, v2 169; CHECK-NEXT: v_sub_i32_e32 v1, vcc, 0, v2 170; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 171; CHECK-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 172; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 173; CHECK-NEXT: v_mul_lo_u32 v1, v1, v0 174; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 175; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 176; CHECK-NEXT: v_mul_hi_u32 v0, v4, v0 177; CHECK-NEXT: v_mul_lo_u32 v0, v0, v2 178; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v4, v0 179; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 180; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 181; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 182; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 183; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 184; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 185; CHECK-NEXT: v_mov_b32_e32 v1, 0 186; CHECK-NEXT: BB0_4: 187; CHECK-NEXT: s_or_b64 exec, exec, s[4:5] 188; CHECK-NEXT: s_setpc_b64 s[30:31] 189 %result = srem i64 %num, %den 190 ret i64 %result 191} 192 193; FIXME: This is a workaround for not handling uniform VGPR case. 194declare i32 @llvm.amdgcn.readfirstlane(i32) 195 196define amdgpu_ps i64 @s_srem_i64(i64 inreg %num, i64 inreg %den) { 197; CHECK-LABEL: s_srem_i64: 198; CHECK: ; %bb.0: 199; CHECK-NEXT: s_or_b64 s[6:7], s[2:3], s[4:5] 200; CHECK-NEXT: s_mov_b32 s0, 0 201; CHECK-NEXT: s_mov_b32 s1, -1 202; CHECK-NEXT: s_and_b64 s[6:7], s[6:7], s[0:1] 203; CHECK-NEXT: v_cmp_ne_u64_e64 vcc, s[6:7], 0 204; CHECK-NEXT: s_cbranch_vccz BB1_2 205; CHECK-NEXT: ; %bb.1: 206; CHECK-NEXT: s_ashr_i32 s6, s3, 31 207; CHECK-NEXT: s_ashr_i32 s0, s5, 31 208; CHECK-NEXT: s_add_u32 s10, s2, s6 209; CHECK-NEXT: s_cselect_b32 s7, 1, 0 210; CHECK-NEXT: s_and_b32 s7, s7, 1 211; CHECK-NEXT: s_cmp_lg_u32 s7, 0 212; CHECK-NEXT: s_addc_u32 s11, s3, s6 213; CHECK-NEXT: s_add_u32 s8, s4, s0 214; CHECK-NEXT: s_cselect_b32 s3, 1, 0 215; CHECK-NEXT: s_and_b32 s3, s3, 1 216; CHECK-NEXT: s_cmp_lg_u32 s3, 0 217; CHECK-NEXT: s_mov_b32 s1, s0 218; CHECK-NEXT: s_addc_u32 s9, s5, s0 219; CHECK-NEXT: s_xor_b64 s[8:9], s[8:9], s[0:1] 220; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s8 221; CHECK-NEXT: v_cvt_f32_u32_e32 v1, s9 222; CHECK-NEXT: s_mov_b32 s7, s6 223; CHECK-NEXT: s_xor_b64 s[10:11], s[10:11], s[6:7] 224; CHECK-NEXT: s_sub_u32 s3, 0, s8 225; CHECK-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 226; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 227; CHECK-NEXT: s_cselect_b32 s0, 1, 0 228; CHECK-NEXT: s_and_b32 s0, s0, 1 229; CHECK-NEXT: s_cmp_lg_u32 s0, 0 230; CHECK-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 231; CHECK-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 232; CHECK-NEXT: v_trunc_f32_e32 v1, v1 233; CHECK-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 234; CHECK-NEXT: v_cvt_u32_f32_e32 v1, v1 235; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 236; CHECK-NEXT: s_subb_u32 s5, 0, s9 237; CHECK-NEXT: v_mov_b32_e32 v6, s9 238; CHECK-NEXT: v_mul_lo_u32 v3, s3, v1 239; CHECK-NEXT: v_mul_lo_u32 v2, s5, v0 240; CHECK-NEXT: v_mul_hi_u32 v5, s3, v0 241; CHECK-NEXT: v_mul_lo_u32 v4, s3, v0 242; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v3 243; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 244; CHECK-NEXT: v_mul_lo_u32 v3, v1, v4 245; CHECK-NEXT: v_mul_lo_u32 v5, v0, v2 246; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4 247; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 248; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 249; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 250; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v7 251; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 252; CHECK-NEXT: v_mul_lo_u32 v7, v1, v2 253; CHECK-NEXT: v_add_i32_e32 v3, vcc, v5, v3 254; CHECK-NEXT: v_mul_hi_u32 v5, v0, v2 255; CHECK-NEXT: v_add_i32_e32 v4, vcc, v7, v4 256; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 257; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 258; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 259; CHECK-NEXT: v_add_i32_e32 v5, vcc, v7, v5 260; CHECK-NEXT: v_mul_hi_u32 v2, v1, v2 261; CHECK-NEXT: v_add_i32_e32 v3, vcc, v4, v3 262; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 263; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 264; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v4 265; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 266; CHECK-NEXT: v_addc_u32_e64 v3, s[0:1], v1, v2, vcc 267; CHECK-NEXT: v_mul_lo_u32 v4, s5, v0 268; CHECK-NEXT: v_mul_lo_u32 v5, s3, v3 269; CHECK-NEXT: v_mul_hi_u32 v8, s3, v0 270; CHECK-NEXT: v_mul_lo_u32 v7, s3, v0 271; CHECK-NEXT: v_add_i32_e64 v1, s[0:1], v1, v2 272; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v4, v5 273; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v4, v8 274; CHECK-NEXT: v_mul_lo_u32 v5, v3, v7 275; CHECK-NEXT: v_mul_lo_u32 v8, v0, v4 276; CHECK-NEXT: v_mul_hi_u32 v2, v0, v7 277; CHECK-NEXT: v_mul_hi_u32 v7, v3, v7 278; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v8 279; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[0:1] 280; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v5, v2 281; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1] 282; CHECK-NEXT: v_mul_lo_u32 v5, v3, v4 283; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v8, v2 284; CHECK-NEXT: v_mul_hi_u32 v8, v0, v4 285; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v7 286; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[0:1] 287; CHECK-NEXT: v_add_i32_e64 v5, s[0:1], v5, v8 288; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[0:1] 289; CHECK-NEXT: v_add_i32_e64 v7, s[0:1], v7, v8 290; CHECK-NEXT: v_mul_hi_u32 v3, v3, v4 291; CHECK-NEXT: v_add_i32_e64 v2, s[0:1], v5, v2 292; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[0:1] 293; CHECK-NEXT: v_add_i32_e64 v4, s[0:1], v7, v5 294; CHECK-NEXT: v_add_i32_e64 v3, s[0:1], v3, v4 295; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v3, vcc 296; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 297; CHECK-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 298; CHECK-NEXT: v_mul_lo_u32 v2, s11, v0 299; CHECK-NEXT: v_mul_lo_u32 v3, s10, v1 300; CHECK-NEXT: v_mul_hi_u32 v5, s10, v0 301; CHECK-NEXT: v_mul_hi_u32 v0, s11, v0 302; CHECK-NEXT: v_mov_b32_e32 v4, s11 303; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v3 304; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 305; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v5 306; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 307; CHECK-NEXT: v_mul_lo_u32 v5, s11, v1 308; CHECK-NEXT: v_add_i32_e32 v2, vcc, v3, v2 309; CHECK-NEXT: v_mul_hi_u32 v3, s10, v1 310; CHECK-NEXT: v_add_i32_e32 v0, vcc, v5, v0 311; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 312; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v3 313; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 314; CHECK-NEXT: v_add_i32_e32 v3, vcc, v5, v3 315; CHECK-NEXT: v_mul_hi_u32 v1, s11, v1 316; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 317; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 318; CHECK-NEXT: v_add_i32_e32 v2, vcc, v3, v2 319; CHECK-NEXT: v_add_i32_e32 v1, vcc, v1, v2 320; CHECK-NEXT: v_mul_lo_u32 v2, s9, v0 321; CHECK-NEXT: v_mul_lo_u32 v1, s8, v1 322; CHECK-NEXT: v_mul_lo_u32 v3, s8, v0 323; CHECK-NEXT: v_mul_hi_u32 v0, s8, v0 324; CHECK-NEXT: v_add_i32_e32 v1, vcc, v2, v1 325; CHECK-NEXT: v_add_i32_e32 v0, vcc, v1, v0 326; CHECK-NEXT: v_sub_i32_e32 v1, vcc, s10, v3 327; CHECK-NEXT: v_subb_u32_e64 v2, s[0:1], v4, v0, vcc 328; CHECK-NEXT: v_sub_i32_e64 v0, s[0:1], s11, v0 329; CHECK-NEXT: v_cmp_le_u32_e64 s[0:1], s9, v2 330; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[0:1] 331; CHECK-NEXT: v_cmp_le_u32_e64 s[0:1], s8, v1 332; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[0:1] 333; CHECK-NEXT: v_cmp_eq_u32_e64 s[0:1], s9, v2 334; CHECK-NEXT: v_subb_u32_e32 v0, vcc, v0, v6, vcc 335; CHECK-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1] 336; CHECK-NEXT: v_subrev_i32_e32 v3, vcc, s8, v1 337; CHECK-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 338; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s9, v0 339; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 340; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s8, v3 341; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc 342; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, s9, v0 343; CHECK-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc 344; CHECK-NEXT: v_subrev_i32_e32 v4, vcc, s8, v3 345; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 346; CHECK-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc 347; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v2 348; CHECK-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 349; CHECK-NEXT: v_xor_b32_e32 v0, s6, v0 350; CHECK-NEXT: v_subrev_i32_e32 v0, vcc, s6, v0 351; CHECK-NEXT: s_mov_b32 s1, 0 352; CHECK-NEXT: s_branch BB1_3 353; CHECK-NEXT: BB1_2: 354; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 355; CHECK-NEXT: BB1_3: ; %Flow 356; CHECK-NEXT: s_xor_b32 s0, s1, -1 357; CHECK-NEXT: s_and_b32 s0, s0, 1 358; CHECK-NEXT: s_cmp_lg_u32 s0, 0 359; CHECK-NEXT: s_cbranch_scc1 BB1_5 360; CHECK-NEXT: ; %bb.4: 361; CHECK-NEXT: v_cvt_f32_u32_e32 v0, s4 362; CHECK-NEXT: s_sub_i32 s0, 0, s4 363; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 364; CHECK-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 365; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 366; CHECK-NEXT: v_mul_lo_u32 v1, s0, v0 367; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 368; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 369; CHECK-NEXT: v_mul_hi_u32 v0, s2, v0 370; CHECK-NEXT: v_mul_lo_u32 v0, v0, s4 371; CHECK-NEXT: v_sub_i32_e32 v0, vcc, s2, v0 372; CHECK-NEXT: v_subrev_i32_e32 v1, vcc, s4, v0 373; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s4, v0 374; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 375; CHECK-NEXT: v_subrev_i32_e32 v1, vcc, s4, v0 376; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s4, v0 377; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 378; CHECK-NEXT: BB1_5: 379; CHECK-NEXT: v_readfirstlane_b32 s0, v0 380; CHECK-NEXT: s_mov_b32 s1, s0 381; CHECK-NEXT: ; return to shader part epilog 382 %result = srem i64 %num, %den 383 %cast = bitcast i64 %result to <2 x i32> 384 %elt.0 = extractelement <2 x i32> %cast, i32 0 385 %elt.1 = extractelement <2 x i32> %cast, i32 1 386 %res.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.0) 387 %res.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.1) 388 %ins.0 = insertelement <2 x i32> undef, i32 %res.0, i32 0 389 %ins.1 = insertelement <2 x i32> %ins.0, i32 %res.0, i32 1 390 %cast.back = bitcast <2 x i32> %ins.1 to i64 391 ret i64 %cast.back 392} 393 394define <2 x i64> @v_srem_v2i64(<2 x i64> %num, <2 x i64> %den) { 395; GISEL-LABEL: v_srem_v2i64: 396; GISEL: ; %bb.0: 397; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 398; GISEL-NEXT: v_ashrrev_i32_e32 v8, 31, v5 399; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v8 400; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v8, vcc 401; GISEL-NEXT: v_xor_b32_e32 v9, v4, v8 402; GISEL-NEXT: v_xor_b32_e32 v5, v5, v8 403; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v9 404; GISEL-NEXT: v_cvt_f32_u32_e32 v10, v5 405; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v1 406; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v4 407; GISEL-NEXT: v_mac_f32_e32 v8, 0x4f800000, v10 408; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v8 409; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 410; GISEL-NEXT: v_sub_i32_e32 v11, vcc, 0, v9 411; GISEL-NEXT: v_mul_f32_e32 v8, 0x5f7ffffc, v8 412; GISEL-NEXT: v_mul_f32_e32 v10, 0x2f800000, v8 413; GISEL-NEXT: v_trunc_f32_e32 v10, v10 414; GISEL-NEXT: v_mac_f32_e32 v8, 0xcf800000, v10 415; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 416; GISEL-NEXT: v_cvt_u32_f32_e32 v10, v10 417; GISEL-NEXT: v_subb_u32_e32 v12, vcc, 0, v5, vcc 418; GISEL-NEXT: v_mul_lo_u32 v13, v12, v8 419; GISEL-NEXT: v_mul_lo_u32 v14, v11, v10 420; GISEL-NEXT: v_mul_hi_u32 v16, v11, v8 421; GISEL-NEXT: v_mul_lo_u32 v15, v11, v8 422; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 423; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 424; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 425; GISEL-NEXT: v_mul_lo_u32 v14, v10, v15 426; GISEL-NEXT: v_mul_lo_u32 v16, v8, v13 427; GISEL-NEXT: v_mul_hi_u32 v17, v8, v15 428; GISEL-NEXT: v_mul_hi_u32 v15, v10, v15 429; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 430; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v16 431; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 432; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v17 433; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 434; GISEL-NEXT: v_mul_lo_u32 v17, v10, v13 435; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 436; GISEL-NEXT: v_mul_hi_u32 v16, v8, v13 437; GISEL-NEXT: v_add_i32_e32 v15, vcc, v17, v15 438; GISEL-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 439; GISEL-NEXT: v_add_i32_e32 v15, vcc, v15, v16 440; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 441; GISEL-NEXT: v_add_i32_e32 v16, vcc, v17, v16 442; GISEL-NEXT: v_mul_hi_u32 v13, v10, v13 443; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 444; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 445; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 446; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 447; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v14 448; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], v10, v13, vcc 449; GISEL-NEXT: v_mul_lo_u32 v12, v12, v8 450; GISEL-NEXT: v_mul_lo_u32 v15, v11, v14 451; GISEL-NEXT: v_mul_lo_u32 v16, v11, v8 452; GISEL-NEXT: v_mul_hi_u32 v11, v11, v8 453; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 454; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 455; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 456; GISEL-NEXT: v_mul_lo_u32 v12, v14, v16 457; GISEL-NEXT: v_mul_lo_u32 v15, v8, v11 458; GISEL-NEXT: v_mul_hi_u32 v13, v8, v16 459; GISEL-NEXT: v_mul_hi_u32 v16, v14, v16 460; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 461; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 462; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 463; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 464; GISEL-NEXT: v_mul_lo_u32 v13, v14, v11 465; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 466; GISEL-NEXT: v_mul_hi_u32 v15, v8, v11 467; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 468; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 469; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 470; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 471; GISEL-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 472; GISEL-NEXT: v_mul_hi_u32 v11, v14, v11 473; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 474; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 475; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 476; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 477; GISEL-NEXT: v_addc_u32_e32 v10, vcc, v10, v11, vcc 478; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 479; GISEL-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc 480; GISEL-NEXT: v_mul_lo_u32 v11, v1, v8 481; GISEL-NEXT: v_mul_lo_u32 v12, v0, v10 482; GISEL-NEXT: v_mul_hi_u32 v13, v0, v8 483; GISEL-NEXT: v_mul_hi_u32 v8, v1, v8 484; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 485; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 486; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v13 487; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 488; GISEL-NEXT: v_mul_lo_u32 v13, v1, v10 489; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 490; GISEL-NEXT: v_mul_hi_u32 v12, v0, v10 491; GISEL-NEXT: v_add_i32_e32 v8, vcc, v13, v8 492; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 493; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v12 494; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 495; GISEL-NEXT: v_add_i32_e32 v12, vcc, v13, v12 496; GISEL-NEXT: v_mul_hi_u32 v10, v1, v10 497; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 498; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 499; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 500; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 501; GISEL-NEXT: v_mul_lo_u32 v11, v5, v8 502; GISEL-NEXT: v_mul_lo_u32 v10, v9, v10 503; GISEL-NEXT: v_mul_lo_u32 v12, v9, v8 504; GISEL-NEXT: v_mul_hi_u32 v8, v9, v8 505; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 506; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 507; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v12 508; GISEL-NEXT: v_subb_u32_e64 v10, s[4:5], v1, v8, vcc 509; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v8 510; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v5 511; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 512; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v0, v9 513; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 514; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v5 515; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 516; GISEL-NEXT: v_cndmask_b32_e64 v8, v8, v11, s[4:5] 517; GISEL-NEXT: v_sub_i32_e32 v11, vcc, v0, v9 518; GISEL-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v1, vcc 519; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v5 520; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 521; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v9 522; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v5, vcc 523; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 524; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v5 525; GISEL-NEXT: v_sub_i32_e32 v5, vcc, v11, v9 526; GISEL-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 527; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 528; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 529; GISEL-NEXT: v_cndmask_b32_e32 v5, v11, v5, vcc 530; GISEL-NEXT: v_cndmask_b32_e32 v1, v12, v1, vcc 531; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 532; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 533; GISEL-NEXT: v_ashrrev_i32_e32 v5, 31, v7 534; GISEL-NEXT: v_cndmask_b32_e32 v1, v10, v1, vcc 535; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v5 536; GISEL-NEXT: v_addc_u32_e32 v7, vcc, v7, v5, vcc 537; GISEL-NEXT: v_xor_b32_e32 v6, v6, v5 538; GISEL-NEXT: v_xor_b32_e32 v5, v7, v5 539; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v6 540; GISEL-NEXT: v_cvt_f32_u32_e32 v8, v5 541; GISEL-NEXT: v_ashrrev_i32_e32 v9, 31, v3 542; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v9 543; GISEL-NEXT: v_mac_f32_e32 v7, 0x4f800000, v8 544; GISEL-NEXT: v_rcp_iflag_f32_e32 v7, v7 545; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v9, vcc 546; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v6 547; GISEL-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 548; GISEL-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 549; GISEL-NEXT: v_trunc_f32_e32 v8, v8 550; GISEL-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 551; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 552; GISEL-NEXT: v_cvt_u32_f32_e32 v8, v8 553; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 554; GISEL-NEXT: v_mul_lo_u32 v12, v11, v7 555; GISEL-NEXT: v_mul_lo_u32 v13, v10, v8 556; GISEL-NEXT: v_mul_hi_u32 v15, v10, v7 557; GISEL-NEXT: v_mul_lo_u32 v14, v10, v7 558; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 559; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 560; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 561; GISEL-NEXT: v_mul_lo_u32 v13, v8, v14 562; GISEL-NEXT: v_mul_lo_u32 v15, v7, v12 563; GISEL-NEXT: v_mul_hi_u32 v16, v7, v14 564; GISEL-NEXT: v_mul_hi_u32 v14, v8, v14 565; GISEL-NEXT: v_xor_b32_e32 v2, v2, v9 566; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 567; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 568; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 569; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 570; GISEL-NEXT: v_mul_lo_u32 v16, v8, v12 571; GISEL-NEXT: v_add_i32_e32 v13, vcc, v15, v13 572; GISEL-NEXT: v_mul_hi_u32 v15, v7, v12 573; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 574; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 575; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 576; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 577; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 578; GISEL-NEXT: v_mul_hi_u32 v12, v8, v12 579; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 580; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 581; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 582; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 583; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v13 584; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], v8, v12, vcc 585; GISEL-NEXT: v_mul_lo_u32 v11, v11, v7 586; GISEL-NEXT: v_mul_lo_u32 v14, v10, v13 587; GISEL-NEXT: v_mul_lo_u32 v15, v10, v7 588; GISEL-NEXT: v_mul_hi_u32 v10, v10, v7 589; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v12 590; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 591; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 592; GISEL-NEXT: v_mul_lo_u32 v11, v13, v15 593; GISEL-NEXT: v_mul_lo_u32 v14, v7, v10 594; GISEL-NEXT: v_mul_hi_u32 v12, v7, v15 595; GISEL-NEXT: v_mul_hi_u32 v15, v13, v15 596; GISEL-NEXT: v_xor_b32_e32 v3, v3, v9 597; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 598; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 599; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 600; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 601; GISEL-NEXT: v_mul_lo_u32 v12, v13, v10 602; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 603; GISEL-NEXT: v_mul_hi_u32 v14, v7, v10 604; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 605; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 606; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 607; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 608; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 609; GISEL-NEXT: v_mul_hi_u32 v10, v13, v10 610; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 611; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 612; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 613; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 614; GISEL-NEXT: v_addc_u32_e32 v8, vcc, v8, v10, vcc 615; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v11 616; GISEL-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 617; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 618; GISEL-NEXT: v_mul_lo_u32 v10, v3, v7 619; GISEL-NEXT: v_mul_lo_u32 v11, v2, v8 620; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 621; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc 622; GISEL-NEXT: v_mul_hi_u32 v4, v2, v7 623; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 624; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 625; GISEL-NEXT: v_add_i32_e32 v4, vcc, v10, v4 626; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 627; GISEL-NEXT: v_mul_lo_u32 v10, v3, v8 628; GISEL-NEXT: v_mul_hi_u32 v7, v3, v7 629; GISEL-NEXT: v_add_i32_e32 v4, vcc, v11, v4 630; GISEL-NEXT: v_mul_hi_u32 v11, v2, v8 631; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 632; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 633; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v11 634; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 635; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 636; GISEL-NEXT: v_mul_hi_u32 v8, v3, v8 637; GISEL-NEXT: v_add_i32_e32 v4, vcc, v7, v4 638; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 639; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 640; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 641; GISEL-NEXT: v_mul_lo_u32 v8, v5, v4 642; GISEL-NEXT: v_mul_lo_u32 v7, v6, v7 643; GISEL-NEXT: v_mul_lo_u32 v10, v6, v4 644; GISEL-NEXT: v_mul_hi_u32 v4, v6, v4 645; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 646; GISEL-NEXT: v_add_i32_e32 v4, vcc, v7, v4 647; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v10 648; GISEL-NEXT: v_subb_u32_e64 v7, s[4:5], v3, v4, vcc 649; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 650; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v5 651; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 652; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v2, v6 653; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 654; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v7, v5 655; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v5, vcc 656; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[4:5] 657; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v2, v6 658; GISEL-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v3, vcc 659; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v5 660; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 661; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v6 662; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v5, vcc 663; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 664; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v5 665; GISEL-NEXT: v_sub_i32_e32 v5, vcc, v8, v6 666; GISEL-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 667; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 668; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 669; GISEL-NEXT: v_cndmask_b32_e32 v5, v8, v5, vcc 670; GISEL-NEXT: v_cndmask_b32_e32 v3, v10, v3, vcc 671; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 672; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc 673; GISEL-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc 674; GISEL-NEXT: v_xor_b32_e32 v2, v2, v9 675; GISEL-NEXT: v_xor_b32_e32 v3, v3, v9 676; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v9 677; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 678; GISEL-NEXT: s_setpc_b64 s[30:31] 679; 680; CGP-LABEL: v_srem_v2i64: 681; CGP: ; %bb.0: 682; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 683; CGP-NEXT: v_mov_b32_e32 v11, v1 684; CGP-NEXT: v_mov_b32_e32 v10, v0 685; CGP-NEXT: v_or_b32_e32 v1, v11, v5 686; CGP-NEXT: v_mov_b32_e32 v0, 0 687; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 688; CGP-NEXT: v_mov_b32_e32 v8, v2 689; CGP-NEXT: v_mov_b32_e32 v9, v3 690; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 691; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 692; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 693; CGP-NEXT: s_cbranch_execz BB2_2 694; CGP-NEXT: ; %bb.1: 695; CGP-NEXT: v_ashrrev_i32_e32 v0, 31, v5 696; CGP-NEXT: v_add_i32_e32 v1, vcc, v4, v0 697; CGP-NEXT: v_addc_u32_e32 v2, vcc, v5, v0, vcc 698; CGP-NEXT: v_xor_b32_e32 v3, v1, v0 699; CGP-NEXT: v_xor_b32_e32 v0, v2, v0 700; CGP-NEXT: v_cvt_f32_u32_e32 v2, v3 701; CGP-NEXT: v_cvt_f32_u32_e32 v4, v0 702; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v11 703; CGP-NEXT: v_mac_f32_e32 v2, 0x4f800000, v4 704; CGP-NEXT: v_rcp_iflag_f32_e32 v2, v2 705; CGP-NEXT: v_add_i32_e32 v4, vcc, v10, v1 706; CGP-NEXT: v_addc_u32_e32 v5, vcc, v11, v1, vcc 707; CGP-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 708; CGP-NEXT: v_mul_f32_e32 v10, 0x2f800000, v2 709; CGP-NEXT: v_trunc_f32_e32 v10, v10 710; CGP-NEXT: v_mac_f32_e32 v2, 0xcf800000, v10 711; CGP-NEXT: v_cvt_u32_f32_e32 v2, v2 712; CGP-NEXT: v_cvt_u32_f32_e32 v10, v10 713; CGP-NEXT: v_sub_i32_e32 v11, vcc, 0, v3 714; CGP-NEXT: v_subb_u32_e32 v12, vcc, 0, v0, vcc 715; CGP-NEXT: v_mul_lo_u32 v13, v12, v2 716; CGP-NEXT: v_mul_lo_u32 v14, v11, v10 717; CGP-NEXT: v_mul_hi_u32 v16, v11, v2 718; CGP-NEXT: v_mul_lo_u32 v15, v11, v2 719; CGP-NEXT: v_xor_b32_e32 v4, v4, v1 720; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 721; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v16 722; CGP-NEXT: v_mul_lo_u32 v14, v10, v15 723; CGP-NEXT: v_mul_lo_u32 v16, v2, v13 724; CGP-NEXT: v_mul_hi_u32 v17, v2, v15 725; CGP-NEXT: v_mul_hi_u32 v15, v10, v15 726; CGP-NEXT: v_xor_b32_e32 v5, v5, v1 727; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 728; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 729; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 730; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 731; CGP-NEXT: v_mul_lo_u32 v17, v10, v13 732; CGP-NEXT: v_add_i32_e32 v14, vcc, v16, v14 733; CGP-NEXT: v_mul_hi_u32 v16, v2, v13 734; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v15 735; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 736; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 737; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 738; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 739; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 740; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 741; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 742; CGP-NEXT: v_add_i32_e32 v15, vcc, v16, v15 743; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 744; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v14 745; CGP-NEXT: v_addc_u32_e64 v14, s[4:5], v10, v13, vcc 746; CGP-NEXT: v_mul_lo_u32 v12, v12, v2 747; CGP-NEXT: v_mul_lo_u32 v15, v11, v14 748; CGP-NEXT: v_mul_lo_u32 v16, v11, v2 749; CGP-NEXT: v_mul_hi_u32 v11, v11, v2 750; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 751; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 752; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 753; CGP-NEXT: v_mul_lo_u32 v12, v14, v16 754; CGP-NEXT: v_mul_lo_u32 v15, v2, v11 755; CGP-NEXT: v_mul_hi_u32 v13, v2, v16 756; CGP-NEXT: v_mul_hi_u32 v16, v14, v16 757; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 758; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 759; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 760; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 761; CGP-NEXT: v_mul_lo_u32 v13, v14, v11 762; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 763; CGP-NEXT: v_mul_hi_u32 v15, v2, v11 764; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 765; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 766; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 767; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 768; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 769; CGP-NEXT: v_mul_hi_u32 v11, v14, v11 770; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 771; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 772; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 773; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 774; CGP-NEXT: v_addc_u32_e32 v10, vcc, v10, v11, vcc 775; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v12 776; CGP-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc 777; CGP-NEXT: v_mul_lo_u32 v11, v5, v2 778; CGP-NEXT: v_mul_lo_u32 v12, v4, v10 779; CGP-NEXT: v_mul_hi_u32 v13, v4, v2 780; CGP-NEXT: v_mul_hi_u32 v2, v5, v2 781; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 782; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 783; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 784; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 785; CGP-NEXT: v_mul_lo_u32 v13, v5, v10 786; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 787; CGP-NEXT: v_mul_hi_u32 v12, v4, v10 788; CGP-NEXT: v_add_i32_e32 v2, vcc, v13, v2 789; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 790; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v12 791; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 792; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 793; CGP-NEXT: v_mul_hi_u32 v10, v5, v10 794; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v11 795; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 796; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 797; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 798; CGP-NEXT: v_mul_lo_u32 v11, v0, v2 799; CGP-NEXT: v_mul_lo_u32 v10, v3, v10 800; CGP-NEXT: v_mul_lo_u32 v12, v3, v2 801; CGP-NEXT: v_mul_hi_u32 v2, v3, v2 802; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 803; CGP-NEXT: v_add_i32_e32 v2, vcc, v10, v2 804; CGP-NEXT: v_sub_i32_e32 v4, vcc, v4, v12 805; CGP-NEXT: v_subb_u32_e64 v10, s[4:5], v5, v2, vcc 806; CGP-NEXT: v_sub_i32_e64 v2, s[4:5], v5, v2 807; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v0 808; CGP-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 809; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 810; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 811; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v0 812; CGP-NEXT: v_subb_u32_e32 v2, vcc, v2, v0, vcc 813; CGP-NEXT: v_cndmask_b32_e64 v5, v5, v11, s[4:5] 814; CGP-NEXT: v_sub_i32_e32 v11, vcc, v4, v3 815; CGP-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v2, vcc 816; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v0 817; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 818; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v3 819; CGP-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 820; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v0 821; CGP-NEXT: v_subb_u32_e32 v0, vcc, v2, v0, vcc 822; CGP-NEXT: v_sub_i32_e32 v2, vcc, v11, v3 823; CGP-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 824; CGP-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 825; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 826; CGP-NEXT: v_cndmask_b32_e32 v2, v11, v2, vcc 827; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 828; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 829; CGP-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc 830; CGP-NEXT: v_cndmask_b32_e32 v0, v10, v0, vcc 831; CGP-NEXT: v_xor_b32_e32 v2, v2, v1 832; CGP-NEXT: v_xor_b32_e32 v3, v0, v1 833; CGP-NEXT: v_sub_i32_e32 v0, vcc, v2, v1 834; CGP-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc 835; CGP-NEXT: ; implicit-def: $vgpr4 836; CGP-NEXT: ; implicit-def: $vgpr10 837; CGP-NEXT: BB2_2: ; %Flow2 838; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 839; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 840; CGP-NEXT: s_cbranch_execz BB2_4 841; CGP-NEXT: ; %bb.3: 842; CGP-NEXT: v_cvt_f32_u32_e32 v0, v4 843; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v4 844; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 845; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 846; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 847; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 848; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 849; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 850; CGP-NEXT: v_mul_hi_u32 v0, v10, v0 851; CGP-NEXT: v_mul_lo_u32 v0, v0, v4 852; CGP-NEXT: v_sub_i32_e32 v0, vcc, v10, v0 853; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 854; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 855; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 856; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v4 857; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v4 858; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 859; CGP-NEXT: v_mov_b32_e32 v1, 0 860; CGP-NEXT: BB2_4: 861; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 862; CGP-NEXT: v_or_b32_e32 v3, v9, v7 863; CGP-NEXT: v_mov_b32_e32 v2, 0 864; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] 865; CGP-NEXT: ; implicit-def: $vgpr2_vgpr3 866; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 867; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 868; CGP-NEXT: s_cbranch_execz BB2_6 869; CGP-NEXT: ; %bb.5: 870; CGP-NEXT: v_ashrrev_i32_e32 v2, 31, v7 871; CGP-NEXT: v_add_i32_e32 v3, vcc, v6, v2 872; CGP-NEXT: v_addc_u32_e32 v4, vcc, v7, v2, vcc 873; CGP-NEXT: v_xor_b32_e32 v5, v3, v2 874; CGP-NEXT: v_xor_b32_e32 v2, v4, v2 875; CGP-NEXT: v_cvt_f32_u32_e32 v4, v5 876; CGP-NEXT: v_cvt_f32_u32_e32 v6, v2 877; CGP-NEXT: v_ashrrev_i32_e32 v3, 31, v9 878; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v6 879; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 880; CGP-NEXT: v_add_i32_e32 v6, vcc, v8, v3 881; CGP-NEXT: v_addc_u32_e32 v7, vcc, v9, v3, vcc 882; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 883; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v4 884; CGP-NEXT: v_trunc_f32_e32 v8, v8 885; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v8 886; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 887; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 888; CGP-NEXT: v_sub_i32_e32 v9, vcc, 0, v5 889; CGP-NEXT: v_subb_u32_e32 v10, vcc, 0, v2, vcc 890; CGP-NEXT: v_mul_lo_u32 v11, v10, v4 891; CGP-NEXT: v_mul_lo_u32 v12, v9, v8 892; CGP-NEXT: v_mul_hi_u32 v14, v9, v4 893; CGP-NEXT: v_mul_lo_u32 v13, v9, v4 894; CGP-NEXT: v_xor_b32_e32 v6, v6, v3 895; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 896; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v14 897; CGP-NEXT: v_mul_lo_u32 v12, v8, v13 898; CGP-NEXT: v_mul_lo_u32 v14, v4, v11 899; CGP-NEXT: v_mul_hi_u32 v15, v4, v13 900; CGP-NEXT: v_mul_hi_u32 v13, v8, v13 901; CGP-NEXT: v_xor_b32_e32 v7, v7, v3 902; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 903; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 904; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 905; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 906; CGP-NEXT: v_mul_lo_u32 v15, v8, v11 907; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v12 908; CGP-NEXT: v_mul_hi_u32 v14, v4, v11 909; CGP-NEXT: v_add_i32_e32 v13, vcc, v15, v13 910; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 911; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 912; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 913; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 914; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 915; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 916; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 917; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 918; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 919; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v12 920; CGP-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc 921; CGP-NEXT: v_mul_lo_u32 v10, v10, v4 922; CGP-NEXT: v_mul_lo_u32 v13, v9, v12 923; CGP-NEXT: v_mul_lo_u32 v14, v9, v4 924; CGP-NEXT: v_mul_hi_u32 v9, v9, v4 925; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 926; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 927; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v10, v9 928; CGP-NEXT: v_mul_lo_u32 v10, v12, v14 929; CGP-NEXT: v_mul_lo_u32 v13, v4, v9 930; CGP-NEXT: v_mul_hi_u32 v11, v4, v14 931; CGP-NEXT: v_mul_hi_u32 v14, v12, v14 932; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 933; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 934; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 935; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 936; CGP-NEXT: v_mul_lo_u32 v11, v12, v9 937; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v13, v10 938; CGP-NEXT: v_mul_hi_u32 v13, v4, v9 939; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 940; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 941; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 942; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 943; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 944; CGP-NEXT: v_mul_hi_u32 v9, v12, v9 945; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 946; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 947; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 948; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 949; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v9, vcc 950; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 951; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 952; CGP-NEXT: v_mul_lo_u32 v9, v7, v4 953; CGP-NEXT: v_mul_lo_u32 v10, v6, v8 954; CGP-NEXT: v_mul_hi_u32 v11, v6, v4 955; CGP-NEXT: v_mul_hi_u32 v4, v7, v4 956; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 957; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 958; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 959; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 960; CGP-NEXT: v_mul_lo_u32 v11, v7, v8 961; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 962; CGP-NEXT: v_mul_hi_u32 v10, v6, v8 963; CGP-NEXT: v_add_i32_e32 v4, vcc, v11, v4 964; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 965; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 966; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 967; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 968; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 969; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 970; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 971; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 972; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 973; CGP-NEXT: v_mul_lo_u32 v9, v2, v4 974; CGP-NEXT: v_mul_lo_u32 v8, v5, v8 975; CGP-NEXT: v_mul_lo_u32 v10, v5, v4 976; CGP-NEXT: v_mul_hi_u32 v4, v5, v4 977; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 978; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 979; CGP-NEXT: v_sub_i32_e32 v6, vcc, v6, v10 980; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v7, v4, vcc 981; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v7, v4 982; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2 983; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 984; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v5 985; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 986; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v2 987; CGP-NEXT: v_subb_u32_e32 v4, vcc, v4, v2, vcc 988; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[4:5] 989; CGP-NEXT: v_sub_i32_e32 v9, vcc, v6, v5 990; CGP-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v4, vcc 991; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v2 992; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 993; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 994; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 995; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v2 996; CGP-NEXT: v_subb_u32_e32 v2, vcc, v4, v2, vcc 997; CGP-NEXT: v_sub_i32_e32 v4, vcc, v9, v5 998; CGP-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 999; CGP-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 1000; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 1001; CGP-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc 1002; CGP-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc 1003; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 1004; CGP-NEXT: v_cndmask_b32_e32 v4, v6, v4, vcc 1005; CGP-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc 1006; CGP-NEXT: v_xor_b32_e32 v4, v4, v3 1007; CGP-NEXT: v_xor_b32_e32 v5, v2, v3 1008; CGP-NEXT: v_sub_i32_e32 v2, vcc, v4, v3 1009; CGP-NEXT: v_subb_u32_e32 v3, vcc, v5, v3, vcc 1010; CGP-NEXT: ; implicit-def: $vgpr6 1011; CGP-NEXT: ; implicit-def: $vgpr8 1012; CGP-NEXT: BB2_6: ; %Flow 1013; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 1014; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 1015; CGP-NEXT: s_cbranch_execz BB2_8 1016; CGP-NEXT: ; %bb.7: 1017; CGP-NEXT: v_cvt_f32_u32_e32 v2, v6 1018; CGP-NEXT: v_sub_i32_e32 v3, vcc, 0, v6 1019; CGP-NEXT: v_rcp_iflag_f32_e32 v2, v2 1020; CGP-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2 1021; CGP-NEXT: v_cvt_u32_f32_e32 v2, v2 1022; CGP-NEXT: v_mul_lo_u32 v3, v3, v2 1023; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 1024; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v3 1025; CGP-NEXT: v_mul_hi_u32 v2, v8, v2 1026; CGP-NEXT: v_mul_lo_u32 v2, v2, v6 1027; CGP-NEXT: v_sub_i32_e32 v2, vcc, v8, v2 1028; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v6 1029; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 1030; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 1031; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v6 1032; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v6 1033; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 1034; CGP-NEXT: v_mov_b32_e32 v3, 0 1035; CGP-NEXT: BB2_8: 1036; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 1037; CGP-NEXT: s_setpc_b64 s[30:31] 1038 %result = srem <2 x i64> %num, %den 1039 ret <2 x i64> %result 1040} 1041 1042define i64 @v_srem_i64_pow2k_denom(i64 %num) { 1043; CHECK-LABEL: v_srem_i64_pow2k_denom: 1044; CHECK: ; %bb.0: 1045; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1046; CHECK-NEXT: v_cvt_f32_u32_e32 v3, 0x1000 1047; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v4, 0 1048; CHECK-NEXT: s_movk_i32 s6, 0xf000 1049; CHECK-NEXT: v_ashrrev_i32_e32 v2, 31, v1 1050; CHECK-NEXT: v_mac_f32_e32 v3, 0x4f800000, v4 1051; CHECK-NEXT: v_rcp_iflag_f32_e32 v3, v3 1052; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 1053; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc 1054; CHECK-NEXT: v_mul_f32_e32 v3, 0x5f7ffffc, v3 1055; CHECK-NEXT: v_mul_f32_e32 v4, 0x2f800000, v3 1056; CHECK-NEXT: v_trunc_f32_e32 v4, v4 1057; CHECK-NEXT: v_mac_f32_e32 v3, 0xcf800000, v4 1058; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3 1059; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 1060; CHECK-NEXT: v_xor_b32_e32 v0, v0, v2 1061; CHECK-NEXT: v_xor_b32_e32 v1, v1, v2 1062; CHECK-NEXT: v_mul_lo_u32 v5, -1, v3 1063; CHECK-NEXT: v_mul_lo_u32 v6, s6, v4 1064; CHECK-NEXT: v_mul_hi_u32 v8, s6, v3 1065; CHECK-NEXT: v_mul_lo_u32 v7, s6, v3 1066; CHECK-NEXT: s_bfe_i32 s7, -1, 0x10000 1067; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1068; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1069; CHECK-NEXT: v_mul_lo_u32 v6, v4, v7 1070; CHECK-NEXT: v_mul_lo_u32 v8, v3, v5 1071; CHECK-NEXT: v_mul_hi_u32 v9, v3, v7 1072; CHECK-NEXT: v_mul_hi_u32 v7, v4, v7 1073; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1074; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1075; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 1076; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1077; CHECK-NEXT: v_mul_lo_u32 v9, v4, v5 1078; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 1079; CHECK-NEXT: v_mul_hi_u32 v8, v3, v5 1080; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 1081; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1082; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1083; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1084; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1085; CHECK-NEXT: v_mul_hi_u32 v5, v4, v5 1086; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1087; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1088; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1089; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1090; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v6 1091; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc 1092; CHECK-NEXT: v_mul_lo_u32 v7, -1, v3 1093; CHECK-NEXT: v_mul_lo_u32 v8, s6, v6 1094; CHECK-NEXT: v_mul_hi_u32 v10, s6, v3 1095; CHECK-NEXT: v_mul_lo_u32 v9, s6, v3 1096; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v5 1097; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1098; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v10 1099; CHECK-NEXT: v_mul_lo_u32 v8, v6, v9 1100; CHECK-NEXT: v_mul_lo_u32 v10, v3, v7 1101; CHECK-NEXT: v_mul_hi_u32 v5, v3, v9 1102; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 1103; CHECK-NEXT: s_movk_i32 s6, 0x1000 1104; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1105; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1106; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1107; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[4:5] 1108; CHECK-NEXT: v_mul_lo_u32 v8, v6, v7 1109; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v10, v5 1110; CHECK-NEXT: v_mul_hi_u32 v10, v3, v7 1111; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1112; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1113; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1114; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1115; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1116; CHECK-NEXT: v_mul_hi_u32 v6, v6, v7 1117; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1118; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1119; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v8 1120; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1121; CHECK-NEXT: v_addc_u32_e32 v4, vcc, v4, v6, vcc 1122; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 1123; CHECK-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 1124; CHECK-NEXT: v_mul_lo_u32 v5, v1, v3 1125; CHECK-NEXT: v_mul_lo_u32 v6, v0, v4 1126; CHECK-NEXT: v_mul_hi_u32 v7, v0, v3 1127; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 1128; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1129; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1130; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1131; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1132; CHECK-NEXT: v_mul_lo_u32 v7, v1, v4 1133; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1134; CHECK-NEXT: v_mul_hi_u32 v6, v0, v4 1135; CHECK-NEXT: v_add_i32_e32 v3, vcc, v7, v3 1136; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1137; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v6 1138; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1139; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1140; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 1141; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 1142; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1143; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1144; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1145; CHECK-NEXT: v_mul_lo_u32 v5, 0, v3 1146; CHECK-NEXT: v_mul_lo_u32 v4, s6, v4 1147; CHECK-NEXT: v_mul_lo_u32 v6, s6, v3 1148; CHECK-NEXT: v_mul_hi_u32 v3, s6, v3 1149; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1150; CHECK-NEXT: v_add_i32_e32 v3, vcc, v4, v3 1151; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 1152; CHECK-NEXT: v_subb_u32_e64 v4, s[4:5], v1, v3, vcc 1153; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v3 1154; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v0 1155; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[4:5] 1156; CHECK-NEXT: v_mov_b32_e32 v5, s7 1157; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 1158; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1159; CHECK-NEXT: v_cndmask_b32_e64 v3, v5, v3, s[4:5] 1160; CHECK-NEXT: v_subrev_i32_e32 v5, vcc, s6, v0 1161; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1162; CHECK-NEXT: s_bfe_i32 s4, -1, 0x10000 1163; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s6, v5 1164; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 1165; CHECK-NEXT: v_mov_b32_e32 v7, s4 1166; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1167; CHECK-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc 1168; CHECK-NEXT: v_subrev_i32_e32 v7, vcc, s6, v5 1169; CHECK-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v1, vcc 1170; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 1171; CHECK-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 1172; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc 1173; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 1174; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 1175; CHECK-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc 1176; CHECK-NEXT: v_xor_b32_e32 v0, v0, v2 1177; CHECK-NEXT: v_xor_b32_e32 v1, v1, v2 1178; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 1179; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc 1180; CHECK-NEXT: s_setpc_b64 s[30:31] 1181 %result = srem i64 %num, 4096 1182 ret i64 %result 1183} 1184 1185define <2 x i64> @v_srem_v2i64_pow2k_denom(<2 x i64> %num) { 1186; GISEL-LABEL: v_srem_v2i64_pow2k_denom: 1187; GISEL: ; %bb.0: 1188; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1189; GISEL-NEXT: s_movk_i32 s10, 0x1000 1190; GISEL-NEXT: s_add_u32 s4, s10, 0 1191; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1192; GISEL-NEXT: s_and_b32 s5, s5, 1 1193; GISEL-NEXT: s_mov_b32 s6, 0 1194; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1195; GISEL-NEXT: s_mov_b32 s7, s6 1196; GISEL-NEXT: s_addc_u32 s5, 0, 0 1197; GISEL-NEXT: s_xor_b64 s[8:9], s[4:5], s[6:7] 1198; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s8 1199; GISEL-NEXT: v_cvt_f32_u32_e32 v6, s9 1200; GISEL-NEXT: s_sub_u32 s11, 0, s8 1201; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1202; GISEL-NEXT: s_and_b32 s4, s4, 1 1203; GISEL-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 1204; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v5 1205; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1206; GISEL-NEXT: s_subb_u32 s12, 0, s9 1207; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v1 1208; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1209; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v5 1210; GISEL-NEXT: v_trunc_f32_e32 v6, v6 1211; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v6 1212; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1213; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 1214; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v4 1215; GISEL-NEXT: v_mul_lo_u32 v7, s12, v5 1216; GISEL-NEXT: v_mul_lo_u32 v8, s11, v6 1217; GISEL-NEXT: v_mul_hi_u32 v10, s11, v5 1218; GISEL-NEXT: v_mul_lo_u32 v9, s11, v5 1219; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 1220; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1221; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1222; GISEL-NEXT: v_mul_lo_u32 v8, v6, v9 1223; GISEL-NEXT: v_mul_lo_u32 v10, v5, v7 1224; GISEL-NEXT: v_mul_hi_u32 v11, v5, v9 1225; GISEL-NEXT: v_mul_hi_u32 v9, v6, v9 1226; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 1227; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1228; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1229; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1230; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1231; GISEL-NEXT: v_mul_lo_u32 v11, v6, v7 1232; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1233; GISEL-NEXT: v_mul_hi_u32 v10, v5, v7 1234; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1235; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1236; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1237; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1238; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1239; GISEL-NEXT: v_mul_hi_u32 v7, v6, v7 1240; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1241; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1242; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1243; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1244; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1245; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v6, v7, vcc 1246; GISEL-NEXT: v_mul_lo_u32 v9, s12, v5 1247; GISEL-NEXT: v_mul_lo_u32 v10, s11, v8 1248; GISEL-NEXT: v_mul_hi_u32 v12, s11, v5 1249; GISEL-NEXT: v_mul_lo_u32 v11, s11, v5 1250; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1251; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1252; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1253; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1254; GISEL-NEXT: v_mul_lo_u32 v12, v5, v9 1255; GISEL-NEXT: v_mul_hi_u32 v7, v5, v11 1256; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1257; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 1258; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1259; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1260; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1261; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1262; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1263; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1264; GISEL-NEXT: v_mul_hi_u32 v12, v5, v9 1265; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1266; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1267; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1268; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1269; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1270; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1271; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1272; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1273; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1274; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1275; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v8, vcc 1276; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1277; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1278; GISEL-NEXT: v_mul_lo_u32 v7, v1, v5 1279; GISEL-NEXT: v_mul_lo_u32 v8, v0, v6 1280; GISEL-NEXT: v_mul_hi_u32 v10, v0, v5 1281; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 1282; GISEL-NEXT: v_mov_b32_e32 v9, s9 1283; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1284; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1285; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1286; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1287; GISEL-NEXT: v_mul_lo_u32 v10, v1, v6 1288; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1289; GISEL-NEXT: v_mul_hi_u32 v8, v0, v6 1290; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 1291; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1292; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1293; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1294; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1295; GISEL-NEXT: v_mul_hi_u32 v6, v1, v6 1296; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1297; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1298; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1299; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v7 1300; GISEL-NEXT: v_mul_lo_u32 v7, s9, v5 1301; GISEL-NEXT: v_mul_lo_u32 v6, s8, v6 1302; GISEL-NEXT: v_mul_lo_u32 v8, s8, v5 1303; GISEL-NEXT: v_mul_hi_u32 v5, s8, v5 1304; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1305; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1306; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 1307; GISEL-NEXT: v_subb_u32_e64 v6, s[4:5], v1, v5, vcc 1308; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v5 1309; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v6 1310; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 1311; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v0 1312; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1313; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v6 1314; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 1315; GISEL-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[4:5] 1316; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s8, v0 1317; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v1, vcc 1318; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v8 1319; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 1320; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v7 1321; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 1322; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v8 1323; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 1324; GISEL-NEXT: s_add_u32 s4, s10, 0 1325; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 1326; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1327; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s8, v7 1328; GISEL-NEXT: s_and_b32 s5, s5, 1 1329; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1330; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1331; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1332; GISEL-NEXT: s_addc_u32 s5, 0, 0 1333; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1334; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 1335; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 1336; GISEL-NEXT: s_xor_b64 s[6:7], s[4:5], s[6:7] 1337; GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc 1338; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s6 1339; GISEL-NEXT: v_cvt_f32_u32_e32 v6, s7 1340; GISEL-NEXT: s_sub_u32 s8, 0, s6 1341; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1342; GISEL-NEXT: s_and_b32 s4, s4, 1 1343; GISEL-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 1344; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v5 1345; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1346; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc 1347; GISEL-NEXT: s_subb_u32 s9, 0, s7 1348; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1349; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v5 1350; GISEL-NEXT: v_trunc_f32_e32 v6, v6 1351; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v6 1352; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1353; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 1354; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 1355; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 1356; GISEL-NEXT: v_mul_lo_u32 v7, s9, v5 1357; GISEL-NEXT: v_mul_lo_u32 v8, s8, v6 1358; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 1359; GISEL-NEXT: v_mul_hi_u32 v10, s8, v5 1360; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc 1361; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v3 1362; GISEL-NEXT: v_mul_lo_u32 v9, s8, v5 1363; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v4 1364; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc 1365; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1366; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1367; GISEL-NEXT: v_mul_lo_u32 v8, v6, v9 1368; GISEL-NEXT: v_mul_lo_u32 v10, v5, v7 1369; GISEL-NEXT: v_mul_hi_u32 v11, v5, v9 1370; GISEL-NEXT: v_mul_hi_u32 v9, v6, v9 1371; GISEL-NEXT: v_xor_b32_e32 v2, v2, v4 1372; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1373; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1374; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1375; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1376; GISEL-NEXT: v_mul_lo_u32 v11, v6, v7 1377; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1378; GISEL-NEXT: v_mul_hi_u32 v10, v5, v7 1379; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1380; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1381; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1382; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1383; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1384; GISEL-NEXT: v_mul_hi_u32 v7, v6, v7 1385; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1386; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1387; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1388; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1389; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1390; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v6, v7, vcc 1391; GISEL-NEXT: v_mul_lo_u32 v9, s9, v5 1392; GISEL-NEXT: v_mul_lo_u32 v10, s8, v8 1393; GISEL-NEXT: v_mul_hi_u32 v12, s8, v5 1394; GISEL-NEXT: v_mul_lo_u32 v11, s8, v5 1395; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1396; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1397; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1398; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1399; GISEL-NEXT: v_mul_lo_u32 v12, v5, v9 1400; GISEL-NEXT: v_mul_hi_u32 v7, v5, v11 1401; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1402; GISEL-NEXT: v_xor_b32_e32 v3, v3, v4 1403; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1404; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1405; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1406; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1407; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1408; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1409; GISEL-NEXT: v_mul_hi_u32 v12, v5, v9 1410; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1411; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1412; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1413; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1414; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1415; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1416; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1417; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1418; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1419; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1420; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v8, vcc 1421; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1422; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1423; GISEL-NEXT: v_mul_lo_u32 v7, v3, v5 1424; GISEL-NEXT: v_mul_lo_u32 v8, v2, v6 1425; GISEL-NEXT: v_mul_hi_u32 v10, v2, v5 1426; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 1427; GISEL-NEXT: v_mov_b32_e32 v9, s7 1428; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1429; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1430; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1431; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1432; GISEL-NEXT: v_mul_lo_u32 v10, v3, v6 1433; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1434; GISEL-NEXT: v_mul_hi_u32 v8, v2, v6 1435; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 1436; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1437; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1438; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1439; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1440; GISEL-NEXT: v_mul_hi_u32 v6, v3, v6 1441; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1442; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1443; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1444; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v7 1445; GISEL-NEXT: v_mul_lo_u32 v7, s7, v5 1446; GISEL-NEXT: v_mul_lo_u32 v6, s6, v6 1447; GISEL-NEXT: v_mul_lo_u32 v8, s6, v5 1448; GISEL-NEXT: v_mul_hi_u32 v5, s6, v5 1449; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1450; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1451; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 1452; GISEL-NEXT: v_subb_u32_e64 v6, s[4:5], v3, v5, vcc 1453; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v5 1454; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v6 1455; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 1456; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v2 1457; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1458; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v6 1459; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 1460; GISEL-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[4:5] 1461; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s6, v2 1462; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v3, vcc 1463; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v8 1464; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 1465; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v7 1466; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 1467; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 1468; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v8 1469; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s6, v7 1470; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 1471; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1472; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1473; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1474; GISEL-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc 1475; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 1476; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 1477; GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 1478; GISEL-NEXT: v_xor_b32_e32 v2, v2, v4 1479; GISEL-NEXT: v_xor_b32_e32 v3, v3, v4 1480; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 1481; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 1482; GISEL-NEXT: s_setpc_b64 s[30:31] 1483; 1484; CGP-LABEL: v_srem_v2i64_pow2k_denom: 1485; CGP: ; %bb.0: 1486; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1487; CGP-NEXT: v_cvt_f32_u32_e32 v5, 0x1000 1488; CGP-NEXT: v_cvt_f32_ubyte0_e32 v6, 0 1489; CGP-NEXT: s_movk_i32 s6, 0xf000 1490; CGP-NEXT: v_ashrrev_i32_e32 v4, 31, v1 1491; CGP-NEXT: v_mov_b32_e32 v7, v5 1492; CGP-NEXT: v_mac_f32_e32 v7, 0x4f800000, v6 1493; CGP-NEXT: v_rcp_iflag_f32_e32 v7, v7 1494; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v4 1495; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 1496; CGP-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 1497; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 1498; CGP-NEXT: v_trunc_f32_e32 v8, v8 1499; CGP-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 1500; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 1501; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 1502; CGP-NEXT: v_xor_b32_e32 v0, v0, v4 1503; CGP-NEXT: v_xor_b32_e32 v1, v1, v4 1504; CGP-NEXT: v_mul_lo_u32 v9, -1, v7 1505; CGP-NEXT: v_mul_lo_u32 v10, s6, v8 1506; CGP-NEXT: v_mul_hi_u32 v12, s6, v7 1507; CGP-NEXT: v_mul_lo_u32 v11, s6, v7 1508; CGP-NEXT: s_movk_i32 s7, 0x1000 1509; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1510; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1511; CGP-NEXT: v_mul_lo_u32 v10, v8, v11 1512; CGP-NEXT: v_mul_lo_u32 v12, v7, v9 1513; CGP-NEXT: v_mul_hi_u32 v13, v7, v11 1514; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 1515; CGP-NEXT: s_bfe_i32 s8, -1, 0x10000 1516; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 1517; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1518; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 1519; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1520; CGP-NEXT: v_mul_lo_u32 v13, v8, v9 1521; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 1522; CGP-NEXT: v_mul_hi_u32 v12, v7, v9 1523; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 1524; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 1525; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 1526; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1527; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 1528; CGP-NEXT: v_mul_hi_u32 v9, v8, v9 1529; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1530; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1531; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1532; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1533; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1534; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc 1535; CGP-NEXT: v_mul_lo_u32 v11, -1, v7 1536; CGP-NEXT: v_mul_lo_u32 v12, s6, v10 1537; CGP-NEXT: v_mul_hi_u32 v14, s6, v7 1538; CGP-NEXT: v_mul_lo_u32 v13, s6, v7 1539; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1540; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1541; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 1542; CGP-NEXT: v_mul_lo_u32 v12, v10, v13 1543; CGP-NEXT: v_mul_lo_u32 v14, v7, v11 1544; CGP-NEXT: v_mul_hi_u32 v9, v7, v13 1545; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 1546; CGP-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 1547; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 1548; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1549; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 1550; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1551; CGP-NEXT: v_mul_lo_u32 v12, v10, v11 1552; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v14, v9 1553; CGP-NEXT: v_mul_hi_u32 v14, v7, v11 1554; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 1555; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1556; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 1557; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 1558; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v14 1559; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 1560; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 1561; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1562; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v12 1563; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1564; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v10, vcc 1565; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1566; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 1567; CGP-NEXT: v_mul_lo_u32 v9, v1, v7 1568; CGP-NEXT: v_mul_lo_u32 v10, v0, v8 1569; CGP-NEXT: v_mul_hi_u32 v11, v0, v7 1570; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 1571; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v5 1572; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1573; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1574; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1575; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1576; CGP-NEXT: v_mul_lo_u32 v11, v1, v8 1577; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1578; CGP-NEXT: v_mul_hi_u32 v10, v0, v8 1579; CGP-NEXT: v_add_i32_e32 v7, vcc, v11, v7 1580; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1581; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1582; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1583; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1584; CGP-NEXT: v_mul_hi_u32 v8, v1, v8 1585; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1586; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1587; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1588; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1589; CGP-NEXT: v_mul_lo_u32 v9, 0, v7 1590; CGP-NEXT: v_mul_lo_u32 v8, s7, v8 1591; CGP-NEXT: v_mul_lo_u32 v10, s7, v7 1592; CGP-NEXT: v_mul_hi_u32 v7, s7, v7 1593; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1594; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1595; CGP-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1596; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 1597; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v7, vcc 1598; CGP-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v7 1599; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 1600; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 1601; CGP-NEXT: v_mov_b32_e32 v9, s8 1602; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 1603; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1604; CGP-NEXT: v_cndmask_b32_e64 v7, v9, v7, s[4:5] 1605; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v0 1606; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1607; CGP-NEXT: s_bfe_i32 s4, -1, 0x10000 1608; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v9 1609; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc 1610; CGP-NEXT: v_mov_b32_e32 v11, s4 1611; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1612; CGP-NEXT: v_cndmask_b32_e32 v10, v11, v10, vcc 1613; CGP-NEXT: v_subrev_i32_e32 v11, vcc, s7, v9 1614; CGP-NEXT: v_subbrev_u32_e32 v12, vcc, 0, v1, vcc 1615; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 1616; CGP-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc 1617; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc 1618; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 1619; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 1620; CGP-NEXT: v_trunc_f32_e32 v7, v7 1621; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 1622; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 1623; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 1624; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc 1625; CGP-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 1626; CGP-NEXT: v_mul_lo_u32 v8, -1, v5 1627; CGP-NEXT: v_mul_lo_u32 v9, s6, v7 1628; CGP-NEXT: v_mul_hi_u32 v11, s6, v5 1629; CGP-NEXT: v_ashrrev_i32_e32 v6, 31, v3 1630; CGP-NEXT: v_mul_lo_u32 v10, s6, v5 1631; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v6 1632; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 1633; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1634; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1635; CGP-NEXT: v_mul_lo_u32 v9, v7, v10 1636; CGP-NEXT: v_mul_lo_u32 v11, v5, v8 1637; CGP-NEXT: v_mul_hi_u32 v12, v5, v10 1638; CGP-NEXT: v_mul_hi_u32 v10, v7, v10 1639; CGP-NEXT: v_xor_b32_e32 v0, v0, v4 1640; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 1641; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1642; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 1643; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1644; CGP-NEXT: v_mul_lo_u32 v12, v7, v8 1645; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1646; CGP-NEXT: v_mul_hi_u32 v11, v5, v8 1647; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 1648; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 1649; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 1650; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1651; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 1652; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 1653; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1654; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1655; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1656; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1657; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1658; CGP-NEXT: v_addc_u32_e64 v9, s[4:5], v7, v8, vcc 1659; CGP-NEXT: v_mul_lo_u32 v10, -1, v5 1660; CGP-NEXT: v_mul_lo_u32 v11, s6, v9 1661; CGP-NEXT: v_mul_hi_u32 v13, s6, v5 1662; CGP-NEXT: v_mul_lo_u32 v12, s6, v5 1663; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1664; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1665; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 1666; CGP-NEXT: v_mul_lo_u32 v11, v9, v12 1667; CGP-NEXT: v_mul_lo_u32 v13, v5, v10 1668; CGP-NEXT: v_mul_hi_u32 v8, v5, v12 1669; CGP-NEXT: v_mul_hi_u32 v12, v9, v12 1670; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 1671; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 1672; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1673; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 1674; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1675; CGP-NEXT: v_mul_lo_u32 v11, v9, v10 1676; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v13, v8 1677; CGP-NEXT: v_mul_hi_u32 v13, v5, v10 1678; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1679; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1680; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 1681; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 1682; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 1683; CGP-NEXT: v_mul_hi_u32 v9, v9, v10 1684; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 1685; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1686; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v11 1687; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1688; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc 1689; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1690; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 1691; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 1692; CGP-NEXT: v_xor_b32_e32 v1, v1, v4 1693; CGP-NEXT: v_mul_lo_u32 v8, v3, v5 1694; CGP-NEXT: v_mul_lo_u32 v9, v2, v7 1695; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 1696; CGP-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc 1697; CGP-NEXT: v_mul_hi_u32 v4, v2, v5 1698; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1699; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1700; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 1701; CGP-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1702; CGP-NEXT: v_mul_lo_u32 v8, v3, v7 1703; CGP-NEXT: v_mul_hi_u32 v5, v3, v5 1704; CGP-NEXT: v_add_i32_e32 v4, vcc, v9, v4 1705; CGP-NEXT: v_mul_hi_u32 v9, v2, v7 1706; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 1707; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1708; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 1709; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1710; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 1711; CGP-NEXT: v_mul_hi_u32 v7, v3, v7 1712; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1713; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1714; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 1715; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1716; CGP-NEXT: v_mul_lo_u32 v7, 0, v4 1717; CGP-NEXT: v_mul_lo_u32 v5, s7, v5 1718; CGP-NEXT: v_mul_lo_u32 v8, s7, v4 1719; CGP-NEXT: v_mul_hi_u32 v4, s7, v4 1720; CGP-NEXT: s_bfe_i32 s6, -1, 0x10000 1721; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 1722; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1723; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 1724; CGP-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 1725; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 1726; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v2 1727; CGP-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 1728; CGP-NEXT: v_mov_b32_e32 v7, s6 1729; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v5 1730; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1731; CGP-NEXT: v_cndmask_b32_e64 v4, v7, v4, s[4:5] 1732; CGP-NEXT: v_subrev_i32_e32 v7, vcc, s7, v2 1733; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 1734; CGP-NEXT: s_bfe_i32 s4, -1, 0x10000 1735; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v7 1736; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 1737; CGP-NEXT: v_mov_b32_e32 v9, s4 1738; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 1739; CGP-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc 1740; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v7 1741; CGP-NEXT: v_subbrev_u32_e32 v10, vcc, 0, v3, vcc 1742; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 1743; CGP-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 1744; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc 1745; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 1746; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 1747; CGP-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 1748; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 1749; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 1750; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 1751; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 1752; CGP-NEXT: s_setpc_b64 s[30:31] 1753 %result = srem <2 x i64> %num, <i64 4096, i64 4096> 1754 ret <2 x i64> %result 1755} 1756 1757define i64 @v_srem_i64_oddk_denom(i64 %num) { 1758; CHECK-LABEL: v_srem_i64_oddk_denom: 1759; CHECK: ; %bb.0: 1760; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1761; CHECK-NEXT: v_cvt_f32_u32_e32 v3, 0x12d8fb 1762; CHECK-NEXT: v_cvt_f32_ubyte0_e32 v4, 0 1763; CHECK-NEXT: s_mov_b32 s6, 0xffed2705 1764; CHECK-NEXT: v_ashrrev_i32_e32 v2, 31, v1 1765; CHECK-NEXT: v_mac_f32_e32 v3, 0x4f800000, v4 1766; CHECK-NEXT: v_rcp_iflag_f32_e32 v3, v3 1767; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v2 1768; CHECK-NEXT: v_addc_u32_e32 v1, vcc, v1, v2, vcc 1769; CHECK-NEXT: v_mul_f32_e32 v3, 0x5f7ffffc, v3 1770; CHECK-NEXT: v_mul_f32_e32 v4, 0x2f800000, v3 1771; CHECK-NEXT: v_trunc_f32_e32 v4, v4 1772; CHECK-NEXT: v_mac_f32_e32 v3, 0xcf800000, v4 1773; CHECK-NEXT: v_cvt_u32_f32_e32 v3, v3 1774; CHECK-NEXT: v_cvt_u32_f32_e32 v4, v4 1775; CHECK-NEXT: v_xor_b32_e32 v0, v0, v2 1776; CHECK-NEXT: v_xor_b32_e32 v1, v1, v2 1777; CHECK-NEXT: v_mul_lo_u32 v5, -1, v3 1778; CHECK-NEXT: v_mul_lo_u32 v6, s6, v4 1779; CHECK-NEXT: v_mul_hi_u32 v8, s6, v3 1780; CHECK-NEXT: v_mul_lo_u32 v7, s6, v3 1781; CHECK-NEXT: s_bfe_i32 s7, -1, 0x10000 1782; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1783; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1784; CHECK-NEXT: v_mul_lo_u32 v6, v4, v7 1785; CHECK-NEXT: v_mul_lo_u32 v8, v3, v5 1786; CHECK-NEXT: v_mul_hi_u32 v9, v3, v7 1787; CHECK-NEXT: v_mul_hi_u32 v7, v4, v7 1788; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v8 1789; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1790; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v9 1791; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1792; CHECK-NEXT: v_mul_lo_u32 v9, v4, v5 1793; CHECK-NEXT: v_add_i32_e32 v6, vcc, v8, v6 1794; CHECK-NEXT: v_mul_hi_u32 v8, v3, v5 1795; CHECK-NEXT: v_add_i32_e32 v7, vcc, v9, v7 1796; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1797; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1798; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1799; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1800; CHECK-NEXT: v_mul_hi_u32 v5, v4, v5 1801; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1802; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1803; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 1804; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1805; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v6 1806; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc 1807; CHECK-NEXT: v_mul_lo_u32 v7, -1, v3 1808; CHECK-NEXT: v_mul_lo_u32 v8, s6, v6 1809; CHECK-NEXT: v_mul_hi_u32 v10, s6, v3 1810; CHECK-NEXT: v_mul_lo_u32 v9, s6, v3 1811; CHECK-NEXT: v_add_i32_e64 v4, s[4:5], v4, v5 1812; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 1813; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v10 1814; CHECK-NEXT: v_mul_lo_u32 v8, v6, v9 1815; CHECK-NEXT: v_mul_lo_u32 v10, v3, v7 1816; CHECK-NEXT: v_mul_hi_u32 v5, v3, v9 1817; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 1818; CHECK-NEXT: s_mov_b32 s6, 0x12d8fb 1819; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1820; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1821; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1822; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[4:5] 1823; CHECK-NEXT: v_mul_lo_u32 v8, v6, v7 1824; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v10, v5 1825; CHECK-NEXT: v_mul_hi_u32 v10, v3, v7 1826; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1827; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 1828; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 1829; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1830; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1831; CHECK-NEXT: v_mul_hi_u32 v6, v6, v7 1832; CHECK-NEXT: v_add_i32_e64 v5, s[4:5], v8, v5 1833; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 1834; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v9, v8 1835; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1836; CHECK-NEXT: v_addc_u32_e32 v4, vcc, v4, v6, vcc 1837; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 1838; CHECK-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 1839; CHECK-NEXT: v_mul_lo_u32 v5, v1, v3 1840; CHECK-NEXT: v_mul_lo_u32 v6, v0, v4 1841; CHECK-NEXT: v_mul_hi_u32 v7, v0, v3 1842; CHECK-NEXT: v_mul_hi_u32 v3, v1, v3 1843; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v6 1844; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1845; CHECK-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1846; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1847; CHECK-NEXT: v_mul_lo_u32 v7, v1, v4 1848; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1849; CHECK-NEXT: v_mul_hi_u32 v6, v0, v4 1850; CHECK-NEXT: v_add_i32_e32 v3, vcc, v7, v3 1851; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 1852; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v6 1853; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 1854; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 1855; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4 1856; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v5 1857; CHECK-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 1858; CHECK-NEXT: v_add_i32_e32 v5, vcc, v6, v5 1859; CHECK-NEXT: v_add_i32_e32 v4, vcc, v4, v5 1860; CHECK-NEXT: v_mul_lo_u32 v5, 0, v3 1861; CHECK-NEXT: v_mul_lo_u32 v4, s6, v4 1862; CHECK-NEXT: v_mul_lo_u32 v6, s6, v3 1863; CHECK-NEXT: v_mul_hi_u32 v3, s6, v3 1864; CHECK-NEXT: v_add_i32_e32 v4, vcc, v5, v4 1865; CHECK-NEXT: v_add_i32_e32 v3, vcc, v4, v3 1866; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v6 1867; CHECK-NEXT: v_subb_u32_e64 v4, s[4:5], v1, v3, vcc 1868; CHECK-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v3 1869; CHECK-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v0 1870; CHECK-NEXT: v_cndmask_b32_e64 v3, 0, -1, s[4:5] 1871; CHECK-NEXT: v_mov_b32_e32 v5, s7 1872; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 1873; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1874; CHECK-NEXT: v_cndmask_b32_e64 v3, v5, v3, s[4:5] 1875; CHECK-NEXT: v_subrev_i32_e32 v5, vcc, s6, v0 1876; CHECK-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 1877; CHECK-NEXT: s_bfe_i32 s4, -1, 0x10000 1878; CHECK-NEXT: v_cmp_le_u32_e32 vcc, s6, v5 1879; CHECK-NEXT: v_cndmask_b32_e64 v6, 0, -1, vcc 1880; CHECK-NEXT: v_mov_b32_e32 v7, s4 1881; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 1882; CHECK-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc 1883; CHECK-NEXT: v_subrev_i32_e32 v7, vcc, s6, v5 1884; CHECK-NEXT: v_subbrev_u32_e32 v8, vcc, 0, v1, vcc 1885; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 1886; CHECK-NEXT: v_cndmask_b32_e32 v5, v5, v7, vcc 1887; CHECK-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc 1888; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v3 1889; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc 1890; CHECK-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc 1891; CHECK-NEXT: v_xor_b32_e32 v0, v0, v2 1892; CHECK-NEXT: v_xor_b32_e32 v1, v1, v2 1893; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 1894; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v1, v2, vcc 1895; CHECK-NEXT: s_setpc_b64 s[30:31] 1896 %result = srem i64 %num, 1235195 1897 ret i64 %result 1898} 1899 1900define <2 x i64> @v_srem_v2i64_oddk_denom(<2 x i64> %num) { 1901; GISEL-LABEL: v_srem_v2i64_oddk_denom: 1902; GISEL: ; %bb.0: 1903; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1904; GISEL-NEXT: s_mov_b32 s10, 0x12d8fb 1905; GISEL-NEXT: s_add_u32 s4, s10, 0 1906; GISEL-NEXT: s_cselect_b32 s5, 1, 0 1907; GISEL-NEXT: s_and_b32 s5, s5, 1 1908; GISEL-NEXT: s_mov_b32 s6, 0 1909; GISEL-NEXT: s_cmp_lg_u32 s5, 0 1910; GISEL-NEXT: s_mov_b32 s7, s6 1911; GISEL-NEXT: s_addc_u32 s5, 0, 0 1912; GISEL-NEXT: s_xor_b64 s[8:9], s[4:5], s[6:7] 1913; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s8 1914; GISEL-NEXT: v_cvt_f32_u32_e32 v6, s9 1915; GISEL-NEXT: s_sub_u32 s11, 0, s8 1916; GISEL-NEXT: s_cselect_b32 s4, 1, 0 1917; GISEL-NEXT: s_and_b32 s4, s4, 1 1918; GISEL-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 1919; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v5 1920; GISEL-NEXT: s_cmp_lg_u32 s4, 0 1921; GISEL-NEXT: s_subb_u32 s12, 0, s9 1922; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v1 1923; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 1924; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v5 1925; GISEL-NEXT: v_trunc_f32_e32 v6, v6 1926; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v6 1927; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 1928; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 1929; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v4 1930; GISEL-NEXT: v_mul_lo_u32 v7, s12, v5 1931; GISEL-NEXT: v_mul_lo_u32 v8, s11, v6 1932; GISEL-NEXT: v_mul_hi_u32 v10, s11, v5 1933; GISEL-NEXT: v_mul_lo_u32 v9, s11, v5 1934; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 1935; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1936; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 1937; GISEL-NEXT: v_mul_lo_u32 v8, v6, v9 1938; GISEL-NEXT: v_mul_lo_u32 v10, v5, v7 1939; GISEL-NEXT: v_mul_hi_u32 v11, v5, v9 1940; GISEL-NEXT: v_mul_hi_u32 v9, v6, v9 1941; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 1942; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 1943; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1944; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 1945; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 1946; GISEL-NEXT: v_mul_lo_u32 v11, v6, v7 1947; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 1948; GISEL-NEXT: v_mul_hi_u32 v10, v5, v7 1949; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 1950; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 1951; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 1952; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 1953; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 1954; GISEL-NEXT: v_mul_hi_u32 v7, v6, v7 1955; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 1956; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 1957; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 1958; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 1959; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 1960; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v6, v7, vcc 1961; GISEL-NEXT: v_mul_lo_u32 v9, s12, v5 1962; GISEL-NEXT: v_mul_lo_u32 v10, s11, v8 1963; GISEL-NEXT: v_mul_hi_u32 v12, s11, v5 1964; GISEL-NEXT: v_mul_lo_u32 v11, s11, v5 1965; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 1966; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 1967; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 1968; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 1969; GISEL-NEXT: v_mul_lo_u32 v12, v5, v9 1970; GISEL-NEXT: v_mul_hi_u32 v7, v5, v11 1971; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 1972; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 1973; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1974; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1975; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1976; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 1977; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 1978; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 1979; GISEL-NEXT: v_mul_hi_u32 v12, v5, v9 1980; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 1981; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 1982; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 1983; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 1984; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 1985; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 1986; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 1987; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 1988; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 1989; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 1990; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v8, vcc 1991; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 1992; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 1993; GISEL-NEXT: v_mul_lo_u32 v7, v1, v5 1994; GISEL-NEXT: v_mul_lo_u32 v8, v0, v6 1995; GISEL-NEXT: v_mul_hi_u32 v10, v0, v5 1996; GISEL-NEXT: v_mul_hi_u32 v5, v1, v5 1997; GISEL-NEXT: v_mov_b32_e32 v9, s9 1998; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 1999; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2000; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2001; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2002; GISEL-NEXT: v_mul_lo_u32 v10, v1, v6 2003; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2004; GISEL-NEXT: v_mul_hi_u32 v8, v0, v6 2005; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 2006; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2007; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 2008; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2009; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2010; GISEL-NEXT: v_mul_hi_u32 v6, v1, v6 2011; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 2012; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2013; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2014; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v7 2015; GISEL-NEXT: v_mul_lo_u32 v7, s9, v5 2016; GISEL-NEXT: v_mul_lo_u32 v6, s8, v6 2017; GISEL-NEXT: v_mul_lo_u32 v8, s8, v5 2018; GISEL-NEXT: v_mul_hi_u32 v5, s8, v5 2019; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2020; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 2021; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v8 2022; GISEL-NEXT: v_subb_u32_e64 v6, s[4:5], v1, v5, vcc 2023; GISEL-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v5 2024; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v6 2025; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 2026; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v0 2027; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2028; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v6 2029; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 2030; GISEL-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[4:5] 2031; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s8, v0 2032; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v1, vcc 2033; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s9, v8 2034; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2035; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s8, v7 2036; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2037; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s9, v8 2038; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2039; GISEL-NEXT: s_add_u32 s4, s10, 0 2040; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v9, vcc 2041; GISEL-NEXT: s_cselect_b32 s5, 1, 0 2042; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s8, v7 2043; GISEL-NEXT: s_and_b32 s5, s5, 1 2044; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2045; GISEL-NEXT: s_cmp_lg_u32 s5, 0 2046; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2047; GISEL-NEXT: s_addc_u32 s5, 0, 0 2048; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2049; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 2050; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 2051; GISEL-NEXT: s_xor_b64 s[6:7], s[4:5], s[6:7] 2052; GISEL-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc 2053; GISEL-NEXT: v_cvt_f32_u32_e32 v5, s6 2054; GISEL-NEXT: v_cvt_f32_u32_e32 v6, s7 2055; GISEL-NEXT: s_sub_u32 s8, 0, s6 2056; GISEL-NEXT: s_cselect_b32 s4, 1, 0 2057; GISEL-NEXT: s_and_b32 s4, s4, 1 2058; GISEL-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 2059; GISEL-NEXT: v_rcp_iflag_f32_e32 v5, v5 2060; GISEL-NEXT: s_cmp_lg_u32 s4, 0 2061; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc 2062; GISEL-NEXT: s_subb_u32 s9, 0, s7 2063; GISEL-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 2064; GISEL-NEXT: v_mul_f32_e32 v6, 0x2f800000, v5 2065; GISEL-NEXT: v_trunc_f32_e32 v6, v6 2066; GISEL-NEXT: v_mac_f32_e32 v5, 0xcf800000, v6 2067; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 2068; GISEL-NEXT: v_cvt_u32_f32_e32 v6, v6 2069; GISEL-NEXT: v_xor_b32_e32 v0, v0, v4 2070; GISEL-NEXT: v_xor_b32_e32 v1, v1, v4 2071; GISEL-NEXT: v_mul_lo_u32 v7, s9, v5 2072; GISEL-NEXT: v_mul_lo_u32 v8, s8, v6 2073; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 2074; GISEL-NEXT: v_mul_hi_u32 v10, s8, v5 2075; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc 2076; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v3 2077; GISEL-NEXT: v_mul_lo_u32 v9, s8, v5 2078; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v4 2079; GISEL-NEXT: v_addc_u32_e32 v3, vcc, v3, v4, vcc 2080; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 2081; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2082; GISEL-NEXT: v_mul_lo_u32 v8, v6, v9 2083; GISEL-NEXT: v_mul_lo_u32 v10, v5, v7 2084; GISEL-NEXT: v_mul_hi_u32 v11, v5, v9 2085; GISEL-NEXT: v_mul_hi_u32 v9, v6, v9 2086; GISEL-NEXT: v_xor_b32_e32 v2, v2, v4 2087; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2088; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2089; GISEL-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2090; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2091; GISEL-NEXT: v_mul_lo_u32 v11, v6, v7 2092; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2093; GISEL-NEXT: v_mul_hi_u32 v10, v5, v7 2094; GISEL-NEXT: v_add_i32_e32 v9, vcc, v11, v9 2095; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2096; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2097; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2098; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2099; GISEL-NEXT: v_mul_hi_u32 v7, v6, v7 2100; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2101; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2102; GISEL-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2103; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2104; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 2105; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v6, v7, vcc 2106; GISEL-NEXT: v_mul_lo_u32 v9, s9, v5 2107; GISEL-NEXT: v_mul_lo_u32 v10, s8, v8 2108; GISEL-NEXT: v_mul_hi_u32 v12, s8, v5 2109; GISEL-NEXT: v_mul_lo_u32 v11, s8, v5 2110; GISEL-NEXT: v_add_i32_e64 v6, s[4:5], v6, v7 2111; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 2112; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 2113; GISEL-NEXT: v_mul_lo_u32 v10, v8, v11 2114; GISEL-NEXT: v_mul_lo_u32 v12, v5, v9 2115; GISEL-NEXT: v_mul_hi_u32 v7, v5, v11 2116; GISEL-NEXT: v_mul_hi_u32 v11, v8, v11 2117; GISEL-NEXT: v_xor_b32_e32 v3, v3, v4 2118; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2119; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2120; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 2121; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, s[4:5] 2122; GISEL-NEXT: v_mul_lo_u32 v10, v8, v9 2123; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v12, v7 2124; GISEL-NEXT: v_mul_hi_u32 v12, v5, v9 2125; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2126; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2127; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2128; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2129; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2130; GISEL-NEXT: v_mul_hi_u32 v8, v8, v9 2131; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v7 2132; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 2133; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v10 2134; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 2135; GISEL-NEXT: v_addc_u32_e32 v6, vcc, v6, v8, vcc 2136; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 2137; GISEL-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 2138; GISEL-NEXT: v_mul_lo_u32 v7, v3, v5 2139; GISEL-NEXT: v_mul_lo_u32 v8, v2, v6 2140; GISEL-NEXT: v_mul_hi_u32 v10, v2, v5 2141; GISEL-NEXT: v_mul_hi_u32 v5, v3, v5 2142; GISEL-NEXT: v_mov_b32_e32 v9, s7 2143; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 2144; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2145; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2146; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2147; GISEL-NEXT: v_mul_lo_u32 v10, v3, v6 2148; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2149; GISEL-NEXT: v_mul_hi_u32 v8, v2, v6 2150; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 2151; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2152; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 2153; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2154; GISEL-NEXT: v_add_i32_e32 v8, vcc, v10, v8 2155; GISEL-NEXT: v_mul_hi_u32 v6, v3, v6 2156; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v7 2157; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2158; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2159; GISEL-NEXT: v_add_i32_e32 v6, vcc, v6, v7 2160; GISEL-NEXT: v_mul_lo_u32 v7, s7, v5 2161; GISEL-NEXT: v_mul_lo_u32 v6, s6, v6 2162; GISEL-NEXT: v_mul_lo_u32 v8, s6, v5 2163; GISEL-NEXT: v_mul_hi_u32 v5, s6, v5 2164; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2165; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 2166; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 2167; GISEL-NEXT: v_subb_u32_e64 v6, s[4:5], v3, v5, vcc 2168; GISEL-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v5 2169; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v6 2170; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, -1, s[4:5] 2171; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v2 2172; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2173; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v6 2174; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 2175; GISEL-NEXT: v_cndmask_b32_e64 v5, v5, v7, s[4:5] 2176; GISEL-NEXT: v_subrev_i32_e32 v7, vcc, s6, v2 2177; GISEL-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v3, vcc 2178; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v8 2179; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2180; GISEL-NEXT: v_cmp_le_u32_e64 s[4:5], s6, v7 2181; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v9, vcc 2182; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2183; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], s7, v8 2184; GISEL-NEXT: v_subrev_i32_e32 v9, vcc, s6, v7 2185; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2186; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2187; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2188; GISEL-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2189; GISEL-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc 2190; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v5 2191; GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 2192; GISEL-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc 2193; GISEL-NEXT: v_xor_b32_e32 v2, v2, v4 2194; GISEL-NEXT: v_xor_b32_e32 v3, v3, v4 2195; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 2196; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v3, v4, vcc 2197; GISEL-NEXT: s_setpc_b64 s[30:31] 2198; 2199; CGP-LABEL: v_srem_v2i64_oddk_denom: 2200; CGP: ; %bb.0: 2201; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2202; CGP-NEXT: v_cvt_f32_u32_e32 v5, 0x12d8fb 2203; CGP-NEXT: v_cvt_f32_ubyte0_e32 v6, 0 2204; CGP-NEXT: s_mov_b32 s6, 0xffed2705 2205; CGP-NEXT: v_ashrrev_i32_e32 v4, 31, v1 2206; CGP-NEXT: v_mov_b32_e32 v7, v5 2207; CGP-NEXT: v_mac_f32_e32 v7, 0x4f800000, v6 2208; CGP-NEXT: v_rcp_iflag_f32_e32 v7, v7 2209; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v4 2210; CGP-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 2211; CGP-NEXT: v_mul_f32_e32 v7, 0x5f7ffffc, v7 2212; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v7 2213; CGP-NEXT: v_trunc_f32_e32 v8, v8 2214; CGP-NEXT: v_mac_f32_e32 v7, 0xcf800000, v8 2215; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 2216; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 2217; CGP-NEXT: v_xor_b32_e32 v0, v0, v4 2218; CGP-NEXT: v_xor_b32_e32 v1, v1, v4 2219; CGP-NEXT: v_mul_lo_u32 v9, -1, v7 2220; CGP-NEXT: v_mul_lo_u32 v10, s6, v8 2221; CGP-NEXT: v_mul_hi_u32 v12, s6, v7 2222; CGP-NEXT: v_mul_lo_u32 v11, s6, v7 2223; CGP-NEXT: s_mov_b32 s7, 0x12d8fb 2224; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2225; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2226; CGP-NEXT: v_mul_lo_u32 v10, v8, v11 2227; CGP-NEXT: v_mul_lo_u32 v12, v7, v9 2228; CGP-NEXT: v_mul_hi_u32 v13, v7, v11 2229; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 2230; CGP-NEXT: s_bfe_i32 s8, -1, 0x10000 2231; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2232; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2233; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v13 2234; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2235; CGP-NEXT: v_mul_lo_u32 v13, v8, v9 2236; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2237; CGP-NEXT: v_mul_hi_u32 v12, v7, v9 2238; CGP-NEXT: v_add_i32_e32 v11, vcc, v13, v11 2239; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2240; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2241; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2242; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2243; CGP-NEXT: v_mul_hi_u32 v9, v8, v9 2244; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2245; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2246; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2247; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2248; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2249; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc 2250; CGP-NEXT: v_mul_lo_u32 v11, -1, v7 2251; CGP-NEXT: v_mul_lo_u32 v12, s6, v10 2252; CGP-NEXT: v_mul_hi_u32 v14, s6, v7 2253; CGP-NEXT: v_mul_lo_u32 v13, s6, v7 2254; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 2255; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2256; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2257; CGP-NEXT: v_mul_lo_u32 v12, v10, v13 2258; CGP-NEXT: v_mul_lo_u32 v14, v7, v11 2259; CGP-NEXT: v_mul_hi_u32 v9, v7, v13 2260; CGP-NEXT: v_mul_hi_u32 v13, v10, v13 2261; CGP-NEXT: v_mac_f32_e32 v5, 0x4f800000, v6 2262; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2263; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2264; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 2265; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 2266; CGP-NEXT: v_mul_lo_u32 v12, v10, v11 2267; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v14, v9 2268; CGP-NEXT: v_mul_hi_u32 v14, v7, v11 2269; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2270; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2271; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2272; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2273; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v14 2274; CGP-NEXT: v_mul_hi_u32 v10, v10, v11 2275; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 2276; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2277; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v12 2278; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2279; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v10, vcc 2280; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2281; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 2282; CGP-NEXT: v_mul_lo_u32 v9, v1, v7 2283; CGP-NEXT: v_mul_lo_u32 v10, v0, v8 2284; CGP-NEXT: v_mul_hi_u32 v11, v0, v7 2285; CGP-NEXT: v_mul_hi_u32 v7, v1, v7 2286; CGP-NEXT: v_rcp_iflag_f32_e32 v5, v5 2287; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2288; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2289; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2290; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2291; CGP-NEXT: v_mul_lo_u32 v11, v1, v8 2292; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2293; CGP-NEXT: v_mul_hi_u32 v10, v0, v8 2294; CGP-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2295; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2296; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v10 2297; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2298; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2299; CGP-NEXT: v_mul_hi_u32 v8, v1, v8 2300; CGP-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2301; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2302; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2303; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2304; CGP-NEXT: v_mul_lo_u32 v9, 0, v7 2305; CGP-NEXT: v_mul_lo_u32 v8, s7, v8 2306; CGP-NEXT: v_mul_lo_u32 v10, s7, v7 2307; CGP-NEXT: v_mul_hi_u32 v7, s7, v7 2308; CGP-NEXT: v_mul_f32_e32 v5, 0x5f7ffffc, v5 2309; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2310; CGP-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2311; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v10 2312; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v1, v7, vcc 2313; CGP-NEXT: v_sub_i32_e64 v1, s[4:5], v1, v7 2314; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v0 2315; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2316; CGP-NEXT: v_mov_b32_e32 v9, s8 2317; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 2318; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2319; CGP-NEXT: v_cndmask_b32_e64 v7, v9, v7, s[4:5] 2320; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v0 2321; CGP-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v1, vcc 2322; CGP-NEXT: s_bfe_i32 s4, -1, 0x10000 2323; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v9 2324; CGP-NEXT: v_cndmask_b32_e64 v10, 0, -1, vcc 2325; CGP-NEXT: v_mov_b32_e32 v11, s4 2326; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 2327; CGP-NEXT: v_cndmask_b32_e32 v10, v11, v10, vcc 2328; CGP-NEXT: v_subrev_i32_e32 v11, vcc, s7, v9 2329; CGP-NEXT: v_subbrev_u32_e32 v12, vcc, 0, v1, vcc 2330; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2331; CGP-NEXT: v_cndmask_b32_e32 v9, v9, v11, vcc 2332; CGP-NEXT: v_cndmask_b32_e32 v1, v1, v12, vcc 2333; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 2334; CGP-NEXT: v_mul_f32_e32 v7, 0x2f800000, v5 2335; CGP-NEXT: v_trunc_f32_e32 v7, v7 2336; CGP-NEXT: v_mac_f32_e32 v5, 0xcf800000, v7 2337; CGP-NEXT: v_cvt_u32_f32_e32 v5, v5 2338; CGP-NEXT: v_cvt_u32_f32_e32 v7, v7 2339; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v9, vcc 2340; CGP-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 2341; CGP-NEXT: v_mul_lo_u32 v8, -1, v5 2342; CGP-NEXT: v_mul_lo_u32 v9, s6, v7 2343; CGP-NEXT: v_mul_hi_u32 v11, s6, v5 2344; CGP-NEXT: v_ashrrev_i32_e32 v6, 31, v3 2345; CGP-NEXT: v_mul_lo_u32 v10, s6, v5 2346; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v6 2347; CGP-NEXT: v_addc_u32_e32 v3, vcc, v3, v6, vcc 2348; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2349; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v11 2350; CGP-NEXT: v_mul_lo_u32 v9, v7, v10 2351; CGP-NEXT: v_mul_lo_u32 v11, v5, v8 2352; CGP-NEXT: v_mul_hi_u32 v12, v5, v10 2353; CGP-NEXT: v_mul_hi_u32 v10, v7, v10 2354; CGP-NEXT: v_xor_b32_e32 v0, v0, v4 2355; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2356; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2357; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2358; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2359; CGP-NEXT: v_mul_lo_u32 v12, v7, v8 2360; CGP-NEXT: v_add_i32_e32 v9, vcc, v11, v9 2361; CGP-NEXT: v_mul_hi_u32 v11, v5, v8 2362; CGP-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2363; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2364; CGP-NEXT: v_add_i32_e32 v10, vcc, v10, v11 2365; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2366; CGP-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2367; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 2368; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 2369; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2370; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2371; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v10 2372; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2373; CGP-NEXT: v_addc_u32_e64 v9, s[4:5], v7, v8, vcc 2374; CGP-NEXT: v_mul_lo_u32 v10, -1, v5 2375; CGP-NEXT: v_mul_lo_u32 v11, s6, v9 2376; CGP-NEXT: v_mul_hi_u32 v13, s6, v5 2377; CGP-NEXT: v_mul_lo_u32 v12, s6, v5 2378; CGP-NEXT: v_add_i32_e64 v7, s[4:5], v7, v8 2379; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 2380; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 2381; CGP-NEXT: v_mul_lo_u32 v11, v9, v12 2382; CGP-NEXT: v_mul_lo_u32 v13, v5, v10 2383; CGP-NEXT: v_mul_hi_u32 v8, v5, v12 2384; CGP-NEXT: v_mul_hi_u32 v12, v9, v12 2385; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 2386; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2387; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2388; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 2389; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 2390; CGP-NEXT: v_mul_lo_u32 v11, v9, v10 2391; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v13, v8 2392; CGP-NEXT: v_mul_hi_u32 v13, v5, v10 2393; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2394; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2395; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2396; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2397; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2398; CGP-NEXT: v_mul_hi_u32 v9, v9, v10 2399; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 2400; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2401; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v12, v11 2402; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 2403; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v9, vcc 2404; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v8 2405; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 2406; CGP-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc 2407; CGP-NEXT: v_xor_b32_e32 v1, v1, v4 2408; CGP-NEXT: v_mul_lo_u32 v8, v3, v5 2409; CGP-NEXT: v_mul_lo_u32 v9, v2, v7 2410; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v4 2411; CGP-NEXT: v_subb_u32_e32 v1, vcc, v1, v4, vcc 2412; CGP-NEXT: v_mul_hi_u32 v4, v2, v5 2413; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2414; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2415; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 2416; CGP-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 2417; CGP-NEXT: v_mul_lo_u32 v8, v3, v7 2418; CGP-NEXT: v_mul_hi_u32 v5, v3, v5 2419; CGP-NEXT: v_add_i32_e32 v4, vcc, v9, v4 2420; CGP-NEXT: v_mul_hi_u32 v9, v2, v7 2421; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 2422; CGP-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2423; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v9 2424; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2425; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 2426; CGP-NEXT: v_mul_hi_u32 v7, v3, v7 2427; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2428; CGP-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 2429; CGP-NEXT: v_add_i32_e32 v5, vcc, v8, v5 2430; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2431; CGP-NEXT: v_mul_lo_u32 v7, 0, v4 2432; CGP-NEXT: v_mul_lo_u32 v5, s7, v5 2433; CGP-NEXT: v_mul_lo_u32 v8, s7, v4 2434; CGP-NEXT: v_mul_hi_u32 v4, s7, v4 2435; CGP-NEXT: s_bfe_i32 s6, -1, 0x10000 2436; CGP-NEXT: v_add_i32_e32 v5, vcc, v7, v5 2437; CGP-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2438; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v8 2439; CGP-NEXT: v_subb_u32_e64 v5, s[4:5], v3, v4, vcc 2440; CGP-NEXT: v_sub_i32_e64 v3, s[4:5], v3, v4 2441; CGP-NEXT: v_cmp_le_u32_e64 s[4:5], s7, v2 2442; CGP-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2443; CGP-NEXT: v_mov_b32_e32 v7, s6 2444; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v5 2445; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2446; CGP-NEXT: v_cndmask_b32_e64 v4, v7, v4, s[4:5] 2447; CGP-NEXT: v_subrev_i32_e32 v7, vcc, s7, v2 2448; CGP-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v3, vcc 2449; CGP-NEXT: s_bfe_i32 s4, -1, 0x10000 2450; CGP-NEXT: v_cmp_le_u32_e32 vcc, s7, v7 2451; CGP-NEXT: v_cndmask_b32_e64 v8, 0, -1, vcc 2452; CGP-NEXT: v_mov_b32_e32 v9, s4 2453; CGP-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 2454; CGP-NEXT: v_cndmask_b32_e32 v8, v9, v8, vcc 2455; CGP-NEXT: v_subrev_i32_e32 v9, vcc, s7, v7 2456; CGP-NEXT: v_subbrev_u32_e32 v10, vcc, 0, v3, vcc 2457; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v8 2458; CGP-NEXT: v_cndmask_b32_e32 v7, v7, v9, vcc 2459; CGP-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc 2460; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2461; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc 2462; CGP-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc 2463; CGP-NEXT: v_xor_b32_e32 v2, v2, v6 2464; CGP-NEXT: v_xor_b32_e32 v3, v3, v6 2465; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v6 2466; CGP-NEXT: v_subb_u32_e32 v3, vcc, v3, v6, vcc 2467; CGP-NEXT: s_setpc_b64 s[30:31] 2468 %result = srem <2 x i64> %num, <i64 1235195, i64 1235195> 2469 ret <2 x i64> %result 2470} 2471 2472define i64 @v_srem_i64_pow2_shl_denom(i64 %x, i64 %y) { 2473; CHECK-LABEL: v_srem_i64_pow2_shl_denom: 2474; CHECK: ; %bb.0: 2475; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2476; CHECK-NEXT: s_mov_b64 s[4:5], 0x1000 2477; CHECK-NEXT: v_lshl_b64 v[5:6], s[4:5], v2 2478; CHECK-NEXT: v_mov_b32_e32 v4, v1 2479; CHECK-NEXT: v_mov_b32_e32 v3, v0 2480; CHECK-NEXT: v_or_b32_e32 v1, v4, v6 2481; CHECK-NEXT: v_mov_b32_e32 v0, 0 2482; CHECK-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 2483; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1 2484; CHECK-NEXT: s_and_saveexec_b64 s[4:5], vcc 2485; CHECK-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2486; CHECK-NEXT: s_cbranch_execz BB7_2 2487; CHECK-NEXT: ; %bb.1: 2488; CHECK-NEXT: v_ashrrev_i32_e32 v0, 31, v6 2489; CHECK-NEXT: v_add_i32_e32 v1, vcc, v5, v0 2490; CHECK-NEXT: v_addc_u32_e32 v2, vcc, v6, v0, vcc 2491; CHECK-NEXT: v_xor_b32_e32 v5, v1, v0 2492; CHECK-NEXT: v_xor_b32_e32 v0, v2, v0 2493; CHECK-NEXT: v_cvt_f32_u32_e32 v2, v5 2494; CHECK-NEXT: v_cvt_f32_u32_e32 v6, v0 2495; CHECK-NEXT: v_ashrrev_i32_e32 v1, 31, v4 2496; CHECK-NEXT: v_add_i32_e32 v3, vcc, v3, v1 2497; CHECK-NEXT: v_mac_f32_e32 v2, 0x4f800000, v6 2498; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v2 2499; CHECK-NEXT: v_addc_u32_e32 v4, vcc, v4, v1, vcc 2500; CHECK-NEXT: v_sub_i32_e32 v7, vcc, 0, v5 2501; CHECK-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 2502; CHECK-NEXT: v_mul_f32_e32 v6, 0x2f800000, v2 2503; CHECK-NEXT: v_trunc_f32_e32 v6, v6 2504; CHECK-NEXT: v_mac_f32_e32 v2, 0xcf800000, v6 2505; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v2 2506; CHECK-NEXT: v_cvt_u32_f32_e32 v6, v6 2507; CHECK-NEXT: v_subb_u32_e32 v8, vcc, 0, v0, vcc 2508; CHECK-NEXT: v_mul_lo_u32 v9, v8, v2 2509; CHECK-NEXT: v_mul_lo_u32 v10, v7, v6 2510; CHECK-NEXT: v_mul_hi_u32 v12, v7, v2 2511; CHECK-NEXT: v_mul_lo_u32 v11, v7, v2 2512; CHECK-NEXT: v_xor_b32_e32 v3, v3, v1 2513; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v10 2514; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v12 2515; CHECK-NEXT: v_mul_lo_u32 v10, v6, v11 2516; CHECK-NEXT: v_mul_lo_u32 v12, v2, v9 2517; CHECK-NEXT: v_mul_hi_u32 v13, v2, v11 2518; CHECK-NEXT: v_mul_hi_u32 v11, v6, v11 2519; CHECK-NEXT: v_xor_b32_e32 v4, v4, v1 2520; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v12 2521; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2522; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v13 2523; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2524; CHECK-NEXT: v_mul_lo_u32 v13, v6, v9 2525; CHECK-NEXT: v_add_i32_e32 v10, vcc, v12, v10 2526; CHECK-NEXT: v_mul_hi_u32 v12, v2, v9 2527; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v11 2528; CHECK-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2529; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2530; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2531; CHECK-NEXT: v_add_i32_e32 v12, vcc, v13, v12 2532; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9 2533; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10 2534; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2535; CHECK-NEXT: v_add_i32_e32 v11, vcc, v12, v11 2536; CHECK-NEXT: v_add_i32_e32 v9, vcc, v9, v11 2537; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v10 2538; CHECK-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v9, vcc 2539; CHECK-NEXT: v_mul_lo_u32 v8, v8, v2 2540; CHECK-NEXT: v_mul_lo_u32 v11, v7, v10 2541; CHECK-NEXT: v_mul_lo_u32 v12, v7, v2 2542; CHECK-NEXT: v_mul_hi_u32 v7, v7, v2 2543; CHECK-NEXT: v_add_i32_e64 v6, s[4:5], v6, v9 2544; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 2545; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 2546; CHECK-NEXT: v_mul_lo_u32 v8, v10, v12 2547; CHECK-NEXT: v_mul_lo_u32 v11, v2, v7 2548; CHECK-NEXT: v_mul_hi_u32 v9, v2, v12 2549; CHECK-NEXT: v_mul_hi_u32 v12, v10, v12 2550; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 2551; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2552; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 2553; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 2554; CHECK-NEXT: v_mul_lo_u32 v9, v10, v7 2555; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 2556; CHECK-NEXT: v_mul_hi_u32 v11, v2, v7 2557; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 2558; CHECK-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2559; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 2560; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2561; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2562; CHECK-NEXT: v_mul_hi_u32 v7, v10, v7 2563; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 2564; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 2565; CHECK-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 2566; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v7, v9 2567; CHECK-NEXT: v_addc_u32_e32 v6, vcc, v6, v7, vcc 2568; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 2569; CHECK-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc 2570; CHECK-NEXT: v_mul_lo_u32 v7, v4, v2 2571; CHECK-NEXT: v_mul_lo_u32 v8, v3, v6 2572; CHECK-NEXT: v_mul_hi_u32 v9, v3, v2 2573; CHECK-NEXT: v_mul_hi_u32 v2, v4, v2 2574; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v8 2575; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2576; CHECK-NEXT: v_add_i32_e32 v7, vcc, v7, v9 2577; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2578; CHECK-NEXT: v_mul_lo_u32 v9, v4, v6 2579; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2580; CHECK-NEXT: v_mul_hi_u32 v8, v3, v6 2581; CHECK-NEXT: v_add_i32_e32 v2, vcc, v9, v2 2582; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 2583; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v8 2584; CHECK-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 2585; CHECK-NEXT: v_add_i32_e32 v8, vcc, v9, v8 2586; CHECK-NEXT: v_mul_hi_u32 v6, v4, v6 2587; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v7 2588; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2589; CHECK-NEXT: v_add_i32_e32 v7, vcc, v8, v7 2590; CHECK-NEXT: v_add_i32_e32 v6, vcc, v6, v7 2591; CHECK-NEXT: v_mul_lo_u32 v7, v0, v2 2592; CHECK-NEXT: v_mul_lo_u32 v6, v5, v6 2593; CHECK-NEXT: v_mul_lo_u32 v8, v5, v2 2594; CHECK-NEXT: v_mul_hi_u32 v2, v5, v2 2595; CHECK-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2596; CHECK-NEXT: v_add_i32_e32 v2, vcc, v6, v2 2597; CHECK-NEXT: v_sub_i32_e32 v3, vcc, v3, v8 2598; CHECK-NEXT: v_subb_u32_e64 v6, s[4:5], v4, v2, vcc 2599; CHECK-NEXT: v_sub_i32_e64 v2, s[4:5], v4, v2 2600; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v0 2601; CHECK-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2602; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v5 2603; CHECK-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 2604; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v6, v0 2605; CHECK-NEXT: v_subb_u32_e32 v2, vcc, v2, v0, vcc 2606; CHECK-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5] 2607; CHECK-NEXT: v_sub_i32_e32 v7, vcc, v3, v5 2608; CHECK-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v2, vcc 2609; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v0 2610; CHECK-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 2611; CHECK-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v5 2612; CHECK-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2613; CHECK-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v0 2614; CHECK-NEXT: v_subb_u32_e32 v0, vcc, v2, v0, vcc 2615; CHECK-NEXT: v_sub_i32_e32 v2, vcc, v7, v5 2616; CHECK-NEXT: v_cndmask_b32_e64 v9, v9, v10, s[4:5] 2617; CHECK-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 2618; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v9 2619; CHECK-NEXT: v_cndmask_b32_e32 v2, v7, v2, vcc 2620; CHECK-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc 2621; CHECK-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2622; CHECK-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc 2623; CHECK-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc 2624; CHECK-NEXT: v_xor_b32_e32 v2, v2, v1 2625; CHECK-NEXT: v_xor_b32_e32 v3, v0, v1 2626; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v2, v1 2627; CHECK-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc 2628; CHECK-NEXT: ; implicit-def: $vgpr5_vgpr6 2629; CHECK-NEXT: ; implicit-def: $vgpr3 2630; CHECK-NEXT: BB7_2: ; %Flow 2631; CHECK-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 2632; CHECK-NEXT: s_xor_b64 exec, exec, s[4:5] 2633; CHECK-NEXT: s_cbranch_execz BB7_4 2634; CHECK-NEXT: ; %bb.3: 2635; CHECK-NEXT: v_cvt_f32_u32_e32 v0, v5 2636; CHECK-NEXT: v_sub_i32_e32 v1, vcc, 0, v5 2637; CHECK-NEXT: v_rcp_iflag_f32_e32 v0, v0 2638; CHECK-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 2639; CHECK-NEXT: v_cvt_u32_f32_e32 v0, v0 2640; CHECK-NEXT: v_mul_lo_u32 v1, v1, v0 2641; CHECK-NEXT: v_mul_hi_u32 v1, v0, v1 2642; CHECK-NEXT: v_add_i32_e32 v0, vcc, v0, v1 2643; CHECK-NEXT: v_mul_hi_u32 v0, v3, v0 2644; CHECK-NEXT: v_mul_lo_u32 v0, v0, v5 2645; CHECK-NEXT: v_sub_i32_e32 v0, vcc, v3, v0 2646; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v5 2647; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v5 2648; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 2649; CHECK-NEXT: v_sub_i32_e32 v1, vcc, v0, v5 2650; CHECK-NEXT: v_cmp_ge_u32_e32 vcc, v0, v5 2651; CHECK-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 2652; CHECK-NEXT: v_mov_b32_e32 v1, 0 2653; CHECK-NEXT: BB7_4: 2654; CHECK-NEXT: s_or_b64 exec, exec, s[4:5] 2655; CHECK-NEXT: s_setpc_b64 s[30:31] 2656 %shl.y = shl i64 4096, %y 2657 %r = srem i64 %x, %shl.y 2658 ret i64 %r 2659} 2660 2661define <2 x i64> @v_srem_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) { 2662; GISEL-LABEL: v_srem_v2i64_pow2_shl_denom: 2663; GISEL: ; %bb.0: 2664; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2665; GISEL-NEXT: s_mov_b64 s[6:7], 0x1000 2666; GISEL-NEXT: v_lshl_b64 v[4:5], s[6:7], v4 2667; GISEL-NEXT: v_ashrrev_i32_e32 v7, 31, v5 2668; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 2669; GISEL-NEXT: v_addc_u32_e32 v5, vcc, v5, v7, vcc 2670; GISEL-NEXT: v_xor_b32_e32 v8, v4, v7 2671; GISEL-NEXT: v_xor_b32_e32 v5, v5, v7 2672; GISEL-NEXT: v_cvt_f32_u32_e32 v7, v8 2673; GISEL-NEXT: v_cvt_f32_u32_e32 v9, v5 2674; GISEL-NEXT: v_ashrrev_i32_e32 v4, 31, v1 2675; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v4 2676; GISEL-NEXT: v_mac_f32_e32 v7, 0x4f800000, v9 2677; GISEL-NEXT: v_rcp_iflag_f32_e32 v7, v7 2678; GISEL-NEXT: v_xor_b32_e32 v9, v0, v4 2679; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v4, vcc 2680; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v7 2681; GISEL-NEXT: v_mul_f32_e32 v7, 0x2f800000, v0 2682; GISEL-NEXT: v_trunc_f32_e32 v7, v7 2683; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v7 2684; GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0 2685; GISEL-NEXT: v_cvt_u32_f32_e32 v7, v7 2686; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v8 2687; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v5, vcc 2688; GISEL-NEXT: v_mul_lo_u32 v12, v11, v0 2689; GISEL-NEXT: v_mul_lo_u32 v13, v10, v7 2690; GISEL-NEXT: v_mul_hi_u32 v15, v10, v0 2691; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2692; GISEL-NEXT: v_xor_b32_e32 v16, v1, v4 2693; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2694; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2695; GISEL-NEXT: v_mul_lo_u32 v13, v7, v14 2696; GISEL-NEXT: v_mul_lo_u32 v15, v0, v12 2697; GISEL-NEXT: v_mul_hi_u32 v1, v0, v14 2698; GISEL-NEXT: v_mul_hi_u32 v14, v7, v14 2699; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2700; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2701; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 2702; GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 2703; GISEL-NEXT: v_mul_lo_u32 v13, v7, v12 2704; GISEL-NEXT: v_add_i32_e32 v1, vcc, v15, v1 2705; GISEL-NEXT: v_mul_hi_u32 v15, v0, v12 2706; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2707; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2708; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2709; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2710; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2711; GISEL-NEXT: v_mul_hi_u32 v12, v7, v12 2712; GISEL-NEXT: v_add_i32_e32 v1, vcc, v13, v1 2713; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2714; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 2715; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2716; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v1 2717; GISEL-NEXT: v_addc_u32_e64 v1, s[4:5], v7, v12, vcc 2718; GISEL-NEXT: v_mul_lo_u32 v11, v11, v0 2719; GISEL-NEXT: v_mul_lo_u32 v13, v10, v1 2720; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2721; GISEL-NEXT: v_mul_hi_u32 v10, v10, v0 2722; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v12 2723; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2724; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2725; GISEL-NEXT: v_mul_lo_u32 v11, v1, v14 2726; GISEL-NEXT: v_mul_lo_u32 v13, v0, v10 2727; GISEL-NEXT: v_mul_hi_u32 v12, v0, v14 2728; GISEL-NEXT: v_mul_hi_u32 v14, v1, v14 2729; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 2730; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2731; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2732; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2733; GISEL-NEXT: v_mul_lo_u32 v12, v1, v10 2734; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 2735; GISEL-NEXT: v_mul_hi_u32 v13, v0, v10 2736; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2737; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2738; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 2739; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 2740; GISEL-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 2741; GISEL-NEXT: v_mul_hi_u32 v1, v1, v10 2742; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2743; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2744; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v13, v12 2745; GISEL-NEXT: v_add_i32_e64 v1, s[4:5], v1, v10 2746; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v7, v1, vcc 2747; GISEL-NEXT: v_add_i32_e32 v7, vcc, v0, v11 2748; GISEL-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc 2749; GISEL-NEXT: v_mul_lo_u32 v11, v16, v7 2750; GISEL-NEXT: v_mul_lo_u32 v12, v9, v10 2751; GISEL-NEXT: v_lshl_b64 v[0:1], s[6:7], v6 2752; GISEL-NEXT: v_mul_hi_u32 v6, v9, v7 2753; GISEL-NEXT: v_mul_hi_u32 v7, v16, v7 2754; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2755; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2756; GISEL-NEXT: v_add_i32_e32 v6, vcc, v11, v6 2757; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2758; GISEL-NEXT: v_mul_lo_u32 v11, v16, v10 2759; GISEL-NEXT: v_add_i32_e32 v6, vcc, v12, v6 2760; GISEL-NEXT: v_mul_hi_u32 v12, v9, v10 2761; GISEL-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2762; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 2763; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v12 2764; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 2765; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 2766; GISEL-NEXT: v_mul_hi_u32 v10, v16, v10 2767; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2768; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 2769; GISEL-NEXT: v_add_i32_e32 v7, vcc, v11, v7 2770; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 2771; GISEL-NEXT: v_mul_lo_u32 v10, v5, v6 2772; GISEL-NEXT: v_mul_lo_u32 v7, v8, v7 2773; GISEL-NEXT: v_mul_lo_u32 v11, v8, v6 2774; GISEL-NEXT: v_mul_hi_u32 v6, v8, v6 2775; GISEL-NEXT: v_add_i32_e32 v7, vcc, v10, v7 2776; GISEL-NEXT: v_add_i32_e32 v6, vcc, v7, v6 2777; GISEL-NEXT: v_sub_i32_e32 v7, vcc, v9, v11 2778; GISEL-NEXT: v_subb_u32_e64 v9, s[4:5], v16, v6, vcc 2779; GISEL-NEXT: v_sub_i32_e64 v6, s[4:5], v16, v6 2780; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v5 2781; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 2782; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v7, v8 2783; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2784; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v5 2785; GISEL-NEXT: v_subb_u32_e32 v6, vcc, v6, v5, vcc 2786; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 2787; GISEL-NEXT: v_sub_i32_e32 v11, vcc, v7, v8 2788; GISEL-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v6, vcc 2789; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v5 2790; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 2791; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v11, v8 2792; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 2793; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v5 2794; GISEL-NEXT: v_subb_u32_e32 v5, vcc, v6, v5, vcc 2795; GISEL-NEXT: v_sub_i32_e32 v6, vcc, v11, v8 2796; GISEL-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 2797; GISEL-NEXT: v_subbrev_u32_e32 v5, vcc, 0, v5, vcc 2798; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 2799; GISEL-NEXT: v_cndmask_b32_e32 v6, v11, v6, vcc 2800; GISEL-NEXT: v_cndmask_b32_e32 v5, v12, v5, vcc 2801; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 2802; GISEL-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc 2803; GISEL-NEXT: v_ashrrev_i32_e32 v7, 31, v1 2804; GISEL-NEXT: v_cndmask_b32_e32 v5, v9, v5, vcc 2805; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v7 2806; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v7, vcc 2807; GISEL-NEXT: v_xor_b32_e32 v8, v0, v7 2808; GISEL-NEXT: v_xor_b32_e32 v7, v1, v7 2809; GISEL-NEXT: v_cvt_f32_u32_e32 v0, v8 2810; GISEL-NEXT: v_cvt_f32_u32_e32 v1, v7 2811; GISEL-NEXT: v_ashrrev_i32_e32 v9, 31, v3 2812; GISEL-NEXT: v_xor_b32_e32 v6, v6, v4 2813; GISEL-NEXT: v_xor_b32_e32 v5, v5, v4 2814; GISEL-NEXT: v_mac_f32_e32 v0, 0x4f800000, v1 2815; GISEL-NEXT: v_rcp_iflag_f32_e32 v0, v0 2816; GISEL-NEXT: v_add_i32_e32 v1, vcc, v2, v9 2817; GISEL-NEXT: v_addc_u32_e32 v2, vcc, v3, v9, vcc 2818; GISEL-NEXT: v_mul_f32_e32 v0, 0x5f7ffffc, v0 2819; GISEL-NEXT: v_xor_b32_e32 v3, v1, v9 2820; GISEL-NEXT: v_mul_f32_e32 v1, 0x2f800000, v0 2821; GISEL-NEXT: v_trunc_f32_e32 v1, v1 2822; GISEL-NEXT: v_mac_f32_e32 v0, 0xcf800000, v1 2823; GISEL-NEXT: v_cvt_u32_f32_e32 v0, v0 2824; GISEL-NEXT: v_cvt_u32_f32_e32 v1, v1 2825; GISEL-NEXT: v_sub_i32_e32 v10, vcc, 0, v8 2826; GISEL-NEXT: v_subb_u32_e32 v11, vcc, 0, v7, vcc 2827; GISEL-NEXT: v_mul_lo_u32 v12, v11, v0 2828; GISEL-NEXT: v_mul_lo_u32 v13, v10, v1 2829; GISEL-NEXT: v_mul_hi_u32 v15, v10, v0 2830; GISEL-NEXT: v_mul_lo_u32 v14, v10, v0 2831; GISEL-NEXT: v_xor_b32_e32 v2, v2, v9 2832; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v13 2833; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v15 2834; GISEL-NEXT: v_mul_lo_u32 v13, v1, v14 2835; GISEL-NEXT: v_mul_lo_u32 v15, v0, v12 2836; GISEL-NEXT: v_mul_hi_u32 v16, v0, v14 2837; GISEL-NEXT: v_mul_hi_u32 v14, v1, v14 2838; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v15 2839; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2840; GISEL-NEXT: v_add_i32_e32 v13, vcc, v13, v16 2841; GISEL-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 2842; GISEL-NEXT: v_mul_lo_u32 v16, v1, v12 2843; GISEL-NEXT: v_add_i32_e32 v13, vcc, v15, v13 2844; GISEL-NEXT: v_mul_hi_u32 v15, v0, v12 2845; GISEL-NEXT: v_add_i32_e32 v14, vcc, v16, v14 2846; GISEL-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 2847; GISEL-NEXT: v_add_i32_e32 v14, vcc, v14, v15 2848; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 2849; GISEL-NEXT: v_add_i32_e32 v15, vcc, v16, v15 2850; GISEL-NEXT: v_mul_hi_u32 v12, v1, v12 2851; GISEL-NEXT: v_add_i32_e32 v13, vcc, v14, v13 2852; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 2853; GISEL-NEXT: v_add_i32_e32 v14, vcc, v15, v14 2854; GISEL-NEXT: v_add_i32_e32 v12, vcc, v12, v14 2855; GISEL-NEXT: v_add_i32_e32 v0, vcc, v0, v13 2856; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc 2857; GISEL-NEXT: v_mul_lo_u32 v11, v11, v0 2858; GISEL-NEXT: v_mul_lo_u32 v14, v10, v13 2859; GISEL-NEXT: v_mul_lo_u32 v15, v10, v0 2860; GISEL-NEXT: v_mul_hi_u32 v10, v10, v0 2861; GISEL-NEXT: v_add_i32_e64 v1, s[4:5], v1, v12 2862; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2863; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 2864; GISEL-NEXT: v_mul_lo_u32 v11, v13, v15 2865; GISEL-NEXT: v_mul_lo_u32 v14, v0, v10 2866; GISEL-NEXT: v_mul_hi_u32 v12, v0, v15 2867; GISEL-NEXT: v_mul_hi_u32 v15, v13, v15 2868; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 2869; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2870; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12 2871; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 2872; GISEL-NEXT: v_mul_lo_u32 v12, v13, v10 2873; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11 2874; GISEL-NEXT: v_mul_hi_u32 v14, v0, v10 2875; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 2876; GISEL-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 2877; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v12, v14 2878; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 2879; GISEL-NEXT: v_add_i32_e64 v14, s[4:5], v15, v14 2880; GISEL-NEXT: v_mul_hi_u32 v10, v13, v10 2881; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 2882; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 2883; GISEL-NEXT: v_add_i32_e64 v12, s[4:5], v14, v12 2884; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v10, v12 2885; GISEL-NEXT: v_addc_u32_e32 v1, vcc, v1, v10, vcc 2886; GISEL-NEXT: v_add_i32_e32 v10, vcc, v0, v11 2887; GISEL-NEXT: v_addc_u32_e32 v11, vcc, 0, v1, vcc 2888; GISEL-NEXT: v_mul_lo_u32 v12, v2, v10 2889; GISEL-NEXT: v_mul_lo_u32 v13, v3, v11 2890; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v6, v4 2891; GISEL-NEXT: v_subb_u32_e32 v1, vcc, v5, v4, vcc 2892; GISEL-NEXT: v_mul_hi_u32 v4, v3, v10 2893; GISEL-NEXT: v_add_i32_e32 v5, vcc, v12, v13 2894; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2895; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2896; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 2897; GISEL-NEXT: v_mul_lo_u32 v5, v2, v11 2898; GISEL-NEXT: v_mul_hi_u32 v10, v2, v10 2899; GISEL-NEXT: v_add_i32_e32 v4, vcc, v6, v4 2900; GISEL-NEXT: v_mul_hi_u32 v6, v3, v11 2901; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v10 2902; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 2903; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v6 2904; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc 2905; GISEL-NEXT: v_add_i32_e32 v6, vcc, v10, v6 2906; GISEL-NEXT: v_mul_hi_u32 v10, v2, v11 2907; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2908; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 2909; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 2910; GISEL-NEXT: v_add_i32_e32 v5, vcc, v10, v5 2911; GISEL-NEXT: v_mul_lo_u32 v6, v7, v4 2912; GISEL-NEXT: v_mul_lo_u32 v5, v8, v5 2913; GISEL-NEXT: v_mul_lo_u32 v10, v8, v4 2914; GISEL-NEXT: v_mul_hi_u32 v4, v8, v4 2915; GISEL-NEXT: v_add_i32_e32 v5, vcc, v6, v5 2916; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 2917; GISEL-NEXT: v_sub_i32_e32 v3, vcc, v3, v10 2918; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v2, v4, vcc 2919; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v2, v4 2920; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v7 2921; GISEL-NEXT: v_cndmask_b32_e64 v4, 0, -1, s[4:5] 2922; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v3, v8 2923; GISEL-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 2924; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v7 2925; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v7, vcc 2926; GISEL-NEXT: v_cndmask_b32_e64 v4, v4, v6, s[4:5] 2927; GISEL-NEXT: v_sub_i32_e32 v6, vcc, v3, v8 2928; GISEL-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v2, vcc 2929; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v7 2930; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 2931; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v6, v8 2932; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v7, vcc 2933; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 2934; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v7 2935; GISEL-NEXT: v_sub_i32_e32 v7, vcc, v6, v8 2936; GISEL-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 2937; GISEL-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 2938; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 2939; GISEL-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc 2940; GISEL-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc 2941; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v4 2942; GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc 2943; GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc 2944; GISEL-NEXT: v_xor_b32_e32 v3, v3, v9 2945; GISEL-NEXT: v_xor_b32_e32 v4, v2, v9 2946; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v3, v9 2947; GISEL-NEXT: v_subb_u32_e32 v3, vcc, v4, v9, vcc 2948; GISEL-NEXT: s_setpc_b64 s[30:31] 2949; 2950; CGP-LABEL: v_srem_v2i64_pow2_shl_denom: 2951; CGP: ; %bb.0: 2952; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2953; CGP-NEXT: s_mov_b64 s[4:5], 0x1000 2954; CGP-NEXT: v_mov_b32_e32 v5, v2 2955; CGP-NEXT: v_mov_b32_e32 v7, v3 2956; CGP-NEXT: v_lshl_b64 v[2:3], s[4:5], v4 2957; CGP-NEXT: v_mov_b32_e32 v9, v1 2958; CGP-NEXT: v_mov_b32_e32 v8, v0 2959; CGP-NEXT: v_or_b32_e32 v1, v9, v3 2960; CGP-NEXT: v_mov_b32_e32 v0, 0 2961; CGP-NEXT: v_lshl_b64 v[10:11], s[4:5], v6 2962; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1] 2963; CGP-NEXT: ; implicit-def: $vgpr0_vgpr1 2964; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 2965; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 2966; CGP-NEXT: s_cbranch_execz BB8_2 2967; CGP-NEXT: ; %bb.1: 2968; CGP-NEXT: v_ashrrev_i32_e32 v0, 31, v3 2969; CGP-NEXT: v_add_i32_e32 v1, vcc, v2, v0 2970; CGP-NEXT: v_addc_u32_e32 v2, vcc, v3, v0, vcc 2971; CGP-NEXT: v_xor_b32_e32 v3, v1, v0 2972; CGP-NEXT: v_xor_b32_e32 v0, v2, v0 2973; CGP-NEXT: v_cvt_f32_u32_e32 v2, v3 2974; CGP-NEXT: v_cvt_f32_u32_e32 v4, v0 2975; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v9 2976; CGP-NEXT: v_mac_f32_e32 v2, 0x4f800000, v4 2977; CGP-NEXT: v_rcp_iflag_f32_e32 v2, v2 2978; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v1 2979; CGP-NEXT: v_addc_u32_e32 v6, vcc, v9, v1, vcc 2980; CGP-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v2 2981; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v2 2982; CGP-NEXT: v_trunc_f32_e32 v8, v8 2983; CGP-NEXT: v_mac_f32_e32 v2, 0xcf800000, v8 2984; CGP-NEXT: v_cvt_u32_f32_e32 v2, v2 2985; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 2986; CGP-NEXT: v_sub_i32_e32 v9, vcc, 0, v3 2987; CGP-NEXT: v_subb_u32_e32 v12, vcc, 0, v0, vcc 2988; CGP-NEXT: v_mul_lo_u32 v13, v12, v2 2989; CGP-NEXT: v_mul_lo_u32 v14, v9, v8 2990; CGP-NEXT: v_mul_hi_u32 v16, v9, v2 2991; CGP-NEXT: v_mul_lo_u32 v15, v9, v2 2992; CGP-NEXT: v_xor_b32_e32 v4, v4, v1 2993; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 2994; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v16 2995; CGP-NEXT: v_mul_lo_u32 v14, v8, v15 2996; CGP-NEXT: v_mul_lo_u32 v16, v2, v13 2997; CGP-NEXT: v_mul_hi_u32 v17, v2, v15 2998; CGP-NEXT: v_mul_hi_u32 v15, v8, v15 2999; CGP-NEXT: v_xor_b32_e32 v6, v6, v1 3000; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v16 3001; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3002; CGP-NEXT: v_add_i32_e32 v14, vcc, v14, v17 3003; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3004; CGP-NEXT: v_mul_lo_u32 v17, v8, v13 3005; CGP-NEXT: v_add_i32_e32 v14, vcc, v16, v14 3006; CGP-NEXT: v_mul_hi_u32 v16, v2, v13 3007; CGP-NEXT: v_add_i32_e32 v15, vcc, v17, v15 3008; CGP-NEXT: v_cndmask_b32_e64 v17, 0, 1, vcc 3009; CGP-NEXT: v_add_i32_e32 v15, vcc, v15, v16 3010; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, vcc 3011; CGP-NEXT: v_add_i32_e32 v16, vcc, v17, v16 3012; CGP-NEXT: v_mul_hi_u32 v13, v8, v13 3013; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 3014; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 3015; CGP-NEXT: v_add_i32_e32 v15, vcc, v16, v15 3016; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v15 3017; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v14 3018; CGP-NEXT: v_addc_u32_e64 v14, s[4:5], v8, v13, vcc 3019; CGP-NEXT: v_mul_lo_u32 v12, v12, v2 3020; CGP-NEXT: v_mul_lo_u32 v15, v9, v14 3021; CGP-NEXT: v_mul_lo_u32 v16, v9, v2 3022; CGP-NEXT: v_mul_hi_u32 v9, v9, v2 3023; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v13 3024; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 3025; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v12, v9 3026; CGP-NEXT: v_mul_lo_u32 v12, v14, v16 3027; CGP-NEXT: v_mul_lo_u32 v15, v2, v9 3028; CGP-NEXT: v_mul_hi_u32 v13, v2, v16 3029; CGP-NEXT: v_mul_hi_u32 v16, v14, v16 3030; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v15 3031; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3032; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v12, v13 3033; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 3034; CGP-NEXT: v_mul_lo_u32 v13, v14, v9 3035; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v15, v12 3036; CGP-NEXT: v_mul_hi_u32 v15, v2, v9 3037; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v16 3038; CGP-NEXT: v_cndmask_b32_e64 v16, 0, 1, s[4:5] 3039; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v13, v15 3040; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, s[4:5] 3041; CGP-NEXT: v_add_i32_e64 v15, s[4:5], v16, v15 3042; CGP-NEXT: v_mul_hi_u32 v9, v14, v9 3043; CGP-NEXT: v_add_i32_e64 v12, s[4:5], v13, v12 3044; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 3045; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v15, v13 3046; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v13 3047; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v9, vcc 3048; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v12 3049; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 3050; CGP-NEXT: v_mul_lo_u32 v9, v6, v2 3051; CGP-NEXT: v_mul_lo_u32 v12, v4, v8 3052; CGP-NEXT: v_mul_hi_u32 v13, v4, v2 3053; CGP-NEXT: v_mul_hi_u32 v2, v6, v2 3054; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v12 3055; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3056; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v13 3057; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3058; CGP-NEXT: v_mul_lo_u32 v13, v6, v8 3059; CGP-NEXT: v_add_i32_e32 v9, vcc, v12, v9 3060; CGP-NEXT: v_mul_hi_u32 v12, v4, v8 3061; CGP-NEXT: v_add_i32_e32 v2, vcc, v13, v2 3062; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3063; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v12 3064; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3065; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 3066; CGP-NEXT: v_mul_hi_u32 v8, v6, v8 3067; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v9 3068; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3069; CGP-NEXT: v_add_i32_e32 v9, vcc, v12, v9 3070; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 3071; CGP-NEXT: v_mul_lo_u32 v9, v0, v2 3072; CGP-NEXT: v_mul_lo_u32 v8, v3, v8 3073; CGP-NEXT: v_mul_lo_u32 v12, v3, v2 3074; CGP-NEXT: v_mul_hi_u32 v2, v3, v2 3075; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 3076; CGP-NEXT: v_add_i32_e32 v2, vcc, v8, v2 3077; CGP-NEXT: v_sub_i32_e32 v4, vcc, v4, v12 3078; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v6, v2, vcc 3079; CGP-NEXT: v_sub_i32_e64 v2, s[4:5], v6, v2 3080; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v0 3081; CGP-NEXT: v_cndmask_b32_e64 v6, 0, -1, s[4:5] 3082; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 3083; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 3084; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v0 3085; CGP-NEXT: v_subb_u32_e32 v2, vcc, v2, v0, vcc 3086; CGP-NEXT: v_cndmask_b32_e64 v6, v6, v9, s[4:5] 3087; CGP-NEXT: v_sub_i32_e32 v9, vcc, v4, v3 3088; CGP-NEXT: v_subbrev_u32_e64 v12, s[4:5], 0, v2, vcc 3089; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v12, v0 3090; CGP-NEXT: v_cndmask_b32_e64 v13, 0, -1, s[4:5] 3091; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v3 3092; CGP-NEXT: v_cndmask_b32_e64 v14, 0, -1, s[4:5] 3093; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v12, v0 3094; CGP-NEXT: v_subb_u32_e32 v0, vcc, v2, v0, vcc 3095; CGP-NEXT: v_sub_i32_e32 v2, vcc, v9, v3 3096; CGP-NEXT: v_cndmask_b32_e64 v13, v13, v14, s[4:5] 3097; CGP-NEXT: v_subbrev_u32_e32 v0, vcc, 0, v0, vcc 3098; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 3099; CGP-NEXT: v_cndmask_b32_e32 v2, v9, v2, vcc 3100; CGP-NEXT: v_cndmask_b32_e32 v0, v12, v0, vcc 3101; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v6 3102; CGP-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc 3103; CGP-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc 3104; CGP-NEXT: v_xor_b32_e32 v2, v2, v1 3105; CGP-NEXT: v_xor_b32_e32 v3, v0, v1 3106; CGP-NEXT: v_sub_i32_e32 v0, vcc, v2, v1 3107; CGP-NEXT: v_subb_u32_e32 v1, vcc, v3, v1, vcc 3108; CGP-NEXT: ; implicit-def: $vgpr2_vgpr3 3109; CGP-NEXT: ; implicit-def: $vgpr8 3110; CGP-NEXT: BB8_2: ; %Flow2 3111; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 3112; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 3113; CGP-NEXT: s_cbranch_execz BB8_4 3114; CGP-NEXT: ; %bb.3: 3115; CGP-NEXT: v_cvt_f32_u32_e32 v0, v2 3116; CGP-NEXT: v_sub_i32_e32 v1, vcc, 0, v2 3117; CGP-NEXT: v_rcp_iflag_f32_e32 v0, v0 3118; CGP-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 3119; CGP-NEXT: v_cvt_u32_f32_e32 v0, v0 3120; CGP-NEXT: v_mul_lo_u32 v1, v1, v0 3121; CGP-NEXT: v_mul_hi_u32 v1, v0, v1 3122; CGP-NEXT: v_add_i32_e32 v0, vcc, v0, v1 3123; CGP-NEXT: v_mul_hi_u32 v0, v8, v0 3124; CGP-NEXT: v_mul_lo_u32 v0, v0, v2 3125; CGP-NEXT: v_sub_i32_e32 v0, vcc, v8, v0 3126; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 3127; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 3128; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 3129; CGP-NEXT: v_sub_i32_e32 v1, vcc, v0, v2 3130; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v0, v2 3131; CGP-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc 3132; CGP-NEXT: v_mov_b32_e32 v1, 0 3133; CGP-NEXT: BB8_4: 3134; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 3135; CGP-NEXT: v_or_b32_e32 v3, v7, v11 3136; CGP-NEXT: v_mov_b32_e32 v2, 0 3137; CGP-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] 3138; CGP-NEXT: ; implicit-def: $vgpr2_vgpr3 3139; CGP-NEXT: s_and_saveexec_b64 s[4:5], vcc 3140; CGP-NEXT: s_xor_b64 s[6:7], exec, s[4:5] 3141; CGP-NEXT: s_cbranch_execz BB8_6 3142; CGP-NEXT: ; %bb.5: 3143; CGP-NEXT: v_ashrrev_i32_e32 v2, 31, v11 3144; CGP-NEXT: v_add_i32_e32 v3, vcc, v10, v2 3145; CGP-NEXT: v_addc_u32_e32 v4, vcc, v11, v2, vcc 3146; CGP-NEXT: v_xor_b32_e32 v6, v3, v2 3147; CGP-NEXT: v_xor_b32_e32 v2, v4, v2 3148; CGP-NEXT: v_cvt_f32_u32_e32 v4, v6 3149; CGP-NEXT: v_cvt_f32_u32_e32 v8, v2 3150; CGP-NEXT: v_ashrrev_i32_e32 v3, 31, v7 3151; CGP-NEXT: v_add_i32_e32 v5, vcc, v5, v3 3152; CGP-NEXT: v_mac_f32_e32 v4, 0x4f800000, v8 3153; CGP-NEXT: v_rcp_iflag_f32_e32 v4, v4 3154; CGP-NEXT: v_addc_u32_e32 v7, vcc, v7, v3, vcc 3155; CGP-NEXT: v_sub_i32_e32 v9, vcc, 0, v6 3156; CGP-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v4 3157; CGP-NEXT: v_mul_f32_e32 v8, 0x2f800000, v4 3158; CGP-NEXT: v_trunc_f32_e32 v8, v8 3159; CGP-NEXT: v_mac_f32_e32 v4, 0xcf800000, v8 3160; CGP-NEXT: v_cvt_u32_f32_e32 v4, v4 3161; CGP-NEXT: v_cvt_u32_f32_e32 v8, v8 3162; CGP-NEXT: v_subb_u32_e32 v10, vcc, 0, v2, vcc 3163; CGP-NEXT: v_mul_lo_u32 v11, v10, v4 3164; CGP-NEXT: v_mul_lo_u32 v12, v9, v8 3165; CGP-NEXT: v_mul_hi_u32 v14, v9, v4 3166; CGP-NEXT: v_mul_lo_u32 v13, v9, v4 3167; CGP-NEXT: v_xor_b32_e32 v5, v5, v3 3168; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3169; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v14 3170; CGP-NEXT: v_mul_lo_u32 v12, v8, v13 3171; CGP-NEXT: v_mul_lo_u32 v14, v4, v11 3172; CGP-NEXT: v_mul_hi_u32 v15, v4, v13 3173; CGP-NEXT: v_mul_hi_u32 v13, v8, v13 3174; CGP-NEXT: v_xor_b32_e32 v7, v7, v3 3175; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v14 3176; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3177; CGP-NEXT: v_add_i32_e32 v12, vcc, v12, v15 3178; CGP-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3179; CGP-NEXT: v_mul_lo_u32 v15, v8, v11 3180; CGP-NEXT: v_add_i32_e32 v12, vcc, v14, v12 3181; CGP-NEXT: v_mul_hi_u32 v14, v4, v11 3182; CGP-NEXT: v_add_i32_e32 v13, vcc, v15, v13 3183; CGP-NEXT: v_cndmask_b32_e64 v15, 0, 1, vcc 3184; CGP-NEXT: v_add_i32_e32 v13, vcc, v13, v14 3185; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3186; CGP-NEXT: v_add_i32_e32 v14, vcc, v15, v14 3187; CGP-NEXT: v_mul_hi_u32 v11, v8, v11 3188; CGP-NEXT: v_add_i32_e32 v12, vcc, v13, v12 3189; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, vcc 3190; CGP-NEXT: v_add_i32_e32 v13, vcc, v14, v13 3191; CGP-NEXT: v_add_i32_e32 v11, vcc, v11, v13 3192; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v12 3193; CGP-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc 3194; CGP-NEXT: v_mul_lo_u32 v10, v10, v4 3195; CGP-NEXT: v_mul_lo_u32 v13, v9, v12 3196; CGP-NEXT: v_mul_lo_u32 v14, v9, v4 3197; CGP-NEXT: v_mul_hi_u32 v9, v9, v4 3198; CGP-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3199; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 3200; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v10, v9 3201; CGP-NEXT: v_mul_lo_u32 v10, v12, v14 3202; CGP-NEXT: v_mul_lo_u32 v13, v4, v9 3203; CGP-NEXT: v_mul_hi_u32 v11, v4, v14 3204; CGP-NEXT: v_mul_hi_u32 v14, v12, v14 3205; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v13 3206; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 3207; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v10, v11 3208; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 3209; CGP-NEXT: v_mul_lo_u32 v11, v12, v9 3210; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v13, v10 3211; CGP-NEXT: v_mul_hi_u32 v13, v4, v9 3212; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14 3213; CGP-NEXT: v_cndmask_b32_e64 v14, 0, 1, s[4:5] 3214; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v11, v13 3215; CGP-NEXT: v_cndmask_b32_e64 v13, 0, 1, s[4:5] 3216; CGP-NEXT: v_add_i32_e64 v13, s[4:5], v14, v13 3217; CGP-NEXT: v_mul_hi_u32 v9, v12, v9 3218; CGP-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 3219; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3220; CGP-NEXT: v_add_i32_e64 v11, s[4:5], v13, v11 3221; CGP-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 3222; CGP-NEXT: v_addc_u32_e32 v8, vcc, v8, v9, vcc 3223; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 3224; CGP-NEXT: v_addc_u32_e32 v8, vcc, 0, v8, vcc 3225; CGP-NEXT: v_mul_lo_u32 v9, v7, v4 3226; CGP-NEXT: v_mul_lo_u32 v10, v5, v8 3227; CGP-NEXT: v_mul_hi_u32 v11, v5, v4 3228; CGP-NEXT: v_mul_hi_u32 v4, v7, v4 3229; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3230; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3231; CGP-NEXT: v_add_i32_e32 v9, vcc, v9, v11 3232; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3233; CGP-NEXT: v_mul_lo_u32 v11, v7, v8 3234; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 3235; CGP-NEXT: v_mul_hi_u32 v10, v5, v8 3236; CGP-NEXT: v_add_i32_e32 v4, vcc, v11, v4 3237; CGP-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3238; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v10 3239; CGP-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3240; CGP-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3241; CGP-NEXT: v_mul_hi_u32 v8, v7, v8 3242; CGP-NEXT: v_add_i32_e32 v4, vcc, v4, v9 3243; CGP-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3244; CGP-NEXT: v_add_i32_e32 v9, vcc, v10, v9 3245; CGP-NEXT: v_add_i32_e32 v8, vcc, v8, v9 3246; CGP-NEXT: v_mul_lo_u32 v9, v2, v4 3247; CGP-NEXT: v_mul_lo_u32 v8, v6, v8 3248; CGP-NEXT: v_mul_lo_u32 v10, v6, v4 3249; CGP-NEXT: v_mul_hi_u32 v4, v6, v4 3250; CGP-NEXT: v_add_i32_e32 v8, vcc, v9, v8 3251; CGP-NEXT: v_add_i32_e32 v4, vcc, v8, v4 3252; CGP-NEXT: v_sub_i32_e32 v5, vcc, v5, v10 3253; CGP-NEXT: v_subb_u32_e64 v8, s[4:5], v7, v4, vcc 3254; CGP-NEXT: v_sub_i32_e64 v4, s[4:5], v7, v4 3255; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v2 3256; CGP-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3257; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v6 3258; CGP-NEXT: v_cndmask_b32_e64 v9, 0, -1, s[4:5] 3259; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v8, v2 3260; CGP-NEXT: v_subb_u32_e32 v4, vcc, v4, v2, vcc 3261; CGP-NEXT: v_cndmask_b32_e64 v7, v7, v9, s[4:5] 3262; CGP-NEXT: v_sub_i32_e32 v9, vcc, v5, v6 3263; CGP-NEXT: v_subbrev_u32_e64 v10, s[4:5], 0, v4, vcc 3264; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v10, v2 3265; CGP-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3266; CGP-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v6 3267; CGP-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[4:5] 3268; CGP-NEXT: v_cmp_eq_u32_e64 s[4:5], v10, v2 3269; CGP-NEXT: v_subb_u32_e32 v2, vcc, v4, v2, vcc 3270; CGP-NEXT: v_sub_i32_e32 v4, vcc, v9, v6 3271; CGP-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[4:5] 3272; CGP-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 3273; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 3274; CGP-NEXT: v_cndmask_b32_e32 v4, v9, v4, vcc 3275; CGP-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc 3276; CGP-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3277; CGP-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc 3278; CGP-NEXT: v_cndmask_b32_e32 v2, v8, v2, vcc 3279; CGP-NEXT: v_xor_b32_e32 v4, v4, v3 3280; CGP-NEXT: v_xor_b32_e32 v5, v2, v3 3281; CGP-NEXT: v_sub_i32_e32 v2, vcc, v4, v3 3282; CGP-NEXT: v_subb_u32_e32 v3, vcc, v5, v3, vcc 3283; CGP-NEXT: ; implicit-def: $vgpr10_vgpr11 3284; CGP-NEXT: ; implicit-def: $vgpr5 3285; CGP-NEXT: BB8_6: ; %Flow 3286; CGP-NEXT: s_or_saveexec_b64 s[4:5], s[6:7] 3287; CGP-NEXT: s_xor_b64 exec, exec, s[4:5] 3288; CGP-NEXT: s_cbranch_execz BB8_8 3289; CGP-NEXT: ; %bb.7: 3290; CGP-NEXT: v_cvt_f32_u32_e32 v2, v10 3291; CGP-NEXT: v_sub_i32_e32 v3, vcc, 0, v10 3292; CGP-NEXT: v_rcp_iflag_f32_e32 v2, v2 3293; CGP-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2 3294; CGP-NEXT: v_cvt_u32_f32_e32 v2, v2 3295; CGP-NEXT: v_mul_lo_u32 v3, v3, v2 3296; CGP-NEXT: v_mul_hi_u32 v3, v2, v3 3297; CGP-NEXT: v_add_i32_e32 v2, vcc, v2, v3 3298; CGP-NEXT: v_mul_hi_u32 v2, v5, v2 3299; CGP-NEXT: v_mul_lo_u32 v2, v2, v10 3300; CGP-NEXT: v_sub_i32_e32 v2, vcc, v5, v2 3301; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v10 3302; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v10 3303; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 3304; CGP-NEXT: v_sub_i32_e32 v3, vcc, v2, v10 3305; CGP-NEXT: v_cmp_ge_u32_e32 vcc, v2, v10 3306; CGP-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc 3307; CGP-NEXT: v_mov_b32_e32 v3, 0 3308; CGP-NEXT: BB8_8: 3309; CGP-NEXT: s_or_b64 exec, exec, s[4:5] 3310; CGP-NEXT: s_setpc_b64 s[30:31] 3311 %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y 3312 %r = srem <2 x i64> %x, %shl.y 3313 ret <2 x i64> %r 3314} 3315 3316define i64 @v_srem_i64_24bit(i64 %num, i64 %den) { 3317; GISEL-LABEL: v_srem_i64_24bit: 3318; GISEL: ; %bb.0: 3319; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3320; GISEL-NEXT: s_mov_b32 s4, 0xffffff 3321; GISEL-NEXT: v_and_b32_e32 v1, s4, v2 3322; GISEL-NEXT: v_cvt_f32_u32_e32 v2, v1 3323; GISEL-NEXT: v_sub_i32_e32 v3, vcc, 0, v1 3324; GISEL-NEXT: v_and_b32_e32 v0, s4, v0 3325; GISEL-NEXT: v_rcp_iflag_f32_e32 v2, v2 3326; GISEL-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v2 3327; GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2 3328; GISEL-NEXT: v_mul_lo_u32 v3, v3, v2 3329; GISEL-NEXT: v_mul_hi_u32 v3, v2, v3 3330; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v3 3331; GISEL-NEXT: v_mul_hi_u32 v2, v0, v2 3332; GISEL-NEXT: v_mul_lo_u32 v2, v2, v1 3333; GISEL-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 3334; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v0, v1 3335; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3336; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 3337; GISEL-NEXT: v_sub_i32_e32 v2, vcc, v0, v1 3338; GISEL-NEXT: v_cmp_ge_u32_e32 vcc, v0, v1 3339; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 3340; GISEL-NEXT: v_mov_b32_e32 v1, 0 3341; GISEL-NEXT: s_setpc_b64 s[30:31] 3342; 3343; CGP-LABEL: v_srem_i64_24bit: 3344; CGP: ; %bb.0: 3345; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3346; CGP-NEXT: s_mov_b32 s4, 0xffffff 3347; CGP-NEXT: v_and_b32_e32 v1, s4, v2 3348; CGP-NEXT: v_cvt_f32_i32_e32 v2, v1 3349; CGP-NEXT: v_and_b32_e32 v0, s4, v0 3350; CGP-NEXT: v_cvt_f32_i32_e32 v3, v0 3351; CGP-NEXT: v_rcp_f32_e32 v4, v2 3352; CGP-NEXT: v_mul_f32_e32 v4, v3, v4 3353; CGP-NEXT: v_trunc_f32_e32 v4, v4 3354; CGP-NEXT: v_mad_f32 v3, -v4, v2, v3 3355; CGP-NEXT: v_cvt_i32_f32_e32 v4, v4 3356; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v3|, |v2| 3357; CGP-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5] 3358; CGP-NEXT: v_add_i32_e32 v2, vcc, v4, v2 3359; CGP-NEXT: v_mul_lo_u32 v1, v2, v1 3360; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 3361; CGP-NEXT: v_bfe_i32 v0, v0, 0, 25 3362; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v0 3363; CGP-NEXT: s_setpc_b64 s[30:31] 3364 %num.mask = and i64 %num, 16777215 3365 %den.mask = and i64 %den, 16777215 3366 %result = srem i64 %num.mask, %den.mask 3367 ret i64 %result 3368} 3369 3370define <2 x i64> @v_srem_v2i64_24bit(<2 x i64> %num, <2 x i64> %den) { 3371; GISEL-LABEL: v_srem_v2i64_24bit: 3372; GISEL: ; %bb.0: 3373; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3374; GISEL-NEXT: s_mov_b32 s6, 0xffffff 3375; GISEL-NEXT: v_and_b32_e32 v1, s6, v4 3376; GISEL-NEXT: v_add_i32_e32 v1, vcc, 0, v1 3377; GISEL-NEXT: v_addc_u32_e64 v3, s[4:5], 0, 0, vcc 3378; GISEL-NEXT: v_cvt_f32_u32_e32 v4, v1 3379; GISEL-NEXT: v_cvt_f32_u32_e32 v5, v3 3380; GISEL-NEXT: v_sub_i32_e32 v7, vcc, 0, v1 3381; GISEL-NEXT: v_subb_u32_e32 v8, vcc, 0, v3, vcc 3382; GISEL-NEXT: v_mac_f32_e32 v4, 0x4f800000, v5 3383; GISEL-NEXT: v_rcp_iflag_f32_e32 v4, v4 3384; GISEL-NEXT: v_and_b32_e32 v5, s6, v0 3385; GISEL-NEXT: v_and_b32_e32 v0, s6, v2 3386; GISEL-NEXT: v_and_b32_e32 v6, s6, v6 3387; GISEL-NEXT: v_mul_f32_e32 v2, 0x5f7ffffc, v4 3388; GISEL-NEXT: v_mul_f32_e32 v4, 0x2f800000, v2 3389; GISEL-NEXT: v_trunc_f32_e32 v4, v4 3390; GISEL-NEXT: v_mac_f32_e32 v2, 0xcf800000, v4 3391; GISEL-NEXT: v_cvt_u32_f32_e32 v2, v2 3392; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 3393; GISEL-NEXT: v_mul_lo_u32 v9, v8, v2 3394; GISEL-NEXT: v_mul_lo_u32 v10, v7, v4 3395; GISEL-NEXT: v_mul_hi_u32 v12, v7, v2 3396; GISEL-NEXT: v_mul_lo_u32 v11, v7, v2 3397; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3398; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 3399; GISEL-NEXT: v_mul_lo_u32 v10, v4, v11 3400; GISEL-NEXT: v_mul_lo_u32 v12, v2, v9 3401; GISEL-NEXT: v_mul_hi_u32 v14, v2, v11 3402; GISEL-NEXT: v_add_i32_e32 v5, vcc, 0, v5 3403; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], 0, 0, vcc 3404; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 3405; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3406; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v14 3407; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3408; GISEL-NEXT: v_mul_lo_u32 v14, v4, v9 3409; GISEL-NEXT: v_mul_hi_u32 v11, v4, v11 3410; GISEL-NEXT: v_add_i32_e32 v10, vcc, v12, v10 3411; GISEL-NEXT: v_mul_hi_u32 v12, v2, v9 3412; GISEL-NEXT: v_add_i32_e32 v11, vcc, v14, v11 3413; GISEL-NEXT: v_cndmask_b32_e64 v14, 0, 1, vcc 3414; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3415; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3416; GISEL-NEXT: v_add_i32_e32 v12, vcc, v14, v12 3417; GISEL-NEXT: v_mul_hi_u32 v9, v4, v9 3418; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3419; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3420; GISEL-NEXT: v_add_i32_e32 v11, vcc, v12, v11 3421; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v11 3422; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v10 3423; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v4, v9, vcc 3424; GISEL-NEXT: v_mul_lo_u32 v8, v8, v2 3425; GISEL-NEXT: v_mul_lo_u32 v11, v7, v10 3426; GISEL-NEXT: v_mul_lo_u32 v12, v7, v2 3427; GISEL-NEXT: v_mul_hi_u32 v7, v7, v2 3428; GISEL-NEXT: v_add_i32_e64 v4, s[4:5], v4, v9 3429; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3430; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 3431; GISEL-NEXT: v_mul_lo_u32 v8, v10, v12 3432; GISEL-NEXT: v_mul_lo_u32 v11, v2, v7 3433; GISEL-NEXT: v_mul_hi_u32 v9, v2, v12 3434; GISEL-NEXT: v_mul_hi_u32 v12, v10, v12 3435; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11 3436; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3437; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 3438; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 3439; GISEL-NEXT: v_mul_lo_u32 v9, v10, v7 3440; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v11, v8 3441; GISEL-NEXT: v_mul_hi_u32 v11, v2, v7 3442; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v12 3443; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, s[4:5] 3444; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 3445; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3446; GISEL-NEXT: v_add_i32_e64 v11, s[4:5], v12, v11 3447; GISEL-NEXT: v_mul_hi_u32 v7, v10, v7 3448; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 3449; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 3450; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v11, v9 3451; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v7, v9 3452; GISEL-NEXT: v_addc_u32_e32 v4, vcc, v4, v7, vcc 3453; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v8 3454; GISEL-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 3455; GISEL-NEXT: v_mul_lo_u32 v7, v13, v2 3456; GISEL-NEXT: v_mul_lo_u32 v8, v5, v4 3457; GISEL-NEXT: v_mul_hi_u32 v9, v5, v2 3458; GISEL-NEXT: v_mul_hi_u32 v2, v13, v2 3459; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 3460; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3461; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v9 3462; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3463; GISEL-NEXT: v_mul_lo_u32 v9, v13, v4 3464; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3465; GISEL-NEXT: v_mul_hi_u32 v8, v5, v4 3466; GISEL-NEXT: v_add_i32_e32 v2, vcc, v9, v2 3467; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, vcc 3468; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v8 3469; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3470; GISEL-NEXT: v_add_i32_e32 v8, vcc, v9, v8 3471; GISEL-NEXT: v_mul_hi_u32 v4, v13, v4 3472; GISEL-NEXT: v_add_i32_e32 v2, vcc, v2, v7 3473; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3474; GISEL-NEXT: v_add_i32_e32 v7, vcc, v8, v7 3475; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v7 3476; GISEL-NEXT: v_mul_lo_u32 v7, v3, v2 3477; GISEL-NEXT: v_mul_lo_u32 v4, v1, v4 3478; GISEL-NEXT: v_mul_lo_u32 v8, v1, v2 3479; GISEL-NEXT: v_mul_hi_u32 v2, v1, v2 3480; GISEL-NEXT: v_add_i32_e32 v4, vcc, v7, v4 3481; GISEL-NEXT: v_add_i32_e32 v2, vcc, v4, v2 3482; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v5, v8 3483; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v13, v2, vcc 3484; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v13, v2 3485; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v3 3486; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3487; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v1 3488; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 3489; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v3 3490; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v3, vcc 3491; GISEL-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] 3492; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v4, v1 3493; GISEL-NEXT: v_subbrev_u32_e64 v9, s[4:5], 0, v2, vcc 3494; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v3 3495; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v3, vcc 3496; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 3497; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v1 3498; GISEL-NEXT: v_sub_i32_e32 v1, vcc, v8, v1 3499; GISEL-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 3500; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3501; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v3 3502; GISEL-NEXT: v_add_i32_e32 v3, vcc, 0, v6 3503; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 3504; GISEL-NEXT: v_addc_u32_e64 v6, s[4:5], 0, 0, vcc 3505; GISEL-NEXT: v_cvt_f32_u32_e32 v11, v3 3506; GISEL-NEXT: v_cvt_f32_u32_e32 v12, v6 3507; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 3508; GISEL-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc 3509; GISEL-NEXT: v_cndmask_b32_e32 v2, v9, v2, vcc 3510; GISEL-NEXT: v_mac_f32_e32 v11, 0x4f800000, v12 3511; GISEL-NEXT: v_rcp_iflag_f32_e32 v8, v11 3512; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3513; GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc 3514; GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc 3515; GISEL-NEXT: v_mul_f32_e32 v4, 0x5f7ffffc, v8 3516; GISEL-NEXT: v_mul_f32_e32 v5, 0x2f800000, v4 3517; GISEL-NEXT: v_trunc_f32_e32 v5, v5 3518; GISEL-NEXT: v_mac_f32_e32 v4, 0xcf800000, v5 3519; GISEL-NEXT: v_cvt_u32_f32_e32 v4, v4 3520; GISEL-NEXT: v_cvt_u32_f32_e32 v5, v5 3521; GISEL-NEXT: v_sub_i32_e32 v7, vcc, 0, v3 3522; GISEL-NEXT: v_subb_u32_e32 v8, vcc, 0, v6, vcc 3523; GISEL-NEXT: v_mul_lo_u32 v9, v8, v4 3524; GISEL-NEXT: v_mul_lo_u32 v10, v7, v5 3525; GISEL-NEXT: v_mul_hi_u32 v12, v7, v4 3526; GISEL-NEXT: v_mul_lo_u32 v11, v7, v4 3527; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3528; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v12 3529; GISEL-NEXT: v_mul_lo_u32 v10, v5, v11 3530; GISEL-NEXT: v_mul_lo_u32 v12, v4, v9 3531; GISEL-NEXT: v_add_i32_e32 v13, vcc, 0, v0 3532; GISEL-NEXT: v_mul_hi_u32 v0, v4, v11 3533; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], 0, 0, vcc 3534; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 3535; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3536; GISEL-NEXT: v_add_i32_e32 v0, vcc, v10, v0 3537; GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc 3538; GISEL-NEXT: v_mul_lo_u32 v10, v5, v9 3539; GISEL-NEXT: v_mul_hi_u32 v11, v5, v11 3540; GISEL-NEXT: v_add_i32_e32 v0, vcc, v12, v0 3541; GISEL-NEXT: v_mul_hi_u32 v12, v4, v9 3542; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v11 3543; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc 3544; GISEL-NEXT: v_add_i32_e32 v10, vcc, v10, v12 3545; GISEL-NEXT: v_cndmask_b32_e64 v12, 0, 1, vcc 3546; GISEL-NEXT: v_add_i32_e32 v11, vcc, v11, v12 3547; GISEL-NEXT: v_mul_hi_u32 v9, v5, v9 3548; GISEL-NEXT: v_add_i32_e32 v0, vcc, v10, v0 3549; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, vcc 3550; GISEL-NEXT: v_add_i32_e32 v10, vcc, v11, v10 3551; GISEL-NEXT: v_add_i32_e32 v9, vcc, v9, v10 3552; GISEL-NEXT: v_add_i32_e32 v0, vcc, v4, v0 3553; GISEL-NEXT: v_addc_u32_e64 v4, s[4:5], v5, v9, vcc 3554; GISEL-NEXT: v_mul_lo_u32 v8, v8, v0 3555; GISEL-NEXT: v_mul_lo_u32 v10, v7, v4 3556; GISEL-NEXT: v_mul_lo_u32 v11, v7, v0 3557; GISEL-NEXT: v_mul_hi_u32 v7, v7, v0 3558; GISEL-NEXT: v_add_i32_e64 v5, s[4:5], v5, v9 3559; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 3560; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v8, v7 3561; GISEL-NEXT: v_mul_lo_u32 v8, v4, v11 3562; GISEL-NEXT: v_mul_lo_u32 v10, v0, v7 3563; GISEL-NEXT: v_mul_hi_u32 v9, v0, v11 3564; GISEL-NEXT: v_mul_hi_u32 v11, v4, v11 3565; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v10 3566; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 3567; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v8, v9 3568; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, s[4:5] 3569; GISEL-NEXT: v_mul_lo_u32 v9, v4, v7 3570; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v10, v8 3571; GISEL-NEXT: v_mul_hi_u32 v10, v0, v7 3572; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v11 3573; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5] 3574; GISEL-NEXT: v_add_i32_e64 v9, s[4:5], v9, v10 3575; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, 1, s[4:5] 3576; GISEL-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10 3577; GISEL-NEXT: v_mul_hi_u32 v4, v4, v7 3578; GISEL-NEXT: v_add_i32_e64 v8, s[4:5], v9, v8 3579; GISEL-NEXT: v_cndmask_b32_e64 v9, 0, 1, s[4:5] 3580; GISEL-NEXT: v_add_i32_e64 v7, s[4:5], v10, v9 3581; GISEL-NEXT: v_add_i32_e64 v4, s[4:5], v4, v7 3582; GISEL-NEXT: v_addc_u32_e32 v4, vcc, v5, v4, vcc 3583; GISEL-NEXT: v_add_i32_e32 v5, vcc, v0, v8 3584; GISEL-NEXT: v_addc_u32_e32 v4, vcc, 0, v4, vcc 3585; GISEL-NEXT: v_mul_lo_u32 v7, v14, v5 3586; GISEL-NEXT: v_mul_lo_u32 v8, v13, v4 3587; GISEL-NEXT: v_subrev_i32_e32 v0, vcc, 0, v1 3588; GISEL-NEXT: v_subbrev_u32_e32 v1, vcc, 0, v2, vcc 3589; GISEL-NEXT: v_mul_hi_u32 v2, v13, v5 3590; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 3591; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3592; GISEL-NEXT: v_add_i32_e32 v2, vcc, v7, v2 3593; GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 3594; GISEL-NEXT: v_mul_lo_u32 v7, v14, v4 3595; GISEL-NEXT: v_mul_hi_u32 v5, v14, v5 3596; GISEL-NEXT: v_add_i32_e32 v2, vcc, v8, v2 3597; GISEL-NEXT: v_mul_hi_u32 v8, v13, v4 3598; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 3599; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc 3600; GISEL-NEXT: v_add_i32_e32 v5, vcc, v5, v8 3601; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, 1, vcc 3602; GISEL-NEXT: v_add_i32_e32 v7, vcc, v7, v8 3603; GISEL-NEXT: v_mul_hi_u32 v4, v14, v4 3604; GISEL-NEXT: v_add_i32_e32 v2, vcc, v5, v2 3605; GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc 3606; GISEL-NEXT: v_add_i32_e32 v5, vcc, v7, v5 3607; GISEL-NEXT: v_add_i32_e32 v4, vcc, v4, v5 3608; GISEL-NEXT: v_mul_lo_u32 v5, v6, v2 3609; GISEL-NEXT: v_mul_lo_u32 v4, v3, v4 3610; GISEL-NEXT: v_mul_lo_u32 v7, v3, v2 3611; GISEL-NEXT: v_mul_hi_u32 v2, v3, v2 3612; GISEL-NEXT: v_add_i32_e32 v4, vcc, v5, v4 3613; GISEL-NEXT: v_add_i32_e32 v2, vcc, v4, v2 3614; GISEL-NEXT: v_sub_i32_e32 v4, vcc, v13, v7 3615; GISEL-NEXT: v_subb_u32_e64 v5, s[4:5], v14, v2, vcc 3616; GISEL-NEXT: v_sub_i32_e64 v2, s[4:5], v14, v2 3617; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v5, v6 3618; GISEL-NEXT: v_cndmask_b32_e64 v7, 0, -1, s[4:5] 3619; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v4, v3 3620; GISEL-NEXT: v_cndmask_b32_e64 v8, 0, -1, s[4:5] 3621; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v5, v6 3622; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v6, vcc 3623; GISEL-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[4:5] 3624; GISEL-NEXT: v_sub_i32_e32 v8, vcc, v4, v3 3625; GISEL-NEXT: v_subbrev_u32_e64 v9, s[4:5], 0, v2, vcc 3626; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v9, v6 3627; GISEL-NEXT: v_cndmask_b32_e64 v10, 0, -1, s[4:5] 3628; GISEL-NEXT: v_cmp_ge_u32_e64 s[4:5], v8, v3 3629; GISEL-NEXT: v_subb_u32_e32 v2, vcc, v2, v6, vcc 3630; GISEL-NEXT: v_cndmask_b32_e64 v11, 0, -1, s[4:5] 3631; GISEL-NEXT: v_cmp_eq_u32_e64 s[4:5], v9, v6 3632; GISEL-NEXT: v_sub_i32_e32 v3, vcc, v8, v3 3633; GISEL-NEXT: v_cndmask_b32_e64 v10, v10, v11, s[4:5] 3634; GISEL-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc 3635; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v10 3636; GISEL-NEXT: v_cndmask_b32_e32 v3, v8, v3, vcc 3637; GISEL-NEXT: v_cndmask_b32_e32 v2, v9, v2, vcc 3638; GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v7 3639; GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc 3640; GISEL-NEXT: v_cndmask_b32_e32 v4, v5, v2, vcc 3641; GISEL-NEXT: v_subrev_i32_e32 v2, vcc, 0, v3 3642; GISEL-NEXT: v_subbrev_u32_e32 v3, vcc, 0, v4, vcc 3643; GISEL-NEXT: s_setpc_b64 s[30:31] 3644; 3645; CGP-LABEL: v_srem_v2i64_24bit: 3646; CGP: ; %bb.0: 3647; CGP-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3648; CGP-NEXT: s_mov_b32 s4, 0xffffff 3649; CGP-NEXT: v_and_b32_e32 v1, s4, v4 3650; CGP-NEXT: v_cvt_f32_i32_e32 v3, v1 3651; CGP-NEXT: v_and_b32_e32 v0, s4, v0 3652; CGP-NEXT: v_cvt_f32_i32_e32 v4, v0 3653; CGP-NEXT: v_and_b32_e32 v6, s4, v6 3654; CGP-NEXT: v_rcp_f32_e32 v5, v3 3655; CGP-NEXT: v_and_b32_e32 v2, s4, v2 3656; CGP-NEXT: v_mul_f32_e32 v5, v4, v5 3657; CGP-NEXT: v_trunc_f32_e32 v5, v5 3658; CGP-NEXT: v_mad_f32 v4, -v5, v3, v4 3659; CGP-NEXT: v_cvt_i32_f32_e32 v5, v5 3660; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v4|, |v3| 3661; CGP-NEXT: v_cvt_f32_i32_e32 v4, v6 3662; CGP-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5] 3663; CGP-NEXT: v_add_i32_e32 v3, vcc, v5, v3 3664; CGP-NEXT: v_mul_lo_u32 v1, v3, v1 3665; CGP-NEXT: v_cvt_f32_i32_e32 v3, v2 3666; CGP-NEXT: v_rcp_f32_e32 v5, v4 3667; CGP-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 3668; CGP-NEXT: v_mul_f32_e32 v1, v3, v5 3669; CGP-NEXT: v_trunc_f32_e32 v1, v1 3670; CGP-NEXT: v_mad_f32 v3, -v1, v4, v3 3671; CGP-NEXT: v_cvt_i32_f32_e32 v1, v1 3672; CGP-NEXT: v_cmp_ge_f32_e64 s[4:5], |v3|, |v4| 3673; CGP-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5] 3674; CGP-NEXT: v_bfe_i32 v0, v0, 0, 25 3675; CGP-NEXT: v_add_i32_e32 v1, vcc, v1, v3 3676; CGP-NEXT: v_mul_lo_u32 v3, v1, v6 3677; CGP-NEXT: v_ashrrev_i32_e32 v1, 31, v0 3678; CGP-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 3679; CGP-NEXT: v_bfe_i32 v2, v2, 0, 25 3680; CGP-NEXT: v_ashrrev_i32_e32 v3, 31, v2 3681; CGP-NEXT: s_setpc_b64 s[30:31] 3682 %num.mask = and <2 x i64> %num, <i64 16777215, i64 16777215> 3683 %den.mask = and <2 x i64> %den, <i64 16777215, i64 16777215> 3684 %result = srem <2 x i64> %num.mask, %den.mask 3685 ret <2 x i64> %result 3686} 3687